luke
/
klayout
mirror of https://github.com/KLayout/klayout.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity
6,310 Commits 89 Branches 97 Tags 457 MiB
Commit Graph

1998 Commits

Author SHA1 Message Date
Matthias Koefferlein 9fa82f01d8 WIP (code reduction and performance enhancement of basic DRC checks) 2021-11-07 21:46:18 +01:00
Matthias Koefferlein a0367c1530 More specific clip variants after bounding boxes have been reduced in RecursiveShapeIterator 2021-11-01 17:27:52 +01:00
Matthias Koefferlein bc54ba3b99 Merge branch 'performance' into head 2021-11-01 14:32:31 +01:00
Matthias Koefferlein d244d5aac6 Debugging plus enhancments 
Basic change: DeepShapeStore+CellMapping uses (new) hier_generation_id of Layout to figure out
if the hierarchy has changed and the cache needs update.
 2021-11-01 13:49:00 +01:00
Matthias Koefferlein 64a6b3acdc WIP 2021-11-01 09:53:51 +01:00
Matthias Koefferlein 902375cc4d WIP: trying to reduce the number of DSS-internal cell mappings by caching cell maps 2021-10-31 00:59:42 +02:00
Matthias Koefferlein 455c40ced6 More consistent verbosity levels for cell mapping 2021-10-30 21:31:05 +02:00
Matthias Koefferlein ebe38912a6 Tests and documentation for dbTrans#is_complex? 2021-10-27 23:36:58 +02:00
Matthias Koefferlein 20f3733c58 WIP: lean recursive shape touch check 2021-10-27 00:38:12 +02:00
Matthias Koefferlein 596080669d WIP 2021-10-26 23:10:29 +02:00
Matthias Koefferlein 7881c0953c WIP 2021-10-24 20:28:15 +02:00
Matthias Koefferlein c6bd856331 WIP 2021-10-24 00:05:50 +02:00
Matthias Koefferlein 09df614d8a Bugfix: array iterator must not iterate on empty search box. 2021-10-22 23:52:35 +02:00
Matthias Koefferlein abe40ae99f Bugfix plus more tests 2021-10-19 20:48:13 +02:00
Matthias Koefferlein 451f57bb25 Fixed #909 (Crash on DRC) 2021-09-21 23:37:57 +02:00
Matthias Köfferlein 80fd5b79be
Merge pull request #908 from KLayout/netlist-compare-performance2 
Improving netist compare performance for array case + some enhancements
 2021-09-21 22:43:37 +02:00
Matthias Köfferlein f1e59a7dc6
Merge pull request #907 from KLayout/issue-905 
Fixed #905 (Crash while deleting a Library)
 2021-09-21 22:43:22 +02:00
Matthias Koefferlein ceb0b2298f Some cleanup, updated tests 2021-09-19 19:05:09 +02:00
Matthias Koefferlein b7827f7b5f Maybe found a solution for the matrix arrangement runtime problem 2021-09-19 18:29:57 +02:00
Matthias Koefferlein 930423bcc7 WIP 2021-09-19 17:26:28 +02:00
Matthias Koefferlein a42d761e95 Some small refactoring 2021-09-17 22:46:56 +02:00
Matthias Koefferlein 71b5695344 Fixed #905 2021-09-15 00:09:56 +02:00
Matthias Koefferlein 0f4b0e4826 Ported some enhancements from WIP branch (debug output, capturing easy wins when max depth is exhausted) 2021-09-14 22:31:24 +02:00
Matthias Koefferlein b671b1843b Fixed a problem with net compare config - depth first wasn't considered in all cases 2021-09-12 22:35:08 +02:00
Matthias Koefferlein 89052660ee Refactoring of the netlist compare code 2021-09-12 22:35:03 +02:00
Matthias Koefferlein 822709dd5a Refactoring of the netlist compare code 2021-09-12 22:34:59 +02:00
Matthias Koefferlein 52c79feeed Refactoring of the netlist compare code 2021-09-12 22:34:55 +02:00
Matthias Koefferlein ab3bceda75 Fixed #898 (netlist reader ignores last list) 2021-08-29 21:12:04 +02:00
Matthias Köfferlein 225d3ab32d
issue-892 (#895) 2021-08-24 21:37:02 +02:00
Matthias Köfferlein 1916a4f683
Merge pull request #884 from KLayout/issue-881 
Fixed #881 (typo in separation check and others)
 2021-07-31 11:01:55 +02:00
Matthias Koefferlein d7438b43ae Fixed #881 (typo in separation check and others) 2021-07-30 23:13:24 +02:00
Matthias Koefferlein 9543cea952 Fixed tests 2021-07-29 22:24:22 +02:00
Matthias Koefferlein 8b970039c0 Using primary(layout) netlist as reference for primary parameters and compare delegate - this also removes some potential glitches 2021-07-29 01:15:35 +02:00
Matthias Koefferlein a90e14b692 Some tests added. 2021-07-27 23:08:34 +02:00
Matthias Koefferlein 42b7290fe5 Device parameter comparer now also compares other (primary) parameters, parameters primary in both netlists are considered to be compared by default, 'ignore' feature in tolerance 2021-07-27 22:15:59 +02:00
Matthias Koefferlein 37457aa02f Spice reader flags existing parameters as primary 2021-07-27 22:13:45 +02:00
Matthias Koefferlein 7a37a6b7ed Implemented extent(cell_filter) for DRC, added Layout#cells with name filter 2021-07-21 18:31:51 +02:00
Matthias Koefferlein 722b45b721 Fixed tests 2021-07-19 07:47:41 +02:00
Matthias Koefferlein bc74f189f8 Introducing asymmetric ambiguity groups for better matching of black box circuits with optional pins. 2021-07-18 23:33:01 +02:00
Matthias Koefferlein 70f4c7e2b5 A small refactoring. 2021-07-18 23:09:51 +02:00
Matthias Koefferlein 2c8d065eb3 Some enhancments + test update 
1. Be more careful with net names
Net names are used now for sorting the graph nodes, but not for
strict compare. This is useful to derive swappable pins for
blackbox circuits.

2. Be more careful with pins from schematic netlist
Pins from schematic netlist without a corresponding pin on the layer
side are treated as mandatory unless connected to a trivial net.
Pins connecting to non-trivial nets inside the subcircuit are always
considered mandatory.
This way schematic pins enforce corresponding layout pins.
On the other hand, layout pins connecting to trivial nets inside
the subcircuit are considered non-mandatory.
 2021-07-18 22:34:02 +02:00
Matthias Koefferlein 51d117e379 Refined black box pin heuristics 
Pins are required to match if they are passive inside the
subcircuit but connected to a non-trivial net in the calling circuit.
 2021-07-18 20:39:19 +02:00
Matthias Koefferlein 05386668b4 Re-introducing pin name mapping for net assignment 2021-07-18 20:20:23 +02:00
Matthias Koefferlein 23bea5dc07 Using real pin IDs for printing nodes in netlist compare debug output 2021-07-18 17:39:32 +02:00
Matthias Koefferlein d018805c23 Some refactoring. 2021-07-18 16:54:27 +02:00
Matthias Koefferlein 2f3e113db0 Added missing subcircuit mismatch events to netlist compare 2021-07-17 22:06:06 +02:00
Matthias Koefferlein 3f3f4c9173 Fixed some compiler warnings. 2021-07-17 22:03:22 +02:00
Matthias Köfferlein 054bfa3be4
Merge pull request #865 from KLayout/issue-864 
Fixed #864 (Shapes#copy_shapes does not support undo/redo)
 2021-07-17 13:44:15 +02:00
Matthias Köfferlein 19f2769137
Merge pull request #862 from KLayout/matching-of-blackbox-circuits 
Enhanced matching of blackbox/pin ambiguities
 2021-07-17 13:43:59 +02:00
klayoutmatthias 1555daf68c Adjustments for Windows build with MSVC2019 (VC 16.10.31419.357) 
1. removed some duplicate symbol linker error
2. removed many compiler warnings (mainly size_t/int compatibility)
3. consistent definition of db::pcell_id_type
4. removed UTF-8 character codes from string constants
5. float constants for float arguments
6. timeout in tlHttp when no openssl lib is found (instead of stalling
   app)
 2021-07-17 00:20:55 +02:00
Matthias Koefferlein 2fee924103 Updated the solution 2021-07-15 23:39:02 +02:00
Matthias Koefferlein d14892382c Fixed #864 (Shapes#copy_shapes does not support undo/redo) 
While doing so changed the following things too:
- Instance and Shapes methods raise an exception if not
  in editable mode and with undo/redo
- Faster and leaner undo/redo on Shapes#clear
 2021-07-15 00:44:28 +02:00
Matthias Koefferlein 2b447854f9 Enhanced matching of blackbox/pin ambiguities 
Previously: matching of blackbox pins was enforced
by using pin names for passive nets in the compare.
Problem: no match was achieved when pins are not
named or not named consistently.

In this case, it's desirable to treat them as
ambiguous.

The new solution is to let the ambiguity resolver handle
that using an extended definition of the net names:
it will take the pin name into account if an unnamed net
is attached to a pin.

In addition, net ambiguities are projected to pin
equivalence now. This also will propagate symmetry
through nested blocks (dbNetlistCompareTests:20_BusLikeConnections).
 2021-07-08 23:54:20 +02:00
Matthias Koefferlein bad3232415 Trying to fix a linker problem. 2021-07-07 08:03:07 +02:00
Matthias Koefferlein 4e54715d64 Merge branch 'wip-lvs' 2021-07-06 23:40:44 +02:00
Matthias Köfferlein e78d0d81ae
Merge pull request #849 from KLayout/lvs-blackbox 
Lvs blackbox
 2021-07-06 23:38:21 +02:00
Matthias Koefferlein 720057e071 Added a #include which was missing 2021-07-06 21:16:57 +02:00
Matthias Koefferlein 8f65ab099f Fixed DeviceClass assignment operator 2021-07-06 07:56:27 +02:00
Matthias Koefferlein 4e0d8d92ef Updated doc, reverted netlist writer to write all parameters - it will only write primary parameters for R, L and C 2021-07-05 22:45:40 +02:00
Matthias Koefferlein e34fc8967a Some enhancements 
* Device#net_for_terminal with terminal name
* Spice writer now dumps all parameters for resistors and caps (also secondary)
* Enabled Spice writer delegate in LVS (spice_format(...))
* Device class factories for built-in device extractors
 2021-07-05 22:22:13 +02:00
Matthias Koefferlein ba35ac9bfe Doc update, some tests 2021-07-05 21:06:02 +02:00
Matthias Koefferlein c62592ede1 Added test for device class factory. 2021-07-05 19:55:55 +02:00
Matthias Koefferlein 4303e1ab73 Revert change of making spice parameters primary - will create problems in swappable parameters such as AD and AS 2021-07-04 19:58:15 +02:00
Matthias Koefferlein ae6f77f45f Serialization of custom device classes 2021-07-04 19:14:37 +02:00
Matthias Koefferlein 3220bdf60d Added device class templates for CapWithBulk and ResWithBulk 2021-07-04 19:14:11 +02:00
Matthias Koefferlein ce61145f1c More control over primary/secondary flag of parameters in device extraction 
- Spice reader will set primary flag for all (known) parameters
  read from a Spice netlist
- "extract_devices" will return the device class object
- primary/secondary flag can be set on device class objects
  through "enable_devices"
 2021-07-04 17:05:17 +02:00
Matthias Koefferlein 1a0b05e663 Updated test data 2021-07-02 23:38:38 +02:00
Matthias Koefferlein 79c552b300 Fixed #858 (+ line continuation after blanks in Spice reader) 2021-07-02 23:31:54 +02:00
Matthias Koefferlein fd5efe9f92 Fixed #854 2021-07-02 00:46:22 +02:00
Matthias Koefferlein 6f63fa09bf Fixed #856 2021-07-02 00:44:17 +02:00
Matthias Koefferlein 3d6119f2a6 Updated tests, sloppy 'same_nets' in non-must-match mode 2021-06-29 08:43:28 +02:00
Matthias Koefferlein ab70c42c68 Some enhancements for strong matching of nets 
* same_nets! method for strong matching
* same_nets and same_nets! except glob pattern to circuits and nets
* both observe case sensitivity
* helper functions for case sensitivity Netlist#is_case_sensitive?, Netlist#case_sensitive=
* Netlist#nets_by_name to get nets from pattern
 2021-06-28 22:33:46 +02:00
Matthias Koefferlein 72dc94197e New method: Circuit#nets_by_name 2021-06-28 20:29:40 +02:00
Matthias Koefferlein e0ccb4f980 Fixed a typo 2021-06-28 18:57:09 +02:00
Matthias Koefferlein 24afd571f0 LVS: can be used anywhere now: tolerance and join_symmetric_nets 2021-06-28 18:56:07 +02:00
Matthias Koefferlein c24c0933bf Bugfix: blackbox mode/abstract pins 
Abstract pins are created when pins are not attached to any or only to passive nets
(passive nets are those without device terminals or subcircuit pins).

1. Such pins were treated swappable. Now named pins will not be treated
   swappable but are mapped by name. This enables blackbox models where
   the pins are labelled and must correspond to schematic pins.
2. A bug was present which lead to incorrect handling of abstract
   nets in net compare.
 2021-06-27 22:56:28 +02:00
Matthias Koefferlein d65148ed0b Fixed #846 2021-06-27 17:29:41 +02:00
Matthias Koefferlein 881e0010d5 Implemented with(out)_angle, with(out)_area on edge pairs (DRC, GSI). Deprecated 'with(out)_angle' on polygon layers (DRC) as this is now redundant with 'corners' 2021-06-27 14:18:04 +02:00
Matthias Koefferlein 5251520876 Added more filters for edge pairs: with_area, with_internal_angle. Added tests 2021-06-21 23:44:48 +02:00
Matthias Koefferlein 6e7c9192d4 Implemented #818 2021-06-20 21:45:51 +02:00
Matthias Koefferlein 2bbf6b6998 Merge branch 'clipped-25d-view' 2021-06-20 21:02:40 +02:00
Matthias Koefferlein 5fb2f024dc Fixed some typos 2021-06-19 23:12:59 +02:00
Matthias Koefferlein 71e290b50e Added test for the last commit 2021-06-13 23:02:53 +02:00
Matthias Koefferlein d1f38a36b1 Not directly related (initially so): EdgeProcessor can restart now. 2021-06-13 23:02:09 +02:00
Matthias Koefferlein 3b22bc0a42 Fixed the fix: considering the case of non-layout hosted Shapes container too 2021-06-12 23:34:32 +02:00
Matthias Koefferlein 115593575d Merge branch 'master' of github.com:KLayout/klayout into issue-835 2021-06-12 09:47:31 +02:00
Matthias Koefferlein 6f583b1b21 Fixed #835 2021-06-12 09:45:02 +02:00
Matthias Köfferlein 8bd58be534
Merge pull request #830 from KLayout/issue-824 
Issue 824
 2021-06-12 08:58:00 +02:00
Matthias Koefferlein 43c941004a Fixed embarrassing typo: Minkowsky -> Minkowski (Hermann Minkowski, 22 June 1864 – 12 January 1909) 2021-06-10 23:33:49 +02:00
Eugene Zelenko ed27447ce0 Fix misspellings in db. 2021-06-07 18:21:02 -07:00
Matthias Koefferlein 8b528a8a7a Refactored the compound op node cache for multithreading support 2021-06-07 22:46:15 +02:00
Matthias Koefferlein 02ec262df0 Normalized resistor contact polygons for better test reproducibility. 2021-06-03 23:43:00 +02:00
Matthias Koefferlein 7aaddcf205 Normalize S/D choice on MOS transistor extraction for better test reproducability 2021-06-03 17:32:38 +02:00
Matthias Koefferlein a762797d58 Typos fixed. 2021-06-01 21:32:24 +02:00
Matthias Koefferlein ef01bbf81b Restored merge behavior for DRC 'or' also in deep mode 2021-05-31 18:24:00 +02:00
Matthias Köfferlein 63f4d727e9
Merge pull request #813 from KLayout/wip 
Wip
 2021-05-29 23:59:44 +02:00
Matthias Koefferlein 83685a3715 Fixed a build issue. 2021-05-29 22:06:13 +02:00
Matthias Koefferlein eeaab8a417 Bugfix: Region#flatten and Edges#flatten did not update the merged cache to flat and Region#flatten did not produce PolygonRefs 2021-05-29 19:28:56 +02:00
Matthias Koefferlein 5ceeafc0ff Implemented #808 (Feature suggestion: DRC to report edges attached to corners as edge pairs). Solution is available for DRC layers and universal DRC expressions. 2021-05-29 17:57:38 +02:00
Matthias Koefferlein e57d573a42 Tests, so bug fixes, some refactoring 2021-05-29 09:43:12 +02:00
Matthias Koefferlein c8548709bb Implemented edge pair filters, DRC: with(out)_angle, with(out)_length and with(out)_distance 2021-05-28 23:46:52 +02:00
Matthias Koefferlein fcb966393a Fixed #806: first, the internal error gone. Second, the implementation of custom comparers is simplified as the 'equals' method does not need to be implemented. 2021-05-26 22:39:28 +02:00
Matthias Koefferlein ef22ead019 Fixed a bug in the Spice writer implementation (res3 not considered) 2021-05-26 22:27:42 +02:00
Niko Savola ff90c476c3 Fix typos systemically in gsiDecl*.cc 2021-05-26 13:18:23 +03:00
Niko Savola 99ef222f50
Fix more typos in gsiDeclDbLayoutToNetlist.cc 
\\make_incluidelayer -> \\make_includelayer
sqaure -> square
 2021-05-26 12:37:24 +03:00
Niko Savola b27e5de023
Fix typo in gsiDeclDbLayoutToNetlist 
reprfesenting -> representing
 2021-05-26 12:31:46 +03:00
Niko Savola bc16c4ad31
Fix missing 'to' typo 
from another cell this cell -> from another cell to this cell
 2021-05-26 10:33:07 +03:00
Matthias Koefferlein 6ad8ec5662 Bugfix: whole edge output for fragmented second input. No way to fix that for the compound ops. Restrict negative output for two-layer checks on first layer for the same reason. 2021-05-26 00:27:13 +02:00
Matthias Koefferlein 19b28982e7 WIP: updated test data (bugfix: bulk does not have layer properties), Fixed Region::count and Region::hier_count (was counting non-polygons too) 2021-05-25 23:08:38 +02:00
Matthias Koefferlein 3789e38ce3 WIP: avoid one more segfault. 2021-05-25 22:45:19 +02:00
Matthias Koefferlein 0d6ce92d6b WIP: fixed a potential segfault 2021-05-25 21:41:27 +02:00
Matthias Koefferlein 0452e91e8c WIP: Some hardening against internal state changes in RecursiveShapeIterator, tests fixed 2021-05-25 21:36:54 +02:00
Matthias Koefferlein 1c8442f485 Fixed #807 - now supporting incremental connect and clear_connections in DRC/LVS 2021-05-24 21:56:57 +02:00
Matthias Koefferlein 58afc47071 WIP: reduced space runtimes (OpenRAM sample) by selective edge processing 2021-05-24 18:27:16 +02:00
Matthias Koefferlein 05b1023fd5 Updated tests. 2021-05-24 16:49:00 +02:00
Matthias Koefferlein 2fc301a0b6 More efficient shape counts on OriginalLayer 2021-05-23 12:21:18 +02:00
Matthias Koefferlein 4bc665cbf3 Mapping deep-mode 'or' (DRC) to 'add' to avoid flat processing. 2021-05-22 22:32:29 +02:00
Matthias Koefferlein 560234cacb Less noisy output with verbose debug mode 2021-05-22 22:29:57 +02:00
Matthias Koefferlein 6cfe14a418 Typo corrected 2021-05-22 22:29:10 +02:00
Niko Savola feb5e7eece
Fix documentation typo in gsiDeclDbCell.cc 2021-05-21 14:35:21 +03:00
Matthias Koefferlein aea8c4d1ad 3-terminal C's and R's for Spice writer too, using different default models for 2- and 3-terminal R and C 2021-05-13 21:13:41 +02:00
Matthias Koefferlein 4eb8f69a22 Spice reader: Support for resistance, capacitance and inductance values within parameters, basic support for 3-terminal resistors, more flexibility in SpiceReaderDelegate. 2021-05-13 20:40:28 +02:00
Matthias Köfferlein 9c5542d3d2
Merge pull request #788 from KLayout/issue-787 
Issue 787 fixed
 2021-05-08 22:26:10 +02:00
Matthias Koefferlein 70864e41af Implemented Edge#cut_point for GSI (was missing) 2021-05-04 21:12:46 +02:00
Matthias Koefferlein 31cc8f32e2 Fixed #787 - the results of const reference return values need to be copied as the holder object may go out of scope 2021-05-02 23:00:38 +02:00
Matthias Koefferlein 1285868546 Skip private-only tests without private data access 2021-05-01 21:36:52 +02:00
Matthias Koefferlein 7c3c631515 Merge branch 'master' into feedback 2021-04-29 23:53:47 +02:00
Matthias Koefferlein 281681fffb Limit hier processor instance/instance and instance/cluster cache depth to 20 entries per cell pair to avoid memory explosion 2021-04-28 22:51:00 +02:00
Matthias Koefferlein 855e8a3518 WIP: some enhancements with the effect of reducing instance interaction caching overhead and improving performance. More memory and cache metrics. 2021-04-27 22:27:22 +02:00
Matthias Koefferlein 2f204eaa21 Some refactoring of the instance-to-instance test in hier processor: gives some performance improvement with less memory for cache. 2021-04-26 23:15:27 +02:00
Matthias Koefferlein 6e52e6f0c6 WIP: introducing memory metrics for netlist/l2n 2021-04-26 22:26:31 +02:00
Matthias Koefferlein 7d8825a9fb Ghost cells are not renamed in blend mode 'rename' 2021-04-24 21:30:03 +02:00
Matthias Köfferlein f8e7e3b6e1
Merge pull request #770 from KLayout/lvs-enhancement 
Lvs enhancement
 2021-04-14 23:24:30 +02:00
Matthias Koefferlein 6ea04d6c27 Small LVS enhancement: reject backtracking branch if it leads to ambiguous name conflicts 2021-04-13 22:57:08 +02:00
Matthias Koefferlein a02c2c8eeb Merge branch 'master' into hierarchical-edges 2021-04-11 22:47:38 +02:00
Matthias Koefferlein 870fd2e0bd Fixed some valgrind issues. 2021-04-08 23:30:47 +02:00
Matthias Koefferlein c4e5310c95 Bugfix: holes and hulls are not neccessarily merged 2021-04-08 00:32:03 +02:00
Matthias Koefferlein 217f957d60 Some more safety against accessing deleted user objects (stored point in temporary UserObject or DUserObject gets destroyed on destruction of the holder) - using C++ move semantics (overdue) 2021-04-07 22:16:52 +02:00
Matthias Koefferlein 9b7879b2a9 Faster hierarchical edges. 2021-04-06 21:05:02 +02:00
Matthias Köfferlein 85448966d8
Merge pull request #763 from KLayout/25d-enhancements 
25d enhancements
 2021-04-03 15:33:57 +02:00
Matthias Koefferlein 173ba147b1 Rework for D25 tech management - compilation happens dynamically now. 2021-04-02 18:48:00 +02:00
Matthias Koefferlein 773fcb6b67 z Stack description language enhanced. 2021-04-02 17:27:38 +02:00
Matthias Koefferlein 892f940166 Fill feature: enhancements and debugging 
- added "multi_origin" mode for repeated fill
- enhanced fill coverage by better separation of islands in auto-origin mode
 2021-04-01 23:29:45 +02:00
Matthias Koefferlein 25b978f39f Doc clarification. 2021-04-01 18:41:37 +02:00
Matthias Koefferlein e66c8046db Limited lvs stack depth to 500 to prevent stack overflow. 2021-03-31 23:04:35 +02:00
Matthias Koefferlein cf51130339 Fixed some build issues that appeared during merge 2021-03-30 23:20:39 +02:00
Matthias Koefferlein 94556c1448 Merge branch 'master' into lvs-enhancements 2021-03-30 18:56:27 +02:00
Matthias Koefferlein 47a845884d Added tests 2021-03-29 22:44:39 +02:00
Matthias Koefferlein 3f37b0e5a4 Fill cell box introduced as a concept, added tests, overlapping fill cells supported. 2021-03-29 22:12:47 +02:00
Matthias Koefferlein 8fda92a9c4 Merge branch 'drc-enhancements' into fill-enhancements 2021-03-29 15:07:47 +02:00
Matthias Koefferlein 76982a3206 DRC support for fill, experimental 2021-03-29 13:28:43 +02:00
Matthias Koefferlein cefc2eeddb Bug fixes. 2021-03-29 01:05:53 +02:00
Matthias Koefferlein abd96c8400 Deep mode: avoid flattening by FlatRegion/FlatEdges poisoning 2021-03-28 23:19:14 +02:00
Matthias Koefferlein 6df333a05e Avoid turning DeepRegions into flat ones as this spoils hierarchical processing. 2021-03-28 22:33:24 +02:00
Matthias Koefferlein 9f295523e4 explicit net joining - preparations 2021-03-27 21:56:53 +01:00
Matthias Koefferlein a0cab9832f Fixed probe feature of LVS dialog for flat extraction. 2021-03-26 00:40:18 +01:00
Matthias Koefferlein 8d5ef02c3d Using unlimited complexity and depth for LVS compare 2021-03-25 23:50:45 +01:00
Matthias Koefferlein 4252085663 Fixed an internal error in netlist compare 
Problem was that during ambiguity resolution a choice may
be invalidated by further choices. This is taken care by
locking nets against re-mapping.
 2021-03-25 01:56:23 +01:00
Matthias Koefferlein c48be51cb6 Made SPICE netlist elements case insensitive in LVS scripts 2021-03-24 22:11:15 +01:00
Matthias Koefferlein 3777d311af typos fixed, doc update 2021-03-24 00:07:16 +01:00
Matthias Koefferlein 1ae109f90d DRC: deep mode region input does not flatten the layout on clip 2021-03-21 23:54:13 +01:00
Matthias Koefferlein 866ee9bd81 DRC: tiling mode with global transformation, debug + tested 2021-03-21 23:27:42 +01:00
Matthias Koefferlein afdc50d05a Global transformations for DRC and RecursiveShapeIterator 2021-03-21 23:09:09 +01:00
Matthias Koefferlein 1495d9521c Tests updated. 2021-03-15 16:51:56 +01:00
Matthias Koefferlein 738e830c8d Important bug fix for LVS 
It's very important for LVS to use the same compare delegates
for layout and schematic. Otherwise the sorting of the devices
won't be identical and fake mismatches will occure.
This is achieved in a bit hacky way to imposing the layout
compare delegates to the schematic netlist.
 2021-03-15 15:40:02 +01:00
Matthias Koefferlein f2b1661647 Merge branch 'drc-enhancements', remote-tracking branch 'origin' into lvs-debug 2021-03-14 23:52:03 +01:00
Matthias Koefferlein fea594ff69 Unit tests modified because of interface change for netlist comparer 2021-03-14 23:51:20 +01:00
Matthias Koefferlein 98c2db34e9 Another bugfix to cover the case of non-sequential pin IDs 2021-03-14 19:51:15 +01:00
Matthias Koefferlein 7bd9e8dc1b Bugfix: with BJT3 and BJT4 included, the extracted .lvsdb file could not be read back. 2021-03-14 18:40:16 +01:00
Matthias Koefferlein 4549da561b Better information in LVS report - at least for skipped circuits for now. 2021-03-14 18:21:32 +01:00
Matthias Koefferlein bb9ae20c32 Rework of the progress reporting scheme: LVS got a log now, the layout is horizontal for multiple progress objects, less flicker and more quiet display, cancel function should work more reliably now. 2021-03-14 16:25:56 +01:00
Matthias Köfferlein 184f2bee50
Smooth bug (#740) 
* Smoothing function: provide ability to keep horizontal/vertical lines (important for cut lines)

* Introducting API compatibility macros for generic plugins.
 2021-03-14 12:27:36 +01:00
Matthias Koefferlein c8f4c83c53 Fill tool enhancement (GSI, db): glue box for fill cell array compatibility in tiling processor. 2021-03-13 18:01:43 +01:00
Matthias Koefferlein 1b4eb1d401 Reworked fill_cell GSI integration (using defaults rather than variants, doc fixes) 2021-03-13 10:36:01 +01:00
Matthias Koefferlein f03f745ed8 Using a 'final' progress in the tiling processor to stop child progress objects from showing. 2021-03-13 10:35:26 +01:00
Matthias Koefferlein 1aa595560e Some refactoring 2021-03-13 10:34:48 +01:00
Matthias Koefferlein 7c4c928632 Sync mode for tiling progress enhanced - with progress now. 2021-03-13 10:12:01 +01:00
Matthias Koefferlein f2d106651b Reworked the fill scheme for better support of skewed fill repetitions. 2021-03-11 21:27:49 +01:00
Matthias Koefferlein 7d53f6d454 WIP. 2021-03-10 00:43:08 +01:00
Matthias Koefferlein d4f641bff8 WIP. 2021-03-09 23:45:53 +01:00
Matthias Koefferlein 7bd4a692d8 WIP 2021-03-08 20:45:52 +01:00
Matthias Koefferlein d76fc02244 Fixed a memory corruption issue in db::rasterize 2021-03-07 11:26:54 +01:00
Matthias Koefferlein 6e6ce998aa Refactoring, preparing script generation. 2021-03-06 19:38:19 +01:00
Matthias Koefferlein 637968cbc4 Centering of bounding box in fill tool - this allows using step vectors alone without a boundary layer 2021-03-06 00:31:05 +01:00
Matthias Koefferlein 07966baf71 First draft of fill dialog with enhancements 2021-03-05 18:20:45 +01:00
Matthias Koefferlein 0d04937c91 Added tests for fill tool 2021-03-05 16:27:57 +01:00
Matthias Koefferlein dbeee1531e Matrix2d and Matrix3d generalized for integer coordinates, added transformation methods for polygons, regions, boxes, edges, etc. Fill enhancements basically implemented. Needs testing. 2021-03-05 15:31:40 +01:00
Matthias Koefferlein e639c30570 split_* operations in DRC (interacting/non_interacting in one step), doc, tests. 2021-03-01 21:04:57 +01:00
Matthias Koefferlein 98eebe25ad gsi binding of split interaction functions. 2021-03-01 00:25:50 +01:00
Matthias Koefferlein c5788f3621 Fix: clone() is good :) 2021-03-01 00:09:13 +01:00
Matthias Koefferlein 8c6b231ae6 First steps towards differential interaction functions 2021-02-28 23:22:44 +01:00
Matthias Köfferlein 8b2ecf41df
Fixed issue by providing a compatibility bridge between tl::Stream (abstract paths) and tl::URI (#734) 2021-02-25 21:28:48 +01:00
Matthias Köfferlein 82587e70c3
Merge pull request #731 from KLayout/recursive-inst-iterator 
Recursive inst iterator
 2021-02-25 21:27:41 +01:00
Matthias Koefferlein 9074c918bb Fixed a linker name clash. 2021-02-21 22:11:33 +01:00
Matthias Koefferlein 0f4a10441d RecursiveInstanceIterator: Doc fixes, tests, instance array iteration. 2021-02-20 22:17:43 +01:00
Matthias Koefferlein a1bae225e3 Recursive instance iterator, tests 2021-02-20 17:50:32 +01:00
Matthias Koefferlein ca11f0799a Recursive instance iterator, selection of target cells. 2021-02-20 01:09:17 +01:00
Matthias Koefferlein 0f47ff68a5 Recursive instance iterator, debugging. 2021-02-20 01:03:05 +01:00
Matthias Koefferlein 6527d29f8f Recursive instance iterator, debugging. 2021-02-20 00:48:07 +01:00
Matthias Koefferlein 412056afed Recursive instance iterator, first draft. 2021-02-20 00:40:05 +01:00
Matthias Koefferlein b3685c6722 Implemented with_holes for generic DRC too 2021-02-08 21:29:41 +01:00
Matthias Koefferlein a9fa5d73f9 Introducing 'with_holes' and 'without_holes' in DRC and RBA::Region. 2021-02-08 20:59:17 +01:00
Matthias Koefferlein 620776fe51 Provide better log output for region 2021-02-07 19:15:47 +01:00
Matthias Köfferlein e31d7afb64
Reduce risk of DRC polygon split artefacts in deep mode (#722) 
* Fixed a segfault with simple 'klayout -v'

* is_halfmanhattan polygon predicate, confine polygon splitting to halfmanhattan

Splitting any-angle polygons for area reduction in the
deep processor creates a risk of introducing grid-snap
artefacts. Hence we avoid this.
 2021-02-05 23:28:04 +01:00
Matthias Köfferlein 4134829304
Issue 718 (#719) 
* WIP: first part of fix - generation of hole cutlines

First problem was that hole cutlines got extended
over the whole length and sometimes lead to coincident
edges which are difficult to resolve for the polygon
cutter.

* Refined solution, fixed #718

- disabled elaborate hole insertion procedure for now as the
  performance impact has to be assessed yet and the new scheme
  will break many tests
- stricter rejection of ambiguous configurations in the polygon cutter
- fallback is boolean AND now since there is no need to re-invoke the
  polygon cutter (we can't do so as we made it more strict).
  Performance-wise we replace a merge by an AND step which may even be
  faster the output is smaller and the polygon cutter does not need
  to be re-invoked.

* Compatibility with other STLs
 2021-01-31 19:21:15 +01:00
Matthias Köfferlein 10eee4d895
Fixed #709. (#714) 2021-01-31 19:21:00 +01:00
Matthias Koefferlein 290d393126 Fixed another link issue on Windows 2021-01-27 21:42:43 +01:00
Matthias Koefferlein 1cdcf546f8 Fixed linker issue on Windows. 2021-01-27 12:54:25 +01:00
Matthias Köfferlein 1ba4394c2a
Merge pull request #710 from KLayout/byte-arrays 
Byte arrays
 2021-01-27 12:42:48 +01:00
Matthias Köfferlein bd41f7222d
Merge pull request #706 from KLayout/spline-as-api 
Generalized spline interpolation of DXF reader
 2021-01-26 23:39:51 +01:00
Matthias Koefferlein 702852a8a9 Merge branch 'master' of github.com:KLayout/klayout into byte-arrays 2021-01-25 08:11:53 +01:00
Matthias Koefferlein 885c52eeeb Stupid bug fixed 2021-01-25 08:10:47 +01:00
Matthias Koefferlein 199602424a Merge branch 'master' of github.com:KLayout/klayout into byte-arrays 2021-01-24 23:52:56 +01:00
Matthias Koefferlein d31f87f053 Some issues with the byte array binding fixed, less ambiguitites with Qt bindings, tests added. 2021-01-24 23:44:40 +01:00
Matthias Koefferlein 245bf93429 Some build fixes to enable basic compilation on CentOS6 2021-01-24 17:37:46 +00:00
Matthias Koefferlein d1e6845ae4 Replaced std::auto_ptr by std::unique_ptr because the latter is deprecated 2021-01-23 21:55:51 +01:00
Matthias Koefferlein c8951c10cd Generalized spline interpolation of DXF reader and provide a script binding (RBA::Utils). 2021-01-23 18:44:36 +01:00
Matthias Koefferlein 63d19bdb4c More robustness against test variations on different platforms. 2021-01-19 21:49:38 +01:00
Matthias Koefferlein 73485a5061 More robustness against differences on different platforms. 2021-01-19 20:36:25 +01:00
Matthias Koefferlein 11e9f89fc2 Introduced normalization into region/edges/edge pairs/texts tests to get rid of platform dependency because of unordered_set implementation details. 2021-01-19 08:03:42 +01:00
Matthias Koefferlein 3677a36804 Made region tests less susceptible to 'unordered_set' implementation details. 2021-01-19 01:26:20 +01:00
Matthias Koefferlein c184a8a5fb Merge branch 'master' of github.com:KLayout/klayout 2021-01-18 21:36:59 +01:00
Matthias Koefferlein 9b275d85a6 More stable hash function (the previous one was too sparse for small coordinates). Test updates for this reason. 2021-01-18 20:26:03 +01:00
Matthias Koefferlein 757543ec48 Fixed a build issue with 64bit coordinates. 2021-01-18 20:25:40 +01:00
Matthias Köfferlein f32901407c Fixed Windows build 2021-01-18 12:30:05 +01:00
Matthias Koefferlein e1312d7a0c Merge branch 'master' of github.com:KLayout/klayout into complex_drc_ops 2021-01-17 22:45:40 +01:00
Matthias Koefferlein 081c445cd8 Merge branch 'master' into complex_drc_ops 2021-01-17 19:55:28 +01:00
Matthias Koefferlein e3773be7dc Updated tests and provide 'lesser' and 'greater' edge pair extraction operator. 2021-01-17 19:55:21 +01:00
Matthias Koefferlein 9cf0a9e659 Major enhancements for DRC feature (universal DRC) 
Main issue: universal DRC scheme and rectangle filtering/opposite filtering/shielding.

The space function required some enhancements to accomodate symmetric interactions.
Now there are symmetric edge pairs. Space initially runs twofold (primary to foreign)
but produces symmetric edge pairs. These are filtered later unless converted before.
 2021-01-17 19:26:22 +01:00
Matthias Koefferlein fd90e66ee1 WIP (shielding, various bug fixes) 2021-01-17 14:38:44 +01:00
Matthias Koefferlein 9a55bdc687 Fixed caching implementation of complex DRC ops. 2021-01-16 20:34:15 +01:00
Matthias Koefferlein c66a19ba42 More consistent progress reporting for complex ops. 2021-01-16 19:01:45 +01:00
Matthias Koefferlein 80e033c618 Fixed shielded implementation for DRC 2021-01-16 18:09:26 +01:00
Matthias Koefferlein ed73046c13 Allow flatten for non-editable layouts too 2021-01-16 18:08:23 +01:00
Matthias Koefferlein f0ad373248 Build errors fixed. 2021-01-16 10:31:08 +01:00
Matthias Koefferlein 3732e0428e Build errors fixed. 2021-01-16 10:12:48 +01:00
Matthias Koefferlein 785bc0b6e5 Build error fixed, test cases updated. 2021-01-16 10:09:07 +01:00
Matthias Koefferlein 4460c294b0 Some bug fixes, doc update, test updates. 2021-01-16 00:32:06 +01:00
Matthias Koefferlein 80996a77fb New *_sum quantifiers, doc enhancements, bug fixing 2021-01-14 00:21:21 +01:00
Matthias Koefferlein c5859cd957 Tests for new DRC features (square, new attiribute tests) 2021-01-13 13:35:37 +01:00
Matthias Koefferlein a8f08bffac WIP: new ratio filters, squares for DRC 2021-01-13 02:12:33 +01:00
Matthias Koefferlein dce22fee37 New region filters (square, area ratio, relative height) 2021-01-13 01:08:42 +01:00
Matthias Koefferlein ae29c75326 WIP: documentation, local merging of polygon for interact, covering .. 2021-01-12 01:08:12 +01:00
Matthias Koefferlein 383f72eb09 Added missing files, tests for angle and length (universal DRC), some clarifications and bug fixes. 2021-01-10 20:18:06 +01:00
Matthias Koefferlein 0a7ca69da2 Some refactoring (angle check), angle check and length check for universal DRC, tests, bug fixes. 2021-01-10 19:54:16 +01:00
Matthias Koefferlein 158ea196ec WIP: more tests, bug fixes, new feature: deep_reject_odd_polygons, odd_polygons check disabled in deep mode 2021-01-10 18:46:01 +01:00
Matthias Koefferlein ddf36290fa Corner detection feature: tests, bug fixes, enhancements (inclusive/exclusive angle constraints) 2021-01-09 23:10:17 +01:00
Matthias Koefferlein 6f93ff616f More tests, bug fixes. 2021-01-09 17:50:39 +01:00
Matthias Koefferlein b15e7f2b9f WIP: proper integration of complex DRC ops in DRC framework 2021-01-09 16:37:16 +01:00
Matthias Koefferlein 7093dfd0eb WIP: bug fixes, more tests for complex DRC 2021-01-09 15:56:55 +01:00
Matthias Koefferlein d1868a4b23 WIP: some development, bugfixing on DRC implementation - mainly about correct opposite filter operation 2021-01-06 23:39:51 +01:00
Matthias Koefferlein 9c95bed67e Generic DRC: new tests, bug fixes. 2021-01-06 11:59:47 +01:00
Matthias Koefferlein 736fe874eb Fixed an issue in the DRC doc generation (needs explicit doc for enum defaults) 2021-01-06 02:31:56 +01:00
Matthias Koefferlein 7d4310d343 Updated copyright to 2021 2021-01-05 22:57:48 +01:00
Matthias Koefferlein 9812ff7901 WIP: a new concept for complex DRC - 'foreign' subjects 2021-01-05 22:49:30 +01:00
Matthias Koefferlein 6dd190e3af More compound DRC operations (join, merge, count filter) 2021-01-04 21:34:12 +01:00
Matthias Koefferlein f3d8fb4a43 WIP: refactoring of DRC Ruby code 2021-01-03 19:03:30 +01:00
Matthias Koefferlein 815b81ce59 WIP: Introduced DRC negative options in GSI 2021-01-02 21:10:05 +01:00
Matthias Koefferlein 82a70bdde0 WIP: negative output of DRC functions. 2021-01-02 20:33:16 +01:00
Matthias Koefferlein 98792c55de WIP: attempt to implement negative edge output on width and space 2021-01-02 19:34:46 +01:00
Matthias Koefferlein 70ccc50b39 WIP: some refactoring to make functions available for DRC compound operations and to simplify binding 2021-01-01 23:20:11 +01:00
Matthias Koefferlein dd84e64446 Fixed an issue with the OASIS reader (unused cells popped up as dummy top levels) 
This happens when OASIS declares a cell name without actually using it.
The intended behavior is to drop such cells.
 2020-12-30 23:37:01 +01:00
Matthias Koefferlein cdcac6f5d3 WIP: copy-on-write for FlatRegion and FlatEdges too 2020-12-27 19:19:09 +01:00
Matthias Koefferlein cc58d7d8ee WIP: performance improvement: copy-on-write for flat edge pairs 2020-12-27 18:45:10 +01:00
Matthias Koefferlein 4ec00fb129 Fixed an issue with wrapping new objects into tl::Variants which are returned directly. For these objects, ownership needs to be transferred to the script. 2020-12-27 17:09:06 +01:00
Matthias Koefferlein 1026d197cb WIP: Some optimization of check functions 2020-12-27 01:05:55 +01:00
Matthias Koefferlein 3f8113e404 WIP: Updated some test, debugging 2020-12-26 23:55:50 +01:00
Matthias Koefferlein dcaa0d0ea5 WIP: deep mode and complex DRC ops, debugging 2020-12-26 21:11:22 +01:00
Matthias Koefferlein 493024734d WIP: more tests enabled for deep mode 2020-12-26 20:48:11 +01:00
Matthias Koefferlein 1bb04c711c WIP: more tests enabled for deep mode too. 2020-12-26 19:55:42 +01:00
Matthias Koefferlein afc9fc9c7a WIP: Bugfixed deep processor (multi-input mode and input layer index), added tests 2020-12-26 19:43:51 +01:00
Matthias Koefferlein dc80ed77b1 WIP: region/edge booleans, more tests, debugging 2020-12-26 17:48:53 +01:00
Matthias Koefferlein 9b4f65bab4 Typo fixed 2020-12-26 17:18:23 +01:00
Matthias Koefferlein 953bee4790 WIP: more tests, debugging 2020-12-26 17:17:43 +01:00
Matthias Koefferlein 8d6dd23850 WIP: more tests, debugging 2020-12-26 17:06:44 +01:00
Matthias Koefferlein cc6ad01529 WIP: more tests, debugging 2020-12-26 16:04:35 +01:00
Matthias Koefferlein 00a7021a30 WIP: more tests, debugging. 2020-12-26 15:41:20 +01:00
Matthias Koefferlein 3707fae3c2 WIP: more tests, debugging 2020-12-26 14:58:07 +01:00
Matthias Koefferlein 9c6e0129d9 WIP: debugging, test case for compound booleans 2020-12-26 00:06:49 +01:00
Matthias Koefferlein 80509c64e5 WIP: generalization of EdgePair/Edge/Polgyon processors, chained operations in compound ops. 2020-12-25 18:03:57 +01:00
Matthias Koefferlein 19508f96e9 WIP: debugging 2020-12-25 16:27:24 +01:00
Matthias Koefferlein 4974a81af6 WIP: debugging 2020-12-25 15:00:52 +01:00
Matthias Koefferlein 46a4178010 More elaborate handling of selection changed events in LayoutView (avoids dummy events) and some more GSI methods for manipulating or checking selections. 2020-12-24 17:57:01 +01:00
Matthias Koefferlein 45a8f7aa20 Merge branch 'master' into complex_drc_ops 2020-12-20 23:50:54 +01:00
Matthias Koefferlein 1c6ffb4086 Fixed unit tests. 2020-12-20 21:45:55 +01:00
Matthias Koefferlein db19e92083 Fixed some merge issues. 2020-12-20 20:53:43 +01:00
Matthias Koefferlein 9290bb7154 Fixed a merge conflict 2020-12-20 19:27:54 +01:00
Matthias Koefferlein cfe38aab42 Merge branch 'lefdef' 2020-12-20 19:26:51 +01:00
Matthias Koefferlein 866ac7ec76 Merge branch 'issue-691' 2020-12-20 19:25:31 +01:00
Matthias Koefferlein 5a828b4c8f WIP: code cleanup 2020-12-20 17:57:34 +01:00
Matthias Koefferlein ee47a1e087 Fixed the manager's 'cancel' implementation: with this, redo of a cancelled operation isn't possible any more 2020-12-20 00:42:17 +01:00
Matthias Koefferlein 4b8577a89b Temporary compatibility with lefdef branch - remove when this branch is merged. 2020-12-20 00:35:23 +01:00
Matthias Koefferlein b6f710a9fe WIP: Fixed DXF reader 2020-12-19 23:37:37 +01:00
Matthias Koefferlein 9688da9ffd WIP: test for multimapping in LEF/DEF 2020-12-19 21:28:22 +01:00
Matthias Koefferlein 2b61b48164 WIP: multi-mapping for named layer readers, bugfix for GDS/OASIS 2020-12-19 18:25:53 +01:00
Matthias Koefferlein 02f96f022a WIP: added brackets for clarity in mapping expressions. 2020-12-19 16:37:58 +01:00
Matthias Koefferlein a1eb8c121b WIP: implementation for GDS2 and OASIS, added tests. 2020-12-19 15:36:03 +01:00
Matthias Koefferlein f86c13689b WIP: some refactoring to simplify multi-mapping implementation 2020-12-19 13:21:33 +01:00
Matthias Koefferlein 3fbfb20727 WIP: shorter mapping strings. 2020-12-19 00:56:45 +01:00
Matthias Koefferlein 0fddf7f389 WIP: text edit feature for layer mapping edit widget. 2020-12-16 23:52:58 +01:00
Matthias Koefferlein 91de370901 WIP: bugfix, RBA tests. 2020-12-16 23:02:01 +01:00
Matthias Koefferlein 3e249b0b54 WIP: More tests for layer multi-mapping 2020-12-15 23:51:01 +01:00
Matthias Koefferlein 1f635015ce WIP: backward compatible implementation of multi-map capability of layer mapping. 2020-12-15 23:05:34 +01:00
Matthias Koefferlein 7852568284 WIP 2020-12-15 18:42:43 +01:00
Matthias Koefferlein 1106a52688 WIP: first draft of implementation 2020-12-14 23:55:04 +01:00
Matthias Koefferlein 11bf413cb8 Fixed the manager's 'cancel' implementation: with this, redo of a cancelled operation isn't possible any more 2020-12-13 22:13:51 +01:00
Matthias Koefferlein 92d81c5844 WIP: cold proxies are written to GDS2 and OASIS too. This means we keep the library references even if we load and save with the wrong libraries or technology. 2020-12-13 22:09:21 +01:00
Matthias Koefferlein 86e7fa56f0 WIP: undo/redo for applying a technology. 2020-12-13 22:02:19 +01:00
Matthias Koefferlein 740f550964 WIP: handling the case of entirely lost libraries. 2020-12-13 19:54:23 +01:00
Matthias Koefferlein ab36a660fb WIP: cold references - keep reference information while libraries are not there or cells are missing. 2020-12-13 19:11:12 +01:00
Matthias Koefferlein fcf4fd74f6 WIP: bugfixing. 2020-12-13 14:13:59 +01:00
Matthias Koefferlein 78695f9c23 WIP: new technology management scheme, libraries can be tech specific, update of technology in layout updates library references 2020-12-13 12:13:21 +01:00
Matthias Koefferlein fd066127ff Merge branch 'master' into complex_drc_ops 2020-12-08 23:34:07 +01:00
Matthias Koefferlein 57a7671640 Fixed enclosing feature, added tests + DRC impl., DRC doc. 2020-12-08 22:44:33 +01:00
Matthias Koefferlein 1b26f48b13 WIP: some bug fixes 2020-12-08 00:39:07 +01:00
Matthias Koefferlein 0670e83d77 WIP: bug fixes, renamed "enclosing" to "covering" in Region/DRC. 
Reasoning: "enclosing" was reserved for the DRC function.
 2020-12-07 23:55:52 +01:00
Matthias Koefferlein 5934bd529f WIP: DRC 'enclosing' feature 2020-12-07 22:48:03 +01:00
Matthias Koefferlein a833dd57fe Implemented rectangle and opposite filters for DRC functions. 2020-12-06 18:25:57 +01:00
Matthias Koefferlein 153289b5d8 WIP: rectangle error pattern filter implemented. 2020-12-06 16:33:10 +01:00
Matthias Koefferlein 6c4d1f4ef3 WIP: bugfix and tests for opposite filter for DRC 2020-12-06 10:56:56 +01:00
Matthias Koefferlein 574660174e WIP: 'not_opposite' and 'rect_filter' 2020-12-06 09:06:16 +01:00
Matthias Koefferlein 347a33024d Added a disclaimer note for the compound DRC feature. 2020-12-05 18:19:51 +01:00
Matthias Koefferlein 6ac766d68f More complete compound DRC operations. 2020-12-05 18:18:27 +01:00
Matthias Koefferlein 44aef92160 Bugfixed GSI binding of compound DRC operation nodes. 2020-12-05 17:11:01 +01:00
Matthias Koefferlein 44fd6bff11 Refactoring: bulk options structure for DRC functions. Will be easer to enhance 2020-12-05 14:14:28 +01:00
Matthias Koefferlein f14a4c6220 WIP: made compile. 2020-12-02 00:13:41 +01:00
Matthias Koefferlein 9305861102 Bugfix (consider porting): undo triggered 
Transaction::cancel was sometimes triggering an undo:
when the current transaction was empty, "commit" did just
remove it which made the subsequent undo act on the
*previous* transaction.
 2020-12-01 23:00:11 +01:00
Matthias Köfferlein 511e30ef45
Fixed #646 (crash on delete of library) (#685) 
* Fixed a compiler warning

* Fixed #646 (crash on PCell Library "delete")

The issue was mainly caused by a "cleanup" call on
the library. Cleanup is supposed to remove excess
top level PCell variants. For libraries this is not
possible, as the library does not know which variants
are used and which are not.

In addition, some hardening against segfaults in
case of defect layouts has been applied.
 2020-11-27 18:36:56 +01:00
Matthias Koefferlein db6b3d280e Merge branch 'master' into complex_drc_ops 2020-11-22 09:31:15 +01:00
Matthias Koefferlein 0e596e67ce WIP: compound operations. 2020-11-17 23:19:45 +01:00
Matthias Koefferlein 8175306423 WIP: compound operations. 2020-11-16 23:21:58 +01:00
Matthias Koefferlein 5c1efe151e WIP: fixed a segfault in the unit test. 2020-11-15 18:24:45 +01:00
Matthias Köfferlein 248168ea67
Merge pull request #677 from KLayout/issue-666 
Issue 666
 2020-11-14 20:55:28 +01:00
Matthias Köfferlein 94b71cbf76
Merge pull request #642 from KLayout/2.5d-view-devel 
2.5d view devel
 2020-11-13 02:06:41 +01:00
Thomas Ferreira de Lima 16aba12a84 Adding clarification on GDS properties in cell, instance, shape and layout. 2020-11-13 01:33:55 +01:00
Matthias Koefferlein 5988c92f05 Trying to save some (potentially expensive) layout updates on 'overwrite' cell name conflict resolution. 2020-11-13 01:19:18 +01:00
Matthias Koefferlein 4f0b9118c3 Added test for the collect modes, bugfixed the new modes. 2020-11-13 00:31:56 +01:00
Matthias Koefferlein f61aac6b1b Doc: resolve references to child classes too. 2020-11-12 10:22:22 +01:00
Matthias Koefferlein 888b0936f7 Updated test golden data (order of cells only) 2020-11-03 23:11:07 +01:00
Matthias Koefferlein 2ef3290f65 WIP: updated some golden data (only sequence of cells), restored old error messages, proper reporting of cell names in OASIS error messages 2020-11-03 21:18:47 +01:00
Matthias Koefferlein a92ebd0e17 WIP: cell name conflict resolution modes, bugfixed first implementation 2020-11-03 00:13:55 +01:00
Matthias Koefferlein 85869c329d BUGFIX: db::Shapes::insert(db::Shapes) wasn't working correctly! 2020-11-03 00:13:28 +01:00
Matthias Koefferlein eb3600d620 WIP: First implementation. Needs testing. 2020-11-02 01:23:27 +01:00
Matthias Koefferlein 50ee44b6e2 Addressed issue #663 by internal merging of the intruders. 2020-10-28 23:01:54 +01:00
Matthias Koefferlein f1c7e2e8e1 Refactoring of the containers (Edges, Region, EdgePairs, Texts): size -> count, added hier_count. Added SRegion for shape iterator as generic polygonizable things 2020-10-11 17:51:54 +02:00
Matthias Köfferlein 591d4a5c37
Fixed #652 (M scaling not working sometimes for Spice), provided test… (#653) 
* Fixed #652 (M scaling not working sometimes for Spice), provided testcases

* One more patch (bugfix, Spice reader)
 2020-10-10 23:16:02 +02:00
Matthias Köfferlein 051a8bdc77
Fixed #651 (DRC "select" feature issues) (#654) 
* WIP: added test case, fixed dup problem and '-' shortcut

* WIP: updated DRC doc and could not resist the temptation to fix 'it's' vs. 'its'

* Deep mode also working with select now. Updated tests.
 2020-10-10 23:15:51 +02:00
Matthias Köfferlein 52f54ab39e
Fixed #648 (join_nets should work on global nets too) (#655) 2020-10-10 23:15:36 +02:00
Matthias Koefferlein f21dfb4a1c WIP: further code. 2020-10-09 23:15:02 +02:00
Matthias Koefferlein 18e63d352f WIP: complex DRC operations ... 2020-10-06 23:51:35 +02:00
Matthias Koefferlein 8e4fd2f679 WIP: complex DRC operations. 2020-10-04 21:46:06 +02:00
Matthias Koefferlein de97e2cde7 WIP: some bug fixes 2020-10-02 01:00:05 +02:00
Matthias Koefferlein 12a7ea4cd3 WIP: a small bugfix introduced with the latest refactoring 2020-10-01 23:15:53 +02:00
Matthias Koefferlein 61f18f7f33 [PORTBACK] fixed an issue with in-place processing of flat regions 2020-10-01 23:10:24 +02:00
Matthias Koefferlein 145c298d58 WIP: more generalization 2020-10-01 01:45:53 +02:00
Matthias Koefferlein bb5d30e0c0 WIP: more generalization 2020-10-01 01:12:12 +02:00
Matthias Koefferlein 453275e67e WIP: more generalization 2020-10-01 00:41:02 +02:00
Matthias Koefferlein 1b74607598 WIP: generalization of algorithms with local processor, include texts, edge pairs, edges 2020-09-27 23:57:17 +02:00
Matthias Koefferlein b464279dcf WIP: generalization of algorithms with local processor, first steps 2020-09-27 23:14:54 +02:00
Matthias Koefferlein 26028cdeb9 WIP: refactoring, unify shape iterator 2020-09-26 23:41:39 +02:00
Matthias Koefferlein f05fd28a94 WIP: some refactoring of the flat local processor mode for generalization 2020-09-26 21:45:26 +02:00
Matthias Koefferlein ec01c9b72b WIP: tests for local processor flat mode 2020-09-26 17:11:13 +02:00
Matthias Koefferlein 00ae88a5d4 WIP: Refactoring - local ops outsourced 2020-09-26 00:00:34 +02:00
Matthias Koefferlein f6107e0686 WIP: fixed a few issues with the DRC implementation 2020-09-21 23:35:35 +02:00
Matthias Koefferlein 91e924c559 WIP: Basic implementation of Region::interact with count 2020-09-21 22:54:46 +02:00
Matthias Koefferlein 3043418f8a Made shielding an option for some DRC features. 2020-09-16 23:44:44 +02:00
Matthias Koefferlein e75333ea41 DRC enhancements: max_vertex_count, max_area_ratio and forget 2020-09-15 00:12:55 +02:00
Matthias Koefferlein ce9c7e848a Merge branch 'master' into drc-enhancements 2020-09-14 20:52:02 +02:00
Matthias Koefferlein b5e158a6b6 Merge branch 'master' into 2.5d-view-devel 2020-09-14 20:48:46 +02:00
Matthias Koefferlein d7a82ab7dd Merge branch 'issue-639' 2020-09-14 18:40:38 +02:00
Matthias Köfferlein 8f35c9b486
Merge pull request #632 from KLayout/gsi-enhancements 
Enumerators for Ruby, "void to self" for Ruby+Python
 2020-09-14 18:34:50 +02:00
Matthias Köfferlein 8cdb6187b8
Fixed issue #617 (constness problem in netlist) (#622) 2020-09-14 18:33:24 +02:00
Matthias Koefferlein 33229ccfaa Updated fix version in RBA::Layout documentation. 2020-09-13 23:47:23 +02:00
Matthias Koefferlein 5280c762e4 Provide multi-cell copy/move of shapes (GSI binding) 2020-09-13 23:42:09 +02:00
Matthias Koefferlein 7d3abce201 Added multi-cell mapping for transferring multiple cells from one layout to another while including their hierarchy without duplicating cells. 2020-09-13 23:42:07 +02:00
Matthias Koefferlein 5608327899 Another cool one: void as C++ return value is translated to returning self for Ruby. 2020-08-31 23:44:02 +02:00
Matthias Koefferlein 1dc9d11745 Merge branch 'master' into 2.5d-view-devel 2020-08-30 23:40:54 +02:00
Matthias Koefferlein 2953ad3329 Merge branch 'master' into drc-enhancements 2020-08-30 23:35:37 +02:00
Matthias Koefferlein be26c679d8 Merge branch 'master' into lefdef-enhancments 2020-08-30 22:55:45 +02:00
Matthias Koefferlein eccbb9884c Fixed an internal error happening when a librrary isn't registered and destroyed by the GC 2020-08-30 11:35:30 +02:00
Matthias Koefferlein 9a4cd629fc WIP: some little refactoring. 2020-08-30 01:36:17 +02:00
Matthias Koefferlein d762074bc0 Some refactoring, Cell#dup for convenience 2020-08-29 23:43:05 +02:00
Matthias Koefferlein 2a3fe08e7b Provide multi-cell copy/move of shapes (GSI binding) 2020-08-29 22:49:38 +02:00
Matthias Koefferlein a425d522cc Added multi-cell mapping for transferring multiple cells from one layout to another while including their hierarchy without duplicating cells. 2020-08-29 10:07:17 +02:00
Matthias Koefferlein 608824fb36 Added LEF/DEF options to strm* buddies 2020-08-22 19:09:30 +02:00
Matthias Koefferlein f4e75aaa74 WIP: reworked layer mapping scheme, needs fixing 2020-07-30 23:53:34 +02:00
Matthias Koefferlein 89745fd0de Merge branch 'master' into lefdef-enhancments 2020-07-18 09:21:16 +02:00
Matthias Koefferlein 4d4c7aee78 Fixed a unit test. 2020-07-17 23:59:37 +02:00
Matthias Koefferlein f8c2afaad8 Using NetlistObjectPath for probe_event. 2020-07-15 00:10:42 +02:00
Matthias Koefferlein be5f03b1f4 Netlist browser: Paths for probing, cell contexts for highlighting, probe_net with initial circuit (not just top one) 2020-07-14 23:06:26 +02:00
Matthias Koefferlein fde90c66e1 Better handling of pin swapping in netlist browser 2020-07-11 13:21:23 +02:00
Matthias Koefferlein 6aff74c844 Merge branch 'master' into issue-588 2020-07-08 23:29:27 +02:00
Matthias Köfferlein 25e3a1a4a7
Merge pull request #608 from KLayout/more-checked-netlist-operations 
Checked add/remove methods for Netlist objects - to avoid script mist…
 2020-07-07 12:52:15 -07:00
Matthias Koefferlein 0dbebdca91 Fixed test. 2020-07-07 21:39:24 +02:00
Matthias Koefferlein ad00b4a9bf Merge remote-tracking branch 'remotes/origin/master' into add-testcase 2020-07-07 21:22:28 +02:00
Matthias Koefferlein 848fd3e1bb Added testcase 2020-07-07 21:21:33 +02:00
Matthias Köfferlein de9e180f3c
Fixed #609 (internal error on netlist extract) (#610) 
Reason was: when caching instance-to-instance interactions,
the array descriptions need to be normalized too.
 2020-07-07 18:24:06 +02:00
Matthias Koefferlein 8adeaaf938 Checked add/remove methods for Netlist objects - to avoid script mistakes. 2020-07-05 19:02:43 +02:00
Matthias Köfferlein 54cca8912b
Implemented #586 (issues with duplicate cell names) (#605) 
As discussed in the ticket, the implementation will
check for unique cell names upon *writing* of a layout
file.
 2020-07-05 18:41:44 +02:00
Matthias Köfferlein 4db20b3b48
Fixed #596 (crash on library _destroy) (#597) 2020-07-03 23:41:20 +02:00
Matthias Köfferlein dcd0476efc
Implemented issue #598 (Cell#transform) (#600) 2020-07-03 23:41:09 +02:00
Matthias Köfferlein 4bd2672134
Fixed #592 (layer mapping issue) (#601) 2020-07-03 23:40:55 +02:00
Matthias Köfferlein b413cb9d74
Netlist compare: Ambiguity resolution through name matching now default (can be turned off) (#594) 
* WIP: some refactoring

* WIP: some refactoring

* Netlist compare: introducing ambiguity resolution by net names

By default now net names are used for resolving ambiguities.
If net names match, they will be used to associate nets if the
choice is ambiguous. This is usually much faster and more reliable
than trying to resolve ambiguities through topology analysis.

This feature can be disabled using "consider_net_names(false)" in
the LVS script.

* Some refactoring, Jenkinsfile modified for better test coverage
 2020-06-29 20:47:57 +02:00
Matthias Köfferlein e744eb32d1
Merge pull request #580 from KLayout/drawing-performance2 
Drawing performance2
 2020-06-28 16:14:48 +02:00
Matthias Koefferlein c517aa4ff7 Cherry-picked MacOS fixes into master 2020-06-27 01:47:35 +02:00
Matthias Koefferlein b91e2324d0 Netlist compare enhancement 
This enhancement targets towards a better resolution
of ambiguities. The enhancement is to utilize knowledge
about device and subcircuit equivalences to avoid stale
branches of the ambiguity resolution tree.

So far following these branches could lead to a
contradictions which render an ambiguitiy resolution
choice useless.

One effect of this change is enhanced reproducibility
of the matching log because some pointers are not
involved anymore.
 2020-06-26 17:01:03 +02:00
Matthias Koefferlein 3f1c3cf209 Extended NetlistCrossReference class so we can easily obtain the other_... objects. 2020-06-15 01:27:33 +02:00
Matthias Koefferlein 880b9904cf WIP Netlist probing will deliver an instantiation path now. 2020-06-14 22:04:16 +02:00
Matthias Koefferlein d141c0895d Added tests for Region's andnot. 2020-06-14 18:12:17 +02:00
Matthias Koefferlein 3637b15a74 Generalization of code for twobool local operation 2020-06-14 17:06:53 +02:00
Matthias Koefferlein 41fe04bbc8 WIP: twobool local processor 2020-06-14 17:00:54 +02:00
Matthias Koefferlein 041abe3e89 Added a testcase for two-boolean edge processor. 2020-06-14 16:50:34 +02:00
Matthias Koefferlein ad22ade9ae WIP: preparations finished, testing required. 2020-06-14 16:06:28 +02:00
Matthias Koefferlein 5aa301bcc6 WIP: more preparations 2020-06-14 15:57:23 +02:00
Matthias Koefferlein 1bdf18a51b WIP: more preparations 2020-06-14 14:53:46 +02:00
Matthias Koefferlein 688425c31d WIP: preparations for multi-output edge processor. 2020-06-14 14:16:15 +02:00
Matthias Koefferlein 4390a80dda Added test cases for multiple-outputs local processors. 2020-06-13 23:57:40 +02:00
Matthias Koefferlein 0a10635363 Fixed memory statistics for array (wasn't taking the right statistics for irregular arrays) 2020-06-13 19:55:33 +02:00
Matthias Koefferlein 96caa646f5 WIP: preparations for multi-input/multi-output local processor. 2020-06-07 18:04:30 +02:00
Matthias Koefferlein 689b3c5af9 Merge branch 'issue-374' into drc-enhancements 2020-06-05 14:07:01 +02:00
Matthias Koefferlein 5992a9b509 Merge branch 'master' into lefdef-enhancments 2020-06-05 14:05:13 +02:00
Matthias Köfferlein 852f5c438b
Implemented #560 (multiple technologies on libraries) (#576) 
* First implementation.

* PORT BACK: fixed a few flaws (fixed-width side panel ..)

1. On "save as" the filename displayed in the cell view selection box
   was not updated
2. The width of the library and cellview panel could not be reduced
   below the width of the combo boxes in the headers. So the
   panels might have become pretty wide without being able to reduce
   them.

* Implemented #560 (multiple techs on libraries)
 2020-06-05 10:58:53 +02:00
Matthias Köfferlein 2d0a9418f9
Implemented #579 (perimeter_only mode for antenna check) (#582) 
* WIP: added basic feature and tests.

* WIP: provide tests are GSI binding of new antenna check

* Fixed issue #579 (perimeter_only mode for antenna check)

* Updated DRC doc for 'perimeter_only'
 2020-06-05 10:55:07 +02:00
Matthias Koefferlein 8b0ab115ed Memory footprint optimization for quad tree 2020-06-04 15:38:53 +02:00
Matthias Koefferlein adfd653213 WIP: refactoring - include fuzzy compare in array, don't put into GSI method impl. 2020-06-04 13:01:11 +02:00
Matthias Koefferlein 999c065262 Introducing iterated arrays for instances 
Iterated instances are created for OASIS files
using irregular repetitions in viewer mode.

Reason: this way, the same drawing optimization
than for iterated shape arrays can be applied.

As this is a new API feature, some adjustments
had to be made to incorporate them into the
code.
 2020-06-04 12:17:34 +02:00
Matthias Koefferlein 9c4648a5b5 WIP: some bug fixing and enhancements. 2020-06-02 23:59:09 +02:00
Matthias Koefferlein cdf4d08fd3 WIP 
* Maybe fixed a performance issue on box-trees: the iterator wasn't
  going down to the very bottom of the tree on initialization
* Added array quad skipping in display of shape arrays
 2020-06-01 23:28:04 +02:00
Matthias Koefferlein d7af7fc5c0 Merge branch 'lefdef-enhancments' 2020-06-01 13:37:45 +02:00
Matthias Köfferlein 0c0d247c23
Merge pull request #574 from KLayout/issue-558 
Fixed #558 ("extents" wasn't deep-enabled for Edges, Texts and EdgePairs)
 2020-06-01 00:21:46 +02:00
Matthias Koefferlein a9c0616aa0 WIP: more changes 2020-05-31 10:37:30 +02:00
Matthias Koefferlein 759f07ee4d Implemented solution for #570 (deep Edges::extents) 
While doing this, it was discovered that the problem also
persists for EdgePairs and Texts.

In order to provide a more generic solution, some refactoring
was applied.
 2020-05-31 01:55:05 +02:00
Matthias Köfferlein 6601d472bf
Implemented #570 (perimeter included in antenna check) (#572) 
* First implementation of the perimeter factor for antenna check, unit tests.

* Bugfix and unit tests for GSI binding of new antenna check version.

* DRC integration of perimeter-enabled antenna check.

* Enhanced DRC doc for antenna rule
 2020-05-30 21:45:48 +02:00
Matthias Koefferlein bea3e29421 Merge branch 'master' of https://github.com/KLayout/klayout 2020-05-28 00:44:49 +02:00
Matthias Koefferlein e94b40cab9 Fixed Windows build (linker error) 2020-05-28 00:44:27 +02:00
Matthias Köfferlein 3246e0d36f
Fixed #565 (SPICE global nets must not produce pins if not present) (#567) 
* Fixed #565 (SPICE global nets must not produce pins if not present)

* Fixed unit tests.
 2020-05-26 23:47:59 +02:00
Matthias Koefferlein 29a5b4c519 Bugfix: wrong type cast of size_t to unsigned int 2020-05-24 09:44:25 +02:00
Matthias Koefferlein 5ba3d220e9 Made unit tests a little more consistent. 2020-05-23 22:30:54 +02:00
Matthias Koefferlein f410c91339 Updated documentation 2020-05-23 21:14:01 +02:00
Matthias Koefferlein ba9a05640c Bugfixed tiled mode with text input, DRC tests added and test data updated. 2020-05-23 19:03:42 +02:00
Matthias Koefferlein 81750ed3d8 Tiling processor enabling for text input/output, updated tests. 2020-05-23 16:23:40 +02:00
Matthias Koefferlein daf8e5f8fc Bugfix: Region::pull_interacting(edges) wasn't working properly. 2020-05-23 13:19:46 +02:00
Matthias Koefferlein b84a9df2da Persisting texts now for .l2n format 2020-05-22 00:58:46 +02:00
Matthias Koefferlein c682cc85d0 Generalized concept of region, texts etc. into 'shape collections'. Fixed LVS and DRC tests. 2020-05-21 23:59:30 +02:00
Matthias Koefferlein 854320d52d Debugging: proper assignment of net names through labels. 2020-05-20 23:27:06 +02:00
Matthias Koefferlein e9af72ee28 Tests for texts as net names, fixed Shapes test (order of texts) 2020-05-20 01:05:19 +02:00
Matthias Koefferlein cd0b86b1dc WIP: fixed tests. 2020-05-20 00:31:26 +02:00
Matthias Koefferlein 4c13bb96a0 WIP: refactoring - texts for net extractor. 2020-05-20 00:21:06 +02:00
Matthias Koefferlein 7dab87b881 Added tests, Region#pull_interacting with texts 2020-05-15 23:48:21 +02:00
Matthias Koefferlein 878a494abb AND and NOT for texts vs. region, DRC generalization. 2020-05-15 22:24:18 +02:00
Matthias Koefferlein 8a2742d436 Small doc updates 2020-05-13 22:39:25 +02:00
Matthias Koefferlein 58ca9b8730 Some bug fixes, added tests 2020-05-13 21:56:49 +02:00
Matthias Koefferlein 831acb2c40 Bugfixes, tests for flat interact between region and texts. 2020-05-13 18:25:43 +02:00
Matthias Koefferlein 16d6c75b0e Fixed build, added tests for filter in deep texts object. 2020-05-13 17:58:00 +02:00
Matthias Koefferlein 4e7d0a81b8 'interact' between regions and texts. 2020-05-13 17:29:10 +02:00
Matthias Koefferlein 08026e8b35 Bugfix: in-place filter not working for region, edges. Implemented hierarchical filter for texts. Added Ruby tests for Texts. 2020-05-12 23:01:54 +02:00
Matthias Koefferlein c1b1ce6951 Provide unit test for DeepTexts. 2020-05-12 21:43:11 +02:00
Matthias Koefferlein 4fbb6286ac Fixed unit tests. 2020-05-12 21:16:12 +02:00
Matthias Koefferlein 8b083a8330 Added unit tests for db::Texts, renamed db unit test files so debugging is possible 2020-05-12 21:09:21 +02:00
Matthias Koefferlein a9cd9ac122 First implementation of texts collection. 2020-05-12 20:44:39 +02:00
Matthias Köfferlein 3f8090b3fd
Fixed #547 (better error messages on some Shape methods, fixed doc). (#550) 2020-05-11 19:24:44 +02:00
Matthias Koefferlein dbfe904cc6 Fixed some build errors. 2020-05-03 10:06:06 +02:00
Matthias Koefferlein 476a2b3f09 WIP: preparations for an extended width/space concept 2020-05-02 15:29:19 +02:00
Matthias Koefferlein 0e68b910fa Merge branch 'master' into lefdef-enhancments 2020-05-01 16:00:58 +02:00
Matthias Köfferlein cb3833f563
Merge pull request #546 from KLayout/sonarqube-fixes 
Sonarqube fixes
 2020-04-30 22:06:38 +02:00
Matthias Köfferlein 8dae4161e1
Fixed #548 (shield issue on space) (#549) 2020-04-30 22:03:16 +02:00
Matthias Köfferlein 9b0362d03d
Fixed #544 (ignore duplicate global nets in SPICE reader) (#545) 2020-04-26 16:54:13 +02:00
Matthias Köfferlein 93a072903c
Fixed #539 (internal error on circuit flatten) (#542) 
Previously, circuits which connected two pins through
a net could not be flattened. This capability now has
been added.
 2020-04-26 16:53:50 +02:00
Matthias Koefferlein 15567d3d27 Some small fixes to make clang-analyze happy. 2020-04-26 09:33:10 +02:00
Matthias Koefferlein 73f2f23505 Adjusted unit tests for latest fix. 2020-04-26 01:05:07 +02:00
Matthias Koefferlein fffae4134c Fixed a Sonarqube issue. 2020-04-25 23:37:43 +02:00
Matthias Koefferlein 3a7d9d0b0f Fixed copyright/license topic. 2020-04-25 23:30:48 +02:00
Matthias Koefferlein 0bc965dde9 Fixed a layout diff bug (compare of paths) 2020-04-25 23:20:01 +02:00
Matthias Koefferlein 040af426dc WIP: refactoring of map file reading. 2020-04-19 16:54:41 +02:00
Matthias Koefferlein d93ef3ff97 Timing reports for stream writers too, reporting file names for reader and writer timing. 2020-04-19 10:39:27 +02:00
Matthias Koefferlein 2cdcf621d8 D25 tech component editor: line numbers shown, more syntax variants 2020-04-18 00:37:15 +02:00
Matthias Koefferlein ca2b0cd96a Added tests for tech component, syntax highlighter fixed. 2020-04-17 16:24:56 +02:00
Matthias Koefferlein b2216ec372 WIP: tech component + editor. 2020-04-17 11:15:50 +02:00
Matthias Koefferlein df11ff9b85 Merge branch 'master' of https://github.com/KLayout/klayout 2020-04-05 20:20:28 +02:00
Matthias Koefferlein 0abd5d5d96 Fixed some minor compiler warnings. 2020-04-05 18:30:08 +02:00
Matthias Köfferlein c93db59e37
Fixed #524 (failed query leaves layout in invalid state) (#528) 2020-04-05 15:11:37 +02:00
Matthias Koefferlein c640347570 MERGE: added Spice reader testcase for resistors with model names. 2020-04-01 23:19:21 +02:00
Matthias Koefferlein c021d60d41 Updated unit test 2020-03-29 09:23:13 +02:00
Matthias Koefferlein 99d3610a6a Implemented #527 (wildcard layer mapping targets) 
commit d77702cd86066f3a97d740a95923fa598c2ff07b
Author: Matthias Koefferlein <matthias@koefferlein.de>
Date:   Sat Mar 28 21:28:39 2020 +0100

    Wildcard expansion feature on layer mapping

    Finished feature, added doc and test.

    The solution is to use placeholder indexes for the
    layer mapping which are substituted by the real
    layers when they are encountered.

commit af60b5f18acfe3c5e2f1d4e6bc6ee752a246dc0d
Author: Matthias Koefferlein <matthias@koefferlein.de>
Date:   Sat Mar 28 19:11:32 2020 +0100

    Preparations for new feature: introduce relative and wildcard target layer specs
 2020-03-28 22:49:57 +01:00
Matthias Koefferlein 666cdeadc5 MERGE: documentation enhancements for LVS/DRC 2020-03-28 12:29:53 +01:00
Matthias Koefferlein a47932a79e Added one more testcase for join_symmetric_nets 2020-03-28 09:49:41 +01:00
Matthias Koefferlein b6ba51e563 Provide timing information for Spice reader/writer 2020-03-26 17:33:18 +01:00
Matthias Koefferlein c10ccccdf7 Merge branch 'app-refactoring' into doc-args 2020-03-15 21:32:39 +01:00
Matthias Koefferlein 53c81cc572 Got rid of most of the @args 2020-03-14 21:50:47 +01:00
Matthias Köfferlein b0fad430df Fixed a severe bug in join_symmetric_nets 2020-03-03 22:24:58 +01:00
Matthias Koefferlein 6721cb9c5b Merge branch 'issue-482-update' 2020-03-02 18:57:40 +01:00
Matthias Koefferlein 8d665bd456 Fixed a minor segfault (DXF reader while having log level verbose), updated Changelog 2020-03-02 18:56:29 +01:00
Matthias Koefferlein a5a4ae511d Some more tests, a (unlikely) segfault fixed 2020-02-28 23:19:27 +01:00
Matthias Köfferlein 82686b307c
Merge pull request #515 from KLayout/issue-471 
Implemented #471 (leaner way to specify compare tolerances)
 2020-02-27 18:46:15 +01:00
Matthias Köfferlein 56868eda85
Merge pull request #514 from KLayout/issue-482 
Implemented #482 (split gate option aka join_symmetric_nets)
 2020-02-27 18:46:02 +01:00
Matthias Koefferlein 02e38a2cd1 Merge branch 'issue-482' into issue-471 2020-02-27 15:49:35 +01:00
Matthias Koefferlein 8b73dffcfe Implementation done. Added tests. 2020-02-27 15:40:06 +01:00
Matthias Koefferlein 75e936bd64 Added one more test case. 2020-02-27 13:46:52 +01:00
Matthias Koefferlein 3b31109367 Added GSI binding for join_symmetric_nets, added method to get circuits by name pattern. 2020-02-27 12:17:35 +01:00
Matthias Koefferlein a46cd305c6 WIP: bug fix for symmetry detection (should consider different pins to break symmetry). Added tests. 2020-02-27 00:52:06 +01:00
Matthias Koefferlein b35429291e WIP: join_nets implemented, join_symmetric_nets: enhanced detection of symmetric nets. 2020-02-27 00:52:03 +01:00
Matthias Koefferlein 08af8d85c4 WIP: first algorithm - is capable of deriving the 'resistor cube' symmetry. 2020-02-27 00:52:00 +01:00
Matthias Koefferlein 58de38739a WIP: some refactoring, debugging output for netlist compare 
Abstraction: a central getenv() feature to wrap all the system-specific things

Netlist compare debug and options can be enabled through environment variables:

KLAYOUT_NETLIST_COMPARE_DEBUG_NETCOMPARE=1: print netlist compare debug info
KLAYOUT_NETLIST_COMPARE_DEBUG_NETGRAPH=1: print net grapg
KLAYOUT_NETLIST_COMPARE_CASE_SENSITIVE=1: make netlist compare case sensitive
 2020-02-27 00:51:55 +01:00
Matthias Koefferlein 2564b11da3 Fixed #478 (shapes method can't be used in queries) 2020-02-23 13:36:20 +01:00
Matthias Köfferlein 161068c70a
Merge pull request #492 from KLayout/issue-491 
Issue #491 fixed (maybe)
 2020-02-16 10:15:53 +01:00
Matthias Koefferlein 0f69c24e79 WIP: avoids a segfault because of missing manager 2020-02-04 20:50:46 +01:00
Matthias Koefferlein 961a36a7ad Issue #491 fixed (maybe) 2020-02-03 22:38:45 +01:00
Matthias Köfferlein aba55148db
Merge pull request #483 from KLayout/issue-481 
Fixed issue #481 (duplicate DRC markers)
 2020-01-28 23:48:33 +01:00
Matthias Koefferlein 21397283f3 Fixed #477 2020-01-23 18:38:41 +01:00
Matthias Koefferlein b1716fc8c4 Fixed issue #481 2020-01-23 17:26:12 +01:00
Matthias Köfferlein 6a996b6f5b
Merge pull request #465 from KLayout/issue-462 
Implemented #462 (Generalize MOS transistor extraction to other gate …
 2020-01-05 01:02:54 +01:00
Matthias Koefferlein b8c82c4f8b Updated copyright notice to 2020 2020-01-05 00:59:43 +01:00
Matthias Koefferlein 811560094a Updated tests. 2020-01-04 21:19:06 +01:00
Matthias Koefferlein 833edf53b2 Implemented #462 (Generalize MOS transistor extraction to other gate figures) 2020-01-02 22:20:45 +01:00
Matthias Koefferlein c4636cebdb Fixed #458 (Array instance net tracing bug) 2019-12-23 20:38:17 +01:00
Matthias Koefferlein 85c033db64 Small doc fixes 2019-12-21 18:00:02 +01:00
Matthias Koefferlein 297f37a63a Huge performance improvement for a specific array element interaction. Reason: duplicate cluster interactions spoiled performance. 2019-12-18 01:10:16 +01:00
Matthias Koefferlein fcba0018ba Enhanced progress estimation of box scanner - no progress jumping back and forth. 2019-12-17 22:38:17 +01:00
Matthias Koefferlein a9bd037b58 Some code cleanup with performance impact 2019-12-17 22:23:43 +01:00
Matthias Koefferlein fb2611632d Some performance improvement of net extractor. 2019-12-17 21:16:29 +01:00
Matthias Koefferlein d0e6efa484 Implemented #444 (double-height standard-cell support). 2019-12-17 00:12:36 +01:00
Matthias Koefferlein 12c040aa6c Merge branch 'issue-448' into dvb 2019-12-15 20:51:35 +01:00
Matthias Koefferlein c9d528dc88 Fixed #447 - CentOS 6 build fixed. 2019-12-15 15:46:15 +01:00
Matthias Koefferlein fccd78a222 Fixed #448 and updated test data 2019-12-15 10:37:51 +01:00
Matthias Koefferlein 782f6fe601 BUGFIX: the L2N and LVSDB writer was writing too much 
Sometimes, shapes from child cells were propagated into
parent cells in the L2N and LVSDB output.

Because of this fix, many testdata files have to be updated.
 2019-12-15 01:29:56 +01:00
Matthias Koefferlein 87e658acf0 WIP: finalized refactoring. 2019-12-15 00:48:11 +01:00
Matthias Koefferlein da1ac3661f WIP: bugfix of refactoriung, update test data. 2019-12-15 00:16:47 +01:00
Matthias Koefferlein 1e5d02b1bc WIP: refactoring of cell instance interactions for net extraction. 2019-12-14 18:58:22 +01:00
Matthias Koefferlein 1f5ec9d3e9 Bugfix: don't mess with the hier cluster structure while determining the interactions ... 2019-12-12 00:20:15 +01:00
Matthias Koefferlein e11aaf4ac2 WIP: Continued rework. 2019-12-11 23:35:19 +01:00
Matthias Koefferlein fee5472845 WIP: further refactoring. 2019-12-11 01:28:56 +01:00
Matthias Koefferlein 406bc226bb WIP: refactoring 2019-12-11 00:39:46 +01:00
Matthias Koefferlein 75cb21bbd1 WIP: refactoring, first steps. 2019-12-10 23:55:14 +01:00
Matthias Koefferlein 4acc4b96e2 First attempt to fix the issue 
Problem was caching which did not take into account the array nature
of instances.

This fix also moves the cache one level below so it is effective also
when instance tree traversal happens. This might speed up things too.

Needs testing.
 2019-12-09 21:37:07 +01:00
Matthias Koefferlein 3b9beb0d49 Fixed #438 (error on redefinition of subcircuit in SPICE) 2019-12-07 23:39:39 +01:00
Matthias Köfferlein 2fa545d80b
Merge pull request #435 from KLayout/issue-429 
Issue 429
 2019-12-02 21:15:05 +01:00
Matthias Köfferlein e061a0a932
Merge pull request #433 from KLayout/wip 
Some enhancements
 2019-12-02 21:14:35 +01:00
Matthias Köfferlein 8f8c393309
Merge pull request #432 from KLayout/issue-425 
Issue 425
 2019-12-02 21:13:14 +01:00
Matthias Köfferlein e7ddf3b64f
Merge pull request #431 from KLayout/issue-426 
Implemented #426 (feature request: group techs)
 2019-12-02 21:12:40 +01:00
Matthias Koefferlein baffb940d1 Implemented #429: final touches to doc and tests for RBA/pya API. 2019-12-01 16:41:27 +01:00
Matthias Koefferlein 9eb09c3a5d Enhancements to implementation 
- OASIS layers are turned into pure layer name (not lxdy_name) for
  MAG output
- Boxes of instances had been incorrect
- consistent naming of cell files in presence of special chars
 2019-11-30 22:30:28 +01:00
Matthias Koefferlein c6ede46fd0 WIP: substantial changes 
- force lower-case layer names to allow CIF/MAG loop (CIF needs
  upper-case layer names, MAG doesn't)
- reverted CIF reader to standard
- new options for writer: tech, "zero timestamp".
- file name MUST be consistent with one cell name.
  Reason: it's not possible to derive the initial
  cell from the given options, so without the file name
  being consistent, we can't know what to write there.
  Basically the file name rather supplies the path.
 2019-11-30 00:09:44 +01:00
Matthias Koefferlein 3f9dd59593 WIP: MAG reader now is compliant with writer (and Magic I hope) 2019-11-29 00:25:28 +01:00
Matthias Koefferlein 0f1dc1d191 Refine pin mismatch handling so that only 'not used' nets will make a pin match against null. 2019-11-24 16:40:45 +01:00
Matthias Koefferlein afacf7c0b5 WIP: fixed a segfault in the netlist browser. 2019-11-24 01:28:07 +01:00
Matthias Koefferlein 64bb01d80d Dropped attempt to remove dummy nodes from spice reader netlist as this wasn't effective anyway. 2019-11-24 00:23:19 +01:00
Matthias Koefferlein ed00503d41 Fixed Spice reader: must not use Netlist::purge_nets to remove dummy nets. Updated golden test data. 2019-11-23 23:36:52 +01:00
Matthias Koefferlein aa28aa807a Unit tests fixed and a bugfix in the netlist compare 
One unit test was failing because the netlist compare did not
properly consider dropped pins:
* A severe bug ("g1" should be "g2")
* Incomplete detection of dropped pins upwards in the hierarchy

The general pin and net mapping scheme has been enhanced so that
net mapping to "0" is valid (this will happen in case of dropped
pins) and this condition is used to detect pins without match
requirement.
 2019-11-23 22:04:25 +01:00
Matthias Koefferlein 1309aa59cb Merge branch 'master' into issue-425 2019-11-23 01:55:28 +01:00
Matthias Koefferlein 7de90ae595 Merge branch 'issue-417' 2019-11-23 01:46:38 +01:00
Matthias Koefferlein 79f4f8bc57 Update unit test for issue-417 branch. 2019-11-23 01:45:56 +01:00
Matthias Koefferlein d5506a176a WIP: first implementation - needs testing. 2019-11-23 01:20:22 +01:00
Matthias Koefferlein 2757b22da6 Resolved conflicts for issue-419 merge 2019-11-22 23:34:03 +01:00
Matthias Koefferlein 4fe5a96596 Implemented #426 (feature request: group techs) 
The tech group is a new XML tag "<group>...</group>".
This tag is editable in the tech "general" page as "Group".
If non-empty, a submenu will be created in the tech selector
menu for all techs with the same group.
 2019-11-22 23:23:11 +01:00
Matthias Köfferlein a792cf4c1e
Merge pull request #424 from KLayout/issue-407 
Issue 407
 2019-11-22 23:12:44 +01:00
Matthias Köfferlein ac7e17ffcb
Merge pull request #422 from KLayout/issue-406 
Issue 406
 2019-11-22 23:12:16 +01:00
Matthias Köfferlein 9200e5037d
Merge pull request #421 from KLayout/issue-417 
Fixed #417: look up the net in the parent hierarchy of the net shape …
 2019-11-22 23:11:59 +01:00
Matthias Köfferlein c8cf8122b6
Merge pull request #414 from KLayout/issue-411 
Issue 411
 2019-11-22 23:11:24 +01:00
Matthias Köfferlein 319c73e6c0
Merge pull request #413 from KLayout/issue-408 
Fixed issue #408 (internal error after EdgePairs#polygon)
 2019-11-22 23:11:05 +01:00
Matthias Koefferlein 247bfa9ac5 Implemented #407 (variables in technology base path) 
The implementation uses extrapolation of strings in the
"Expressions" framework.

There is how:
* $(tech_name) -> substituted by the technology name
* $(tech_dir) -> substituted by the directory the technology file is stored in
* $(tech_file) -> substituted by the absolute path to the tech file
* $(appdata_path) -> substituted by KLayout's home directory (e.g. ~/.klayout)
* $(env('X')) -> substituted by the environment variable $X
 2019-11-21 21:37:00 +01:00
Matthias Koefferlein 6648b53822 Fixed issue #419 (multiple top circuits after flatten of netlist) 
The problem is solved by always producing subcircuits for cell
instances, even if there are no connections.

The netlist comparer had to be adjusted too because subcircuits
without pins were used for representing "unknown" subcircuit pairing.

In addition, this patch should lead to a better matching of
parallel subcircuit configurations where two different subcircuits
are entirely parallel.
 2019-11-20 21:56:12 +01:00
Matthias Koefferlein f28b8e60c1 Fixed #417: look up the net in the parent hierarchy of the net shape clusters to find the net for the flattened netlist. 2019-11-19 23:22:40 +01:00
Matthias Koefferlein 6c7ceb74dc Enhanced intersections algorithm so that the generated points won't overlay with finite edges from the AND part 2019-11-19 21:19:36 +01:00
Matthias Koefferlein 9af662a512 WIP: try to avoid duplicate intersection points by eliminating those. Problem persists: intersection points may be duplicates of edges arising from AND 2019-11-18 23:14:24 +01:00
Matthias Koefferlein 24759c7174 WIP: first implementation. Testing needed. 2019-11-18 19:14:06 +01:00
Matthias Koefferlein 990961e5f4 Fixed #411 (multiple device extractors for same class) 2019-11-17 23:12:50 +01:00
Matthias Koefferlein 1131532e4f First implementation, needs testing. 2019-11-17 22:45:36 +01:00
Matthias Koefferlein 68c6941318 Fixed issue #408 (internal error after EdgePairs#polygon) 2019-11-17 22:32:02 +01:00
Matthias Koefferlein 181d5b48e6 Fixed consistent typo: PCell's -> PCells 2019-11-17 21:47:11 +01:00
Matthias Koefferlein 6d8f56194b Edge enhancements 
New binding: Edge#d (distance vector), Edge#clipped and Edge#clipped_line.
"intersection_point" returns nil in case of no intersection.
Documentation error fixed (Edge#distance).
 2019-11-17 21:30:08 +01:00
Matthias Koefferlein 8dddc4000f Also write the net properties to GDS or OASIS 
"build_nets" will now write the net's properties
to the generated net shapes.
This might enable interesting applications.
 2019-11-13 23:09:09 +01:00
Matthias Koefferlein bb3aed5773 Merge branch 'master' of https://github.com/KLayout/klayout into netlist_properties 2019-11-13 00:59:29 +01:00
Matthias Koefferlein 876487edde Added persistency of the netlist object properties into L2N/LVSDB files 2019-11-13 00:06:29 +01:00
Matthias Koefferlein d060147713 Enhancements for the netlist object properties 
- more memory efficient (single pointer only)
- iterator for properties
- NetlistObject#property_keys in GSI
 2019-11-12 23:00:49 +01:00
Matthias Koefferlein 6d6ac23f50 Fixed a build issue (const iterator cannot be used in std::map::erase) 2019-11-12 20:55:28 +01:00
Matthias Koefferlein 86e041cd51 Updated test data. 2019-11-11 23:03:40 +01:00
Matthias Koefferlein 47efb9d11b WIP: fixed compiler warning 2019-11-11 07:08:37 +01:00
Matthias Koefferlein 0ce06125ca Introducing netlist object properties. 2019-11-11 07:02:02 +01:00
Matthias Koefferlein 4a212e8db6 Added tests for Region#scale_and_snap and Region#snap 2019-11-07 23:33:54 +01:00
Matthias Koefferlein 988b1e563f Added unit test for DeepRegion::snap 2019-11-07 23:11:34 +01:00
Matthias Koefferlein 318efbf7b0 Fixed 'scale_and_snap' feature 2019-11-07 22:54:16 +01:00
Matthias Koefferlein 4924d0269c Fixed #400, added tests. 2019-11-06 23:28:16 +01:00
Matthias Koefferlein 1e2a8b264d WIP: because the fixed scheme works nicely, add a new scale_and_snap function. 2019-11-06 01:11:40 +01:00
Matthias Koefferlein 895206dfa1 WIP: bugfix in case of clip variants. 2019-11-06 01:11:40 +01:00
Matthias Koefferlein 51676376e6 WIP: Variant building bug fixed. Needs testing. 2019-11-06 01:11:40 +01:00
Matthias Koefferlein 7910ddc6a3 Fixed a compiler warning, testcase update (part 1) 2019-11-02 20:39:59 +01:00
klayoutmatthias 627b248f7e Enhanced compatibility between platforms (problem was: order of execution of argument expressions) 2019-11-02 01:26:37 +01:00
Matthias Koefferlein 679aecd11f Removed debug output. 2019-10-31 00:51:54 +01:00
Matthias Koefferlein 73556d6edc Netlist compare issue fixed 
In tentative mode, node equivalence shall not be assumed
if the nodes have edges which don't appear in the other node.
 2019-10-30 23:55:08 +01:00
Matthias Koefferlein 3cc38fcfc2 Solved ambiguous bus resolution problem. 2019-10-29 23:26:17 +01:00
Matthias Koefferlein 15fa99c128 WIP: bugfix ambiguous bus-like pins and net compare. 2019-10-29 22:53:37 +01:00
Matthias Koefferlein e25d4784ea Updated tests. 2019-10-26 01:48:50 +02:00
Matthias Koefferlein 373a3db1ec WIP: netlist comparer - increase default depth and added test 
The test is specific for symmetric circuits with manifold
symmetry axes.
 2019-10-24 23:58:30 +02:00
Matthias Koefferlein ac479c30bc Fixed unit tests. 2019-10-24 00:23:03 +02:00
Matthias Koefferlein 3a8d5d9779 Removed debug code. 2019-10-23 23:49:38 +02:00
Matthias Koefferlein 4ce37160d5 Two bug fixes in net compare (tests required): 
- name compare of net names wasn't always case insensitive
- tentative evaluation was sometimes continued even after
  a contradiction was detected because the return codes
  of different edge examinations were not combined correctly.
 2019-10-23 23:46:25 +02:00
Matthias Koefferlein 36ee1efe16 WIP: speedup LVS 'align' by flattening top-down 2019-10-21 22:14:36 +02:00
Matthias Koefferlein f0635589f7 WIP: fixed cell cluster interaction cache. 2019-10-20 23:27:15 +02:00
Matthias Koefferlein a0544e7807 WIP: caching of cell interactions in net cluster builder for speedup - test data needs update! 2019-10-19 21:44:29 +02:00
Matthias Koefferlein bf18000877 Added tests (breakout cells, LVS cheats) 2019-10-18 00:25:51 +02:00
Matthias Koefferlein 611f62e73f Removed debug leftover code 2019-10-17 22:47:43 +02:00
Matthias Koefferlein cd4516393b WIP: bugfix (breakout cell handling) and performance 
1.) Bugfix: breakout cells also need to be handled
    when diving down inside the hier cluster builder
2.) Performance: cache cell interactions
 2019-10-17 01:54:41 +02:00
Matthias Koefferlein 991778f718 "breakout cells": attempt to provide a solution for SRAM 
Breakout cells can be specified to shortcut hierarchy
evaluation for some cells. This allows treating SRAM cells
as isolated entities - specifically when it comes to extracting
devices.
 2019-10-16 00:49:41 +02:00
Matthias Koefferlein f8476bdf26 Fixed an issue with 'align' in LVS scripts - with multiple layout cells assigned to one schematic, align won't give the right results. 2019-10-05 09:30:38 +02:00
Matthias Koefferlein 2325e1bce4 Merge branch 'dvb' into pull_feature 2019-10-04 22:58:52 +02:00
Matthias Koefferlein ef56264f64 Fixed a regular arrays issue with begin_touching 
In case of 1d arrays with a or b == (0,0), the iterator
was always delivering all items, not just the touching ones.
 2019-10-04 22:45:23 +02:00
Matthias Koefferlein 2fa7c4b6d4 Partially enabled progress for hierarchical processor. 2019-10-04 01:48:45 +02:00
Matthias Koefferlein 212bd86aab Thread safetiness: enable multiple threads for deep region operations 2019-10-04 01:39:16 +02:00
Matthias Koefferlein 7c5ae471ab WIP: performance improvement of hier local processor 
The solution is to take intruder instances from as
far as possible in the hierarchy. This provides a
performance improvement in some cases, specifically
if this leads to compression of contexts.
 2019-10-03 22:53:38 +02:00
Matthias Koefferlein 5ed41cc345 Merge branch 'master' into pull_feature 2019-10-03 14:32:25 +02:00
Matthias Koefferlein e1d77a1476 pull_interacting for edges/edges and edges/regions, some enhancements and bug fixes 
Bug fixes:
- use dist 1 to cover touching case properly in local processor
- handling of raw mode and is_merged state

Additional tests
 2019-10-03 13:08:37 +02:00
Matthias Koefferlein 76b8bd3279 Fixed several issues with raw mode/merged semantics and many Region and Edges methods. Added edge/edge pull and edge/polygon pull. 2019-10-03 01:46:49 +02:00
Matthias Koefferlein 77c8ff50ed WIP: don't fallback to flat in case of non-deep other arguments in select_interacting and pull. 2019-10-02 00:12:04 +02:00
Matthias Koefferlein a1e87d4c14 First pull* implementation functional. 2019-10-01 23:53:05 +02:00
Matthias Koefferlein 74880a5198 First implementation of pull* methods 2019-10-01 22:06:16 +02:00
Matthias Koefferlein 0bc2321ade Some code cleanup. 2019-09-30 23:17:42 +02:00
Matthias Koefferlein a3cecb2ebe WIP: enable multiple layout versions of one schematic circuit using 'same_circuit' 2019-09-30 23:08:15 +02:00
Matthias Koefferlein bdf5e3c124 WIP: fake pin debug issue with LVS 
Fake pins: pins that happen because something connects to a cell at an
unexpected position. Such a pin is difficult to find. The solution is
to keep those nets and nur purge them so these nets can be identified
in the layout.

Here: is_floating? will be true only if there are no pins. Hence
nets with pins are not removed. is_passive is introduced for nets -
passive nets are such that don't have elements, but a pin.
Circuits are purged if they only have passive nets.
 2019-09-30 21:58:13 +02:00
Matthias Koefferlein 506cfc1c6f WIP: attempt to retain nets which don't have active elements but pins. This is supposed to simplify debugging in case of fake pins. When removing those nets, the pin is very difficult to find. 2019-09-30 20:58:55 +02:00
Matthias Koefferlein d69c60a5c5 Enabled net tracing for heavily decomposed polygons 2019-09-19 00:13:14 +02:00
Matthias Koefferlein 6c52daa3a3 Follow-up on #353 (sessions paths relative to session file) 
Consistent behavior for file paths for images too.
Plus: image paths are not kept as absolute paths
inside the session.
This makes regeneration of images stable.
 2019-09-18 22:05:37 +02:00
Matthias Koefferlein 56084b6b59 Merge branch 'dvb' 2019-09-08 20:07:16 +02:00
Matthias Koefferlein e2cc0c48b1 Provide flat and hierarchical 'trace all nets' feature, added Netlist#flatten. 2019-09-06 23:13:21 +02:00
Matthias Koefferlein fa72885020 issue #317: provide undo combination for the paste+move sequence in 'interactive paste'. Same for 'interactive dup' 2019-09-04 23:47:05 +02:00
Matthias Koefferlein 5cfadad54f Updated test data. 2019-08-30 11:01:00 +02:00
Matthias Koefferlein 2a8f4c9610 Updated test data. 2019-08-30 10:52:51 +02:00
Matthias Koefferlein 550e2622bf Put more amphasis on net names to resolve ambiguities 
The problem was that with the floating test case, the
ambiguity resolution sometimes assigned the wrong pins
and floating pins/connected pins were swapped.

One option is to make the ambiguity resolver consider
the pin connection state when tenatively evaluating
nodes.

Another option is to put more emphasis on net names
and use them for ambiguity resolution. This has helped
here.
 2019-08-30 10:24:55 +02:00
Matthias Koefferlein 60ed0cdc89 Updated test golden data (mainly: nets are not purged when there is a subcircuit pin on it) 2019-08-29 23:26:03 +02:00
Matthias Koefferlein b1acfe9587 Tried a better deal with floating pins 
1.) is_floating is now only true if there is no device
    and no subcircuit on a net. This means we only purge
    nets if they are really floating. So far we purged
    nets without pins which lead to the mismatch:

    Before purge:
      Layout:            (net) <--> DEVICE.TERMINAL
      Schematic:           PIN <--> DEVICE.TERMINAL

    After purge:
      Layout:           (null) <--> DEVICE.TERMINAL
      Schematic:           PIN <--> DEVICE.TERMINAL

    (null does not match any net)

2.) circuit pin matching was a bit picky. Only when
    one circuit did not have pins, matching was sloppy.

    In real cases however, circuits may have unconnected
    pins:
    - top level pins without a counterpart (no label)
    - subcircuits pins which are not used

    We catch both cases by refining the match: if a pin
    is not used, it does not need to match against
    any other pin. It's reported as "matching against null"
    though.
 2019-08-29 22:25:59 +02:00
Matthias Koefferlein 9a69d106fd Fixed some small issues in the netlist compare 2019-08-29 00:19:24 +02:00
Matthias Koefferlein 3a12714593 Fixed some doc issues, added doc for hierarchical compare. 2019-08-26 18:55:35 +02:00
Matthias Koefferlein 444e10d32f WIP: rerun LVS, partial LVS 
Rerun LVS: a button is provided which allows re-running
the LVS or netlist extraction from the netlist browser.
TODO: a generic concept for triggering the generators

"Partial LVS" is a feature where it's possible to
select a layout subcell - running LVS then will only
compare against the corresponding schematic subcell, not
the whole tree. The magic is done by "align" which will
remove the upper hierarchy part.
 2019-08-24 22:56:20 +02:00
Matthias Koefferlein a9a2cb69c8 Avoiding one assertion by not considering floating device terminals 2019-08-24 09:58:08 +02:00
Matthias Koefferlein 3ae848bff4 Provide test case for spice reader with delegate for devices as subcircuits. Small bugfix in spice reader: wrong line number in warning. 2019-08-23 23:13:04 +02:00
Matthias Koefferlein b0aa9b6540 Spice reader test compatible with Windows (three-digit exponential) 2019-08-21 23:03:24 +02:00
Matthias Koefferlein 45cdefcf9a Provide strict mode for device classes, dmos3/dmos4 for LVS 2019-08-20 23:12:17 +02:00
Matthias Koefferlein b7c83eaaa6 Spice reader: subcircuits w/o pins 
This happens for subcircuits which only
connect to global nets.

Plus: ".global" now accepts more than just one net
 2019-08-19 23:00:24 +02:00
Matthias Koefferlein 1bc03c3b79 Implement "M" parameter for Spice 
This implementation is pretty simplistic and
applies "M" the following way:
* R: R(final) = R/M
* L: L(final) = L/M
* C: C(final) = C*M
* M: W(final) = W*M
* D: A(final) = A*M
* Q: AE(final) = AE*M

The other parameters (specifically the other
geometry parameters) are not scaled yet.
 2019-08-19 22:51:22 +02:00
Matthias Koefferlein 24b985f32e Better .include for Spice reader 
* .inc is allowed as synonym
* Paths can be URL's (with HTTP)
* Relative resolution of paths/URL's vs. parent of .include
 2019-08-19 21:45:40 +02:00
Matthias Koefferlein 9fecc4b674 Merge branch 'dvb' 2019-08-19 21:06:37 +02:00
Matthias Köfferlein 15f45fb09d
Merge pull request #327 from KLayout/query-performance-fix 
Fix for layout query performance improvement: needs to check for qual…
 2019-08-19 19:37:15 +02:00
Matthias Koefferlein fe4396d872 Merge branch 'issue-306' 2019-08-19 00:03:39 +02:00
Matthias Koefferlein e9eed3842b Fix for layout query performance improvement: needs to check for qualified cell name (with lib), not pure cellname 2019-08-18 19:09:07 +02:00
Matthias Köfferlein c75a1bc2eb
Merge pull request #313 from KLayout/query-performance 
Query performance
 2019-08-18 17:31:17 +02:00
Matthias Köfferlein 16ae0346b8
Merge pull request #314 from KLayout/vars-for-queries 
Vars for queries
 2019-08-18 17:31:11 +02:00
Matthias Köfferlein bf41da69da
Merge pull request #315 from KLayout/lib-browser 
Lib browser
 2019-08-18 17:31:02 +02:00
Matthias Koefferlein 8981ed434a First fix for issue-306: some polygons are not recognized as rounded, more robust radius extraction. 2019-08-17 23:55:49 +02:00
Matthias Koefferlein aa72d03526 Fixed issue #322 by skipping used layer indexes - will also help with DXF and other named-layer formats 2019-08-17 15:30:47 +02:00
Matthias Koefferlein 7c0dd07d42 WIP: lib browser - cleanup and small bug fixes. 2019-08-04 00:49:08 +02:00
Matthias Koefferlein a104352a93 WIP: library browser - cleanup of unused cells in lib browser, some bug fixed, enhancements to parameter editor on drop 2019-08-04 00:08:39 +02:00
Matthias Koefferlein fda5d86b4b Performance enhancement of netlist compare (avoid O(2) loop) 2019-08-02 01:39:07 +02:00
Matthias Koefferlein 4428ef808b WIP: library browser - PCell variants as children of PCells 2019-08-01 22:52:20 +02:00
Matthias Koefferlein 0c18171e63 WIP: library browser - basic setup. Not much functionality yet. 2019-07-31 23:46:48 +02:00
Matthias Koefferlein dfd713016b Added some unit tests for performance improvement of queries. 2019-07-29 22:36:39 +02:00
Matthias Koefferlein 0dcfeabaf4 Query performance improvement for the cell tree recursion case by introducing optimization hints ('filter state objectives') 2019-07-29 22:27:36 +02:00
Matthias Koefferlein e329f60257 WIP: attempt to improve performance by using name match shortcuts 2019-07-28 19:05:25 +02:00
Matthias Koefferlein 49c1bacb98 Introducing variables for layout queries: 
1.) The ExpressionContext class is a mapping of tl::Eval
    and allows providing a variable context for the LQ.
    Expression class is derived from ExpressionContext now.
2.) The variable lookup has been changed so that variables
    can be modified even if they come from a parent context.
3.) LayoutQuery and iterator has been given an argument to
    supply the context
 2019-07-28 01:33:30 +02:00
Matthias Koefferlein 71f646c24f WIP: updated test data for latest updates, don't sort LVSDB on reading for consistency 2019-07-27 21:42:51 +02:00
Matthias Koefferlein 169cc5246d WIP: updated golden data for new device sorting in cross reference. 2019-07-27 20:37:41 +02:00
Matthias Koefferlein 2993a6411a WIP: some enhancements to cross reference and browser 
Devices: try to pair unmatching ones similar to subcircuits
Don't sort devices by the device name but by class name
Show the device parameters for netlist devices (same as
for netlist browser)
 2019-07-27 20:21:13 +02:00
Matthias Koefferlein b4fa4b1bae Flattening of layout with circuit flattening. 
Technically, the layout isn't flattened, but connections are made
which allow regenerating the layout even after the circuit
has been flattened.
 2019-07-27 00:37:22 +02:00
Matthias Koefferlein 9cad9ca024 Fixed missing initialization of device_scaling in LayoutToNetlist. 2019-07-24 20:49:56 +02:00
Matthias Koefferlein afb5cea576 Added "device_scaling" to LVS 
Plus: added some missing files

Implementation details:
* scaling factor was introduced in DeviceExtractor::extract
* for easy implementation this is available in "sdbu"
* "sdbu" is made available in GSI
* to test this, the db::compare_netlist had to be enhanced to
  exactly check device parameters
* enhancement of LVS script framework and doc updates
 2019-07-24 00:16:47 +02:00
Matthias Koefferlein aff8212f2f Provide 'align' method to auto-align circuit and cell hierarchy in LVS 2019-07-23 00:14:43 +02:00
Matthias Koefferlein 14d9689498 Added .global to Spice reader. 2019-07-22 23:02:31 +02:00
Matthias Koefferlein 9d250d6df9 Using a larger branch complexity than default for LVS full test's netlist compare 
In addition: typo fixed, added doc for complexity configuration
parameters.
 2019-07-21 22:24:07 +02:00
Matthias Köfferlein 4e1736a181 Updated golden data of two tests for Windows. 2019-07-16 01:27:08 +02:00
Matthias Köfferlein b3e9915259 Provide special LVS test golden data for Windows (slight differences in shape order etc.) 2019-07-16 00:40:43 +02:00
Matthias Köfferlein df23830a1c Fixed a runtime issue on Windows 2019-07-16 00:39:39 +02:00
Matthias Köfferlein 9820e57031 Don't write third terminal for R or C (WithBulk variants) 2019-07-15 23:19:03 +02:00
Matthias Köfferlein eb9ffb4a35 Another msvc2017 build warning fixed 2019-07-15 23:18:20 +02:00
Matthias Köfferlein 9a371b8fd2 Fixed some build warnings with msvc2017 (maybe real issues and memory leaks) 2019-07-15 23:17:24 +02:00
matthias 89ce2be5c2 Merge remote-tracking branch 'origin/master' into dvb 2019-07-14 01:28:11 +02:00
Matthias Köfferlein 397e86f4b4 Merge branch 'dvb' of https://github.com/klayout/klayout into dvb 2019-07-13 23:39:16 +02:00
Matthias Köfferlein 4172b60d60 Fixed a build issue on Windows. 2019-07-13 23:38:26 +02:00
matthias 8b17a4da4f A few utility functions 
Polygon#is_rectilinear?, Polygon#is_empty?
and same for SimplePolygon
 2019-07-13 22:45:22 +02:00
Matthias Koefferlein 1251fb2cd6 Added < and > to allowed chars for net names in Spice reader 2019-07-13 08:50:13 +02:00
Matthias Koefferlein e8ff8156a0 fix for #264 
1. Errors in coerce_parameters are now shown as
   red label + warning icon in the parameters dialog
2. Errors during produce are always logged now

Plus: the scroll bars of the PCell parameters page
don't jump back on "Apply".
 2019-07-12 21:13:18 +02:00
Matthias Koefferlein c7e883cdb2 SPICE reader now assigned net names as pin names. 2019-07-12 19:00:27 +02:00
Matthias Koefferlein f66b094e88 Merge branch 'dvb' into dvb_test 2019-07-12 17:44:11 +02:00
Matthias Koefferlein d109a22cf5 Renaming (distro nodes->virtual nodes) 2019-07-11 23:20:42 +02:00
Matthias Koefferlein e32ee570c7 Alternative algorithm for subcircuit matching - tests updated, refactoring 2019-07-11 23:19:02 +02:00
Matthias Koefferlein 7bc4acd8f6 WIP: new version of subcircuit match algorithm - needs refactoring. 2019-07-11 23:14:53 +02:00
Matthias Koefferlein 0d9273aaf6 WIP: new subcircuit match algorithm 2019-07-11 00:16:36 +02:00
Matthias Koefferlein 2f01c7a0bd WIP: other algorithm for handling subcircuits in netlist compare 2019-07-10 23:40:16 +02:00
Matthias Koefferlein 67f786035c WIP: during refactoring 2019-07-10 00:32:53 +02:00
Matthias Koefferlein cef96902ad Boundary for circuits, reverted automatic generation of global pins 
- global pins have been generated for device cells too and lead
  to implicit pins which may not be desired. The original problem
  was how to make abstract circuits comparable. This has to be
  solved differently.
- Circuit boundaries are good for displaying the boxes for
  abstract circuits
 2019-07-09 19:55:48 +02:00
Matthias Koefferlein 0c6ead6f90 WIP: introduced boundary into L2N format so we have something to display for abstracts. 2019-07-09 01:18:23 +02:00
Matthias Koefferlein c9e08c4500 WIP: propagate global nets to parent hierarchy even if there is no shape inside the cell. 2019-07-08 23:11:35 +02:00
Matthias Koefferlein bdb8a7bcc2 WIP: reverted modifications on SPICE reader. 2019-07-08 21:51:59 +02:00
Matthias Koefferlein 9625caea65 WIP: added full LVS test. 2019-07-08 21:43:06 +02:00
Matthias Koefferlein b48453633f WIP: some fixes and small enhancements. New tests. 2019-07-08 00:09:10 +02:00
Matthias Koefferlein 993ef78575 WIP: some cleanup/enhancement 
General topic: abstracts and swappable pins.
Issue: we work bottom up and assign pins. This is the
basis for net graph building. But swappable means those
pins can change. The compare works fine, but debugging
output is strange: as the pin assigned is fixed, the nets
found to be attached to a circuit might not fit any
proposed pin pair (which does not contain swapping).

The problem gets worse with abstracts.

The enhancements are
- Such cases generate only warnings in the browser
  and the message says swapping might be the case
- Floating nets are treated differently. This should
  lead to a better performance for abstracts/black boxes,
  but in case of disconnected pins (due to wire errors),
  floating nets happen to create mismatches in the nets above.
- Net graph building does not consider swappable nets. In
  case of two swappable pins this wouldn't be an issue, but
  for more than two this would create ambiguities and
  prevent topological matching.

Plus: Debug output option for net graph

Tests updated
 2019-07-07 18:17:14 +02:00
Matthias Koefferlein ace0788f85 WIP: Spice reader reads pin names from nets 2019-07-07 00:05:22 +02:00
Matthias Koefferlein 0e5ecdc36b Attempt to make LVS compare output a little more predictable with boundary cases 
- For unattached subcircuit pins no error should be reported
- For abstract nets, graph propagation through subcircuit pins isn't attempted.
  Abstract nets are only dummy-associated currently.
 2019-07-06 23:40:49 +02:00
Matthias Koefferlein 903b1f7505 WIP: fixed 'equivalent_pins' 2019-07-06 21:47:25 +02:00
Matthias Koefferlein 5ce8dd2684 WIP: added circuit blankout. 2019-07-06 19:50:20 +02:00
Matthias Koefferlein 71777670de Fixed unit tests. 2019-07-04 01:24:19 +02:00
Matthias Koefferlein 5e70f4fa03 Fixed an edit bug. 2019-07-04 01:18:25 +02:00
Matthias Koefferlein 07ae488652 WIP: bugfix - don't uppercase file names in SPICE .include, typos fixed. 2019-07-04 00:57:52 +02:00