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Fixed tests

This commit is contained in:
Matthias Koefferlein 2021-07-29 22:24:22 +02:00
parent 8b970039c0
commit 9543cea952
3 changed files with 1 additions and 62 deletions
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27
src/db/unit_tests/dbNetlistCompareTests.cc
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@ -4855,24 +4855,6 @@ TEST(30_ComparePrimaryAndOtherParameters)
EXPECT_EQ (good, false);
// disabling the parameter in the second netlist will make it match too
dc2->parameter_definition_non_const (db::DeviceClassResistor::param_id_R)->set_is_primary (false);
logger.clear ();
good = comp.compare (&nl1, &nl2);
EXPECT_EQ (good, true);
// enabling the parameter again will make it mismatch again
dc2->parameter_definition_non_const (db::DeviceClassResistor::param_id_R)->set_is_primary (true);
logger.clear ();
good = comp.compare (&nl1, &nl2);
EXPECT_EQ (good, false);
// we can install an ignore handler to make it match again
dc1->set_parameter_compare_delegate (new db::EqualDeviceParameters (db::DeviceClassResistor::param_id_R, true));
@ -4882,20 +4864,13 @@ TEST(30_ComparePrimaryAndOtherParameters)
EXPECT_EQ (good, true);
// if we enable the L parameter we'll get a mismatch again (but we have to enable it in both netlists)
// if we enable the L parameter we'll get a mismatch again
dc1->parameter_definition_non_const (db::DeviceClassResistor::param_id_L)->set_is_primary (true);
logger.clear ();
good = comp.compare (&nl1, &nl2);
EXPECT_EQ (good, true);
dc2->parameter_definition_non_const (db::DeviceClassResistor::param_id_L)->set_is_primary (true);
logger.clear ();
good = comp.compare (&nl1, &nl2);
EXPECT_EQ (good, false);
// until we install another tolerance

31
src/db/unit_tests/dbNetlistReaderTests.cc
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@ -590,34 +590,3 @@ TEST(15_ContinuationWithBlanks)
"end;\n"
);
}
TEST(16_PrimaryParametersFromSpice)
{
db::Netlist nl;
std::string path = tl::combine_path (tl::combine_path (tl::testdata (), "algo"), "nreader16.cir");
db::NetlistSpiceReader reader;
tl::InputStream is (path);
reader.read (is, nl);
const db::DeviceClass *dc;
// RMODEL1 does not have L and W parameters
dc = nl.device_class_by_name ("RMODEL1");
EXPECT_EQ (dc->parameter_definition (db::DeviceClassResistor::param_id_W)->is_primary (), false);
EXPECT_EQ (dc->parameter_definition (db::DeviceClassResistor::param_id_L)->is_primary (), false);
EXPECT_EQ (dc->parameter_definition (db::DeviceClassResistor::param_id_R)->is_primary (), true);
// RMODEL2 has L and W parameters
dc = nl.device_class_by_name ("RMODEL2");
EXPECT_EQ (dc->parameter_definition (db::DeviceClassResistor::param_id_W)->is_primary (), true);
EXPECT_EQ (dc->parameter_definition (db::DeviceClassResistor::param_id_L)->is_primary (), true);
EXPECT_EQ (dc->parameter_definition (db::DeviceClassResistor::param_id_R)->is_primary (), true);
// RMODEL3 has W parameter only
dc = nl.device_class_by_name ("RMODEL3");
EXPECT_EQ (dc->parameter_definition (db::DeviceClassResistor::param_id_W)->is_primary (), true);
EXPECT_EQ (dc->parameter_definition (db::DeviceClassResistor::param_id_L)->is_primary (), false);
EXPECT_EQ (dc->parameter_definition (db::DeviceClassResistor::param_id_R)->is_primary (), true);
}

5
testdata/algo/nreader16.cir vendored
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@ -1,5 +0,0 @@
R$1 1 2 1k RMODEL1 M=2
R$1 2 3 1k RMODEL2 W=0.5u L=17u
R$1 3 4 1k RMODEL3 W=0.5u