3-terminal C's and R's for Spice writer too, using different default models for 2- and 3-terminal R and C

This commit is contained in:
Matthias Koefferlein 2021-05-13 21:13:41 +02:00
parent 4eb8f69a22
commit aea8c4d1ad
13 changed files with 307 additions and 116 deletions

View File

@ -454,7 +454,7 @@ bool NetlistSpiceReaderDelegate::element (db::Circuit *circuit, const std::strin
}
} else {
if (cn.empty ()) {
cn = "RES";
cn = "RES3";
}
cls = make_device_class<db::DeviceClassResistorWithBulk> (circuit, cn);
}
@ -505,7 +505,7 @@ bool NetlistSpiceReaderDelegate::element (db::Circuit *circuit, const std::strin
}
} else {
if (cn.empty ()) {
cn = "CAP";
cn = "CAP3";
}
cls = make_device_class<db::DeviceClassCapacitorWithBulk> (circuit, cn);
}

View File

@ -94,8 +94,10 @@ void NetlistSpiceWriterDelegate::write_device (const db::Device &dev) const
{
const db::DeviceClass *dc = dev.device_class ();
const db::DeviceClassCapacitor *cap = dynamic_cast<const db::DeviceClassCapacitor *> (dc);
const db::DeviceClassCapacitor *cap3 = dynamic_cast<const db::DeviceClassCapacitorWithBulk *> (dc);
const db::DeviceClassInductor *ind = dynamic_cast<const db::DeviceClassInductor *> (dc);
const db::DeviceClassResistor *res = dynamic_cast<const db::DeviceClassResistor *> (dc);
const db::DeviceClassResistor *res3 = dynamic_cast<const db::DeviceClassResistorWithBulk *> (dc);
const db::DeviceClassDiode *diode = dynamic_cast<const db::DeviceClassDiode *> (dc);
const db::DeviceClassMOS3Transistor *mos3 = dynamic_cast<const db::DeviceClassMOS3Transistor *> (dc);
const db::DeviceClassMOS4Transistor *mos4 = dynamic_cast<const db::DeviceClassMOS4Transistor *> (dc);
@ -104,13 +106,17 @@ void NetlistSpiceWriterDelegate::write_device (const db::Device &dev) const
std::ostringstream os;
if (cap) {
if (cap || cap3) {
os << "C";
os << format_name (dev.expanded_name ());
os << format_terminals (dev, size_t (2));
os << format_terminals (dev, size_t (3));
os << " ";
os << tl::sprintf ("%.12g", dev.parameter_value (db::DeviceClassCapacitor::param_id_C));
if (! dev.device_class ()->name ().empty ()) {
os << " ";
os << format_name (dev.device_class ()->name ());
}
} else if (ind) {
@ -119,14 +125,22 @@ void NetlistSpiceWriterDelegate::write_device (const db::Device &dev) const
os << format_terminals (dev, size_t (2));
os << " ";
os << tl::sprintf ("%.12g", dev.parameter_value (db::DeviceClassInductor::param_id_L));
if (! dev.device_class ()->name ().empty ()) {
os << " ";
os << format_name (dev.device_class ()->name ());
}
} else if (res) {
os << "R";
os << format_name (dev.expanded_name ());
os << format_terminals (dev, size_t (2));
os << format_terminals (dev, size_t (3));
os << " ";
os << tl::sprintf ("%.12g", dev.parameter_value (db::DeviceClassResistor::param_id_R));
if (! dev.device_class ()->name ().empty ()) {
os << " ";
os << format_name (dev.device_class ()->name ());
}
} else if (diode) {

View File

@ -374,12 +374,20 @@ TEST(9_DeviceMultipliers)
" device RES $2 (A='3',B='4') (R=1700,L=0,W=0,A=0,P=0);\n"
" device RMODEL $3 (A='1',B='2') (R=850,L=0,W=0,A=0,P=0);\n"
" device RMODEL $4 (A='3',B='4') (R=1700,L=0,W=0,A=0,P=0);\n"
" device RMODEL $5 (A='3',B='4') (R=1700,L=0,W=0,A=0,P=0);\n"
" device RMODEL2 $6 (A='3',B='4',W='5') (R=1700,L=0,W=0,A=0,P=0);\n"
" device RMODEL2 $7 (A='3',B='4',W='5') (R=1700,L=0,W=0,A=0,P=0);\n"
" device RES3 $8 (A='3',B='4',W='5') (R=1700,L=0,W=0,A=0,P=0);\n"
" device NMOS $1 (S='1',G='2',D='3',B='4') (L=7,W=4,AS=0,AD=0,PS=0,PD=0);\n"
" device PMOS $2 (S='1',G='2',D='3',B='4') (L=7,W=2,AS=0,AD=0,PS=0,PD=0);\n"
" device CAP $1 (A='1',B='2') (C=2e-09,A=0,P=0);\n"
" device CAP $2 (A='3',B='4') (C=1e-09,A=0,P=0);\n"
" device CMODEL $3 (A='1',B='2') (C=2e-09,A=0,P=0);\n"
" device CMODEL $4 (A='3',B='4') (C=1e-09,A=0,P=0);\n"
" device CMODEL $5 (A='3',B='4') (C=1e-09,A=0,P=0);\n"
" device CMODEL2 $6 (A='3',B='4',W='5') (C=1e-09,A=0,P=0);\n"
" device CAP3 $7 (A='3',B='4',W='5') (C=1e-09,A=0,P=0);\n"
" device CMODEL2 $8 (A='3',B='4',W='5') (C=1e-09,A=0,P=0);\n"
" device IND $1 (A='1',B='2') (L=5e-10);\n"
" device IND $2 (A='3',B='4') (L=1e-09);\n"
" device LMODEL $3 (A='1',B='2') (L=5e-10);\n"
@ -411,12 +419,20 @@ TEST(9_DeviceMultipliers)
" device RES $2 (A='3',B='4') (R=1700,L=0,W=0,A=0,P=0);\n"
" device RMODEL $3 (A='1',B='2') (R=850,L=0,W=0,A=0,P=0);\n"
" device RMODEL $4 (A='3',B='4') (R=1700,L=0,W=0,A=0,P=0);\n"
" device RMODEL $5 (A='3',B='4') (R=1700,L=0,W=0,A=0,P=0);\n"
" device RMODEL2 $6 (A='3',B='4',W='5') (R=1700,L=0,W=0,A=0,P=0);\n"
" device RMODEL2 $7 (A='3',B='4',W='5') (R=1700,L=0,W=0,A=0,P=0);\n"
" device RES3 $8 (A='3',B='4',W='5') (R=1700,L=0,W=0,A=0,P=0);\n"
" device NMOS $1 (S='1',G='2',D='3',B='4') (L=7,W=4,AS=0,AD=0,PS=0,PD=0);\n"
" device PMOS $2 (S='1',G='2',D='3',B='4') (L=7,W=2,AS=0,AD=0,PS=0,PD=0);\n"
" device CAP $1 (A='1',B='2') (C=2e-09,A=0,P=0);\n"
" device CAP $2 (A='3',B='4') (C=1e-09,A=0,P=0);\n"
" device CMODEL $3 (A='1',B='2') (C=2e-09,A=0,P=0);\n"
" device CMODEL $4 (A='3',B='4') (C=1e-09,A=0,P=0);\n"
" device CMODEL $5 (A='3',B='4') (C=1e-09,A=0,P=0);\n"
" device CMODEL2 $6 (A='3',B='4',W='5') (C=1e-09,A=0,P=0);\n"
" device CAP3 $7 (A='3',B='4',W='5') (C=1e-09,A=0,P=0);\n"
" device CMODEL2 $8 (A='3',B='4',W='5') (C=1e-09,A=0,P=0);\n"
" device IND $1 (A='1',B='2') (L=5e-10);\n"
" device IND $2 (A='3',B='4') (L=1e-09);\n"
" device LMODEL $3 (A='1',B='2') (L=5e-10);\n"

View File

@ -162,7 +162,7 @@ TEST(1_WriterResistorDevicesWithBulk)
writer.write (stream, nl, "written by unit test");
}
std::string au_path = tl::combine_path (tl::combine_path (tl::testdata (), "algo"), "nwriter1_au.txt");
std::string au_path = tl::combine_path (tl::combine_path (tl::testdata (), "algo"), "nwriter1b_au.txt");
compare_netlists (_this, path, au_path);
}
@ -224,6 +224,61 @@ TEST(2_WriterCapacitorDevices)
compare_netlists (_this, path, au_path);
}
TEST(2_WriterCapacitorDevicesNoName)
{
db::Netlist nl;
db::DeviceClass *ccls = new db::DeviceClassCapacitor ();
nl.add_device_class (ccls);
db::Circuit *circuit1 = new db::Circuit ();
circuit1->set_name ("C1");
nl.add_circuit (circuit1);
db::Net *n1, *n2, *n3;
n1 = new db::Net ();
n1->set_name ("n1");
circuit1->add_net (n1);
n2 = new db::Net ();
n2->set_name ("n2");
circuit1->add_net (n2);
n3 = new db::Net ();
n3->set_name ("n3");
circuit1->add_net (n3);
db::Device *cdev1 = new db::Device (ccls);
cdev1->set_parameter_value (db::DeviceClassCapacitor::param_id_C, 1.7e-12);
db::Device *cdev2 = new db::Device (ccls);
cdev2->set_parameter_value (db::DeviceClassCapacitor::param_id_C, 42e-15);
circuit1->add_device (cdev1);
circuit1->add_device (cdev2);
size_t pid1 = circuit1->add_pin ("p1").id ();
size_t pid2 = circuit1->add_pin ("p2").id ();
circuit1->connect_pin (pid1, n1);
circuit1->connect_pin (pid2, n2);
cdev1->connect_terminal (cdev1->device_class ()->terminal_id_for_name ("A"), n1);
cdev1->connect_terminal (cdev1->device_class ()->terminal_id_for_name ("B"), n3);
cdev2->connect_terminal (cdev2->device_class ()->terminal_id_for_name ("A"), n3);
cdev2->connect_terminal (cdev2->device_class ()->terminal_id_for_name ("B"), n2);
// verify against the input
std::string path = tmp_file ("tmp_nwriter2.txt");
{
tl::OutputStream stream (path);
db::NetlistSpiceWriter writer;
writer.write (stream, nl, "written by unit test");
}
std::string au_path = tl::combine_path (tl::combine_path (tl::testdata (), "algo"), "nwriter2b_au.txt");
compare_netlists (_this, path, au_path);
}
TEST(2_WriterCapacitorDevicesWithBulk)
{
db::Netlist nl;
@ -278,7 +333,64 @@ TEST(2_WriterCapacitorDevicesWithBulk)
writer.write (stream, nl, "written by unit test");
}
std::string au_path = tl::combine_path (tl::combine_path (tl::testdata (), "algo"), "nwriter2_au.txt");
std::string au_path = tl::combine_path (tl::combine_path (tl::testdata (), "algo"), "nwriter2c_au.txt");
compare_netlists (_this, path, au_path);
}
TEST(2_WriterCapacitorDevicesWithBulkNoName)
{
db::Netlist nl;
db::DeviceClass *ccls = new db::DeviceClassCapacitorWithBulk ();
nl.add_device_class (ccls);
db::Circuit *circuit1 = new db::Circuit ();
circuit1->set_name ("C1");
nl.add_circuit (circuit1);
db::Net *n1, *n2, *n3;
n1 = new db::Net ();
n1->set_name ("n1");
circuit1->add_net (n1);
n2 = new db::Net ();
n2->set_name ("n2");
circuit1->add_net (n2);
n3 = new db::Net ();
n3->set_name ("n3");
circuit1->add_net (n3);
db::Device *cdev1 = new db::Device (ccls);
cdev1->set_parameter_value (db::DeviceClassCapacitor::param_id_C, 1.7e-12);
db::Device *cdev2 = new db::Device (ccls);
cdev2->set_parameter_value (db::DeviceClassCapacitor::param_id_C, 42e-15);
circuit1->add_device (cdev1);
circuit1->add_device (cdev2);
size_t pid1 = circuit1->add_pin ("p1").id ();
size_t pid2 = circuit1->add_pin ("p2").id ();
circuit1->connect_pin (pid1, n1);
circuit1->connect_pin (pid2, n2);
cdev1->connect_terminal (cdev1->device_class ()->terminal_id_for_name ("A"), n1);
cdev1->connect_terminal (cdev1->device_class ()->terminal_id_for_name ("B"), n3);
cdev1->connect_terminal (cdev1->device_class ()->terminal_id_for_name ("W"), n3);
cdev2->connect_terminal (cdev2->device_class ()->terminal_id_for_name ("A"), n3);
cdev2->connect_terminal (cdev2->device_class ()->terminal_id_for_name ("B"), n2);
cdev2->connect_terminal (cdev2->device_class ()->terminal_id_for_name ("W"), n3);
// verify against the input
std::string path = tmp_file ("tmp_nwriter2.txt");
{
tl::OutputStream stream (path);
db::NetlistSpiceWriter writer;
writer.write (stream, nl, "written by unit test");
}
std::string au_path = tl::combine_path (tl::combine_path (tl::testdata (), "algo"), "nwriter2d_au.txt");
compare_netlists (_this, path, au_path);
}
@ -912,7 +1024,6 @@ TEST(10_WriterLongLines)
db::Netlist nl;
db::DeviceClass *rcls = new db::DeviceClassResistor ();
rcls->set_name ("RCLS");
nl.add_device_class (rcls);
db::Circuit *circuit1 = new db::Circuit ();

View File

@ -3,12 +3,20 @@ R$1 1 2 1.7k M=2
R$2 3 4 1.7k
R$3 1 2 1.7k RMODEL M=2
R$4 3 4 1.7k RMODEL
R$5 3 4 RMODEL R=1.7k
R$6 3 4 5 RMODEL2 R=1.7k
R$7 3 4 5 1.7k RMODEL2
R$8 3 4 5 1.7k
M$1 1 2 3 4 NMOS W=2u L=7u M=2
M$2 1 2 3 4 PMOS W=2u L=7u
C$1 1 2 1e-9 M=2
C$2 3 4 1e-9
C$3 1 2 1e-9 CMODEL M=2
C$4 3 4 1e-9 CMODEL
C$5 3 4 CMODEL C=1e-9
C$6 3 4 5 CMODEL2 C=1e-9
C$7 3 4 5 1e-9
C$8 3 4 5 1e-9 CMODEL2
L$1 1 2 1e-9 M=2
L$2 3 4 1e-9
L$3 1 2 1e-9 LMODEL M=2

View File

@ -209,205 +209,205 @@
* net 99 n98
* net 100 n99
* net 101 n100
* device instance $1 r0 *1 0,0 RCLS
* device instance $1 r0 *1 0,0
R$1 1 2 0
* device instance $2 r0 *1 0,0 RCLS
* device instance $2 r0 *1 0,0
R$2 1 3 0
* device instance $3 r0 *1 0,0 RCLS
* device instance $3 r0 *1 0,0
R$3 1 4 0
* device instance $4 r0 *1 0,0 RCLS
* device instance $4 r0 *1 0,0
R$4 1 5 0
* device instance $5 r0 *1 0,0 RCLS
* device instance $5 r0 *1 0,0
R$5 1 6 0
* device instance $6 r0 *1 0,0 RCLS
* device instance $6 r0 *1 0,0
R$6 1 7 0
* device instance $7 r0 *1 0,0 RCLS
* device instance $7 r0 *1 0,0
R$7 1 8 0
* device instance $8 r0 *1 0,0 RCLS
* device instance $8 r0 *1 0,0
R$8 1 9 0
* device instance $9 r0 *1 0,0 RCLS
* device instance $9 r0 *1 0,0
R$9 1 10 0
* device instance $10 r0 *1 0,0 RCLS
* device instance $10 r0 *1 0,0
R$10 1 11 0
* device instance $11 r0 *1 0,0 RCLS
* device instance $11 r0 *1 0,0
R$11 1 12 0
* device instance $12 r0 *1 0,0 RCLS
* device instance $12 r0 *1 0,0
R$12 1 13 0
* device instance $13 r0 *1 0,0 RCLS
* device instance $13 r0 *1 0,0
R$13 1 14 0
* device instance $14 r0 *1 0,0 RCLS
* device instance $14 r0 *1 0,0
R$14 1 15 0
* device instance $15 r0 *1 0,0 RCLS
* device instance $15 r0 *1 0,0
R$15 1 16 0
* device instance $16 r0 *1 0,0 RCLS
* device instance $16 r0 *1 0,0
R$16 1 17 0
* device instance $17 r0 *1 0,0 RCLS
* device instance $17 r0 *1 0,0
R$17 1 18 0
* device instance $18 r0 *1 0,0 RCLS
* device instance $18 r0 *1 0,0
R$18 1 19 0
* device instance $19 r0 *1 0,0 RCLS
* device instance $19 r0 *1 0,0
R$19 1 20 0
* device instance $20 r0 *1 0,0 RCLS
* device instance $20 r0 *1 0,0
R$20 1 21 0
* device instance $21 r0 *1 0,0 RCLS
* device instance $21 r0 *1 0,0
R$21 1 22 0
* device instance $22 r0 *1 0,0 RCLS
* device instance $22 r0 *1 0,0
R$22 1 23 0
* device instance $23 r0 *1 0,0 RCLS
* device instance $23 r0 *1 0,0
R$23 1 24 0
* device instance $24 r0 *1 0,0 RCLS
* device instance $24 r0 *1 0,0
R$24 1 25 0
* device instance $25 r0 *1 0,0 RCLS
* device instance $25 r0 *1 0,0
R$25 1 26 0
* device instance $26 r0 *1 0,0 RCLS
* device instance $26 r0 *1 0,0
R$26 1 27 0
* device instance $27 r0 *1 0,0 RCLS
* device instance $27 r0 *1 0,0
R$27 1 28 0
* device instance $28 r0 *1 0,0 RCLS
* device instance $28 r0 *1 0,0
R$28 1 29 0
* device instance $29 r0 *1 0,0 RCLS
* device instance $29 r0 *1 0,0
R$29 1 30 0
* device instance $30 r0 *1 0,0 RCLS
* device instance $30 r0 *1 0,0
R$30 1 31 0
* device instance $31 r0 *1 0,0 RCLS
* device instance $31 r0 *1 0,0
R$31 1 32 0
* device instance $32 r0 *1 0,0 RCLS
* device instance $32 r0 *1 0,0
R$32 1 33 0
* device instance $33 r0 *1 0,0 RCLS
* device instance $33 r0 *1 0,0
R$33 1 34 0
* device instance $34 r0 *1 0,0 RCLS
* device instance $34 r0 *1 0,0
R$34 1 35 0
* device instance $35 r0 *1 0,0 RCLS
* device instance $35 r0 *1 0,0
R$35 1 36 0
* device instance $36 r0 *1 0,0 RCLS
* device instance $36 r0 *1 0,0
R$36 1 37 0
* device instance $37 r0 *1 0,0 RCLS
* device instance $37 r0 *1 0,0
R$37 1 38 0
* device instance $38 r0 *1 0,0 RCLS
* device instance $38 r0 *1 0,0
R$38 1 39 0
* device instance $39 r0 *1 0,0 RCLS
* device instance $39 r0 *1 0,0
R$39 1 40 0
* device instance $40 r0 *1 0,0 RCLS
* device instance $40 r0 *1 0,0
R$40 1 41 0
* device instance $41 r0 *1 0,0 RCLS
* device instance $41 r0 *1 0,0
R$41 1 42 0
* device instance $42 r0 *1 0,0 RCLS
* device instance $42 r0 *1 0,0
R$42 1 43 0
* device instance $43 r0 *1 0,0 RCLS
* device instance $43 r0 *1 0,0
R$43 1 44 0
* device instance $44 r0 *1 0,0 RCLS
* device instance $44 r0 *1 0,0
R$44 1 45 0
* device instance $45 r0 *1 0,0 RCLS
* device instance $45 r0 *1 0,0
R$45 1 46 0
* device instance $46 r0 *1 0,0 RCLS
* device instance $46 r0 *1 0,0
R$46 1 47 0
* device instance $47 r0 *1 0,0 RCLS
* device instance $47 r0 *1 0,0
R$47 1 48 0
* device instance $48 r0 *1 0,0 RCLS
* device instance $48 r0 *1 0,0
R$48 1 49 0
* device instance $49 r0 *1 0,0 RCLS
* device instance $49 r0 *1 0,0
R$49 1 50 0
* device instance $50 r0 *1 0,0 RCLS
* device instance $50 r0 *1 0,0
R$50 1 51 0
* device instance $51 r0 *1 0,0 RCLS
* device instance $51 r0 *1 0,0
R$51 1 52 0
* device instance $52 r0 *1 0,0 RCLS
* device instance $52 r0 *1 0,0
R$52 1 53 0
* device instance $53 r0 *1 0,0 RCLS
* device instance $53 r0 *1 0,0
R$53 1 54 0
* device instance $54 r0 *1 0,0 RCLS
* device instance $54 r0 *1 0,0
R$54 1 55 0
* device instance $55 r0 *1 0,0 RCLS
* device instance $55 r0 *1 0,0
R$55 1 56 0
* device instance $56 r0 *1 0,0 RCLS
* device instance $56 r0 *1 0,0
R$56 1 57 0
* device instance $57 r0 *1 0,0 RCLS
* device instance $57 r0 *1 0,0
R$57 1 58 0
* device instance $58 r0 *1 0,0 RCLS
* device instance $58 r0 *1 0,0
R$58 1 59 0
* device instance $59 r0 *1 0,0 RCLS
* device instance $59 r0 *1 0,0
R$59 1 60 0
* device instance $60 r0 *1 0,0 RCLS
* device instance $60 r0 *1 0,0
R$60 1 61 0
* device instance $61 r0 *1 0,0 RCLS
* device instance $61 r0 *1 0,0
R$61 1 62 0
* device instance $62 r0 *1 0,0 RCLS
* device instance $62 r0 *1 0,0
R$62 1 63 0
* device instance $63 r0 *1 0,0 RCLS
* device instance $63 r0 *1 0,0
R$63 1 64 0
* device instance $64 r0 *1 0,0 RCLS
* device instance $64 r0 *1 0,0
R$64 1 65 0
* device instance $65 r0 *1 0,0 RCLS
* device instance $65 r0 *1 0,0
R$65 1 66 0
* device instance $66 r0 *1 0,0 RCLS
* device instance $66 r0 *1 0,0
R$66 1 67 0
* device instance $67 r0 *1 0,0 RCLS
* device instance $67 r0 *1 0,0
R$67 1 68 0
* device instance $68 r0 *1 0,0 RCLS
* device instance $68 r0 *1 0,0
R$68 1 69 0
* device instance $69 r0 *1 0,0 RCLS
* device instance $69 r0 *1 0,0
R$69 1 70 0
* device instance $70 r0 *1 0,0 RCLS
* device instance $70 r0 *1 0,0
R$70 1 71 0
* device instance $71 r0 *1 0,0 RCLS
* device instance $71 r0 *1 0,0
R$71 1 72 0
* device instance $72 r0 *1 0,0 RCLS
* device instance $72 r0 *1 0,0
R$72 1 73 0
* device instance $73 r0 *1 0,0 RCLS
* device instance $73 r0 *1 0,0
R$73 1 74 0
* device instance $74 r0 *1 0,0 RCLS
* device instance $74 r0 *1 0,0
R$74 1 75 0
* device instance $75 r0 *1 0,0 RCLS
* device instance $75 r0 *1 0,0
R$75 1 76 0
* device instance $76 r0 *1 0,0 RCLS
* device instance $76 r0 *1 0,0
R$76 1 77 0
* device instance $77 r0 *1 0,0 RCLS
* device instance $77 r0 *1 0,0
R$77 1 78 0
* device instance $78 r0 *1 0,0 RCLS
* device instance $78 r0 *1 0,0
R$78 1 79 0
* device instance $79 r0 *1 0,0 RCLS
* device instance $79 r0 *1 0,0
R$79 1 80 0
* device instance $80 r0 *1 0,0 RCLS
* device instance $80 r0 *1 0,0
R$80 1 81 0
* device instance $81 r0 *1 0,0 RCLS
* device instance $81 r0 *1 0,0
R$81 1 82 0
* device instance $82 r0 *1 0,0 RCLS
* device instance $82 r0 *1 0,0
R$82 1 83 0
* device instance $83 r0 *1 0,0 RCLS
* device instance $83 r0 *1 0,0
R$83 1 84 0
* device instance $84 r0 *1 0,0 RCLS
* device instance $84 r0 *1 0,0
R$84 1 85 0
* device instance $85 r0 *1 0,0 RCLS
* device instance $85 r0 *1 0,0
R$85 1 86 0
* device instance $86 r0 *1 0,0 RCLS
* device instance $86 r0 *1 0,0
R$86 1 87 0
* device instance $87 r0 *1 0,0 RCLS
* device instance $87 r0 *1 0,0
R$87 1 88 0
* device instance $88 r0 *1 0,0 RCLS
* device instance $88 r0 *1 0,0
R$88 1 89 0
* device instance $89 r0 *1 0,0 RCLS
* device instance $89 r0 *1 0,0
R$89 1 90 0
* device instance $90 r0 *1 0,0 RCLS
* device instance $90 r0 *1 0,0
R$90 1 91 0
* device instance $91 r0 *1 0,0 RCLS
* device instance $91 r0 *1 0,0
R$91 1 92 0
* device instance $92 r0 *1 0,0 RCLS
* device instance $92 r0 *1 0,0
R$92 1 93 0
* device instance $93 r0 *1 0,0 RCLS
* device instance $93 r0 *1 0,0
R$93 1 94 0
* device instance $94 r0 *1 0,0 RCLS
* device instance $94 r0 *1 0,0
R$94 1 95 0
* device instance $95 r0 *1 0,0 RCLS
* device instance $95 r0 *1 0,0
R$95 1 96 0
* device instance $96 r0 *1 0,0 RCLS
* device instance $96 r0 *1 0,0
R$96 1 97 0
* device instance $97 r0 *1 0,0 RCLS
* device instance $97 r0 *1 0,0
R$97 1 98 0
* device instance $98 r0 *1 0,0 RCLS
* device instance $98 r0 *1 0,0
R$98 1 99 0
* device instance $99 r0 *1 0,0 RCLS
* device instance $99 r0 *1 0,0
R$99 1 100 0
* device instance $100 r0 *1 0,0 RCLS
* device instance $100 r0 *1 0,0
R$100 1 101 0
.ENDS
+ C1withaverylongextensionthatgoesbeyondmultiplelinesunlessipasteeverythingtogetherwhichmakesithardtoreadbutexactlythatisthereasonwhyiwriteitthisway

View File

@ -8,7 +8,7 @@
* net 2 n2
* net 3 n3
* device instance $1 r0 *1 0,0 RCLS
R$1 1 3 1.7
R$1 1 3 1.7 RCLS
* device instance $2 r0 *1 0,0 RCLS
R$2 3 2 4.2e-05
R$2 3 2 4.2e-05 RCLS
.ENDS C1

View File

@ -16,10 +16,10 @@
* net 3 n3
* device instance $1 r0 *1 0,0 RCLS
*** Before device $1
R$1 1 3 1.7
R$1 1 3 1.7 RCLS
*** After device $1
* device instance $2 r0 *1 0,0 RCLS
*** Before device $2
R$2 3 2 4.2e-05
R$2 3 2 4.2e-05 RCLS
*** After device $2
.ENDS C1

View File

@ -8,7 +8,7 @@
* net 2 n2
* net 3 n3
* device instance $1 r0 *1 0,0 CCLS
C$1 1 3 1.7e-12
C$1 1 3 1.7e-12 CCLS
* device instance $2 r0 *1 0,0 CCLS
C$2 3 2 4.2e-14
C$2 3 2 4.2e-14 CCLS
.ENDS C1

14
testdata/algo/nwriter2b_au.txt vendored Normal file
View File

@ -0,0 +1,14 @@
* written by unit test
* cell C1
* pin p1
* pin p2
.SUBCKT C1 1 2
* net 1 n1
* net 2 n2
* net 3 n3
* device instance $1 r0 *1 0,0
C$1 1 3 1.7e-12
* device instance $2 r0 *1 0,0
C$2 3 2 4.2e-14
.ENDS C1

14
testdata/algo/nwriter2c_au.txt vendored Normal file
View File

@ -0,0 +1,14 @@
* written by unit test
* cell C1
* pin p1
* pin p2
.SUBCKT C1 1 2
* net 1 n1
* net 2 n2
* net 3 n3
* device instance $1 r0 *1 0,0 CCLS
C$1 1 3 3 1.7e-12 CCLS
* device instance $2 r0 *1 0,0 CCLS
C$2 3 2 3 4.2e-14 CCLS
.ENDS C1

14
testdata/algo/nwriter2d_au.txt vendored Normal file
View File

@ -0,0 +1,14 @@
* written by unit test
* cell C1
* pin p1
* pin p2
.SUBCKT C1 1 2
* net 1 n1
* net 2 n2
* net 3 n3
* device instance $1 r0 *1 0,0
C$1 1 3 3 1.7e-12
* device instance $2 r0 *1 0,0
C$2 3 2 3 4.2e-14
.ENDS C1

View File

@ -8,7 +8,7 @@
* net 2 n2
* net 3 n3
* device instance $1 r0 *1 0,0 LCLS
L$1 1 3 1.7e-10
L$1 1 3 1.7e-10 LCLS
* device instance $2 r0 *1 0,0 LCLS
L$2 3 2 4.2e-08
L$2 3 2 4.2e-08 LCLS
.ENDS C1