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2327 Commits

Author SHA1 Message Date
Alan Mishchenko c30819cb05 Cosmetic changes after incorporating new code of 'fxch'. 2016-05-11 19:59:56 -07:00
Bruno Schmitt 3cf495c831 Add a new module which implements the fast extract with cube hashing (fxch) algorithm. 
Removes old partial implementation of this algorithm from the "pla" module.
 2016-05-11 19:41:31 -03:00
Alan Mishchenko 6e8efec57d Experiments with CEC for arithmetic circuits. 2016-05-11 11:07:34 -07:00
Alan Mishchenko 652b279234 Experiments with CEC for arithmetic circuits. 2016-05-08 19:01:46 -07:00
Alan Mishchenko 236d412255 Experiments with CEC for arithmetic circuits. 2016-05-07 19:47:02 -07:00
Alan Mishchenko 40d90ae69c Small changes. 2016-05-04 13:46:07 -07:00
Alan Mishchenko 21896ba6bc Update to &show to show AIGs with XORs and MUXes (derived by &st -m). 2016-05-04 07:22:13 -07:00
Alan Mishchenko 28cbb280b7 Update to &show to show AIGs with XORs and MUXes (derived by &st -m). 2016-05-04 07:05:43 -07:00
Alan Mishchenko 11f1a249ae Updating GIG parser. 2016-05-01 17:43:50 -07:00
Alan Mishchenko a093091004 Fanout restriction in &edge. 2016-04-30 17:47:23 -07:00
Alan Mishchenko 59f3389c9b Experiments with arithmetic circuits. 2016-04-28 20:54:38 -07:00
Alan Mishchenko 53e8647719 Adding option to rehash AIG after mapping. 2016-04-27 18:33:23 -07:00
Alan Mishchenko e8f961671c Extending &satlut to work for 6-LUTs. 2016-04-27 18:12:41 -07:00
Alan Mishchenko 62f13100d0 Adding missing code to 'dress'. 2016-04-27 17:33:36 -07:00
Alan Mishchenko 6f370462d1 Bug fix in bit-blasting of remainder. 2016-04-26 20:24:46 -07:00
Alan Mishchenko e37ec2aac5 Improved algo for edge computation. 2016-04-24 20:49:05 +03:00
Alan Mishchenko f91f23bed0 Adding new switch 'bdd -s' to translate SOP directly into BDD. 2016-04-24 00:13:07 +03:00
Alan Mishchenko 67bfb4ba09 Improved algo for edge computation. 2016-04-23 15:13:22 +03:00
Alan Mishchenko 1b550cb87b Improved algo for edge computation. 2016-04-22 08:36:05 +03:00
Alan Mishchenko 813b0e5851 Experimental algorithm for edge optimization. 2016-04-13 15:54:14 -07:00
Alan Mishchenko b9e403b46e Bug fix: change in the ordering of the reset flop (should be last, not first). 2016-04-13 09:14:54 -07:00
Alan Mishchenko 847ac96f6e Updates to Exorcism package 2016-04-11 22:55:06 -07:00
Alan Mishchenko 9522aeea19 Updates to Exorcism package 2016-04-11 22:29:37 -07:00
Alan Mishchenko a02be725e9 Updates to Exorcism package 2016-04-11 21:48:54 -07:00
Alan Mishchenko 2d6a6f6654 Added Exorcism package, reading ESOP (read_pla -x file.esop) and deriving AIG (cubes -x; st). 2016-04-11 21:42:00 -07:00
Alan Mishchenko 2d1d315ece Supporting edge information during mapping. 2016-04-11 18:41:18 -07:00
Alan Mishchenko d0a0cf6395 Command &esop to convert AIG into ESOP. 2016-04-09 17:00:46 -07:00
Alan Mishchenko 3b694a7089 Adding AIG rehashing after LUT mapping in Gia. 2016-04-07 20:03:31 -07:00
Alan Mishchenko 26ec3868f6 Adding AIG rehashing after LUT mapping in Gia. 2016-04-07 19:16:51 -07:00
Alan Mishchenko 887f3c21cc Supporting edges in delay-optimization in &satlut. 2016-04-07 17:15:24 -07:00
Alan Mishchenko f05986f7b3 Supporting edges in delay-optimization in &satlut. 2016-04-07 15:54:50 -07:00
Alan Mishchenko 95ab749087 Supporting edges in delay-optimization in &satlut. 2016-04-07 13:20:41 -07:00
Alan Mishchenko b31b6fec77 Supporting edge information during mapping. 2016-04-06 15:43:03 -07:00
Alan Mishchenko ee17cbbf4b Supporting negative and reverse ranges of word-level variables in Wlc. 2016-04-04 18:09:41 -07:00
Alan Mishchenko ac7a799076 Improvements to delay-optimization in &satlut. 2016-04-04 14:27:14 -07:00
Alan Mishchenko 720082753f Improvements to delay-optimization in &satlut. 2016-04-04 12:51:05 -07:00
Alan Mishchenko 4a954c1b23 Improvements to delay-optimization in &satlut. 2016-04-04 08:43:22 -07:00
Alan Mishchenko e0ad9de7ea Improvements to delay-optimization in &satlut. 2016-04-03 16:44:13 -07:00
Alan Mishchenko d53161a7e1 Enabling native Gia visualization in &show. 2016-04-03 15:42:08 -07:00
Alan Mishchenko 9074d19d69 Allowing Cba manager to be derived from another Cba manager. 2016-04-02 16:04:15 -07:00
Alan Mishchenko 7724dfcca2 Windowing for technology mapping. 2016-03-30 21:51:50 -07:00
Alan Mishchenko e026f05ae3 Bug fix in truth table reading for funcs with less than 6 vars. 2016-03-28 10:18:17 -07:00
Alan Mishchenko 72ffddb0ad Sorting multiplier inputs based on the number of constant bits. 2016-03-24 17:45:51 -07:00
Alan Mishchenko a4d6e2f8c9 Typo in operator in Wlc_Ntk_t. 2016-03-18 20:47:21 -07:00
Alan Mishchenko 65ee47c515 Supporting bit-wise XNOR operator in Wlc_Ntk_t. 2016-03-18 13:58:22 +08:00
Alan Mishchenko b2ad140adb Supporting complemented reduction operators. 2016-03-11 15:12:52 +09:00
Alan Mishchenko 74328f52da Supporting complemented reduction operators. 2016-03-10 23:03:53 +09:00
Alan Mishchenko 847d661bee Change error to warning in 'scorr'. 2016-03-09 09:33:10 +09:00
Alan Mishchenko 12fac91fba Supporting ~^ as equality operator in Wlc. 2016-03-04 09:17:39 +09:00
Alan Mishchenko cf702af6f1 New hierarchical TT NPN matching. 2016-02-26 18:20:57 +08:00
Alan Mishchenko c8962e94e2 Improving bit-blasting of a multiplier and squarer. 2016-02-13 18:51:42 -08:00
Alan Mishchenko 390a145f0a Adding support for a different bit-blasting of a multiplier and squarer. 2016-02-13 15:15:01 -08:00
Alan Mishchenko e0616441b3 Adding support for a different bit-blasting of a multiplier and squarer. 2016-02-12 09:46:49 -08:00
Alan Mishchenko 66796c3808 Experiments with SAT-based mapping. 2016-02-08 16:29:36 -08:00
Alan Mishchenko 0224039132 Added recursive bit-blasting of a carry-lookahead adder. 2016-02-06 12:08:23 -08:00
Alan Mishchenko be35a13a4c Preserving internal signal names when 'strash' is not used. 2016-02-03 13:56:27 -08:00
Alan Mishchenko 8bcf8fd3c9 Supporting X-valued constants in Wlc_Ntk_t. 2016-02-02 16:40:29 -08:00
Alan Mishchenko 094c68f921 Supporting X-valued constants in Wlc_Ntk_t. 2016-02-02 16:20:19 -08:00
Alan Mishchenko c81b6cb515 Supporting X-valued constants in Wlc_Ntk_t. 2016-02-02 15:43:19 -08:00
Alan Mishchenko 02725c9eca An add-on to write Verilog for circuits mapped into simple gates. 2016-02-01 15:56:53 -08:00
Alan Mishchenko 9ef447658e Bug fix in 'aig', for the case of non-min-base SOPs. 2016-01-20 15:01:53 -08:00
Alan Mishchenko df34a26216 Generating sorting network as a PLA file. 2016-01-20 15:01:27 -08:00
Alan Mishchenko f5ee46eb3c New command to dump LUT network. 2016-01-16 17:35:46 -08:00
Alan Mishchenko c4446189a9 Changes to PDR to compute f-inf clauses and import invariant (or clauses) as a network. 2016-01-14 20:42:22 -08:00
Alan Mishchenko 87f6828d50 Adding support for delay/area tradeoff. 2016-01-13 12:13:54 -08:00
Alan Mishchenko 8dd31fb4a9 Integrating new CNF generation into &bmc. 2016-01-12 22:07:01 -08:00
Alan Mishchenko de695c9d4c Better print-out of SOPs. Changing default of 'fx'. Updating 'satclp' to fine prine SOPs. 2016-01-12 11:55:50 -08:00
Alan Mishchenko 7984628d7f Experiments with SAT-based mapping. 2016-01-10 21:06:04 -08:00
Alan Mishchenko d6178631be Adding support of candinality clause to the SAT solver. 2016-01-10 10:19:26 -08:00
Alan Mishchenko a4f9776388 Consolidating timing manager Scl_Con_t and propagating changes. 2016-01-07 16:50:01 -08:00
Alan Mishchenko 5453820cd5 Adding switch &miter -x for XORs outputs of two word-level POs. 2016-01-06 16:50:42 -08:00
Alan Mishchenko 68bc46be0e Adding names to GIA inputs/outputs (addressing x-valued flops). 2015-12-22 14:58:04 -10:00
Alan Mishchenko 2e8543fca1 Adding names to GIA inputs/outputs. Changing polarity of invariant generated by PDR. 2015-12-21 23:22:17 -10:00
Alan Mishchenko ba5e69952d Corner-case bug in invariant profiling. 2015-12-18 12:25:24 -10:00
Alan Mishchenko 19586f105c Adding code to support gate profiles. 2015-12-14 00:44:33 -08:00
Alan Mishchenko 64afe6e9f8 Extending Verilog parser to handle 'default' in the case-statement. 2015-12-07 16:17:17 -08:00
Alan Mishchenko e9abb0f489 Adding code to support gate profiles. 2015-12-07 01:31:41 -08:00
Alan Mishchenko 56880eab52 New command %psinv. 2015-11-23 23:42:20 +07:00
Baruch Sterin 5df0cf98e6 main: add option -Q for execute command quietly, then interactive 2015-11-18 16:32:39 -08:00
Alan Mishchenko f7c969ca66 Improvements to timing optimization. 2015-11-11 23:12:05 -08:00
Alan Mishchenko 71847b9d17 Bug fix in 'satclp'. 2015-11-11 17:17:40 -08:00
Baruch Sterin 58cb230855 load_plugin: remove a comment that became redundant and cleaned up a bit 2015-11-10 12:30:14 -08:00
Baruch Sterin e561eb0f78 load_plugin: remove a check that the binary exists when a plugin command runs - the registration was successful, so the binary should exist. The check was remove to allow the -p option for load_plugin to work. 2015-11-10 12:17:21 -08:00
Alan Mishchenko 19e4604b1f Improvements to 'satclp'. 2015-11-09 09:23:39 -08:00
Alan Mishchenko 58c2584e2a Improvements to 'satclp'. 2015-11-09 08:33:56 -08:00
Alan Mishchenko 81e1f9fef3 g++ compiler warnings. 2015-11-08 12:19:59 -08:00
Baruch Sterin 7258b02eaa Add a -p option to load_plugin, given this option, the command does not require an absolute path for theplugin. Instead, the shell searches PATH for it. 2015-11-07 19:48:11 -08:00
Alan Mishchenko e50fc467fd Improvements to 'satclp' (unfinished). 2015-11-06 13:49:23 -08:00
Alan Mishchenko dd365cbaf3 Improvements to 'satclp' (unfinished). 2015-11-06 09:05:17 -08:00
Alan Mishchenko 83da5a0384 Improvements to storing and reusing simulation info. 2015-11-05 20:37:08 -08:00
Baruch Sterin c610c03661 pyabc: remove python integration from abc, it is moved to a separate extension 2015-11-05 01:24:26 -08:00
Baruch Sterin aa62165a1c main: allow the -c -C -q -f -F -s command line options to be repeated and the commands they sepcify be executed in order instead of overriding each other 2015-11-05 01:24:26 -08:00
Baruch Sterin c0ba25a693 silence clang errors when compiling as C++ 2015-11-05 01:23:31 -08:00
Alan Mishchenko df6c9415c1 Adding procedure Abc_NtkSetAndGateDelay(). 2015-11-04 14:43:00 -08:00
Alan Mishchenko 9c4c95b6b1 Merged in sterin/abc (pull request #13) 
Restoring Aaron Hurst's "fretime" command
 2015-10-28 20:12:04 -07:00
Alan Mishchenko a3725e4427 Improvements in delay optimization. 2015-10-28 20:11:26 -07:00
Baruch Sterin 91d8040bd6 Restoring Aaron Hurst's "fretime" command 2015-10-28 19:59:57 -07:00
Alan Mishchenko 229ee5df22 Enabling reverse topo order in area minimization. 2015-10-28 16:10:50 -07:00
Alan Mishchenko 9521d1345b Improvements to 'satclp'. 2015-10-28 13:44:29 -07:00
Alan Mishchenko fe0487dab6 Improvements to command print_fanio. 2015-10-27 20:20:54 -07:00
Alan Mishchenko bd586dd355 Changes for delay-oriented computation. 2015-10-26 16:44:04 -07:00
Alan Mishchenko 9519341aaf Extending library handling to 8 inputs. 2015-10-25 20:23:44 -07:00
Alan Mishchenko 9d67bbe583 New command &isost. 2015-10-25 16:59:09 -07:00
Alan Mishchenko 85b1e1cc93 Better logic cone proprocessor for 'satclp' to reduce runtime. 2015-10-25 16:58:53 -07:00
Alan Mishchenko 0b7734ca99 Added switch 'satclp -Z' to control the max size of the cone to work with (fix overlow). 2015-10-25 10:24:57 -07:00
Alan Mishchenko 45bf632452 Changes for delay-oriented computation. 2015-10-24 18:53:18 -07:00
Alan Mishchenko a43d8273b7 Changes for delay-oriented computation. 2015-10-24 16:13:19 -07:00
Alan Mishchenko 701565eb7b Set the default cube limit in 'satclp' to be 0. 2015-10-23 15:44:53 -07:00
Alan Mishchenko 637da8baea Added switch 'satclp -Z' to control the max size of the cone to work with. 2015-10-23 15:34:49 -07:00
Alan Mishchenko 3712dd30d0 Changes for delay-oriented computation. 2015-10-23 15:14:31 -07:00
Alan Mishchenko 1332dc419f Minor tuning in 'satclp'. 2015-10-22 11:45:23 -07:00
Alan Mishchenko 2c37498bfb Compiler warnings. 2015-10-21 23:53:42 -07:00
Alan Mishchenko b3f164961c Corner case bug in 'satclp'. 2015-10-21 09:12:50 -07:00
Alan Mishchenko 924dcb4fc6 Added several knobs to control QoR in &nf. 2015-10-20 14:09:48 -07:00
Alan Mishchenko 69df5462cb Additional improvements in 'satclp'. 2015-10-18 15:24:12 -07:00
Alan Mishchenko 0145b0ca72 Moving BDD-based threshold function detection to the BDD part of the code. 2015-10-16 18:34:06 -07:00
Baruch Sterin 0e1eb98988 make sure all of ABC and related libraries are in the same namespace (when compiled with ABC_NAMESPACE) by removing extern "C" from function definitions 2015-10-16 14:02:38 -07:00
Baruch Sterin 8810ef12da Fix C++ compilation errors 2015-10-16 14:02:30 -07:00
Alan Mishchenko 40bb7089da Experiments with precomputation and matching. 2015-10-15 18:50:03 -07:00
Alan Mishchenko 15a86aefd2 Experiments with precomputation and matching. 2015-10-15 15:32:36 -07:00
Alan Mishchenko 01fc95695c Experiments with precomputation and matching. 2015-10-14 18:45:40 -07:00
Alan Mishchenko b5e0b7d4fc Experiments with precomputation and matching. 2015-10-13 18:48:38 -07:00
Alan Mishchenko 20c46b5a45 Experiments with precomputation and matching. 2015-10-12 18:29:15 -07:00
Alan Mishchenko d25473b307 Experiments with functional matching. 2015-10-09 11:05:35 -07:00
Alan Mishchenko 1ca82c87b4 Experiments with functional matching. 2015-10-08 23:27:56 -07:00
Alan Mishchenko 46223f903b Two fixes in 'dsd_filter'. 2015-10-07 17:48:07 -07:00
Alan Mishchenko a2692b70fb New switch 'satclp -r' to reverse variable order. 2015-10-07 17:35:36 -07:00
Alan Mishchenko 72f4dfff1b Experiments with functional matching. 2015-10-05 16:10:57 -07:00
Alan Mishchenko a1e9f668a8 Adding support for black boxes in extended AIG. 2015-10-04 17:45:24 -07:00
Alan Mishchenko 0e0f2e64af Naive LUT packing algorithm (command &pack). 2015-09-30 20:21:40 -07:00
Alan Mishchenko 10c31c6576 Experiments with LUT structure mapping. 2015-09-30 18:07:54 -07:00
Alan Mishchenko 1ba16ff782 Experiments with LUT structure mapping. 2015-09-27 19:16:08 -07:00
Alan Mishchenko e3eea01dbb Bug fix in &nf and in propagating timing info. 2015-09-27 15:23:06 -07:00
Alan Mishchenko d0af09a209 New command &rexwalk. 2015-09-26 14:55:07 -07:00
Alan Mishchenko 62e5ff900e Bug fix in 'satclp'. 2015-09-26 08:57:32 -07:00
Alan Mishchenko 3f77172a7e Adding API to set the number of flops after reading MiniAIG. 2015-09-24 09:47:05 -07:00
Alan Mishchenko f1bc346894 Several bug-fixed related to synthesis, library handling, and timimg info. 2015-09-23 18:44:07 -07:00
Alan Mishchenko a84c8174e7 Improving bit-blasting of full-adder. 2015-09-23 16:04:06 -07:00
Alan Mishchenko 19a4bb930e Threshold logic checking code by Augusto Neutzling and Jody Matos. 2015-09-23 15:24:25 -07:00
Alan Mishchenko bfebc0751c Fixing corner-cases in 'tempor' and in 'unfold'. 2015-09-22 19:51:24 -07:00
Alan Mishchenko edf6c13721 Adding new command &rex2gia. 2015-09-22 18:43:12 -07:00
Alan Mishchenko 815dfdc0c4 Adding switch to &b to prevent dumplicated area when used in delay-mode (&b -da). 2015-09-18 09:50:22 -07:00
Alan Mishchenko f06ca216ab Tuning SAT solver for QBF instances. 2015-09-18 09:05:27 -07:00
Alan Mishchenko fdf00d8044 Tuning SAT solver for QBF instances. 2015-09-18 08:38:53 -07:00
Alan Mishchenko 3b838b953d Tuning SAT solver for QBF instances. 2015-09-18 08:10:18 -07:00
Alan Mishchenko c30a0af71c Improvements to QBF solver; new quantification command &qvar. 2015-09-18 05:05:22 -07:00
Alan Mishchenko 97751e43b7 New constraint manager and memory reporting 'ps'. 2015-09-08 19:53:49 -07:00
Alan Mishchenko f623b04da4 Cleaning up boolean operators; adding unique name support; minor changes. 2015-09-07 19:23:17 -07:00
Alan Mishchenko b11344b454 Experiments with SAT-based collapsing. 2015-09-04 15:40:53 -07:00
Alan Mishchenko a207f6c071 Experiments with SAT-based collapsing. 2015-09-04 11:52:27 -07:00
Alan Mishchenko 5bcde4be2b Experiments with SAT-based collapsing. 2015-09-03 21:56:29 -07:00
Alan Mishchenko 5ca86b65ad Improvements to Cba data-structure. 2015-09-03 14:44:44 -07:00
Alan Mishchenko 6352d0b626 Improvements to Cba data-structure. 2015-09-03 14:33:53 -07:00
Alan Mishchenko bb7837ff86 Improvements to Cba data-structure. 2015-08-30 21:59:11 -07:00
Alan Mishchenko 4530ef6444 Alternative way to bit-blast a divisor. 2015-08-29 00:08:41 -07:00
Alan Mishchenko 4f74e00470 More tuning in &nf. 2015-08-28 19:17:48 -07:00
Alan Mishchenko 362a879d6b Adding switch to control area-recovery and more tuning in &nf. 2015-08-28 18:42:11 -07:00
Alan Mishchenko cb439f2ecf Bug fix in Vec_IntInsert() and a couple of new APIs. 2015-08-26 14:30:42 -07:00
Alan Mishchenko 41d18ca051 Changing 'refactor' to work with truth tables. 2015-08-25 11:02:34 -07:00
Alan Mishchenko 9ef96ae8a6 Changes to be able to compile ABC without CUDD. 2015-08-24 20:55:07 -07:00
Alan Mishchenko 99e3e3bc7e Changes to be able to compile ABC without CUDD. 2015-08-24 20:21:30 -07:00
Alan Mishchenko 77d64787e0 Changes to be able to compile ABC without CUDD. 2015-08-24 19:49:18 -07:00
Alan Mishchenko 27b8e541bb Merging recent changes. 2015-08-23 20:52:33 -07:00
Alan Mishchenko 0e4561ab9f Experiments with mapping plus small changes. 2015-08-23 20:38:55 -07:00
Alan Mishchenko 8ad2061669 New command 'isonpn'. 2015-08-11 14:07:04 -07:00
Alan Mishchenko 6ae4ddec00 New command 'isonpn'. 2015-08-11 08:04:25 -07:00
Alan Mishchenko 033203b7bd Improvements to Cba data-structure. 2015-08-10 13:26:37 -07:00
Alan Mishchenko a14e2c921f Improvements to Cba data-structure. 2015-08-09 22:46:40 -07:00
Alan Mishchenko 8a30b675b5 Improvements to Cba data-structure. 2015-08-09 17:19:22 -07:00
Alan Mishchenko 6a4e94e74d Improvements to Cba data-structure. 2015-08-09 13:18:22 -07:00
Alan Mishchenko 356217eff7 Improvements to Cba data-structure. 2015-08-08 18:47:42 -07:00
Alan Mishchenko f039799b75 Fix for v_rams_20b and fix for 'write_rb' set/reset only input port allowed 2015-08-07 19:32:58 -07:00
Alan Mishchenko 3206a7fc10 Compiler warnings. 2015-08-04 21:10:48 -07:00
Alan Mishchenko 9de8a0b346 Improvements to Cba data-structure. 2015-08-04 21:02:23 -07:00
Alan Mishchenko ea3133e3a4 Making ABC error out instead of crashing when non-standard range is given. 2015-08-03 16:24:10 -07:00
Alan Mishchenko b29cda081a Improvements to Cba data-structure. 2015-08-01 16:59:42 -07:00
Alan Mishchenko f6a7f695c0 Improvements to Cba data-structure. 2015-07-31 20:47:09 -07:00
Alan Mishchenko bab71101ec Improvements to Cba data-structure. 2015-07-29 23:13:39 -07:00
Alan Mishchenko 7f7b7671b0 Improvements to Cba data-structure. 2015-07-28 17:17:32 -07:00
Alan Mishchenko 0806dd227c Updates to the Cba data-structure. 2015-07-25 19:34:28 -07:00
Alan Mishchenko e0630f83f5 Updates to Cba data-structure. 2015-07-24 12:26:24 -07:00
Alan Mishchenko e9be6ecaf8 Updates to Cba data-structure. 2015-07-23 21:33:52 -07:00
Alan Mishchenko 9bd16029f1 Renaming Cba into Bac. 2015-07-21 17:59:07 -07:00
Alan Mishchenko ae46690b06 Renaming Cba into Bac. 2015-07-21 17:58:23 -07:00
Alan Mishchenko 6f13e63182 Renaming Cba into Bac. 2015-07-21 17:57:19 -07:00
Alan Mishchenko 8b1d1dc86b Renaming Cba into Bac. 2015-07-21 17:55:33 -07:00
Alan Mishchenko e365a8e615 Renaming Cba into Bac. 2015-07-21 17:53:56 -07:00
Alan Mishchenko 91b62b3bb8 Renaming Cba into Bac. 2015-07-21 17:51:28 -07:00
Alan Mishchenko 477ecc172f Renaming Cba into Bac. 2015-07-21 17:42:49 -07:00
Alan Mishchenko ddda9320ac Adding new GIA duplication API. 2015-07-21 11:52:15 -07:00
Alan Mishchenko d332e670a2 Improving Wlc_Ntk_t data-structure by extending bit-ranges up to 4B enabling printout of AND2 in '%ps -d'. 2015-07-16 17:37:48 -07:00
Alan Mishchenko 3a321133af Clarifying 'cec' and 'dsec' usage message. 2015-07-16 15:20:27 -07:00
Alan Mishchenko f54a139c8a Verilog benchmark generation code. 2015-07-15 00:21:26 -07:00
Alan Mishchenko e37bd1fb64 Improved bit-blasting of various operators in Wlc_Ntk_t; added SQRT operator (@). 2015-07-14 19:55:05 -07:00
Alan Mishchenko 92b85b16a2 Improved bit-blasting of adders and multipliers in Wlc_Ntk_t. 2015-07-13 17:46:01 -07:00
Alan Mishchenko 772eaa6345 Assertion fail after 'print_supp -w'. 2015-07-11 21:26:34 -07:00
Alan Mishchenko 494ca7156c Compiler warning. 2015-07-11 19:32:26 -07:00
Alan Mishchenko 0d09071f14 Adding new Python API 'is_func_iso2'. 2015-07-11 19:30:52 -07:00
Alan Mishchenko b949436f4c Adding new Python API 'is_func_iso'. 2015-07-11 16:49:06 -07:00
Alan Mishchenko 05ca4afb77 New TFI/TFO profiling code. 2015-07-10 21:20:50 -07:00
Alan Mishchenko 3aece535b9 New TFI/TFO profiling code. 2015-07-09 20:54:10 -07:00
Alan Mishchenko f6a3c28e88 Temp change in the AIG reader and minor tuning. 2015-07-08 21:22:27 -07:00
Alan Mishchenko fd5b7e8b5d Bug fix in programmable cell parser and minor tuning. 2015-07-08 16:59:22 -07:00
Alan Mishchenko 609be7a114 C++ compiler typecast problem. 2015-07-08 15:04:26 -07:00
Alan Mishchenko 4f2d2e0e96 C++ compiler typecast problem. 2015-07-08 08:42:15 -07:00
Alan Mishchenko 095cf5e8b6 C++ compiler typecast problem. 2015-07-08 07:53:30 -07:00
Alan Mishchenko 6bd77858c5 Bug fixing in %blast when blasting MUX coming from always-statement. 2015-07-07 22:34:21 -07:00
Alan Mishchenko 8efc9cb7a9 Bug fixing in %blast when blasting mod operator (handling zero divisor). 2015-07-07 15:38:54 -07:00
Alan Mishchenko 43ad54b938 Adding new Python API 'co_supp'. 2015-07-07 08:28:59 -07:00
Alan Mishchenko 95af979753 Adding new Python API 'co_supp'. 2015-07-06 22:47:47 -07:00
Alan Mishchenko cc0954e022 Bug fix in SMT-LIB parser. 2015-06-30 09:49:55 -07:00
Alan Mishchenko 8c1e81a7c8 Fixing assertion failure in Abc_NtkBddToSop. 2015-06-29 12:52:16 -07:00
Alan Mishchenko 819c0ccab2 Making sure the CI/CO are not ordered by 'fraig_restore'. 2015-06-29 12:01:42 -07:00
Alan Mishchenko 9eb3a3b349 Adding resource limits to 'fraig_restore'. 2015-06-27 19:39:02 -07:00
Alan Mishchenko 9c0c460795 New command &genqbf to dump the QBF miter for ind inv computation. 2015-06-23 20:48:24 -07:00
Alan Mishchenko a26d8621f0 Add warnings to %read about 3-arge ops and non-zero-based ranges. 2015-06-23 15:53:41 -07:00
Alan Mishchenko d0d7763ef8 Supporting AND-gate cuts in 'if' and '&if' 2015-06-21 13:31:02 -07:00
Alan Mishchenko ffcb4afbb5 Supporting 'distinct' keyword in SMT-LIB parser. 2015-06-20 13:50:46 -07:00
Alan Mishchenko 4b7dd69260 Adding new debugging feature to Wlc_Ntk_t. 2015-06-19 22:58:07 -07:00
Alan Mishchenko 6e4ef76311 Bug with in signed MUX. 2015-06-14 13:18:23 -07:00
Alan Mishchenko 17c32289e1 Bug with in signed MUX. 2015-06-12 23:02:11 -07:00
Alan Mishchenko 0489deb631 Sequential word-level simulator for Wlc_Ntk_t. 2015-06-04 22:32:51 -07:00
Alan Mishchenko 37b6b5f1f8 Making sure 0-input LUTs are supported by the DSD matching code. 2015-05-14 13:12:17 -07:00
Alan Mishchenko a90700c753 Correcting assert in converting standard cell mapping from GIA into ABC. 2015-04-27 23:06:39 -07:00
Alan Mishchenko b3e6cb30bb Bug fix in %read_smt and prevent crash of &cec if there is no current AIG. 2015-04-27 13:56:17 -07:00
Alan Mishchenko 3be417ae1c Fix inconsistency between operators and symbols in Wlc_Ntk_t. 2015-04-25 11:56:00 -07:00
Alan Mishchenko 55e7dd16d3 Suggested fixes to compile with 'gcc -x c++'. 2015-04-24 21:33:45 -07:00
Alan Mishchenko 9e20b3016d Adding switch 'map -f' to not use large gates for high-fanout nodes (disabled by default). 2015-04-24 14:51:34 -07:00
Alan Mishchenko bc6c0837a1 Adding support for dumping faults not detected by a given test-set in &fftest (switch -n). 2015-04-17 17:00:31 +09:00
Alan Mishchenko cd4807ea04 Adding support for cardinality constraints in &fftest (switches -K and -k). 2015-04-16 20:58:23 +09:00
Alan Mishchenko 5c840d88f9 Adding switch &fftest -e to dump delay-tests in a special format. 2015-04-14 19:46:44 +09:00
Alan Mishchenko 96c622b3bc Making BDD computation more robust by using dynamic resource limit. 2015-04-11 09:22:03 +09:00
Alan Mishchenko b6b9d284c4 Several additional fixed in the timing manager. 2015-04-07 00:33:20 +07:00
Alan Mishchenko 452ff2730c Bug fix in 'mfs2': Apply sweep to avoid assertion failure when translating into a BDD. 2015-04-06 11:49:19 +07:00
Alan Mishchenko b3e5ccd256 Getting default AND-node delay from Genlib library. 2015-04-06 10:56:14 +07:00
Alan Mishchenko c0c7723f1d Allow timing manager to be started when a default is set. 2015-04-06 10:31:59 +07:00
Alan Mishchenko 85b33df1e1 Improvements in reading timing information from BLIF. 2015-04-05 13:03:25 +07:00
Alan Mishchenko b79fd69fb5 Making sure the names are transfered when &get -n is used. 2015-04-04 16:15:36 +07:00
Alan Mishchenko 3a15f34307 Properly copying and saving the timing info in &get and &put. 2015-04-04 16:15:07 +07:00
Alan Mishchenko 7c3eab6eb4 Properly copying and saving the timing info in &get and &put. 2015-04-04 16:01:12 +07:00
Alan Mishchenko e52d3a0c16 Bug fix in handling constants in the updated 'sop' command. 2015-04-03 16:37:04 +07:00
Alan Mishchenko 9b29e1a3c0 Cleanup and improvements in the user timing manager. 2015-04-03 14:25:58 +07:00
Alan Mishchenko 93cf8b79f4 Changing timing manager to have 0 default required times. 2015-04-03 02:52:14 +07:00
Alan Mishchenko ad4e869ab7 Reason for assertion failure in &nf. 2015-04-03 01:55:02 +07:00
Alan Mishchenko 9cee436686 Added backward flop order to &icheck (switch -b). 2015-04-01 15:36:23 +07:00
Alan Mishchenko 8de4d919d2 Revising the timing manager. 2015-04-01 10:57:28 +07:00
Alan Mishchenko 6f598455bc Updating command &satfx. 2015-03-31 16:27:07 +07:00
Alan Mishchenko 5ebe403a87 Print-out of sequential equivalences in &scorr. 2015-03-31 13:28:00 +07:00
Alan Mishchenko d00cbdb52f Changed in comparing user timing. 2015-03-31 11:34:24 +07:00
Alan Mishchenko ac3817caa7 Small bug in user timing computation. 2015-03-27 10:15:51 +07:00
Alan Mishchenko 3370feea70 Bug fix in initializing user timing in 'map'. 2015-03-26 10:02:49 +07:00
Alan Mishchenko 53e4946c43 Trying to reduce delay degradation afer 'map' with user timing. 2015-03-24 19:24:52 +07:00
Alan Mishchenko efdd26f86d Scalable SOP manipulation package. 2015-03-23 18:40:38 +07:00
Alan Mishchenko 8095c2d1ad Fix for not propagating user timing correctly after &nf. 2015-03-18 20:36:54 +07:00
Alan Mishchenko fad6254c07 Compiler warnings. 2015-03-18 19:42:03 +07:00
Alan Mishchenko c602cbe338 Scalable SOP manipulation package. 2015-03-18 19:39:22 +07:00
Alan Mishchenko fb5d4a664d Adding switch '-b' in 'read_pla'. 2015-03-18 10:18:46 +07:00
Alan Mishchenko 120a30c2e4 Bug fix in &cec (not generating a CEX). 2015-03-17 09:23:57 +07:00
Alan Mishchenko 7fe11c51cf Several bug fixes and silencing requests. 2015-03-16 19:38:43 +07:00
Alan Mishchenko 1e757a8567 Adding flop-input-only switch -f in &fftest for '-S str'. 2015-03-16 10:37:34 +07:00
Alan Mishchenko 8453afcf8b Enable arrival/required times in &nf. 2015-03-15 13:27:07 +07:00
Alan Mishchenko 05244daba9 Bug fix in 'move_names' related to feed-through nets. 2015-03-15 10:53:23 +07:00
Alan Mishchenko 3f2b1233ee Adding silent mode to &cec -m. 2015-03-15 09:51:06 +07:00
Alan Mishchenko 1451e4551c Adding flop-input-only switch -f in &fftest. 2015-03-14 16:32:21 +07:00
Alan Mishchenko dc92f89278 Adding silent mode to &splitprove. 2015-03-14 03:13:05 +07:00
Alan Mishchenko f261092139 Adding new command 'abcrc' to load "abc.rc" on demand. 2015-03-10 16:53:24 -07:00
Alan Mishchenko 56f783157a Support for representing programmable cell configuration data. 2015-03-08 20:17:59 -07:00
Alan Mishchenko 6da21b8b88 Experiments with SAT-based cube enumeration. 2015-03-05 23:00:30 -08:00
Alan Mishchenko 6c93249373 Improvements to the CBA package. 2015-03-04 16:07:33 -08:00
Alan Mishchenko 360cc99f01 Bug fix WLC package (reusing name buffer, resulting in wrong print-outs). 2015-03-03 12:52:47 -08:00
Alan Mishchenko e17234d90c Improvements to the CBA package. 2015-03-03 12:48:55 -08:00
Alan Mishchenko 7441908ffb Improvements to the CBA package. 2015-03-02 08:38:54 -08:00
Alan Mishchenko 2d90b916e6 Improvements to the CBA package. 2015-03-01 19:11:15 -08:00
Alan Mishchenko f27979fc8f Improvements to the SMTLIB parser. 2015-02-28 22:05:46 -08:00
Alan Mishchenko 118776f39d Adding switch -x to command &fadds. 2015-02-26 11:37:42 -08:00
Alan Mishchenko 13e49cba36 Compiler warnings. 2015-02-21 22:34:37 -08:00
Alan Mishchenko d33d66f46e Adding fflush() to make sure stdout responses appear on time. 2015-02-20 12:16:17 -08:00
Alan Mishchenko 360bce618c Compiler warnings. 2015-02-19 15:24:55 -08:00
Alan Mishchenko 4c55754404 Committed by mistake. 2015-02-19 15:00:52 -08:00
Alan Mishchenko 0dcdbc2a6a Performance bug fix in 'clp' (different way of removing redundant fanins). 2015-02-19 14:46:06 -08:00
Alan Mishchenko e3f87e189c Propagating changes after updating flag of 'sop'. 2015-02-19 12:57:05 -08:00
Alan Mishchenko ba6095ce61 Modifications to read SMTLIB file from stdin. 2015-02-18 21:04:36 -08:00
Alan Mishchenko 4cd7895d6c Modifications to read SMTLIB file from stdin. 2015-02-18 21:02:17 -08:00
Alan Mishchenko d5cfb39a48 Modifications to read SMTLIB file from stdin. 2015-02-18 20:44:55 -08:00
Alan Mishchenko 6b0accd22a Modifications to read SMTLIB file from stdin. 2015-02-18 20:42:48 -08:00
Alan Mishchenko 5ad773eda1 Changing semantics of switch -C in 'sop' to limit cubes at one node. 2015-02-18 18:41:26 -08:00
Alan Mishchenko 525137926d Several improvements to CBA data-structure. 2015-02-17 18:06:48 -08:00
Alan Mishchenko e7b467f96b Several improvements to CBA data-structure. 2015-02-16 14:32:41 -08:00
Alan Mishchenko 7a4a63d0c4 Several improvements to CBA data-structure. 2015-02-16 13:15:12 -08:00
Alan Mishchenko ff1fd41a47 Modifications to read SMTLIB file from stdin. 2015-02-15 21:57:42 -08:00
Alan Mishchenko 5e0d7dadc2 Assertion failure in 'write_hie' with blackboxes. 2015-02-15 18:47:56 -08:00
Alan Mishchenko 17c78313cc Compiler warnings. 2015-02-15 15:40:11 -08:00
Alan Mishchenko d6157c7516 Several improvements to CBA data-structure. 2015-02-15 15:37:00 -08:00
Alan Mishchenko 5158c71129 Added switch -n to 'sop'. 2015-02-14 15:08:07 -08:00
Alan Mishchenko edf3622ceb Several improvements to CBA data-structure. 2015-02-13 16:28:17 -08:00
Alan Mishchenko ea2d82ab14 Modifications to read SMTLIB file from stdin. 2015-02-11 18:09:15 -08:00
Alan Mishchenko e363727c62 Several improvements to CBA data-structure. 2015-02-11 16:55:18 -08:00
Alan Mishchenko 8cabdcb55d Adding resource limit switch -C to 'sop'. 2015-02-11 12:33:54 -08:00
Alan Mishchenko 72dbdee202 Adding resource limit to 'sop'. 2015-02-10 17:31:54 -08:00
Alan Mishchenko 4b93ddda63 Adding resource limit to 'sop'. 2015-02-10 17:29:21 -08:00
Alan Mishchenko 6bda7ca8f4 Adding resource limit to 'fx'. 2015-02-10 10:55:38 -08:00
Alan Mishchenko 44b31021d6 Adding resource limit to 'fx'. 2015-02-10 08:03:01 -08:00
Alan Mishchenko 089a8bbfc9 Several improvements to CBA data-structure. 2015-02-09 23:27:40 -08:00
Alan Mishchenko fd877c3f37 Several improvements to CBA data-structure. 2015-02-09 15:36:25 -08:00
Alan Mishchenko 0f9001c956 Adding switch '-p' to control pin-permutation in &nf. 2015-02-08 22:00:55 -08:00
Alan Mishchenko db6afbea29 Diabling pin-permutation in &nf mapper. 2015-02-08 21:18:49 -08:00
Alan Mishchenko 68467cfff7 Fixed a typo in variable names. 2015-02-07 22:29:14 -08:00
Alan Mishchenko 55c5c1b58f Added SMT parser for Wlc_Ntk_t. 2015-02-07 22:05:02 -08:00
Alan Mishchenko d7099e7adc Adding binary dump to CBA. 2015-02-05 19:34:24 -08:00
Alan Mishchenko 8410daf3e4 Improvements and tuning of CBA with buffering/sizing. 2015-02-04 16:29:55 -08:00
Alan Mishchenko eb270018b9 Esperiments with MO PLA optimization. 2015-02-03 17:24:30 -08:00
Alan Mishchenko d7d1978e42 Bug fix in &nf. 2015-02-02 21:23:12 -08:00
Alan Mishchenko 08b69297cc Improvements and tuning of CBA. 2015-02-01 21:51:06 -08:00
Alan Mishchenko ffaf8b39ae Improvements and tuning of CBA. 2015-02-01 21:21:25 -08:00
Alan Mishchenko d9ed88f6a0 Improvements and tuning of CBA. 2015-02-01 20:53:32 -08:00
Alan Mishchenko 7b1c25086b Improvements and tuning of CBA. 2015-02-01 20:50:59 -08:00
Alan Mishchenko a704e9c9ff Improvements and tuning of CBA. 2015-02-01 15:15:34 -08:00
Alan Mishchenko e32026cf1e Compiler warnings. 2015-01-31 20:06:21 -08:00
Alan Mishchenko 6ec4680e1b Compiler warnings. 2015-01-31 20:02:46 -08:00
Alan Mishchenko 2c8c0d8736 Compiler warnings. 2015-01-31 19:58:38 -08:00
Alan Mishchenko 77dbe2b656 Major rehash of the CBA code. 2015-01-31 19:52:32 -08:00
Alan Mishchenko a523ab792c Preprocessing for multi-output PLA tables. 2015-01-31 15:10:24 -08:00
Alan Mishchenko e30dae5a61 Preprocessing for multi-output PLA tables. 2015-01-31 15:10:01 -08:00
Alan Mishchenko 13cd3a6a4c Preprocessing for multi-output PLA tables. 2015-01-31 14:53:58 -08:00
Alan Mishchenko e293489f71 Preprocessing for multi-output PLA tables. 2015-01-31 13:42:14 -08:00
Alan Mishchenko 6c3f191172 Preprocessing for multi-output PLA tables. 2015-01-31 11:23:22 -08:00
Alan Mishchenko ff1fb1757b Preprocessing for multi-output PLA tables. 2015-01-31 11:10:07 -08:00
Alan Mishchenko 8ff4b79fc2 Several ongoing changes. 2015-01-26 20:48:59 -08:00
Alan Mishchenko 40cbacaf40 Several ongoing changes. 2015-01-26 20:45:28 -08:00
Alan Mishchenko 65cd556b1d Outputting initial state in Wlc_Ntk_t. 2015-01-26 09:14:51 -08:00
Alan Mishchenko 416cc3b2ae Outputting initial state in Wlc_Ntk_t. 2015-01-25 11:21:36 -08:00
Alan Mishchenko 3dd4e356fc Fix in deriving the init values for Wlc_Ntk_t. 2015-01-22 15:16:45 -08:00
Alan Mishchenko 674622a3c0 Bug fix in &cone (not able to extract the last PO). 2015-01-22 13:13:30 -08:00
Alan Mishchenko cf83242458 Support of init-state in AIGs derived from word-level designs in Wlc_Ntk_t. 2015-01-21 17:45:48 -08:00
Alan Mishchenko ffc7b60d2d Support of init-state in AIGs derived from word-level designs in Wlc_Ntk_t. 2015-01-21 17:43:46 -08:00
Alan Mishchenko 14425c111e Organizing commands for barbuf-aware flow. 2015-01-20 21:20:31 -08:00
Alan Mishchenko dc8926a928 Word-level extension of Cba_Ntk_t. 2015-01-18 20:38:52 -08:00
Alan Mishchenko d688af2601 Several small bug fixes. 2015-01-17 20:48:42 -08:00
Alan Mishchenko 17610c039f Organizing commands for barbuf-aware flow. 2015-01-17 20:27:23 -08:00
Alan Mishchenko 42cc56576b Compiler warnings. 2015-01-16 16:16:32 -08:00
Alan Mishchenko d6d0627d13 Organizing commands for barbuf-aware flow. 2015-01-16 16:14:16 -08:00
Alan Mishchenko 1a5a11cbc6 Various transformations of Cba_Ntk_t. 2015-01-15 20:08:15 -08:00
Alan Mishchenko c7e3c8f375 Various transformations of Cba_Ntk_t. 2015-01-15 18:23:32 -08:00
Alan Mishchenko e27edf5e1e Various transformations of Cba_Ntk_t. 2015-01-15 18:21:02 -08:00
Alan Mishchenko 8ac8923a91 Various transformations of Cba_Ntk_t. 2015-01-13 21:54:59 -08:00
Alan Mishchenko 2b2f05bacd Various transformations of Cba_Ntk_t. 2015-01-13 17:05:22 -08:00
Alan Mishchenko ee72b500d5 Various transformations of Cba_Ntk_t. 2015-01-11 16:42:38 -08:00
Alan Mishchenko 26b8116ac6 Changing memory model of Cba_Ntk_t. 2015-01-10 17:19:54 -08:00
Alan Mishchenko 63ce84d824 Implementation of CE extraction for multiple MUXes driving D-inputs of FFs. 2015-01-08 16:30:32 -08:00
Alan Mishchenko 3b9e363ef2 Returning multiple counter-examples. 2015-01-03 22:53:58 -08:00
Alan Mishchenko 58d28539a7 Gate sizing with barrier buffers. 2014-12-21 22:22:31 -08:00
Alan Mishchenko 6733abd72e Exprimental features in tech-mapping. 2014-12-21 01:04:39 -08:00
Alan Mishchenko 259d53ca3e Simplifying AIG with barrier buffers. 2014-12-19 22:02:28 -08:00
Alan Mishchenko c1d7f29dbd Bug fix in 'testcex' when flop count in the CEX is different from the network (say, after seq synthesis). 2014-12-19 18:36:10 -08:00
Alan Mishchenko d5a952c462 Bug fix in 'testcex' when flop count in the CEX is different from the network (say, after seq synthesis). 2014-12-19 18:34:29 -08:00
Alan Mishchenko c5162ba6d2 Induced bug with in DFS computation. 2014-12-16 21:48:16 -08:00
Alan Mishchenko 6b6e5861e5 Integrating barrier buffers. 2014-12-13 20:45:11 -08:00
Alan Mishchenko 6e59e4e542 Adding relax ratio to &synch2. 2014-12-13 20:10:24 -08:00
Alan Mishchenko e946deec81 Integrating barrier buffers. 2014-12-13 20:03:29 -08:00
Alan Mishchenko aadfea8b4d Integrating barrier buffers. 2014-12-13 12:37:04 -08:00
Alan Mishchenko ac7633c5a4 Integrating barrier buffers. 2014-12-11 11:14:04 -08:00
Alan Mishchenko 4f940de518 Converting AIG with MUXes into a logic network. 2014-12-10 22:52:34 -08:00
Alan Mishchenko a1fa224d61 New flavor of DSD-friendly 'eliminate'. 2014-12-09 23:30:46 -08:00
Alan Mishchenko 1398de7c46 Integrating barrier buffers. 2014-12-08 14:10:41 -08:00
Alan Mishchenko 3e2fad3574 Changes to the parser. 2014-12-04 18:23:20 -08:00
Alan Mishchenko 705006a648 Changes to the parser. 2014-12-03 20:35:39 -08:00
Alan Mishchenko e970aa8521 Added and verified bit-blasting of power operator. 2014-11-30 16:18:13 -08:00
Alan Mishchenko 109fc76f43 Changes to history recording and other small things. 2014-11-30 12:20:43 -08:00
Alan Mishchenko 5d1a5f3590 Changes to history recording and other small things. 2014-11-30 12:19:32 -08:00
Alan Mishchenko 1d20dea11b Induced bug fix in bitblasting of rotation operator. 2014-11-29 19:34:47 -08:00
Alan Mishchenko 87f0d187bf Compiler warnings. 2014-11-29 14:43:21 -08:00
Alan Mishchenko 24f1ca0703 New parser and framework. 2014-11-29 14:36:26 -08:00
Alan Mishchenko ba4063acb2 Improvements to handling boxes and flops. 2014-11-25 21:07:27 -08:00
Alan Mishchenko 8d5fa2c290 Improvements to handling boxes and flops. 2014-11-24 20:02:51 -08:00
Alan Mishchenko 8feac56509 Experiments with hierarchy representation. 2014-11-24 15:35:52 -08:00
Alan Mishchenko 3368b2dda9 Improvements to handling boxes and flops. 2014-11-24 15:15:45 -08:00
Alan Mishchenko df83fb5e04 Fix in reading flop classes. 2014-11-21 12:01:26 -08:00
Alan Mishchenko 9e6d74bc15 Experiments with hierarchy representation. 2014-11-20 22:09:57 -08:00
Alan Mishchenko 997a92fc54 Extending &fadds to support artificial chains. New command &setregnum. 2014-11-20 10:46:14 -08:00
Alan Mishchenko 716b9502c9 Extending &fadds to support artificial chains. 2014-11-19 20:49:15 -08:00
Alan Mishchenko c06bdc151c Added check if a given command exists. 2014-11-18 13:54:16 -08:00
Alan Mishchenko d662e7ff68 Merging two branches. 2014-11-17 18:03:51 -08:00
Alan Mishchenko 7a8d56b9ad AND/OR bug in the UIF computation. 2014-11-17 17:46:08 -08:00
Alan Mishchenko 345d4e24f3 Bug fix in abstracting boxes. 2014-11-17 12:55:12 -08:00
Alan Mishchenko 5a10c8ad01 Integrating mfs2 package to work with boxes. 2014-11-16 23:27:21 -08:00
Alan Mishchenko d9ffe9c3ad Improvements to word-level network package. 2014-11-14 20:38:13 -08:00
Alan Mishchenko 98c5668d4b Improvements to word-level network package. 2014-11-14 20:15:36 -08:00
Alan Mishchenko cc37fb9573 Improvements to word-level network package. 2014-11-14 20:12:20 -08:00
Alan Mishchenko 3dd08c7172 Enabling AIGs with boxes for word-level and sequential designs. 2014-11-14 15:34:03 -08:00
Alan Mishchenko a34183790f Enabling AIGs with boxes for word-level and sequential designs. 2014-11-13 18:28:25 -08:00
Alan Mishchenko 968be1577b Generation of barrier-buffers for hierarchical design. 2014-11-11 23:17:48 -08:00
Alan Mishchenko 96fa84ad77 Added switch -i to &filter to use FIs instead of FOs. 2014-11-11 15:11:44 -08:00
Alan Mishchenko 2a028aa147 Bug fix in blasting MUX with different ranges of inputs and the output. 2014-11-10 21:43:41 -08:00
Alan Mishchenko ac030ee42c Generation of barrier-buffers for hierarchical design. 2014-11-10 16:45:48 -08:00
Alan Mishchenko 5ebf135b6a Adding cyclicity check for netlist with boxes. 2014-11-10 14:55:27 -08:00
Alan Mishchenko 873c35018a Removing unauthorized printout in 'pdr'. 2014-11-09 23:54:57 -08:00
Alan Mishchenko 372a348c90 Detecting full-adder chains and putting them into white boxes. 2014-11-09 22:49:17 -08:00
Alan Mishchenko 8c2e51824e Experimental implementation of BMC-related procedures. 2014-11-04 20:35:36 -08:00
Alan Mishchenko b4cf2f7448 Added switches '-c' and '-n' to 'init'. 2014-11-02 17:35:47 -08:00
Alan Mishchenko 135bf3ecdf Compiler warnings. 2014-10-28 23:53:17 -07:00
Alan Mishchenko c556baa92e Changes to enable building external code. 2014-10-28 21:13:59 -07:00
Alan Mishchenko c0db4d2a12 Changes to enable building external code. 2014-10-27 17:56:48 -07:00
Alan Mishchenko 836723cf73 Changing switch -v in 'qbf' and '&qbf' to be non-verbose by default. 2014-10-26 08:57:13 -07:00
Alan Mishchenko b8556e7edf New command &satenum to enumerate SAT assignments of a miter in a naive way. 2014-10-25 17:55:35 -07:00
Alan Mishchenko f93ede121d Adding switch &fftest -N <num> to detect fixed vars after each <num> iterations. 2014-10-25 17:07:38 -07:00
Alan Mishchenko 96c9792f33 Merged in sterin/abc (pull request #9) 
make it easy to add intialization functions to Abc_FrameInit()/Abc_FrameEnd()
 2014-10-23 18:19:51 -07:00
Alan Mishchenko 49caf258d4 One bug fix and two small changes. 2014-10-22 20:18:13 -07:00
Alan Mishchenko 51be0f4c52 One bug fix and two small changes. 2014-10-22 20:17:09 -07:00
Baruch Sterin 392390d23e make it easy to add intialization functions to Abc_FrameInit()/Abc_FrameEnd() 2014-10-22 15:50:06 -07:00
Alan Mishchenko d2e42ec081 Disabling MiniSAT 2.2 for now. 2014-10-21 20:40:50 -07:00
Alan Mishchenko 5c93850553 Compiler problems. 2014-10-21 20:24:13 -07:00
Alan Mishchenko a9317eac75 Preparing to work with C++ code. 2014-10-21 19:37:33 -07:00
Alan Mishchenko 7592aa8a3e Adding commands backup/restore. 2014-10-21 10:51:41 -07:00
Alan Mishchenko bae5e26fb5 Adding switch &qbf -q to quantify functional variables. 2014-10-20 11:00:11 -07:00
Alan Mishchenko 23441c060a Improved QBF solver. 2014-10-18 16:10:18 -07:00
grigora 83a47278a9 Fixed "bm" command hang issue. 2014-10-11 13:30:02 +00:00
Alan Mishchenko f0044175ee Improvements to the parser. 2014-10-10 19:17:19 -07:00
Alan Mishchenko f6c1fc072c Naive (SAT-only) CEC option. 2014-10-10 16:14:48 -07:00
Alan Mishchenko 01e1b6345e Bug fix in the bit-blaster. 2014-10-10 13:46:58 -07:00
Alan Mishchenko 5a4592ee69 Improvements to ISOP. 2014-10-10 13:15:31 -07:00
Alan Mishchenko b8bd21c82d Improvements to ISOP. 2014-10-10 12:59:30 -07:00
Alan Mishchenko e4d5887671 Detection of threshold functions. 2014-10-08 10:41:20 -07:00
Alan Mishchenko 6d79be6b01 Bug fix in move_names. 2014-10-05 11:13:08 -07:00
Alan Mishchenko 734435f441 Deriving cell mapping with &if -kz. 2014-10-04 19:36:41 -07:00
Alan Mishchenko 24083998ab Deriving cell mapping with &if -kz. 2014-10-04 19:18:34 -07:00
Alan Mishchenko fa5f05e3a2 Deriving AIG after cell mapping. 2014-10-03 17:15:43 -07:00
Alan Mishchenko 3f31a8580f Bug fix in Verilog writer. 2014-10-02 14:53:30 -07:00
Alan Mishchenko 889b329d01 Adding switch -R to 'if'. 2014-10-02 13:17:53 -07:00
Alan Mishchenko 6d94b6b1a2 Improvements to bit-blaster. 2014-10-01 22:54:08 -07:00
Alan Mishchenko 27b1e49dee Improvements to bit-blaster. 2014-09-30 20:28:49 -07:00
Alan Mishchenko ed1bf0000e Improvements to bit-blaster. 2014-09-30 19:51:39 -07:00
Alan Mishchenko 69519f86cd Adding options to &flow. 2014-09-29 18:08:57 -07:00
Alan Mishchenko 69b4a92286 Adding options to &flow2. 2014-09-29 16:08:59 -07:00
Alan Mishchenko 4960af4e76 Adding options to &flow. 2014-09-29 14:54:55 -07:00
Alan Mishchenko 05ee370f85 Command to rename files in the same directory. 2014-09-28 20:48:53 -07:00
Alan Mishchenko 0c070a35e5 Adding out-of-bounds checks to AIGER readers. 2014-09-28 12:17:02 -07:00
Alan Mishchenko 98e377bdff Adding features to CNF generation. 2014-09-28 12:10:13 -07:00
Alan Mishchenko fbc9c00fd1 Renaming DSD commands (dsd_tune -> dsd_match; dsd_clean -> dsd_filter). 2014-09-28 11:32:26 -07:00
Alan Mishchenko 69bd355467 Support for sequential designs in word-level Verilog. 2014-09-26 16:11:36 -07:00
Alan Mishchenko 6aa1c94ea5 Enabling print-out, for each operator, of the percetage of AND nodes after bit-blasting. 2014-09-25 20:33:29 -07:00
Alan Mishchenko a1b4773c77 Printing node type statistics. 2014-09-24 17:29:34 -04:00
Alan Mishchenko 7d21182067 Printing node type statistics. 2014-09-24 13:01:24 -04:00
Alan Mishchenko 4db5e3c02d Printing node type statistics. 2014-09-24 12:46:35 -04:00
Alan Mishchenko ffaad9ba10 Bug fix in handling MUXes in Verilog parser, induced by recent changes. 2014-09-24 09:05:40 -04:00
Alan Mishchenko ad079f7207 Added switch -t to &flow2. 2014-09-24 00:33:16 -04:00
Alan Mishchenko ea9c1c0bff Added support of word-level MUXes represented as 'always'-statements. 2014-09-24 00:24:54 -04:00
Alan Mishchenko a4d5a9b5bc Added support of word-level MUXes represented as 'always'-statements. 2014-09-24 00:22:18 -04:00
Alan Mishchenko d9b5aa49f7 Enables dumping stats into a file. 2014-09-23 20:32:37 -04:00
Alan Mishchenko 3f95853f3e Extending &cec to take a single-output miter (usage of switch -d has changed!). 2014-09-23 16:22:21 -04:00
Alan Mishchenko 93e5631cff Debugging the bit-blaster. 2014-09-23 16:04:35 -04:00
Alan Mishchenko 3f6c08dfc6 Debugging the bit-blaster. 2014-09-23 12:54:57 -04:00
Alan Mishchenko 15f5428989 Adding switch to enable SOP balancing in '&flow2'. 2014-09-21 21:40:34 -04:00
Alan Mishchenko 5ce7aa572f Synchronizing packages. 2014-09-20 17:01:47 -07:00
Alan Mishchenko 1fb65889a3 Updating command 'dsd_clean'. 2014-09-20 13:56:26 -07:00
Alan Mishchenko 29494c3a00 Tuning the flow scripts. 2014-09-20 13:15:57 -07:00
Alan Mishchenko b05ee94311 Improvements to Boolean matching. 2014-09-19 14:06:51 -07:00
Alan Mishchenko ee72791293 Improvements to Boolean matching. 2014-09-18 22:26:54 -07:00
Alan Mishchenko 69699da912 Improvements to Boolean matching. 2014-09-18 16:44:04 -07:00
Alan Mishchenko a0ed347992 Improving DSD manager. 2014-09-18 14:50:08 -07:00
Alan Mishchenko 043cfcd775 Concurrency for Boolean matching. 2014-09-18 11:46:14 -07:00
Alan Mishchenko 023e92c470 Improvements to Boolean matching. 2014-09-17 18:58:20 -07:00
Alan Mishchenko 69827a5a88 Improvements to word-level Verilog parser. 2014-09-17 15:20:04 -07:00
Alan Mishchenko ffd77ffedd Improvements to word-level Verilog parser. 2014-09-17 15:14:17 -07:00
Alan Mishchenko ec0b9b6b6e Improvements to word-level Verilog parser. 2014-09-16 22:08:22 -07:00
Alan Mishchenko 288d64d033 New choice computation. 2014-09-16 14:59:28 -07:00
Alan Mishchenko e033a62282 Code restructuring. 2014-09-16 12:13:25 -07:00
Alan Mishchenko 61e58b2d56 Compiler error (duplicate typedef). 2014-09-15 08:54:07 -07:00
Alan Mishchenko 501c3f0b1e Compiler warnings. 2014-09-12 13:53:04 -07:00
Alan Mishchenko 39c68e72e4 Replacing tabs with spaces. 2014-09-12 13:46:11 -07:00
Alan Mishchenko dcb7d0d3fc New word-level representation package. 2014-09-12 13:40:48 -07:00
Alan Mishchenko ae7e286213 Resetting the random seed in 'sparsify'. 2014-09-11 18:50:15 -07:00
Alan Mishchenko 49f2ec22b9 Bug fix in transferring timing info. 2014-09-09 22:50:15 -07:00
Alan Mishchenko 233e12610a Added command 'move_names'. 2014-08-28 13:06:02 -07:00
Alan Mishchenko 79c1928cf9 Added command 'move_names'. 2014-08-28 13:04:47 -07:00
Alan Mishchenko 3c51dd47b5 Tuning LUT mapping flow. 2014-08-28 00:11:24 -07:00
Alan Mishchenko 70a236379b Tuning LUT mapping flow. 2014-08-27 23:17:33 -07:00
Alan Mishchenko 17343bf144 Compiler warning. 2014-08-27 23:03:39 -07:00
Alan Mishchenko ce74153c9f Tuning LUT mapping flow. 2014-08-27 22:59:21 -07:00
Alan Mishchenko 6db6607114 Improvements BLIF parser. 2014-08-27 18:47:45 -07:00
Alan Mishchenko 9c154cfe61 Improvements to DSD balancing. 2014-08-27 12:23:31 -07:00
Alan Mishchenko 66d9a80b3d Adding commands to save/load best network. 2014-08-26 21:28:26 -07:00
Alan Mishchenko 5c30eb10ef Improving GIA interfaces for some procedures. 2014-08-25 17:33:53 -07:00
Alan Mishchenko 47dde4e478 Correcting incorrect handling of timing in several &-commands. 2014-08-25 16:55:39 -07:00
Alan Mishchenko cbbf78e6f4 Improving print-out of 'dsd -p'. 2014-08-22 22:18:38 -07:00
Alan Mishchenko c344f3e38c Propagating timing support to the new synthesis/mapping commands. 2014-08-20 22:12:51 -07:00
Alan Mishchenko 6dbaa4d0f8 Extended command &cone to extract timing critical cones. 2014-08-19 23:30:17 -07:00
Alan Mishchenko 3ef00645b8 Added command 'sparsify' to derive ISF from CSF. 2014-08-18 22:42:48 -07:00
Alan Mishchenko 65f9b73505 Changing default CNF generation in &bmc. 2014-08-18 20:19:32 -07:00
Alan Mishchenko 7c8136c82d Added DSD-based collapsing &dsd. 2014-08-16 18:38:34 -07:00
Alan Mishchenko 97e620a4b7 Adding specialized matching to 'if'. 2014-08-16 18:28:41 -07:00
Alan Mishchenko 06100279cd Added DSD-based collapsing &dsd. 2014-08-16 11:54:49 -07:00
Alan Mishchenko f907347484 Enabling circuit solver in &fraig. 2014-08-12 18:54:43 -07:00
Alan Mishchenko 9055265394 Bug fix in &fraig -L <num>. 2014-08-12 16:23:52 -07:00
Alan Mishchenko 99a917caf3 Bug fix in &fraig -L <num>. 2014-08-12 16:20:03 -07:00
Alan Mishchenko 68ce0bc1c1 Adding delay optimization to synthesis script &syn2. 2014-08-08 12:45:28 -07:00
Alan Mishchenko 35b816dd57 Enabling cofactoring in the mapper. 2014-08-06 14:18:20 -07:00
Alan Mishchenko 1d9d6814ee Enabling ISOP-based minimization in 'collapse' if EXDC is available. 2014-08-04 10:53:08 -07:00
Alan Mishchenko edba505d9d Profiling code for SOP/DSD/LMS balancing. 2014-08-02 17:01:48 -07:00
Alan Mishchenko 62bc45d1fb Changes to the hopelessly limited Verilog parser to skip one-bit bit-ranges, such as [7:7], which seems to help in some cases. 2014-08-02 17:00:24 -07:00
Alan Mishchenko 7fb1954268 Small changes. 2014-07-29 22:49:10 -07:00