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Major rehash of the CBA code.

This commit is contained in:
Alan Mishchenko 2015-01-31 19:52:32 -08:00
parent a523ab792c
commit 77dbe2b656
23 changed files with 3502 additions and 2825 deletions
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24
abclib.dsp
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@ -783,10 +783,6 @@ SOURCE=.\src\base\cba\cbaBlast.c
# End Source File
# Begin Source File
SOURCE=.\src\base\cba\cbaBuild.c
# End Source File
# Begin Source File
SOURCE=.\src\base\cba\cbaCom.c
# End Source File
# Begin Source File
@ -803,6 +799,22 @@ SOURCE=.\src\base\cba\cbaPrs.h
# End Source File
# Begin Source File
SOURCE=.\src\base\cba\cbaPrsBuild.c
# End Source File
# Begin Source File
SOURCE=.\src\base\cba\cbaPrsTrans.c
# End Source File
# Begin Source File
SOURCE=.\src\base\cba\cbaPtr.c
# End Source File
# Begin Source File
SOURCE=.\src\base\cba\cbaPtrAbc.c
# End Source File
# Begin Source File
SOURCE=.\src\base\cba\cbaReadBlif.c
# End Source File
# Begin Source File
@ -811,10 +823,6 @@ SOURCE=.\src\base\cba\cbaReadVer.c
# End Source File
# Begin Source File
SOURCE=.\src\base\cba\cbaSimple.c
# End Source File
# Begin Source File
SOURCE=.\src\base\cba\cbaWriteBlif.c
# End Source File
# Begin Source File

937
src/base/cba/cba.h
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File diff suppressed because it is too large Load Diff

376
src/base/cba/cbaBlast.c
View File

@ -4,9 +4,9 @@
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Verilog parser.]
PackageName [Hierarchical word-level netlist.]
Synopsis [Parses several flavors of word-level Verilog.]
Synopsis [Bit-blasting of the netlist.]
Author [Alan Mishchenko]
@ -49,14 +49,13 @@ void Cba_ManPrepareGates( Cba_Man_t * p )
Dec_Graph_t ** ppGraphs; int i;
if ( p->pMioLib == NULL )
return;
ppGraphs = ABC_ALLOC( Dec_Graph_t *, Abc_NamObjNumMax(p->pFuncs) );
ppGraphs[0] = NULL;
for ( i = 1; i < Abc_NamObjNumMax(p->pFuncs); i++ )
ppGraphs = ABC_CALLOC( Dec_Graph_t *, Abc_NamObjNumMax(p->pMods) );
for ( i = 1; i < Abc_NamObjNumMax(p->pMods); i++ )
{
char * pGateName = Abc_NamStr( p->pFuncs, i );
char * pGateName = Abc_NamStr( p->pMods, i );
Mio_Gate_t * pGate = Mio_LibraryReadGateByName( (Mio_Library_t *)p->pMioLib, pGateName, NULL );
char * pSop = Mio_GateReadSop( pGate );
ppGraphs[i] = Dec_Factor( pSop );
if ( pGate != NULL )
ppGraphs[i] = Dec_Factor( Mio_GateReadSop(pGate) );
}
assert( p->ppGraphs == NULL );
p->ppGraphs = (void **)ppGraphs;
@ -66,8 +65,9 @@ void Cba_ManUndoGates( Cba_Man_t * p )
int i;
if ( p->pMioLib == NULL )
return;
for ( i = 1; i < Abc_NamObjNumMax(p->pFuncs); i++ )
Dec_GraphFree( (Dec_Graph_t *)p->ppGraphs[i] );
for ( i = 1; i < Abc_NamObjNumMax(p->pMods); i++ )
if ( p->ppGraphs[i] )
Dec_GraphFree( (Dec_Graph_t *)p->ppGraphs[i] );
ABC_FREE( p->ppGraphs );
}
@ -106,88 +106,96 @@ int Cba_ManAddBarbuf( Gia_Man_t * pNew, int iRes, Cba_Man_t * p, int iLNtk, int
}
int Cba_ManExtract_rec( Gia_Man_t * pNew, Cba_Ntk_t * p, int i, int fBuffers, Vec_Int_t * vMap )
{
int iRes = Cba_NtkCopy( p, i );
int iRes = Cba_ObjCopy( p, i );
if ( iRes >= 0 )
return iRes;
if ( Cba_ObjIsCo(p, i) )
iRes = Cba_ManExtract_rec( pNew, p, Cba_ObjFanin0(p, i), fBuffers, vMap );
else if ( Cba_ObjIsBo(p, i) )
{
Cba_Ntk_t * pBox = Cba_ObjBoModel( p, i );
int iObj = Cba_NtkPo( pBox, Cba_ObjCioIndex(p, i) );
iRes = Cba_ManExtract_rec( pNew, pBox, iObj, fBuffers, vMap );
if ( fBuffers )
iRes = Cba_ManAddBarbuf( pNew, iRes, p->pDesign, Cba_NtkId(p), i, Cba_NtkId(pBox), iObj, vMap );
}
iRes = Cba_ManExtract_rec( pNew, p, Cba_ObjFanin(p, i), fBuffers, vMap );
else if ( Cba_ObjIsPi(p, i) )
{
Cba_Ntk_t * pHost = Cba_NtkHostNtk( p );
int iObj = Cba_ObjBoxBi( pHost, Cba_NtkHostObj(p), Cba_ObjCioIndex(p, i) );
int iObj = Cba_BoxBi( pHost, Cba_NtkHostObj(p), Cba_ObjIndex(p, i) );
iRes = Cba_ManExtract_rec( pNew, pHost, iObj, fBuffers, vMap );
if ( fBuffers )
iRes = Cba_ManAddBarbuf( pNew, iRes, p->pDesign, Cba_NtkId(p), i, Cba_NtkId(pHost), iObj, vMap );
}
else if ( Cba_ObjIsNode(p, i) && p->pDesign->ppGraphs )
else if ( Cba_ObjIsBo(p, i) )
{
extern int Gia_ManFactorGraph( Gia_Man_t * p, Dec_Graph_t * pFForm, Vec_Int_t * vLeaves );
Dec_Graph_t * pGraph = (Dec_Graph_t *)p->pDesign->ppGraphs[Cba_ObjFuncId(p, i)];
int k, pLits[32], * pFanins = Cba_ObjFaninArray(p, i);
Vec_Int_t Leaves = { pFanins[0], pFanins[0], pLits };
assert( pFanins[0] < 32 );
for ( k = 0; k < pFanins[0]; k++ )
pLits[k] = Cba_ManExtract_rec( pNew, p, pFanins[k+1], fBuffers, vMap );
return Gia_ManFactorGraph( pNew, pGraph, &Leaves );
}
else if ( Cba_ObjIsNode(p, i) )
{
int * pFanins = Cba_ObjFaninArray(p, i);
int k, pLits[3], Type = Cba_ObjNodeType(p, i);
assert( pFanins[0] <= 3 );
if ( pFanins[0] == 0 )
int iBox = Cba_BoxBoBox(p, i);
if ( Cba_ObjIsBoxUser(p, iBox) ) // user box
{
if ( Type == CBA_NODE_C0 )
iRes = 0;
else if ( Type == CBA_NODE_C1 )
iRes = 1;
else assert( 0 );
Cba_Ntk_t * pBox = Cba_BoxBoNtk( p, i );
int iObj = Cba_NtkPo( pBox, Cba_ObjIndex(p, i) );
iRes = Cba_ManExtract_rec( pNew, pBox, iObj, fBuffers, vMap );
if ( fBuffers )
iRes = Cba_ManAddBarbuf( pNew, iRes, p->pDesign, Cba_NtkId(p), i, Cba_NtkId(pBox), iObj, vMap );
}
else if ( pFanins[0] == 1 )
else // primitive
{
if ( Type == CBA_NODE_BUF )
iRes = Cba_ManExtract_rec( pNew, p, pFanins[1], fBuffers, vMap );
else if ( Type == CBA_NODE_INV )
iRes = Abc_LitNot( Cba_ManExtract_rec( pNew, p, pFanins[1], fBuffers, vMap ) );
else assert( 0 );
}
else
{
for ( k = 0; k < pFanins[0]; k++ )
pLits[k] = Cba_ManExtract_rec( pNew, p, pFanins[k+1], fBuffers, vMap );
if ( Type == CBA_NODE_AND )
iRes = Gia_ManHashAnd( pNew, pLits[0], pLits[1] );
else if ( Type == CBA_NODE_OR )
iRes = Gia_ManHashOr( pNew, pLits[0], pLits[1] );
else if ( Type == CBA_NODE_NOR )
iRes = Abc_LitNot( Gia_ManHashOr( pNew, pLits[0], pLits[1] ) );
else if ( Type == CBA_NODE_XOR )
iRes = Gia_ManHashXor( pNew, pLits[0], pLits[1] );
else if ( Type == CBA_NODE_XNOR )
iRes = Abc_LitNot( Gia_ManHashXor( pNew, pLits[0], pLits[1] ) );
else if ( Type == CBA_NODE_SHARP )
iRes = Gia_ManHashAnd( pNew, pLits[0], Abc_LitNot(pLits[1]) );
else assert( 0 );
int iFanin, nLits, pLits[16];
assert( Cba_ObjIsBoxPrim(p, iBox) );
Cba_BoxForEachFanin( p, iBox, iFanin, nLits )
pLits[nLits] = Cba_ManExtract_rec( pNew, p, iFanin, fBuffers, vMap );
assert( nLits <= 16 );
if ( p->pDesign->ppGraphs ) // mapped gate
{
extern int Gia_ManFactorGraph( Gia_Man_t * p, Dec_Graph_t * pFForm, Vec_Int_t * vLeaves );
Dec_Graph_t * pGraph = (Dec_Graph_t *)p->pDesign->ppGraphs[Cba_BoxNtkId(p, iBox)];
Vec_Int_t Leaves = { nLits, nLits, pLits };
assert( pGraph != NULL );
return Gia_ManFactorGraph( pNew, pGraph, &Leaves );
}
else
{
Cba_ObjType_t Type = Cba_ObjType(p, iBox);
if ( nLits == 0 )
{
if ( Type == CBA_BOX_C0 )
iRes = 0;
else if ( Type == CBA_BOX_C1 )
iRes = 1;
else assert( 0 );
}
else if ( nLits == 1 )
{
if ( Type == CBA_BOX_BUF )
iRes = pLits[0];
else if ( Type == CBA_BOX_INV )
iRes = Abc_LitNot( pLits[0] );
else assert( 0 );
}
else
{
assert( nLits == 2 );
if ( Type == CBA_BOX_AND )
iRes = Gia_ManHashAnd( pNew, pLits[0], pLits[1] );
else if ( Type == CBA_BOX_OR )
iRes = Gia_ManHashOr( pNew, pLits[0], pLits[1] );
else if ( Type == CBA_BOX_NOR )
iRes = Abc_LitNot( Gia_ManHashOr( pNew, pLits[0], pLits[1] ) );
else if ( Type == CBA_BOX_XOR )
iRes = Gia_ManHashXor( pNew, pLits[0], pLits[1] );
else if ( Type == CBA_BOX_XNOR )
iRes = Abc_LitNot( Gia_ManHashXor( pNew, pLits[0], pLits[1] ) );
else if ( Type == CBA_BOX_SHARP )
iRes = Gia_ManHashAnd( pNew, pLits[0], Abc_LitNot(pLits[1]) );
else assert( 0 );
}
//printf("%d input\n", nLits );
}
}
}
else assert( 0 );
Cba_NtkSetCopy( p, i, iRes );
Cba_ObjSetCopy( p, i, iRes );
return iRes;
}
Gia_Man_t * Cba_ManExtract( Cba_Man_t * p, int fBuffers, int fVerbose )
{
Cba_Ntk_t * pRoot = Cba_ManRoot(p);
Cba_Ntk_t * pNtk, * pRoot = Cba_ManRoot(p);
Gia_Man_t * pNew, * pTemp;
Vec_Int_t * vMap = NULL;
int i, iObj;
Vec_IntFreeP( &p->vBuf2LeafNtk );
Vec_IntFreeP( &p->vBuf2LeafObj );
Vec_IntFreeP( &p->vBuf2RootNtk );
@ -197,15 +205,17 @@ Gia_Man_t * Cba_ManExtract( Cba_Man_t * p, int fBuffers, int fVerbose )
p->vBuf2RootNtk = Vec_IntAlloc( 1000 );
p->vBuf2RootObj = Vec_IntAlloc( 1000 );
Cba_ManForEachNtk( p, pNtk, i )
Cba_NtkStartCopies(pNtk);
// start the manager
pNew = Gia_ManStart( Cba_ManObjNum(p) );
pNew = Gia_ManStart( Cba_ManNodeNum(p) );
pNew->pName = Abc_UtilStrsav(p->pName);
pNew->pSpec = Abc_UtilStrsav(p->pSpec);
Vec_IntFill( &p->vCopies, Cba_ManObjNum(p), -1 );
// primary inputs
Cba_NtkForEachPi( pRoot, iObj, i )
Cba_NtkSetCopy( pRoot, iObj, Gia_ManAppendCi(pNew) );
Cba_ObjSetCopy( pRoot, iObj, Gia_ManAppendCi(pNew) );
// internal nodes
Gia_ManHashAlloc( pNew );
@ -220,7 +230,7 @@ Gia_Man_t * Cba_ManExtract( Cba_Man_t * p, int fBuffers, int fVerbose )
// primary outputs
Cba_NtkForEachPo( pRoot, iObj, i )
Gia_ManAppendCo( pNew, Cba_NtkCopy(pRoot, iObj) );
Gia_ManAppendCo( pNew, Cba_ObjCopy(pRoot, iObj) );
assert( Vec_IntSize(p->vBuf2LeafNtk) == pNew->nBufs );
// cleanup
@ -232,7 +242,7 @@ Gia_Man_t * Cba_ManExtract( Cba_Man_t * p, int fBuffers, int fVerbose )
/**Function*************************************************************
Synopsis [Returns the number of objects in each network.]
Synopsis [Mark each GIA node with the network it belongs to.]
Description []
@ -241,51 +251,29 @@ Gia_Man_t * Cba_ManExtract( Cba_Man_t * p, int fBuffers, int fVerbose )
SeeAlso []
***********************************************************************/
Vec_Int_t * Cba_ManCountGia( Cba_Man_t * p, Gia_Man_t * pGia, int fAlwaysAdd )
void Cba_ManMarkNodesGia( Cba_Man_t * p, Gia_Man_t * pGia )
{
Cba_Ntk_t * pNtk;
Gia_Obj_t * pObj;
int i, iBox, Count = 0;
Vec_Int_t * vNtkSizes = Vec_IntStart( Cba_ManNtkNum(p) + 1 );
Vec_Int_t * vDrivenCos = Vec_IntStart( Cba_ManNtkNum(p) + 1 );
Gia_Obj_t * pObj; int i, Count = 0;
assert( Vec_IntSize(p->vBuf2LeafNtk) == Gia_ManBufNum(pGia) );
// assing for each GIA node, the network it belongs to and count nodes for all networks
Gia_ManConst0(pGia)->Value = 1;
Gia_ManConst0(pGia)->Value = 0;
Gia_ManForEachPi( pGia, pObj, i )
pObj->Value = 1;
pObj->Value = 0;
Gia_ManForEachAnd( pGia, pObj, i )
{
if ( Gia_ObjIsBuf(pObj) )
{
if ( Gia_ObjIsAnd(Gia_ObjFanin0(pObj)) )
Vec_IntAddToEntry( vDrivenCos, Gia_ObjFanin0(pObj)->Value, 1 );
pObj->Value = Vec_IntEntry( p->vBuf2LeafNtk, Count++ );
}
else
{
pObj->Value = Gia_ObjFanin0(pObj)->Value;
assert( pObj->Value == Gia_ObjFanin1(pObj)->Value );
Vec_IntAddToEntry( vNtkSizes, pObj->Value, 1 );
}
}
assert( Count == Gia_ManBufNum(pGia) );
Gia_ManForEachPo( pGia, pObj, i )
{
assert( Gia_ObjFanin0(pObj)->Value == 1 );
pObj->Value = Gia_ObjFanin0(pObj)->Value;
if ( Gia_ObjIsAnd(Gia_ObjFanin0(pObj)) )
Vec_IntAddToEntry( vDrivenCos, pObj->Value, 1 );
assert( Gia_ObjFanin0(pObj)->Value == 0 );
pObj->Value = 0;
}
// for each network, count the total number of COs
Cba_ManForEachNtk( p, pNtk, i )
{
Count = Cba_NtkPiNum(pNtk) + 2 * Cba_NtkPoNum(pNtk) - (fAlwaysAdd ? 0 : Vec_IntEntry(vDrivenCos, i));
Cba_NtkForEachBox( pNtk, iBox )
Count += Cba_ObjBoxSize(pNtk, iBox) + Cba_ObjBoxBiNum(pNtk, iBox);
Vec_IntAddToEntry( vNtkSizes, i, Count );
}
Vec_IntFree( vDrivenCos );
return vNtkSizes;
}
void Cba_ManRemapBarbufs( Cba_Man_t * pNew, Cba_Man_t * p )
{
@ -299,34 +287,41 @@ void Cba_ManRemapBarbufs( Cba_Man_t * pNew, Cba_Man_t * p )
Vec_IntForEachEntry( p->vBuf2LeafObj, Entry, i )
{
pNtk = Cba_ManNtk( p, Vec_IntEntry(p->vBuf2LeafNtk, i) );
Vec_IntWriteEntry( pNew->vBuf2LeafObj, i, Cba_NtkCopy(pNtk, Entry) );
Vec_IntWriteEntry( pNew->vBuf2LeafObj, i, Cba_ObjCopy(pNtk, Entry) );
}
Vec_IntForEachEntry( p->vBuf2RootObj, Entry, i )
{
pNtk = Cba_ManNtk( p, Vec_IntEntry(p->vBuf2RootNtk, i) );
Vec_IntWriteEntry( pNew->vBuf2RootObj, i, Cba_NtkCopy(pNtk, Entry) );
Vec_IntWriteEntry( pNew->vBuf2RootObj, i, Cba_ObjCopy(pNtk, Entry) );
}
}
void Cba_NtkCreateAndConnectBuffer( Gia_Man_t * pGia, Gia_Obj_t * pObj, Cba_Ntk_t * p, int iTerm )
{
Vec_IntWriteEntry( &p->vTypes, p->nObjs, CBA_OBJ_NODE );
int iObj;
// Vec_IntWriteEntry( &p->vTypes, p->nObjs, CBA_OBJ_NODE );
if ( pGia && Gia_ObjFaninId0p(pGia, pObj) > 0 )
{
Vec_IntWriteEntry( &p->vFuncs, p->nObjs, Gia_ObjFaninC0(pObj) ? CBA_NODE_INV : CBA_NODE_BUF );
Vec_IntWriteEntry( &p->vFanins, p->nObjs, Cba_ManHandleBuffer(p->pDesign, Gia_ObjFanin0(pObj)->Value) );
// Vec_IntWriteEntry( &p->vFuncs, p->nObjs, Gia_ObjFaninC0(pObj) ? CBA_BOX_INV : CBA_BOX_BUF );
// Vec_IntWriteEntry( &p->vFanins, p->nObjs, Cba_ManHandleBuffer(p->pDesign, Gia_ObjFanin0(pObj)->Value) );
iObj = Cba_ObjAlloc( p, CBA_OBJ_BI, 0, Gia_ObjFanin0(pObj)->Value );
Cba_ObjSetName( p, iObj, Cba_ObjName(p, Gia_ObjFanin0(pObj)->Value) );
Cba_ObjAlloc( p, Gia_ObjFaninC0(pObj) ? CBA_BOX_INV : CBA_BOX_BUF, -1, -1 );
}
else
{
Vec_IntWriteEntry( &p->vFuncs, p->nObjs, pGia && Gia_ObjFaninC0(pObj) ? CBA_NODE_C1 : CBA_NODE_C0 );
Vec_IntWriteEntry( &p->vFanins, p->nObjs, Cba_ManHandleBuffer(p->pDesign, -1) );
// Vec_IntWriteEntry( &p->vFuncs, p->nObjs, pGia && Gia_ObjFaninC0(pObj) ? CBA_BOX_C1 : CBA_BOX_C0 );
// Vec_IntWriteEntry( &p->vFanins, p->nObjs, Cba_ManHandleBuffer(p->pDesign, -1) );
Cba_ObjAlloc( p, pGia && Gia_ObjFaninC0(pObj) ? CBA_BOX_C1 : CBA_BOX_C0, -1, -1 );
}
Vec_IntWriteEntry( &p->vNameIds, p->nObjs, Cba_ObjNameId(p, iTerm) );
Vec_IntWriteEntry( &p->vFanins, iTerm, p->nObjs++ );
// Vec_IntWriteEntry( &p->vNameIds, p->nObjs, Cba_ObjNameId(p, iTerm) );
// Vec_IntWriteEntry( &p->vFanins, iTerm, p->nObjs++ );
iObj = Cba_ObjAlloc( p, CBA_OBJ_BO, 0, -1 );
Cba_ObjSetName( p, iObj, Cba_ObjName(p, iTerm) );
Cba_ObjSetFanin( p, iTerm, iObj );
}
void Cba_NtkInsertGia( Cba_Man_t * p, Gia_Man_t * pGia )
{
Cba_Ntk_t * pNtk, * pRoot = Cba_ManRoot( p );
Vec_Int_t * vTemp = Vec_IntAlloc( 100 );
int i, j, k, iBox, iTerm, Count = 0;
Gia_Obj_t * pObj;
@ -348,53 +343,58 @@ void Cba_NtkInsertGia( Cba_Man_t * p, Gia_Man_t * pGia )
{
int iLit0 = Gia_ObjFanin0(pObj)->Value;
int iLit1 = Gia_ObjFanin1(pObj)->Value;
Cba_NodeType_t Type;
Cba_ObjType_t Type;
pNtk = Cba_ManNtk( p, pObj->Value );
if ( Gia_ObjFaninC0(pObj) && Gia_ObjFaninC1(pObj) )
Type = CBA_NODE_NOR;
Type = CBA_BOX_NOR;
else if ( Gia_ObjFaninC1(pObj) )
Type = CBA_NODE_SHARP;
Type = CBA_BOX_SHARP;
else if ( Gia_ObjFaninC0(pObj) )
{
Type = CBA_NODE_SHARP;
Type = CBA_BOX_SHARP;
ABC_SWAP( int, iLit0, iLit1 );
}
else
Type = CBA_NODE_AND;
Type = CBA_BOX_AND;
// create box
/*
Vec_IntFillTwo( vTemp, 2, iLit0, iLit1 );
Vec_IntWriteEntry( &pNtk->vTypes, pNtk->nObjs, CBA_OBJ_NODE );
Vec_IntWriteEntry( &pNtk->vFuncs, pNtk->nObjs, Type );
Vec_IntWriteEntry( &pNtk->vFanins, pNtk->nObjs, Cba_ManHandleArray(p, vTemp) );
pObj->Value = pNtk->nObjs++;
pNtk->nObjs++;
*/
iTerm = Cba_ObjAlloc( pNtk, CBA_OBJ_BI, 1, iLit1 );
Cba_ObjSetName( pNtk, iTerm, Cba_ObjName(pNtk, iLit1) );
iTerm = Cba_ObjAlloc( pNtk, CBA_OBJ_BI, 0, iLit0 );
Cba_ObjSetName( pNtk, iTerm, Cba_ObjName(pNtk, iLit0) );
Cba_ObjAlloc( pNtk, Type, -1, -1 );
pObj->Value = Cba_ObjAlloc( pNtk, CBA_OBJ_BO, 0, -1 );
}
}
assert( Count == Gia_ManBufNum(pGia) );
Vec_IntFree( vTemp );
// create constant 0 drivers for COs without barbufs
Cba_ManForEachNtk( p, pNtk, i )
{
Cba_NtkForEachBox( pNtk, iBox )
Cba_BoxForEachBi( pNtk, iBox, iTerm, j )
if ( Cba_ObjFanin0(pNtk, iTerm) == -1 )
if ( Cba_ObjFanin(pNtk, iTerm) == -1 )
Cba_NtkCreateAndConnectBuffer( NULL, NULL, pNtk, iTerm );
Cba_NtkForEachPo( pNtk, iTerm, k )
if ( pNtk != pRoot && Cba_ObjFanin0(pNtk, iTerm) == -1 )
if ( pNtk != pRoot && Cba_ObjFanin(pNtk, iTerm) == -1 )
Cba_NtkCreateAndConnectBuffer( NULL, NULL, pNtk, iTerm );
}
// create node and connect POs
Gia_ManForEachPo( pGia, pObj, i )
Cba_NtkCreateAndConnectBuffer( pGia, pObj, pRoot, Cba_NtkPo(pRoot, i) );
Cba_ManForEachNtk( p, pNtk, i )
assert( Cba_NtkObjNum(pNtk) == pNtk->nObjs );
}
Cba_Man_t * Cba_ManInsertGia( Cba_Man_t * p, Gia_Man_t * pGia )
{
Vec_Int_t * vNtkSizes = Cba_ManCountGia( p, pGia, 1 );
Cba_Man_t * pNew = Cba_ManDupStart( p, vNtkSizes );
Cba_Man_t * pNew = Cba_ManDupUserBoxes( p );
Cba_ManMarkNodesGia( p, pGia );
Cba_ManRemapBarbufs( pNew, p );
Cba_NtkInsertGia( pNew, pGia );
Vec_IntFree( vNtkSizes );
return pNew;
}
@ -414,14 +414,12 @@ Cba_Man_t * Cba_ManBlastTest( Cba_Man_t * p )
Gia_Man_t * pGia = Cba_ManExtract( p, 1, 0 );
Cba_Man_t * pNew = Cba_ManInsertGia( p, pGia );
Gia_ManStop( pGia );
Cba_ManAssignInternNames( pNew );
return pNew;
}
/**Function*************************************************************
Synopsis []
Synopsis [Mark each GIA node with the network it belongs to.]
Description []
@ -432,79 +430,68 @@ Cba_Man_t * Cba_ManBlastTest( Cba_Man_t * p )
***********************************************************************/
static inline int Abc_NodeIsSeriousGate( Abc_Obj_t * p )
{
return (Abc_ObjIsNode(p) && (Abc_ObjFaninNum(p) > 0) && !Abc_ObjIsBarBuf(p));// || Abc_ObjIsPi(p);
return Abc_ObjIsNode(p) && Abc_ObjFaninNum(p) > 0 && !Abc_ObjIsBarBuf(p);
}
Vec_Int_t * Cba_ManCountAbc( Cba_Man_t * p, Abc_Ntk_t * pNtk, int fAlwaysAdd )
void Cba_ManMarkNodesAbc( Cba_Man_t * p, Abc_Ntk_t * pNtk )
{
Cba_Ntk_t * pCbaNtk;
Abc_Obj_t * pObj, * pFanin;
int i, k, iBox, Count = 0;
Vec_Int_t * vNtkSizes = Vec_IntStart( Cba_ManNtkNum(p) + 1 );
Vec_Int_t * vDrivenCos = Vec_IntStart( Cba_ManNtkNum(p) + 1 );
Abc_Obj_t * pObj, * pFanin; int i, k, Count = 0;
assert( Vec_IntSize(p->vBuf2LeafNtk) == pNtk->nBarBufs2 );
// assing for each GIA node, the network it belongs to and count nodes for all networks
Abc_NtkForEachPi( pNtk, pObj, i )
pObj->iTemp = 1;
pObj->iTemp = 0;
Abc_NtkForEachNode( pNtk, pObj, i )
{
if ( Abc_ObjIsBarBuf(pObj) )
{
if ( Abc_NodeIsSeriousGate(Abc_ObjFanin0(pObj)) )
Vec_IntAddToEntry( vDrivenCos, Abc_ObjFanin0(pObj)->iTemp, 1 );
pObj->iTemp = Vec_IntEntry( p->vBuf2LeafNtk, Count++ );
}
else if ( Abc_NodeIsSeriousGate(pObj) )
{
pObj->iTemp = Abc_ObjFanin0(pObj)->iTemp;
Abc_ObjForEachFanin( pObj, pFanin, k )
assert( pObj->iTemp == pFanin->iTemp );
Vec_IntAddToEntry( vNtkSizes, pObj->iTemp, 1 );
}
}
assert( Count == pNtk->nBarBufs2 );
Abc_NtkForEachPo( pNtk, pObj, i )
{
if ( !Abc_NodeIsSeriousGate(Abc_ObjFanin0(pObj)) )
continue;
assert( Abc_ObjFanin0(pObj)->iTemp == 1 );
assert( Abc_ObjFanin0(pObj)->iTemp == 0 );
pObj->iTemp = Abc_ObjFanin0(pObj)->iTemp;
Vec_IntAddToEntry( vDrivenCos, pObj->iTemp, 1 );
}
// for each network, count the total number of COs
Cba_ManForEachNtk( p, pCbaNtk, i )
{
Count = Cba_NtkPiNum(pCbaNtk) + 2 * Cba_NtkPoNum(pCbaNtk) - (fAlwaysAdd ? 0 : Vec_IntEntry(vDrivenCos, i));
Cba_NtkForEachBox( pCbaNtk, iBox )
Count += Cba_ObjBoxSize(pCbaNtk, iBox) + Cba_ObjBoxBiNum(pCbaNtk, iBox);
Vec_IntAddToEntry( vNtkSizes, i, Count );
}
Vec_IntFree( vDrivenCos );
return vNtkSizes;
assert( Count == pNtk->nBarBufs2 );
}
void Cba_NtkCreateOrConnectFanin( Abc_Ntk_t * pNtk, Abc_Obj_t * pFanin, Cba_Ntk_t * p, int iTerm )
void Cba_NtkCreateOrConnectFanin( Abc_Obj_t * pFanin, Cba_Ntk_t * p, int iTerm )
{
if ( pNtk && Abc_NodeIsSeriousGate(pFanin) )
int iObj;
if ( pFanin && Abc_NodeIsSeriousGate(pFanin) )
{
Vec_IntWriteEntry( &p->vNameIds, pFanin->iTemp, Cba_ObjNameId(p, iTerm) );
Vec_IntWriteEntry( &p->vFanins, iTerm, pFanin->iTemp );
// Vec_IntWriteEntry( &p->vNameIds, pFanin->iTemp, Cba_ObjNameId(p, iTerm) );
// Vec_IntWriteEntry( &p->vFanins, iTerm, pFanin->iTemp );
iObj = pFanin->iTemp;
}
else if ( pNtk && (Abc_ObjIsPi(pFanin) || Abc_ObjIsBarBuf(pFanin)) )
else if ( pFanin && (Abc_ObjIsPi(pFanin) || Abc_ObjIsBarBuf(pFanin)) )
{
Vec_IntWriteEntry( &p->vTypes, p->nObjs, CBA_OBJ_NODE );
Vec_IntWriteEntry( &p->vFuncs, p->nObjs, 3 ); // assuming elem gates are added first
Vec_IntWriteEntry( &p->vFanins, p->nObjs, Cba_ManHandleBuffer(p->pDesign, pFanin->iTemp) );
Vec_IntWriteEntry( &p->vNameIds, p->nObjs, Cba_ObjNameId(p, iTerm) );
Vec_IntWriteEntry( &p->vFanins, iTerm, p->nObjs++ );
// Vec_IntWriteEntry( &p->vTypes, p->nObjs, CBA_OBJ_NODE );
// Vec_IntWriteEntry( &p->vFuncs, p->nObjs, 3 ); // assuming elem gates are added first
// Vec_IntWriteEntry( &p->vFanins, p->nObjs, Cba_ManHandleBuffer(p->pDesign, pFanin->iTemp) );
// Vec_IntWriteEntry( &p->vNameIds, p->nObjs, Cba_ObjNameId(p, iTerm) );
// Vec_IntWriteEntry( &p->vFanins, iTerm, p->nObjs++ );
iObj = Cba_ObjAlloc( p, CBA_OBJ_BI, 0, pFanin->iTemp );
Cba_ObjSetName( p, iObj, Cba_ObjName(p, pFanin->iTemp) );
Cba_ObjAlloc( p, CBA_BOX_GATE, p->pDesign->ElemGates[2], -1 );
iObj = Cba_ObjAlloc( p, CBA_OBJ_BO, 0, -1 );
}
else
{
assert( !pFanin || Abc_NodeIsConst0(pFanin) || Abc_NodeIsConst1(pFanin) );
Vec_IntWriteEntry( &p->vTypes, p->nObjs, CBA_OBJ_NODE );
Vec_IntWriteEntry( &p->vFuncs, p->nObjs, pNtk && Abc_NodeIsConst1(pFanin) ? 2 : 1 ); // assuming elem gates are added first
Vec_IntWriteEntry( &p->vFanins, p->nObjs, Cba_ManHandleBuffer(p->pDesign, -1) );
Vec_IntWriteEntry( &p->vNameIds, p->nObjs, Cba_ObjNameId(p, iTerm) );
Vec_IntWriteEntry( &p->vFanins, iTerm, p->nObjs++ );
// Vec_IntWriteEntry( &p->vTypes, p->nObjs, CBA_OBJ_NODE );
// Vec_IntWriteEntry( &p->vFuncs, p->nObjs, pFanin && Abc_NodeIsConst1(pFanin) ? 2 : 1 ); // assuming elem gates are added first
// Vec_IntWriteEntry( &p->vFanins, p->nObjs, Cba_ManHandleBuffer(p->pDesign, -1) );
// Vec_IntWriteEntry( &p->vNameIds, p->nObjs, Cba_ObjNameId(p, iTerm) );
// Vec_IntWriteEntry( &p->vFanins, iTerm, p->nObjs++ );
Cba_ObjAlloc( p, CBA_BOX_GATE, p->pDesign->ElemGates[(pFanin && Abc_NodeIsConst1(pFanin))], -1 );
iObj = Cba_ObjAlloc( p, CBA_OBJ_BO, 0, -1 );
}
Cba_ObjSetName( p, iObj, Cba_ObjName(p, iTerm) );
Cba_ObjSetFanin( p, iTerm, iObj );
}
void Cba_NtkPrepareLibrary( Cba_Man_t * p, Mio_Library_t * pLib )
{
@ -517,22 +504,19 @@ void Cba_NtkPrepareLibrary( Cba_Man_t * p, Mio_Library_t * pLib )
printf( "The library does not have one of the elementary gates.\n" );
return;
}
assert( Abc_NamObjNumMax(p->pFuncs) == 1 );
Abc_NamStrFindOrAdd( p->pFuncs, Mio_GateReadName(pGate0), NULL );
Abc_NamStrFindOrAdd( p->pFuncs, Mio_GateReadName(pGate1), NULL );
Abc_NamStrFindOrAdd( p->pFuncs, Mio_GateReadName(pGate2), NULL );
assert( Abc_NamObjNumMax(p->pFuncs) == 4 );
p->ElemGates[0] = Abc_NamStrFindOrAdd( p->pMods, Mio_GateReadName(pGate0), NULL );
p->ElemGates[1] = Abc_NamStrFindOrAdd( p->pMods, Mio_GateReadName(pGate1), NULL );
p->ElemGates[2] = Abc_NamStrFindOrAdd( p->pMods, Mio_GateReadName(pGate2), NULL );
Mio_LibraryForEachGate( pLib, pGate )
if ( pGate != pGate0 && pGate != pGate1 && pGate != pGate2 )
Abc_NamStrFindOrAdd( p->pFuncs, Mio_GateReadName(pGate), NULL );
assert( Abc_NamObjNumMax(p->pFuncs) > 1 );
Abc_NamStrFindOrAdd( p->pMods, Mio_GateReadName(pGate), NULL );
assert( Abc_NamObjNumMax(p->pMods) > 1 );
}
void Cba_NtkInsertNtk( Cba_Man_t * p, Abc_Ntk_t * pNtk )
{
Cba_Ntk_t * pCbaNtk, * pRoot = Cba_ManRoot( p );
Vec_Int_t * vTemp = Vec_IntAlloc( 100 );
int i, j, k, iBox, iTerm, Count = 0;
Abc_Obj_t * pObj, * pFanin;
Abc_Obj_t * pObj;
assert( Abc_NtkHasMapping(pNtk) );
Cba_NtkPrepareLibrary( p, (Mio_Library_t *)pNtk->pManFunc );
p->pMioLib = pNtk->pManFunc;
@ -546,55 +530,59 @@ void Cba_NtkInsertNtk( Cba_Man_t * p, Abc_Ntk_t * pNtk )
pCbaNtk = Cba_ManNtk( p, Vec_IntEntry(p->vBuf2RootNtk, Count) );
iTerm = Vec_IntEntry( p->vBuf2RootObj, Count );
assert( Cba_ObjIsCo(pCbaNtk, iTerm) );
Cba_NtkCreateOrConnectFanin( pNtk, Abc_ObjFanin0(pObj), pCbaNtk, iTerm );
Cba_NtkCreateOrConnectFanin( Abc_ObjFanin0(pObj), pCbaNtk, iTerm );
// prepare leaf
pObj->iTemp = Vec_IntEntry( p->vBuf2LeafObj, Count++ );
}
else if ( Abc_NodeIsSeriousGate(pObj) )
{
/*
Vec_IntClear( vTemp );
Abc_ObjForEachFanin( pObj, pFanin, k )
Vec_IntPush( vTemp, pFanin->iTemp );
pCbaNtk = Cba_ManNtk( p, pObj->iTemp );
Vec_IntWriteEntry( &pCbaNtk->vTypes, pCbaNtk->nObjs, CBA_OBJ_NODE );
Vec_IntWriteEntry( &pCbaNtk->vFuncs, pCbaNtk->nObjs, Abc_NamStrFind(p->pFuncs, Mio_GateReadName((Mio_Gate_t *)pObj->pData)) );
Vec_IntWriteEntry( &pCbaNtk->vFuncs, pCbaNtk->nObjs, Abc_NamStrFind(p->pMods, Mio_GateReadName((Mio_Gate_t *)pObj->pData)) );
Vec_IntWriteEntry( &pCbaNtk->vFanins, pCbaNtk->nObjs, Cba_ManHandleArray(p, vTemp) );
pObj->iTemp = pCbaNtk->nObjs++;
*/
pCbaNtk = Cba_ManNtk( p, pObj->iTemp );
for ( k = Abc_ObjFaninNum(pObj)-1; k >= 0; k-- )
{
iTerm = Cba_ObjAlloc( pCbaNtk, CBA_OBJ_BI, k, Abc_ObjFanin(pObj, k)->iTemp );
Cba_ObjSetName( pCbaNtk, iTerm, Cba_ObjName(pCbaNtk, Abc_ObjFanin(pObj, k)->iTemp) );
}
Cba_ObjAlloc( pCbaNtk, CBA_BOX_GATE, Abc_NamStrFind(p->pMods, Mio_GateReadName((Mio_Gate_t *)pObj->pData)), -1 );
pObj->iTemp = Cba_ObjAlloc( pCbaNtk, CBA_OBJ_BO, 0, -1 );
}
}
assert( Count == pNtk->nBarBufs2 );
Vec_IntFree( vTemp );
// create constant 0 drivers for COs without barbufs
Cba_ManForEachNtk( p, pCbaNtk, i )
{
Cba_NtkForEachBox( pCbaNtk, iBox )
Cba_BoxForEachBi( pCbaNtk, iBox, iTerm, j )
if ( Cba_ObjFanin0(pCbaNtk, iTerm) == -1 )
Cba_NtkCreateOrConnectFanin( NULL, NULL, pCbaNtk, iTerm );
if ( Cba_ObjFanin(pCbaNtk, iTerm) == -1 )
Cba_NtkCreateOrConnectFanin( NULL, pCbaNtk, iTerm );
Cba_NtkForEachPo( pCbaNtk, iTerm, k )
if ( pCbaNtk != pRoot && Cba_ObjFanin0(pCbaNtk, iTerm) == -1 )
Cba_NtkCreateOrConnectFanin( NULL, NULL, pCbaNtk, iTerm );
if ( pCbaNtk != pRoot && Cba_ObjFanin(pCbaNtk, iTerm) == -1 )
Cba_NtkCreateOrConnectFanin( NULL, pCbaNtk, iTerm );
}
// create node and connect POs
Abc_NtkForEachPo( pNtk, pObj, i )
Cba_NtkCreateOrConnectFanin( pNtk, Abc_ObjFanin0(pObj), pRoot, Cba_NtkPo(pRoot, i) );
Cba_ManForEachNtk( p, pCbaNtk, i )
assert( Cba_NtkObjNum(pCbaNtk) == pCbaNtk->nObjs );
Cba_NtkCreateOrConnectFanin( Abc_ObjFanin0(pObj), pRoot, Cba_NtkPo(pRoot, i) );
}
void * Cba_ManInsertAbc( Cba_Man_t * p, void * pAbc )
{
Abc_Ntk_t * pNtk = (Abc_Ntk_t *)pAbc;
Vec_Int_t * vNtkSizes = Cba_ManCountAbc( p, pNtk, 0 );
Cba_Man_t * pNew = Cba_ManDupStart( p, vNtkSizes );
Cba_Man_t * pNew = Cba_ManDupUserBoxes( p );
Cba_ManMarkNodesAbc( p, pNtk );
Cba_ManRemapBarbufs( pNew, p );
Cba_NtkInsertNtk( pNew, pNtk );
Vec_IntFree( vNtkSizes );
return pNew;
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////

336
src/base/cba/cbaBuild.c
View File

@ -1,336 +0,0 @@
/**CFile****************************************************************
FileName [cbaBuild.c]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Verilog parser.]
Synopsis [Parses several flavors of word-level Verilog.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - November 29, 2014.]
Revision [$Id: cbaBuild.c,v 1.00 2014/11/29 00:00:00 alanmi Exp $]
***********************************************************************/
#include "cba.h"
ABC_NAMESPACE_IMPL_START
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
// replaces NameIds of formal names by their index in the box model
void Cba_BoxRemap( Cba_Ntk_t * pNtk, int iBox, Vec_Int_t * vMap )
{
Cba_Ntk_t * pBoxModel = Cba_ObjBoxModel( pNtk, iBox );
Vec_Int_t * vFanins = Cba_ObjFaninVec( pNtk, iBox );
int i, NameId;
// map formal names into I/O indexes
Cba_NtkForEachPi( pBoxModel, NameId, i )
{
assert( Vec_IntEntry(vMap, NameId) == -1 );
Vec_IntWriteEntry( vMap, NameId, i );
}
Cba_NtkForEachPo( pBoxModel, NameId, i )
{
assert( Vec_IntEntry(vMap, NameId) == -1 );
Vec_IntWriteEntry( vMap, NameId, Cba_NtkPiNum(pBoxModel) + i );
}
// remap box
assert( Vec_IntSize(vFanins) % 2 == 0 );
Vec_IntForEachEntry( vFanins, NameId, i )
{
assert( Vec_IntEntry(vMap, NameId) != -1 );
Vec_IntWriteEntry( vFanins, i++, Vec_IntEntry(vMap, NameId) );
}
// unmap formal inputs
Cba_NtkForEachPi( pBoxModel, NameId, i )
Vec_IntWriteEntry( vMap, NameId, -1 );
Cba_NtkForEachPo( pBoxModel, NameId, i )
Vec_IntWriteEntry( vMap, NameId, -1 );
}
void Cba_NtkRemapBoxes( Cba_Ntk_t * pNtk, Vec_Int_t * vMap )
{
int iBox;
Cba_NtkForEachBox( pNtk, iBox )
Cba_BoxRemap( pNtk, iBox, vMap );
}
// create maps of NameId and boxes
void Cba_NtkFindNonDriven( Cba_Ntk_t * pNtk, Vec_Int_t * vMap, int nObjCount, Vec_Int_t * vNonDriven )
{
int i, iObj, Type, NameId, Index;
// consider input node names
Vec_IntClear( vNonDriven );
Cba_NtkForEachObjType( pNtk, Type, iObj )
{
if ( Type == CBA_OBJ_NODE )
{
Vec_Int_t * vFanins = Cba_ObjFaninVec( pNtk, iObj );
Vec_IntForEachEntryStart( vFanins, NameId, i, 1 )
if ( Vec_IntEntry(vMap, NameId) == -1 )
Vec_IntWriteEntry( vMap, NameId, nObjCount++ ), Vec_IntPush(vNonDriven, NameId);
}
else if ( Type == CBA_OBJ_BOX )
{
Cba_Ntk_t * pNtkBox = Cba_ObjBoxModel( pNtk, iObj );
Vec_Int_t * vFanins = Cba_ObjFaninVec( pNtk, iObj );
Vec_IntForEachEntry( vFanins, Index, i )
{
i++;
if ( Index >= Cba_NtkPiNum(pNtkBox) )
continue;
NameId = Vec_IntEntry( vFanins, i );
if ( Vec_IntEntry(vMap, NameId) == -1 )
Vec_IntWriteEntry( vMap, NameId, nObjCount++ ), Vec_IntPush(vNonDriven, NameId);
}
}
}
Cba_NtkForEachPo( pNtk, NameId, i )
if ( Vec_IntEntry(vMap, NameId) == -1 )
Vec_IntWriteEntry( vMap, NameId, nObjCount++ ), Vec_IntPush(vNonDriven, NameId);
if ( Vec_IntSize(vNonDriven) > 0 )
printf( "Module %s has %d non-driven nets (for example, %s).\n", Cba_NtkName(pNtk), Vec_IntSize(vNonDriven), Cba_NtkStr(pNtk, Vec_IntEntry(vNonDriven, 0)) );
}
int Cba_NtkCreateMap( Cba_Ntk_t * pNtk, Vec_Int_t * vMap, Vec_Int_t * vBoxes, Vec_Int_t * vNonDriven )
{
int i, iObj, Type, Index, NameId;
int nObjCount = 0;
// map old name IDs into new object IDs
Vec_IntClear( vBoxes );
Cba_NtkForEachPi( pNtk, NameId, i )
{
if ( Vec_IntEntry(vMap, NameId) != -1 )
printf( "Primary inputs %d and %d have the same name.\n", Vec_IntEntry(vMap, NameId), i );
Vec_IntWriteEntry( vMap, NameId, nObjCount++ );
}
Cba_NtkForEachObjType( pNtk, Type, iObj )
{
if ( Type == CBA_OBJ_NODE )
{
// consider node output name
Vec_Int_t * vFanins = Cba_ObjFaninVec( pNtk, iObj );
NameId = Vec_IntEntry( vFanins, 0 );
if ( Vec_IntEntry(vMap, NameId) != -1 )
printf( "Node output name %d is already driven.\n", NameId );
Vec_IntWriteEntry( vMap, NameId, nObjCount++ );
}
else if ( Type == CBA_OBJ_BOX )
{
Vec_Int_t * vFanins = Cba_ObjFaninVec( pNtk, iObj );
Cba_Ntk_t * pNtkBox = Cba_ObjBoxModel( pNtk, iObj );
nObjCount += Cba_NtkPiNum(pNtkBox);
Vec_IntPush( vBoxes, nObjCount++ );
Vec_IntForEachEntry( vFanins, Index, i )
{
i++;
if ( Index < Cba_NtkPiNum(pNtkBox) )
continue;
assert( Index - Cba_NtkPiNum(pNtkBox) < Cba_NtkPoNum(pNtkBox) );
// consider box output name
NameId = Vec_IntEntry( vFanins, i );
if ( Vec_IntEntry(vMap, NameId) != -1 )
printf( "Box output name %d is already driven.\n", NameId );
Vec_IntWriteEntry( vMap, NameId, nObjCount + Index - Cba_NtkPiNum(pNtkBox) );
}
nObjCount += Cba_NtkPoNum(pNtkBox);
}
}
Cba_NtkFindNonDriven( pNtk, vMap, nObjCount, vNonDriven );
nObjCount += Vec_IntSize(vNonDriven) + Cba_NtkPoNum(pNtk);
return nObjCount;
}
Cba_Ntk_t * Cba_NtkBuild( Cba_Man_t * pNew, Cba_Ntk_t * pNtk, Vec_Int_t * vMap, Vec_Int_t * vBoxes, Vec_Int_t * vNonDriven, Vec_Int_t * vTemp, int nObjCount )
{
Vec_Int_t * vFanins;
Cba_Ntk_t * pNtkNew, * pNtkBox;
int i, iObj, ObjId, FaninId, Type, Index, NameId, nBoxes = 0;
// start network
pNtkNew = Cba_ManNtk( pNew, Cba_NtkId(pNtk) );
Cba_NtkResize( pNtkNew, nObjCount );
// fill object information
Cba_NtkForEachPi( pNtk, NameId, i )
{
ObjId = Vec_IntEntry( vMap, NameId );
Vec_IntWriteEntry( &pNtkNew->vInputs, i, ObjId );
Vec_IntWriteEntry( &pNtkNew->vTypes, ObjId, CBA_OBJ_PI );
Vec_IntWriteEntry( &pNtkNew->vFuncs, ObjId, i );
Vec_IntWriteEntry( &pNtkNew->vNameIds, ObjId, NameId );
}
Cba_NtkForEachObjType( pNtk, Type, iObj )
{
vFanins = Cba_ObjFaninVec( pNtk, iObj );
if ( Type == CBA_OBJ_NODE )
{
ObjId = Vec_IntEntry( vMap, Vec_IntEntry(vFanins, 0) );
Vec_IntClear( vTemp );
Vec_IntForEachEntryStart( vFanins, NameId, i, 1 )
{
assert( Vec_IntEntry(vMap, NameId) != -1 );
Vec_IntPush( vTemp, Vec_IntEntry(vMap, NameId) );
}
Vec_IntWriteEntry( &pNtkNew->vTypes, ObjId, CBA_OBJ_NODE );
Vec_IntWriteEntry( &pNtkNew->vFuncs, ObjId, Cba_ObjFuncId(pNtk, iObj) );
Vec_IntWriteEntry( &pNtkNew->vFanins, ObjId, Cba_ManHandleArray(pNew, vTemp) );
Vec_IntWriteEntry( &pNtkNew->vNameIds, ObjId, Vec_IntEntry(vFanins, 0) );
}
else if ( Type == CBA_OBJ_BOX )
{
ObjId = Vec_IntEntry( vBoxes, nBoxes++ );
pNtkBox = Cba_ObjBoxModel( pNtk, iObj );
// collect fanins
Vec_IntFill( vTemp, Cba_NtkPiNum(pNtkBox), -1 );
Vec_IntForEachEntry( vFanins, Index, i )
{
i++; NameId = Vec_IntEntry( vFanins, i );
assert( Vec_IntEntry(vMap, NameId) != -1 );
if ( Index < Cba_NtkPiNum(pNtkBox) )
{
Vec_IntWriteEntry( vTemp, Index, Vec_IntEntry(vMap, NameId) );
Vec_IntWriteEntry( &pNtkNew->vNameIds, ObjId - Cba_NtkPiNum(pNtkBox) + Index, NameId );
}
else
{
assert( Vec_IntEntry(vMap, NameId) == ObjId + 1 + Index - Cba_NtkPiNum(pNtkBox) );
Vec_IntWriteEntry( &pNtkNew->vNameIds, Vec_IntEntry(vMap, NameId), NameId );
}
}
Vec_IntForEachEntry( vTemp, Index, i )
assert( Index >= 0 );
// create box
Vec_IntWriteEntry( &pNtkNew->vTypes, ObjId, CBA_OBJ_BOX );
Vec_IntWriteEntry( &pNtkNew->vFuncs, ObjId, Cba_ManNtkId(pNew, Cba_NtkName(pNtkBox)) );
Cba_NtkSetHost( Cba_ObjBoxModel(pNtkNew, ObjId), Cba_NtkId(pNtkNew), ObjId );
// create box inputs
Cba_BoxForEachBi( pNtkNew, ObjId, FaninId, i )
{
Vec_IntWriteEntry( &pNtkNew->vTypes, FaninId, CBA_OBJ_BI );
Vec_IntWriteEntry( &pNtkNew->vFuncs, FaninId, i );
Vec_IntWriteEntry( &pNtkNew->vFanins, FaninId, Vec_IntEntry(vTemp, i) );
}
// create box outputs
Cba_BoxForEachBo( pNtkNew, ObjId, FaninId, i )
{
Vec_IntWriteEntry( &pNtkNew->vTypes, FaninId, CBA_OBJ_BO );
Vec_IntWriteEntry( &pNtkNew->vFuncs, FaninId, i );
Vec_IntWriteEntry( &pNtkNew->vFanins, FaninId, ObjId );
}
}
}
assert( nBoxes == Vec_IntSize(vBoxes) );
// add constants for nondriven nodes
Vec_IntForEachEntry( vNonDriven, NameId, i )
{
ObjId = Vec_IntEntry( vMap, NameId );
Vec_IntWriteEntry( &pNtkNew->vOutputs, i, ObjId );
Vec_IntWriteEntry( &pNtkNew->vTypes, ObjId, CBA_OBJ_NODE );
Vec_IntWriteEntry( &pNtkNew->vFuncs, ObjId, CBA_NODE_C0 );
Vec_IntWriteEntry( &pNtkNew->vFanins, ObjId, Cba_ManHandleBuffer(pNew, -1) );
Vec_IntWriteEntry( &pNtkNew->vNameIds, ObjId, NameId );
}
// add PO nodes
Cba_NtkForEachPo( pNtk, NameId, i )
{
ObjId = nObjCount - Cba_NtkPoNum(pNtk) + i;
FaninId = Vec_IntEntry( vMap, NameId );
assert( FaninId != -1 );
Vec_IntWriteEntry( &pNtkNew->vOutputs, i, ObjId );
Vec_IntWriteEntry( &pNtkNew->vTypes, ObjId, CBA_OBJ_PO );
Vec_IntWriteEntry( &pNtkNew->vFuncs, ObjId, i );
Vec_IntWriteEntry( &pNtkNew->vFanins, ObjId, FaninId );
// remove NameId from the driver and assign it to the output
//Vec_IntWriteEntry( &pNtkNew->vNameIds, FaninId, -1 );
Vec_IntWriteEntry( &pNtkNew->vNameIds, ObjId, NameId );
}
return pNtkNew;
}
void Cba_NtkCleanMap( Cba_Ntk_t * pNtk, Vec_Int_t * vMap )
{
Vec_Int_t * vFanins;
int i, iObj, Type, NameId;
Cba_NtkForEachPi( pNtk, NameId, i )
Vec_IntWriteEntry( vMap, NameId, -1 );
Cba_NtkForEachObjType( pNtk, Type, iObj )
{
vFanins = Cba_ObjFaninVec( pNtk, iObj );
if ( Type == CBA_OBJ_NODE )
{
Vec_IntForEachEntry( vFanins, NameId, i )
Vec_IntWriteEntry( vMap, NameId, -1 );
}
else if ( Type == CBA_OBJ_BOX )
{
Vec_IntForEachEntry( vFanins, NameId, i )
Vec_IntWriteEntry( vMap, Vec_IntEntry(vFanins, ++i), -1 );
}
}
Cba_NtkForEachPo( pNtk, NameId, i )
Vec_IntWriteEntry( vMap, NameId, -1 );
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Cba_Man_t * Cba_ManBuild( Cba_Man_t * p )
{
Cba_Man_t * pNew = Cba_ManClone( p );
Vec_Int_t * vMap = Vec_IntStartFull( Abc_NamObjNumMax(p->pNames) + 1 );
Vec_Int_t * vBoxes = Vec_IntAlloc( 1000 );
Vec_Int_t * vNonDr = Vec_IntAlloc( 1000 );
Vec_Int_t * vTemp = Vec_IntAlloc( 1000 );
Cba_Ntk_t * pNtk;
int i, nObjs;
assert( Abc_NamObjNumMax(p->pModels) == Cba_ManNtkNum(p) + 1 );
Cba_ManForEachNtk( p, pNtk, i )
{
Cba_NtkRemapBoxes( pNtk, vMap );
nObjs = Cba_NtkCreateMap( pNtk, vMap, vBoxes, vNonDr );
Cba_NtkBuild( pNew, pNtk, vMap, vBoxes, vNonDr, vTemp, nObjs );
Cba_NtkCleanMap( pNtk, vMap );
}
assert( Vec_IntCountEntry(vMap, -1) == Vec_IntSize(vMap) );
Vec_IntFree( vMap );
Vec_IntFree( vBoxes );
Vec_IntFree( vNonDr );
Vec_IntFree( vTemp );
return pNew;
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
ABC_NAMESPACE_IMPL_END

149
src/base/cba/cbaCom.c
View File

@ -4,9 +4,9 @@
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Verilog parser.]
PackageName [Hierarchical word-level netlist.]
Synopsis [Parses several flavors of word-level Verilog.]
Synopsis [Command handlers.]
Author [Alan Mishchenko]
@ -33,6 +33,7 @@ static int Cba_CommandWrite ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Cba_CommandPs ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Cba_CommandPut ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Cba_CommandGet ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Cba_CommandClp ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Cba_CommandCec ( Abc_Frame_t * pAbc, int argc, char ** argv );
static int Cba_CommandTest ( Abc_Frame_t * pAbc, int argc, char ** argv );
@ -44,6 +45,48 @@ static inline void Cba_AbcUpdateMan( Abc_Frame_t * pAbc, Cba_Man_t * p )
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function********************************************************************
Synopsis [Accessing current Cba_Ntk_t.]
Description []
SideEffects []
SeeAlso []
******************************************************************************/
void Abc_FrameImportDes( Vec_Ptr_t * vDes )
{
Cba_Man_t * p;
if ( Abc_FrameGetGlobalFrame() == NULL )
{
printf( "ABC framework is not started.\n" );
return;
}
p = Cba_PtrTransformToCba( vDes );
if ( p == NULL )
printf( "Converting from Ptr failed.\n" );
Cba_AbcUpdateMan( Abc_FrameGetGlobalFrame(), p );
}
Vec_Ptr_t * Abc_FrameExportDes()
{
Vec_Ptr_t * vDes;
Cba_Man_t * p;
if ( Abc_FrameGetGlobalFrame() == NULL )
{
printf( "ABC framework is not started.\n" );
return NULL;
}
p = Cba_AbcGetMan( Abc_FrameGetGlobalFrame() );
if ( p == NULL )
printf( "There is no CBA design present.\n" );
vDes = Cba_PtrDeriveFromCba( p );
if ( vDes == NULL )
printf( "Converting to Ptr has failed.\n" );
return vDes;
}
/**Function********************************************************************
Synopsis []
@ -62,6 +105,7 @@ void Cba_Init( Abc_Frame_t * pAbc )
Cmd_CommandAdd( pAbc, "New word level", "@ps", Cba_CommandPs, 0 );
Cmd_CommandAdd( pAbc, "New word level", "@put", Cba_CommandPut, 0 );
Cmd_CommandAdd( pAbc, "New word level", "@get", Cba_CommandGet, 0 );
Cmd_CommandAdd( pAbc, "New word level", "@clp", Cba_CommandClp, 0 );
Cmd_CommandAdd( pAbc, "New word level", "@cec", Cba_CommandCec, 0 );
Cmd_CommandAdd( pAbc, "New word level", "@test", Cba_CommandTest, 0 );
}
@ -97,7 +141,8 @@ void Cba_End( Abc_Frame_t * pAbc )
int Cba_CommandRead( Abc_Frame_t * pAbc, int argc, char ** argv )
{
FILE * pFile;
Cba_Man_t * p = NULL, * pTemp;
Cba_Man_t * p = NULL;
Vec_Ptr_t * vDes = NULL;
char * pFileName = NULL;
int c, fUseAbc = 0, fVerbose = 0;
Extra_UtilGetoptReset();
@ -133,26 +178,34 @@ int Cba_CommandRead( Abc_Frame_t * pAbc, int argc, char ** argv )
return 0;
}
fclose( pFile );
// perform reading
if ( fUseAbc )
{
extern Vec_Ptr_t * Ptr_AbcDeriveDes( Abc_Ntk_t * pNtk );
Abc_Ntk_t * pAbcNtk = Io_ReadNetlist( pFileName, Io_ReadFileType(pFileName), 0 );
Vec_Ptr_t * vDes = Ptr_AbcDeriveDes( pAbcNtk );
p = Cba_PrsReadPtr( vDes );
ABC_FREE( p->pSpec );
p->pSpec = Abc_UtilStrsav( pAbcNtk->pSpec );
p = Cba_PtrTransformToCba( vDes );
Cba_PtrFree( vDes ); // points to names in pAbcNtk
if ( p )
{
ABC_FREE( p->pSpec );
p->pSpec = Abc_UtilStrsav( pAbcNtk->pSpec );
}
Abc_NtkDelete( pAbcNtk );
Ptr_ManFreeDes( vDes ); // points to names in pAbcNtk
}
else if ( !strcmp( Extra_FileNameExtension(pFileName), "blif" ) )
p = Cba_PrsReadBlif( pFileName );
{
vDes = Prs_ManReadBlif( pFileName );
p = Prs_ManBuildCba( pFileName, vDes );
Prs_ManVecFree( vDes );
}
else if ( !strcmp( Extra_FileNameExtension(pFileName), "v" ) )
p = Cba_PrsReadVerilog( pFileName, 1 );
{
vDes = Prs_ManReadVerilog( pFileName );
p = Prs_ManBuildCba( pFileName, vDes );
Prs_ManVecFree( vDes );
}
else assert( 0 );
p = Cba_ManBuild( pTemp = p );
Cba_ManFree( pTemp );
Cba_AbcUpdateMan( pAbc, p );
return 0;
usage:
@ -336,7 +389,7 @@ usage:
******************************************************************************/
int Cba_CommandGet( Abc_Frame_t * pAbc, int argc, char ** argv )
{
Cba_Man_t * pNew, * p = Cba_AbcGetMan(pAbc);
Cba_Man_t * pNew = NULL, * p = Cba_AbcGetMan(pAbc);
int c, fMapped = 0, fVerbose = 0;
Extra_UtilGetoptReset();
while ( ( c = Extra_UtilGetopt( argc, argv, "mvh" ) ) != EOF )
@ -389,6 +442,51 @@ usage:
return 1;
}
/**Function********************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
******************************************************************************/
int Cba_CommandClp( Abc_Frame_t * pAbc, int argc, char ** argv )
{
Cba_Man_t * pNew = NULL, * p = Cba_AbcGetMan(pAbc);
int c, fVerbose = 0;
Extra_UtilGetoptReset();
while ( ( c = Extra_UtilGetopt( argc, argv, "vh" ) ) != EOF )
{
switch ( c )
{
case 'v':
fVerbose ^= 1;
break;
case 'h':
goto usage;
default:
goto usage;
}
}
if ( p == NULL )
{
Abc_Print( 1, "Cba_CommandGet(): There is no current design.\n" );
return 0;
}
pNew = Cba_ManDup( p );
Cba_AbcUpdateMan( pAbc, pNew );
return 0;
usage:
Abc_Print( -2, "usage: @clp [-vh]\n" );
Abc_Print( -2, "\t collapses the current hierarchical design\n" );
Abc_Print( -2, "\t-v : toggle printing verbose information [default = %s]\n", fVerbose? "yes": "no" );
Abc_Print( -2, "\t-h : print the command usage\n");
return 1;
}
/**Function********************************************************************
Synopsis []
@ -402,9 +500,10 @@ usage:
******************************************************************************/
int Cba_CommandCec( Abc_Frame_t * pAbc, int argc, char ** argv )
{
Cba_Man_t * pTemp, * p = Cba_AbcGetMan(pAbc);
Cec_ParCec_t ParsCec, * pPars = &ParsCec;
Cba_Man_t * p = Cba_AbcGetMan(pAbc);
Gia_Man_t * pFirst, * pSecond, * pMiter;
Cec_ParCec_t ParsCec, * pPars = &ParsCec;
Vec_Ptr_t * vDes;
char * FileName, * pStr, ** pArgvNew;
int c, nArgcNew, fDumpMiter = 0, fVerbose = 0;
FILE * pFile;
@ -454,6 +553,7 @@ int Cba_CommandCec( Abc_Frame_t * pAbc, int argc, char ** argv )
return 1;
}
fclose( pFile );
// extract AIG from the current design
pFirst = Cba_ManExtract( p, 0, 0 );
if ( pFirst == NULL )
@ -463,12 +563,12 @@ int Cba_CommandCec( Abc_Frame_t * pAbc, int argc, char ** argv )
}
// extract AIG from the second design
if ( !strcmp( Extra_FileNameExtension(FileName), "blif" ) )
p = Cba_PrsReadBlif( FileName );
vDes = Prs_ManReadBlif( FileName );
else if ( !strcmp( Extra_FileNameExtension(FileName), "v" ) )
p = Cba_PrsReadVerilog( FileName, 1 );
vDes = Prs_ManReadVerilog( FileName );
else assert( 0 );
p = Cba_ManBuild( pTemp = p );
Cba_ManFree( pTemp );
p = Prs_ManBuildCba( FileName, vDes );
Prs_ManVecFree( vDes );
pSecond = Cba_ManExtract( p, 0, 0 );
Cba_ManFree( p );
if ( pSecond == NULL )
@ -495,7 +595,7 @@ int Cba_CommandCec( Abc_Frame_t * pAbc, int argc, char ** argv )
return 0;
usage:
Abc_Print( -2, "usage: @cec [-vh]\n" );
Abc_Print( -2, "\t combinational equivalence checking for the hierarchical design\n" );
Abc_Print( -2, "\t combinational equivalence checking\n" );
Abc_Print( -2, "\t-v : toggle printing verbose information [default = %s]\n", fVerbose? "yes": "no" );
Abc_Print( -2, "\t-h : print the command usage\n");
return 1;
@ -514,7 +614,9 @@ usage:
******************************************************************************/
int Cba_CommandTest( Abc_Frame_t * pAbc, int argc, char ** argv )
{
extern void Cba_PrsReadVerilogTest( char * pFileName );
extern void Prs_ManReadBlifTest();
extern void Prs_ManReadVerilogTest();
Cba_Man_t * p = Cba_AbcGetMan(pAbc);
int c, fVerbose = 0;
Extra_UtilGetoptReset();
while ( ( c = Extra_UtilGetopt( argc, argv, "vh" ) ) != EOF )
@ -531,13 +633,14 @@ int Cba_CommandTest( Abc_Frame_t * pAbc, int argc, char ** argv )
}
}
/*
if ( pNtk == NULL )
if ( p == NULL )
{
Abc_Print( 1, "Cba_CommandTest(): There is no current design.\n" );
return 0;
}
*/
Cba_PrsReadVerilogTest( NULL );
//Cba_PtrTransformTestTest();
Prs_ManReadVerilogTest();
return 0;
usage:
Abc_Print( -2, "usage: @test [-vh]\n" );

4
src/base/cba/cbaLib.c
View File

@ -4,9 +4,9 @@
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Verilog parser.]
PackageName [Hierarchical word-level netlist.]
Synopsis [Parses several flavors of word-level Verilog.]
Synopsis [Library procedures.]
Author [Alan Mishchenko]

322
src/base/cba/cbaNtk.c
View File

@ -4,9 +4,9 @@
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Verilog parser.]
PackageName [Hierarchical word-level netlist.]
Synopsis [Parses several flavors of word-level Verilog.]
Synopsis [Netlist manipulation.]
Author [Alan Mishchenko]
@ -43,18 +43,52 @@ ABC_NAMESPACE_IMPL_START
***********************************************************************/
void Cba_ManAssignInternNamesNtk( Cba_Ntk_t * p )
{
int i, NameId;
char Buffer[100];
int i, iObj, iTerm, NameId, fFound, nNameLess = 0;
int nDigits = Abc_Base10Log( Cba_NtkObjNum(p) );
Cba_NtkForEachNode( p, i )
// PI/PO should have NameId
Cba_NtkForEachPi( p, iObj, i )
assert( Cba_ObjName(p, iObj) );
Cba_NtkForEachPo( p, iObj, i )
assert( Cba_ObjName(p, iObj) );
// user BI/BO should have NameId
Cba_NtkForEachBoxUser( p, iObj )
{
if ( Cba_ObjNameId(p, i) == -1 )
{
char Buffer[100];
sprintf( Buffer, "%s%0*d", "_n_", nDigits, i );
NameId = Abc_NamStrFindOrAdd( p->pDesign->pNames, Buffer, NULL );
Vec_IntWriteEntry( &p->vNameIds, i, NameId );
}
Cba_BoxForEachBi( p, iObj, iTerm, i )
assert( Cba_ObjName(p, iTerm) );
Cba_BoxForEachBo( p, iObj, iTerm, i )
assert( Cba_ObjName(p, iTerm) );
}
// check missing IDs
Cba_NtkForEachBoxPrim( p, iObj )
{
Cba_BoxForEachBi( p, iObj, iTerm, i )
nNameLess += !Cba_ObjName(p, iTerm);
Cba_BoxForEachBo( p, iObj, iTerm, i )
nNameLess += !Cba_ObjName(p, iTerm);
}
if ( !nNameLess )
return;
// create names for prim BO
Cba_NtkForEachBoxPrim( p, iObj )
Cba_BoxForEachBo( p, iObj, iTerm, i )
{
if ( Cba_ObjName(p, iTerm) )
continue;
sprintf( Buffer, "%s%0*d", "_n_", nDigits, iTerm );
NameId = Abc_NamStrFindOrAdd( p->pDesign->pStrs, Buffer, &fFound );
assert( !fFound );
Cba_ObjSetName( p, iTerm, NameId );
}
// transfer names for prim BI
Cba_NtkForEachBoxPrim( p, iObj )
Cba_BoxForEachBi( p, iObj, iTerm, i )
{
if ( Cba_ObjName(p, iTerm) )
continue;
assert( Cba_ObjName(p, Cba_ObjFanin(p, iTerm)) );
Cba_ObjSetName( p, iTerm, Cba_ObjName(p, Cba_ObjFanin(p, iTerm)) );
}
}
void Cba_ManAssignInternNames( Cba_Man_t * p )
{
@ -63,9 +97,10 @@ void Cba_ManAssignInternNames( Cba_Man_t * p )
Cba_ManAssignInternNamesNtk( pNtk );
}
/**Function*************************************************************
Synopsis []
Synopsis [Count number of objects after collapsing.]
Description []
@ -74,21 +109,26 @@ void Cba_ManAssignInternNames( Cba_Man_t * p )
SeeAlso []
***********************************************************************/
int Cba_ManObjNum( Cba_Man_t * p )
int Cba_ManClpObjNum_rec( Cba_Ntk_t * p )
{
Cba_Ntk_t * pNtk;
int i, Count = 0;
int i, Counter = 0;
if ( p->Count >= 0 )
return p->Count;
Cba_NtkForEachBox( p, i )
Counter += Cba_ObjIsBoxUser(p, i) ? Cba_ManClpObjNum_rec( Cba_BoxNtk(p, i) ) : Cba_BoxSize(p, i);
return (p->Count = Counter);
}
int Cba_ManClpObjNum( Cba_Man_t * p )
{
Cba_Ntk_t * pNtk; int i;
Cba_ManForEachNtk( p, pNtk, i )
{
pNtk->iObjStart = Count;
Count += Cba_NtkObjNum(pNtk);
}
return Count;
pNtk->Count = -1;
return Cba_NtkPioNum( Cba_ManRoot(p) ) + Cba_ManClpObjNum_rec( Cba_ManRoot(p) );
}
/**Function*************************************************************
Synopsis []
Synopsis [Collects boxes in the DFS order.]
Description []
@ -97,56 +137,37 @@ int Cba_ManObjNum( Cba_Man_t * p )
SeeAlso []
***********************************************************************/
// duplicate PI/PO/boxes
void Cba_ObjDupStart( Cba_Ntk_t * pNew, Cba_Ntk_t * p, int iObj )
void Cba_NtkDfs_rec( Cba_Ntk_t * p, int iObj, Vec_Int_t * vBoxes )
{
if ( Cba_ObjIsPi(p, iObj) )
Vec_IntWriteEntry( &pNew->vInputs, Cba_ObjFuncId(p, iObj), pNew->nObjs );
if ( Cba_ObjIsPo(p, iObj) )
Vec_IntWriteEntry( &pNew->vOutputs, Cba_ObjFuncId(p, iObj), pNew->nObjs );
Vec_IntWriteEntry( &pNew->vTypes, pNew->nObjs, Cba_ObjType(p, iObj) );
Vec_IntWriteEntry( &pNew->vFuncs, pNew->nObjs, Cba_ObjFuncId(p, iObj) );
Vec_IntWriteEntry( &pNew->vNameIds, pNew->nObjs, Cba_ObjNameId(p, iObj) );
if ( Cba_ObjIsBox(p, iObj) )
Cba_NtkSetHost( Cba_ObjBoxModel(pNew, pNew->nObjs), Cba_NtkId(pNew), pNew->nObjs );
Cba_NtkSetCopy( p, iObj, pNew->nObjs++ );
int k, iFanin;
if ( Cba_ObjIsBo(p, iObj) == 1 )
{
Cba_NtkDfs_rec( p, Cba_ObjFanin(p, iObj), vBoxes );
return;
}
assert( Cba_ObjIsPi(p, iObj) || Cba_ObjIsBox(p, iObj) );
if ( Cba_ObjCopy(p, iObj) > 0 ) // visited
return;
Cba_ObjSetCopy( p, iObj, 1 );
Cba_BoxForEachFanin( p, iObj, iFanin, k )
Cba_NtkDfs_rec( p, iFanin, vBoxes );
Vec_IntPush( vBoxes, iObj );
}
void Cba_NtkDupStart( Cba_Ntk_t * pNew, Cba_Ntk_t * p )
Vec_Int_t * Cba_NtkDfs( Cba_Ntk_t * p )
{
int i, iObj, iTerm;
pNew->nObjs = 0;
int i, iObj;
Vec_Int_t * vBoxes = Vec_IntAlloc( Cba_NtkBoxNum(p) );
Cba_NtkStartCopies( p ); // -1 = not visited; 1 = finished
Cba_NtkForEachPi( p, iObj, i )
Cba_ObjDupStart( pNew, p, iObj );
Cba_ObjSetCopy( p, iObj, 1 );
Cba_NtkForEachPo( p, iObj, i )
Cba_ObjDupStart( pNew, p, iObj );
Cba_NtkForEachBox( p, iObj )
{
Cba_BoxForEachBi( p, iObj, iTerm, i )
Cba_ObjDupStart( pNew, p, iTerm );
Cba_ObjDupStart( pNew, p, iObj );
Cba_BoxForEachBo( p, iObj, iTerm, i )
Cba_ObjDupStart( pNew, p, iTerm );
// connect box outputs to boxes
Cba_BoxForEachBo( p, iObj, iTerm, i )
Vec_IntWriteEntry( &pNew->vFanins, Cba_NtkCopy(p, iTerm), Cba_NtkCopy(p, Cba_ObjFanin0(p, iTerm)) );
}
assert( Cba_NtkBoxNum(p) == Cba_NtkBoxNum(pNew) );
}
Cba_Man_t * Cba_ManDupStart( Cba_Man_t * p, Vec_Int_t * vNtkSizes )
{
Cba_Ntk_t * pNtk; int i;
Cba_Man_t * pNew = Cba_ManClone( p );
Cba_ManForEachNtk( p, pNtk, i )
Cba_NtkResize( Cba_ManNtk(pNew, i), vNtkSizes ? Vec_IntEntry(vNtkSizes, i) : Cba_NtkObjNum(pNtk) );
Vec_IntFill( &p->vCopies, Cba_ManObjNum(p), -1 );
Cba_ManForEachNtk( p, pNtk, i )
Cba_NtkDupStart( Cba_ManNtk(pNew, i), pNtk );
return pNew;
Cba_NtkDfs_rec( p, Cba_ObjFanin(p, iObj), vBoxes );
return vBoxes;
}
/**Function*************************************************************
Synopsis []
Synopsis [Collects user boxes in the DFS order.]
Description []
@ -155,77 +176,36 @@ Cba_Man_t * Cba_ManDupStart( Cba_Man_t * p, Vec_Int_t * vNtkSizes )
SeeAlso []
***********************************************************************/
// duplicate internal nodes
void Cba_NtkDupNodes( Cba_Ntk_t * pNew, Cba_Ntk_t * p, Vec_Int_t * vTemp )
int Cba_NtkDfsUserBoxes_rec( Cba_Ntk_t * p, int iObj, Vec_Int_t * vBoxes )
{
Vec_Int_t * vFanins;
int i, k, Type, iTerm, iObj;
// dup nodes
Cba_NtkForEachNode( p, iObj )
Cba_ObjDupStart( pNew, p, iObj );
assert( pNew->nObjs == Cba_NtkObjNum(pNew) );
// connect
Cba_NtkForEachObjType( p, Type, i )
{
if ( Type == CBA_OBJ_PI || Type == CBA_OBJ_BOX || Type == CBA_OBJ_BO )
continue;
if ( Type == CBA_OBJ_PO || Type == CBA_OBJ_BI )
int k, iFanin;
assert( Cba_ObjIsBoxUser(p, iObj) );
if ( Cba_ObjCopy(p, iObj) == 1 ) // visited
return 1;
if ( Cba_ObjCopy(p, iObj) == 0 ) // loop
return 0;
Cba_ObjSetCopy( p, iObj, 0 );
Cba_BoxForEachFanin( p, iObj, iFanin, k )
if ( Cba_ObjIsBo(p, iFanin) && Cba_ObjIsBoxUser(p, Cba_ObjFanin(p, iFanin)) )
if ( !Cba_NtkDfsUserBoxes_rec( p, Cba_ObjFanin(p, iFanin), vBoxes ) )
return 0;
Vec_IntPush( vBoxes, iObj );
Cba_ObjSetCopy( p, iObj, 1 );
return 1;
}
int Cba_NtkDfsUserBoxes( Cba_Ntk_t * p )
{
int iObj;
Cba_NtkStartCopies( p ); // -1 = not visited; 0 = on the path; 1 = finished
Vec_IntClear( &p->vArray );
Cba_NtkForEachBoxUser( p, iObj )
if ( !Cba_NtkDfsUserBoxes_rec( p, iObj, &p->vArray ) )
{
assert( Vec_IntEntry(&pNew->vFanins, Cba_NtkCopy(p, i)) == -1 );
Vec_IntWriteEntry( &pNew->vFanins, Cba_NtkCopy(p, i), Cba_NtkCopy(p, Cba_ObjFanin0(p, i)) );
continue;
printf( "Cyclic dependency of user boxes is detected.\n" );
return 0;
}
assert( Type == CBA_OBJ_NODE );
Vec_IntClear( vTemp );
vFanins = Cba_ObjFaninVec( p, i );
Vec_IntForEachEntry( vFanins, iTerm, k )
Vec_IntPush( vTemp, Cba_NtkCopy(p, iTerm) );
Vec_IntWriteEntry( &pNew->vFanins, Cba_NtkCopy(p, i), Cba_ManHandleArray(pNew->pDesign, vTemp) );
}
return 1;
}
Cba_Man_t * Cba_ManDup( Cba_Man_t * p )
{
Cba_Ntk_t * pNtk; int i;
Vec_Int_t * vTemp = Vec_IntAlloc( 100 );
Cba_Man_t * pNew = Cba_ManDupStart( p, NULL );
Cba_ManForEachNtk( p, pNtk, i )
Cba_NtkDupNodes( Cba_ManNtk(pNew, i), pNtk, vTemp );
Vec_IntFree( vTemp );
return pNew;
}
#if 0
/**Function*************************************************************
Synopsis [Count the number of objects.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Cba_NtkCountObj_rec( Cba_Ntk_t * p )
{
int iObj, Count = 0;
if ( p->nObjsRec >= 0 )
return p->nObjsRec;
Cba_NtkForEachBox( p, iObj )
Count += Cba_BoxIsPrim(p, iObj) ? 1 : Cba_NtkCountObj_rec( Cba_ObjBoxModel(p, iObj) );
return Count;
}
int Cba_ManCountObj( Cba_Man_t * p )
{
Cba_Ntk_t * pNtk; int i;
Cba_ManForEachNtk( p, pNtk, i )
pNtk->nObjsRec = -1;
return Cba_NtkCountObj_rec( Cba_ManRoot(p) );
}
/**Function*************************************************************
@ -241,54 +221,68 @@ int Cba_ManCountObj( Cba_Man_t * p )
void Cba_NtkCollapse_rec( Cba_Ntk_t * pNew, Cba_Ntk_t * p, Vec_Int_t * vSigs )
{
int i, k, iObj, iTerm;
Cba_NtkStartCopies( p );
// set PI copies
Cba_NtkCleanCopies( p );
assert( Vec_IntSize(vSigs) == Cba_NtkPiNum(p) );
Cba_NtkForEachPi( pRoot, iObj, i )
Cba_ObjSetCopy( pRoot, iObj, Vec_IntEntry(vSigs, i) );
Cba_NtkForEachPi( p, iObj, i )
Cba_ObjSetCopy( p, iObj, Vec_IntEntry(vSigs, i) );
// duplicate internal objects
Cba_ManForEachBox( p, iObj )
if ( Cba_BoxIsPrim(p, iObj) )
Cba_NtkForEachBox( p, iObj )
if ( Cba_ObjIsBoxPrim(p, iObj) )
Cba_BoxDup( pNew, p, iObj );
// duplicate other modules
Cba_ManForEachBox( p, iObj )
if ( !Cba_BoxIsPrim(p, iObj) )
{
Vec_IntClear( vSigs );
Cba_BoxForEachBi( iObj, iTerm, k )
Vec_IntPush( vSigs, Cba_ObjCopy(p, Cba_ObjFanin(p, iTerm)) );
Cba_NtkCollapse_rec( pNew, Cba_ObjBoxModel(p, iObj), vSigs );
Cba_BoxForEachBo( iObj, iTerm, k )
Cba_ObjAddFanin( pNew, Cba_ObjCopy(p, iObj), Vec_IntEntry(vSigs, k) );
}
// duplicate user moduled in DFS order
Vec_IntForEachEntry( &p->vArray, iObj, i )
{
assert( Cba_ObjIsBoxUser(p, iObj) );
Vec_IntClear( vSigs );
Cba_BoxForEachBi( p, iObj, iTerm, k )
Vec_IntPush( vSigs, Cba_ObjCopy(p, Cba_ObjFanin(p, iTerm)) );
Cba_NtkCollapse_rec( pNew, Cba_BoxNtk(p, iObj), vSigs );
assert( Vec_IntSize(vSigs) == Cba_BoxBoNum(p, iObj) );
Cba_BoxForEachBo( p, iObj, iTerm, k )
Cba_ObjSetCopy( p, iTerm, Vec_IntEntry(vSigs, k) );
}
// connect objects
Cba_ManForEachObj( p, iObj )
if ( Cba_ObjType(p, iObj) == CBA_OBJ_BI || Cba_ObjType(p, iObj) == CBA_OBJ_BO )
Cba_ObjAddFanin( pNew, Cba_ObjCopy(p, iObj), Cba_ObjCopy(p, Cba_ObjFanin(p, iObj)) );
Cba_NtkForEachBi( p, iObj )
Cba_ObjSetFanin( pNew, Cba_ObjCopy(p, iObj), Cba_ObjCopy(p, Cba_ObjFanin(p, iObj)) );
// collect POs
Vec_IntClear( vSigs );
Cba_NtkForEachPi( pRoot, iObj, i )
Cba_NtkForEachPo( p, iObj, i )
Vec_IntPush( vSigs, Cba_ObjCopy(p, Cba_ObjFanin(p, iObj)) );
}
Cba_Man_t * Cba_ManCollapseInt( Cba_Man_t * p )
{
int i, iObj;
Vec_Int_t * vSigs = Vec_IntAlloc( 1000 );
Cba_Man_t * pNew = Cba_ManStart( p, 1 );
Cba_Ntk_t * pRoot = Cba_ManRoot( p );
Cba_Ntk_t * pRootNew = Cba_ManRoot( pNew );
Cba_NtkAlloc( pRootNew, Cba_NtkNameId(pRoot), Cba_NtkPiNum(pRoot), Cba_NtkPoNum(pRoot), Cba_ManClpObjNum(p) );
Cba_NtkForEachPi( pRoot, iObj, i )
Vec_IntPush( vSigs, Cba_ObjAlloc(pRootNew, CBA_OBJ_PI, i, -1) );
Cba_NtkCollapse_rec( pRootNew, pRoot, vSigs );
assert( Vec_IntSize(vSigs) == Cba_NtkPoNum(pRoot) );
Cba_NtkForEachPo( pRoot, iObj, i )
Cba_ObjAlloc( pRootNew, CBA_OBJ_PO, i, Vec_IntEntry(vSigs, i) );
assert( Cba_NtkObjNum(pRootNew) == Cba_NtkAllocNum(pRootNew) );
Vec_IntFree( vSigs );
// transfer PI/PO names
Cba_NtkStartNames( pRootNew );
Cba_NtkForEachPo( pRoot, iObj, i )
Cba_ObjSetName( pRootNew, Cba_NtkPo(pRootNew, i), Cba_ObjName(pRoot, iObj) );
Cba_NtkForEachPo( pRoot, iObj, i )
Cba_ObjSetName( pRootNew, Cba_NtkPo(pRootNew, i), Cba_ObjName(pRoot, iObj) );
return pNew;
}
Cba_Man_t * Cba_ManCollapse( Cba_Man_t * p )
{
Cba_Man_t * pNew = Cba_ManAlloc( NULL, Cba_ManName(p) );
Cba_Ntk_t * pRootNew = Cba_NtkAlloc( pNew, Cba_NtkName(pRoot) );
int i, iObj;
Vec_Int_t * vSigs = Vec_IntAlloc( 1000 );
Cba_Ntk_t * pRoot = Cba_ManRoot( p );
Cba_NtkForEachPi( pRoot, iObj, i )
Vec_IntPush( vSigns, Cba_ObjDup(pRootNew, pRoot, iObj) );
Cba_NtkCollapse_rec( pRootNew, pRoot, vSigns );
assert( Vec_IntSize(vSigns) == Cba_NtkPoNum(pRoot) );
Cba_NtkForEachPo( pRoot, iObj, i )
Cba_ObjAddFanin( pRootNew, Cba_ObjDup(pRootNew, pRoot, iObj), Vec_IntEntry(vSigns, i) );
Vec_IntFree( vSigs );
return pNew;
Cba_Ntk_t * pNtk; int i;
Cba_ManForEachNtk( p, pNtk, i )
if ( !Cba_NtkDfsUserBoxes(pNtk) )
return NULL;
return Cba_ManCollapseInt( p );
}
#endif
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////

346
src/base/cba/cbaPrs.h
View File

@ -4,9 +4,9 @@
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Verilog parser.]
PackageName [Hierarchical word-level netlist.]
Synopsis [External declarations.]
Synopsis [Parser declarations.]
Author [Alan Mishchenko]
@ -26,76 +26,67 @@
/// INCLUDES ///
////////////////////////////////////////////////////////////////////////
#include "aig/gia/gia.h"
#include "misc/util/utilNam.h"
////////////////////////////////////////////////////////////////////////
/// PARAMETERS ///
////////////////////////////////////////////////////////////////////////
ABC_NAMESPACE_HEADER_START
/*
// parser objects (object types after parsing)
// parser name types
typedef enum {
CBA_PRS_NONE = 0, // 0: unused
CBA_PRS_NODE, // 1: .names/assign/box2 (box without formal/actual binding)
CBA_PRS_BOX, // 2: .subckt/.gate/box (box with formal/actual binding)
CBA_PRS_LATCH, // 3: .latch
CBA_PRS_CONCAT, // 4: concatenation
CBA_PRS_UNKNOWN // 5: unknown
} Cba_PrsType_t;
*/
CBA_PRS_NAME = 0, // 0: name/variable
CBA_PRS_SLICE, // 1: slice
CBA_PRS_CONST, // 2: constant
CBA_PRS_CONCAT, // 3: concatentation
} Prs_ManType_t;
////////////////////////////////////////////////////////////////////////
/// BASIC TYPES ///
////////////////////////////////////////////////////////////////////////
// network
typedef struct Cba_Prn_t_ Cba_Prn_t;
struct Cba_Prn_t_
typedef struct Prs_Ntk_t_ Prs_Ntk_t;
struct Prs_Ntk_t_
{
// general info
int iModuleName;
unsigned fMapped : 1;
unsigned fSlices : 1;
Abc_Nam_t * pStrs;
// interface
Vec_Int_t vOrder;
Vec_Int_t vOrder; // order of signals
// signal names
Vec_Int_t vInouts; // inouts
Vec_Int_t vInputs; // inputs
Vec_Int_t vOutputs; // outputs
Vec_Int_t vWires; // wires
Vec_Int_t vInouts; // inouts
Vec_Int_t vInputs; // inputs
Vec_Int_t vOutputs; // outputs
Vec_Int_t vWires; // wires
// signal ranges
Vec_Int_t vInoutsR; // inouts
Vec_Int_t vInputsR; // inputs
Vec_Int_t vOutputsR; // outputs
Vec_Int_t vWiresR; // wires
// objects
Vec_Int_t vObjBegs; // object beginnings
Vec_Int_t vObjects; // object data (ModuleId; InstId; FormNameId/ActNameId/ActRange)
// concatenations
Vec_Int_t vConBegs; // concatenation beginnings
Vec_Int_t vConcats; // concatenation data
Vec_Int_t vInoutsR; // inouts
Vec_Int_t vInputsR; // inputs
Vec_Int_t vOutputsR; // outputs
Vec_Int_t vWiresR; // wires
// slices/concatenations/objects
Vec_Int_t vSlices; // NameId + RangeId
Vec_Int_t vConcats; // array of NameId/SliceId/ConstId
Vec_Int_t vBoxes; // ModuleId + InstId + array of pairs {FormNameId, ActSignalId(NameId/SliceId/ConstId/ConcatId)}
Vec_Int_t vObjs; // box handles
};
// parser
typedef struct Cba_Prs_t_ Cba_Prs_t;
struct Cba_Prs_t_
typedef struct Prs_Man_t_ Prs_Man_t;
struct Prs_Man_t_
{
// input data
char * pName; // file name
char * pBuffer; // file contents
char * pLimit; // end of file
char * pCur; // current position
// construction
Cba_Man_t * pLibrary;
Cba_Man_t * pDesign;
// interface collected by the parser
int iModuleName; // name Id
Vec_Int_t vInoutsCur; // inouts
Vec_Int_t vInputsCur; // inputs
Vec_Int_t vOutputsCur; // outputs
Vec_Int_t vWiresCur; // wires
// objects collected by the parser
Vec_Int_t vTypesCur; // Cba_PrsType_t
Vec_Int_t vFuncsCur; // functions (node->func; box->module; gate->cell; latch->init; concat->unused)
Vec_Int_t vFaninsCur; // instances
Vec_Int_t vInstIdsCur; // instance names
Abc_Nam_t * pStrs; // string manager
Prs_Ntk_t * pNtk; // current network
Vec_Ptr_t * vNtks; // input networks
// temporary data
Vec_Str_t vCover; // one SOP cover
Vec_Int_t vTemp; // array of tokens
@ -105,30 +96,70 @@ struct Cba_Prs_t_
Vec_Int_t vFailed;
Vec_Int_t vSucceeded;
// error handling
int fUsingTemp2; // vTemp2 is in use
char ErrorStr[1000]; // error
};
#define Cba_PrsForEachModelVec( vVec, p, pName, i ) \
for ( i = 0; (i < Vec_IntSize(vVec)) && ((pName) = Abc_NamStr(p->pDesign->pNames, Vec_IntEntry(vVec,i))); i++ )
static inline Prs_Ntk_t * Prs_ManNtk( Vec_Ptr_t * vPrs, int i ) { return (Prs_Ntk_t *)Vec_PtrEntry(vPrs, i); }
static inline Prs_Ntk_t * Prs_ManRoot( Vec_Ptr_t * vPrs ) { return Prs_ManNtk(vPrs, 0); }
static inline int Prs_NtkId( Prs_Ntk_t * p ) { return p->iModuleName; }
static inline int Prs_NtkPioNum( Prs_Ntk_t * p ) { return Vec_IntSize(&p->vInouts); }
static inline int Prs_NtkPiNum( Prs_Ntk_t * p ) { return Vec_IntSize(&p->vInputs); }
static inline int Prs_NtkPoNum( Prs_Ntk_t * p ) { return Vec_IntSize(&p->vOutputs); }
static inline int Prs_NtkBoxNum( Prs_Ntk_t * p ) { return Vec_IntSize(&p->vObjs); }
static inline int Prs_NtkObjNum( Prs_Ntk_t * p ) { return Prs_NtkPioNum(p) + Prs_NtkPiNum(p) + Prs_NtkPoNum(p) + Prs_NtkBoxNum(p); }
static inline char * Prs_NtkStr( Prs_Ntk_t * p, int h ) { return Abc_NamStr(p->pStrs, h); }
static inline char * Prs_NtkName( Prs_Ntk_t * p ) { return Prs_NtkStr(p, Prs_NtkId(p)); }
static inline int Prs_NtkSigName( Prs_Ntk_t * p, int i ) { if (!p->fSlices) return i; assert(Abc_Lit2Att2(i) == CBA_PRS_NAME); return Abc_Lit2Var2(i); }
static inline int Prs_SliceName( Prs_Ntk_t * p, int h ) { return Vec_IntEntry(&p->vSlices, h); }
static inline int Prs_SliceRange( Prs_Ntk_t * p, int h ) { return Vec_IntEntry(&p->vSlices, h+1); }
static inline int Prs_CatSize( Prs_Ntk_t * p, int h ) { return Vec_IntEntry(&p->vConcats, h); }
static inline int * Prs_CatArray( Prs_Ntk_t * p, int h ) { return Vec_IntEntryP(&p->vConcats, h+1); }
static inline Vec_Int_t * Prs_CatSignals( Prs_Ntk_t * p, int h ) { static Vec_Int_t V; V.nSize = V.nCap = Prs_CatSize(p, h); V.pArray = Prs_CatArray(p, h); return &V; }
static inline int Prs_BoxHand( Prs_Ntk_t * p, int i ) { return Vec_IntEntry(&p->vObjs, i); }
static inline int Prs_BoxSize( Prs_Ntk_t * p, int i ) { return Vec_IntEntry(&p->vBoxes, Prs_BoxHand(p, i))-2; }
static inline int Prs_BoxIONum( Prs_Ntk_t * p, int i ) { return Prs_BoxSize(p, i) / 2; }
static inline int Prs_BoxNtk( Prs_Ntk_t * p, int i ) { return Vec_IntEntry(&p->vBoxes, Prs_BoxHand(p, i)+1); }
static inline void Prs_BoxSetNtk( Prs_Ntk_t * p, int i, int m ) { Vec_IntWriteEntry(&p->vBoxes, Prs_BoxHand(p, i)+1, m); }
static inline int Prs_BoxName( Prs_Ntk_t * p, int i ) { return Vec_IntEntry(&p->vBoxes, Prs_BoxHand(p, i)+2); }
static inline int Prs_BoxIsNode( Prs_Ntk_t * p, int i ) { return!Vec_IntEntry(&p->vBoxes, Prs_BoxHand(p, i)+3); } // no formal names
static inline int * Prs_BoxArray( Prs_Ntk_t * p, int i ) { return Vec_IntEntryP(&p->vBoxes, Prs_BoxHand(p, i)+3); }
static inline Vec_Int_t * Prs_BoxSignals( Prs_Ntk_t * p, int i ) { static Vec_Int_t V; V.nSize = V.nCap = Prs_BoxSize(p, i); V.pArray = Prs_BoxArray(p, i); return &V; }
#define Prs_ManForEachNameVec( vVec, p, pName, i ) \
for ( i = 0; (i < Vec_IntSize(vVec)) && ((pName) = Abc_NamStr(p->pStrs, Vec_IntEntry(vVec,i))); i++ )
#define Prs_NtkForEachPio( p, NameId, i ) \
for ( i = 0; i < Prs_NtkPioNum(p) && ((NameId) = Vec_IntEntry(&p->vInouts, i)); i++ )
#define Prs_NtkForEachPi( p, NameId, i ) \
for ( i = 0; i < Prs_NtkPiNum(p) && ((NameId) = Vec_IntEntry(&p->vInputs, i)); i++ )
#define Prs_NtkForEachPo( p, NameId, i ) \
for ( i = 0; i < Prs_NtkPoNum(p) && ((NameId) = Vec_IntEntry(&p->vOutputs, i)); i++ )
#define Prs_NtkForEachBox( p, vVec, i ) \
for ( i = 0; i < Prs_NtkBoxNum(p) && ((vVec) = Prs_BoxSignals(p, i)); i++ )
////////////////////////////////////////////////////////////////////////
/// MACRO DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
// create error message
static inline int Cba_PrsErrorSet( Cba_Prs_t * p, char * pError, int Value )
static inline int Prs_ManErrorSet( Prs_Man_t * p, char * pError, int Value )
{
assert( !p->ErrorStr[0] );
sprintf( p->ErrorStr, "%s", pError );
return Value;
}
// clear error message
static inline void Cba_PrsErrorClear( Cba_Prs_t * p )
static inline void Prs_ManErrorClear( Prs_Man_t * p )
{
p->ErrorStr[0] = '\0';
}
// print error message
static inline int Cba_PrsErrorPrint( Cba_Prs_t * p )
static inline int Prs_ManErrorPrint( Prs_Man_t * p )
{
char * pThis; int iLine = 0;
if ( !p->ErrorStr[0] ) return 1;
@ -138,25 +169,58 @@ static inline int Cba_PrsErrorPrint( Cba_Prs_t * p )
return 0;
}
// create network
static inline Cba_Ntk_t * Cba_PrsAddCurrentModel( Cba_Prs_t * p, int iNameId )
// parsing network
static inline void Prs_ManInitializeNtk( Prs_Man_t * p, int iName, int fSlices )
{
Cba_Ntk_t * pNtk = Cba_NtkAlloc( p->pDesign, Abc_NamStr(p->pDesign->pNames, iNameId) );
assert( Vec_IntSize(&p->vInputsCur) != 0 || Vec_IntSize(&p->vOutputsCur) != 0 );
Cba_ManSetupArray( p->pDesign, &pNtk->vInouts, &p->vInoutsCur );
Cba_ManSetupArray( p->pDesign, &pNtk->vInputs, &p->vInputsCur );
Cba_ManSetupArray( p->pDesign, &pNtk->vOutputs, &p->vOutputsCur );
Cba_ManSetupArray( p->pDesign, &pNtk->vWires, &p->vWiresCur );
Cba_ManSetupArray( p->pDesign, &pNtk->vTypes, &p->vTypesCur );
Cba_ManSetupArray( p->pDesign, &pNtk->vFuncs, &p->vFuncsCur );
Cba_ManSetupArray( p->pDesign, &pNtk->vFanins, &p->vFaninsCur );
Cba_ManSetupArray( p->pDesign, &pNtk->vInstIds, &p->vInstIdsCur );
return pNtk;
assert( p->pNtk == NULL );
p->pNtk = ABC_CALLOC( Prs_Ntk_t, 1 );
p->pNtk->iModuleName = iName;
p->pNtk->fSlices = fSlices;
p->pNtk->pStrs = Abc_NamRef( p->pStrs );
Vec_PtrPush( p->vNtks, p->pNtk );
}
static inline void Prs_ManFinalizeNtk( Prs_Man_t * p )
{
assert( p->pNtk != NULL );
p->pNtk = NULL;
}
// parsing slice/concatentation/box
static inline int Prs_NtkAddSlice( Prs_Ntk_t * p, int Name, int Range )
{
int Value = Vec_IntSize(&p->vSlices);
Vec_IntPushTwo( &p->vSlices, Name, Range );
return Value;
}
static inline int Prs_NtkAddConcat( Prs_Ntk_t * p, Vec_Int_t * vTemp )
{
int Value;
if ( !(Vec_IntSize(&p->vConcats) & 1) )
Vec_IntPush(&p->vConcats, -1);
Value = Vec_IntSize(&p->vConcats);
assert( Value & 1 );
Vec_IntPush( &p->vConcats, Vec_IntSize(vTemp) );
Vec_IntAppend( &p->vConcats, vTemp );
return Value;
}
static inline void Prs_NtkAddBox( Prs_Ntk_t * p, int ModName, int InstName, Vec_Int_t * vTemp )
{
int Value;
assert( Vec_IntSize(vTemp) % 2 == 0 );
if ( !(Vec_IntSize(&p->vBoxes) & 1) )
Vec_IntPush(&p->vBoxes, -1);
Value = Vec_IntSize(&p->vBoxes);
assert( Value & 1 );
Vec_IntPush( &p->vObjs, Value );
// create entry
Vec_IntPush( &p->vBoxes, Vec_IntSize(vTemp)+2 );
Vec_IntPush( &p->vBoxes, ModName );
Vec_IntPush( &p->vBoxes, InstName );
Vec_IntAppend( &p->vBoxes, vTemp );
}
static inline char * Cba_PrsLoadFile( char * pFileName, char ** ppLimit )
static inline char * Prs_ManLoadFile( char * pFileName, char ** ppLimit )
{
char * pBuffer;
int nFileSize, RetValue;
@ -181,57 +245,153 @@ static inline char * Cba_PrsLoadFile( char * pFileName, char ** ppLimit )
*ppLimit = pBuffer + nFileSize + 2;
return pBuffer;
}
static inline Cba_Prs_t * Cba_PrsAlloc( char * pFileName )
static inline Prs_Man_t * Prs_ManAlloc( char * pFileName )
{
Cba_Prs_t * p;
Prs_Man_t * p;
char * pBuffer, * pLimit;
pBuffer = Cba_PrsLoadFile( pFileName, &pLimit );
pBuffer = Prs_ManLoadFile( pFileName, &pLimit );
if ( pBuffer == NULL )
return NULL;
p = ABC_CALLOC( Cba_Prs_t, 1 );
p = ABC_CALLOC( Prs_Man_t, 1 );
p->pName = pFileName;
p->pBuffer = pBuffer;
p->pLimit = pLimit;
p->pCur = pBuffer;
p->pDesign = Cba_ManAlloc( NULL, pFileName );
p->pStrs = Abc_NamStart( 1000, 24 );
p->vNtks = Vec_PtrAlloc( 100 );
return p;
}
static inline void Cba_PrsFree( Cba_Prs_t * p )
{
if ( p->pDesign )
Cba_ManFree( p->pDesign );
Vec_IntErase( &p->vInoutsCur );
Vec_IntErase( &p->vInputsCur );
Vec_IntErase( &p->vOutputsCur );
Vec_IntErase( &p->vWiresCur );
Vec_IntErase( &p->vTypesCur );
Vec_IntErase( &p->vFuncsCur );
Vec_IntErase( &p->vFaninsCur );
Vec_IntErase( &p->vInstIdsCur );
static inline void Prs_NtkFree( Prs_Ntk_t * p )
{
if ( p->pStrs )
Abc_NamDeref( p->pStrs );
Vec_IntErase( &p->vOrder );
Vec_IntErase( &p->vInouts );
Vec_IntErase( &p->vInputs );
Vec_IntErase( &p->vOutputs );
Vec_IntErase( &p->vWires );
Vec_IntErase( &p->vInoutsR );
Vec_IntErase( &p->vInputsR );
Vec_IntErase( &p->vOutputsR );
Vec_IntErase( &p->vWiresR );
Vec_IntErase( &p->vSlices );
Vec_IntErase( &p->vConcats );
Vec_IntErase( &p->vBoxes );
Vec_IntErase( &p->vObjs );
ABC_FREE( p );
}
static inline void Prs_ManFree( Prs_Man_t * p )
{
extern void Prs_ManVecFree( Vec_Ptr_t * vPrs );
if ( p->pStrs )
Abc_NamDeref( p->pStrs );
if ( p->vNtks )
Prs_ManVecFree( p->vNtks );
// temporary
Vec_StrErase( &p->vCover );
Vec_IntErase( &p->vTemp );
Vec_IntErase( &p->vTemp2 );
Vec_IntErase( &p->vKnown );
Vec_IntErase( &p->vFailed );
Vec_IntErase( &p->vSucceeded );
ABC_FREE( p->pBuffer );
ABC_FREE( p );
}
static inline void Cba_PrsRemapBoxModels( Cba_Man_t * p )
static inline int Prs_NtkMemory( Prs_Ntk_t * p )
{
Cba_Ntk_t * pNtk; int i, iBox;
Cba_ManForEachNtk( p, pNtk, i )
Cba_NtkForEachBox( pNtk, iBox )
{
char * pName = Abc_NamStr( p->pNames, Cba_ObjFuncId(pNtk, iBox) );
int iModelId = Abc_NamStrFind( p->pModels, pName );
assert( iModelId > 0 );
Vec_IntWriteEntry( &pNtk->vFuncs, iBox, iModelId );
}
int nMem = sizeof(Prs_Ntk_t);
nMem += Vec_IntMemory( &p->vOrder );
nMem += Vec_IntMemory( &p->vInouts );
nMem += Vec_IntMemory( &p->vInputs );
nMem += Vec_IntMemory( &p->vOutputs );
nMem += Vec_IntMemory( &p->vWires );
nMem += Vec_IntMemory( &p->vInoutsR );
nMem += Vec_IntMemory( &p->vInputsR );
nMem += Vec_IntMemory( &p->vOutputsR );
nMem += Vec_IntMemory( &p->vWiresR );
nMem += Vec_IntMemory( &p->vSlices );
nMem += Vec_IntMemory( &p->vBoxes );
nMem += Vec_IntMemory( &p->vConcats );
return nMem;
}
static inline int Prs_ManMemory( Vec_Ptr_t * vPrs )
{
Prs_Ntk_t * pNtk; int i;
int nMem = Vec_PtrMemory(vPrs);
Vec_PtrForEachEntry( Prs_Ntk_t *, vPrs, pNtk, i )
nMem += Prs_NtkMemory( pNtk );
nMem += Abc_NamMemUsed(pNtk->pStrs);
return nMem;
}
/**Function*************************************************************
Synopsis [Count range size.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
static inline int Prs_ManRangeSizeName( Prs_Ntk_t * p, int Name )
{
return 1;
}
static inline int Prs_ManRangeSizeRange( Prs_Ntk_t * p, int Range )
{
char * pStr;
int Left, Right;
if ( Range == 0 )
return 1;
pStr = Prs_NtkStr( p, Range );
assert( pStr[0] == '[' );
Left = Right = atoi( pStr + 1 );
pStr = strstr( pStr, "=" );
if ( pStr )
Right = atoi( pStr + 1 );
return 1 + (Left > Right ? Left - Right : Right - Left);
}
static inline int Prs_ManRangeSizeConst( Prs_Ntk_t * p, int Const )
{
return atoi( Prs_NtkStr(p, Const) );
}
static inline int Prs_ManRangeSizeConcat( Prs_Ntk_t * p, int Con )
{
extern int Prs_ManRangeSizeArray( Prs_Ntk_t * p, Vec_Int_t * vSlices, int Start, int Stop );
Vec_Int_t * vSigs = Prs_CatSignals(p, Con);
return Prs_ManRangeSizeArray( p, vSigs, 0, Vec_IntSize(vSigs) );
}
static inline int Prs_ManRangeSizeSignal( Prs_Ntk_t * p, int Sig )
{
int Value = Abc_Lit2Var2( Sig );
Prs_ManType_t Type = Abc_Lit2Att2( Sig );
if ( Type == CBA_PRS_NAME )
return Prs_ManRangeSizeName( p, Value );
if ( Type == CBA_PRS_SLICE )
return Prs_ManRangeSizeRange( p, Prs_SliceRange(p, Value) );
if ( Type == CBA_PRS_CONST )
return Prs_ManRangeSizeConst( p, Value );
if ( Type == CBA_PRS_CONCAT )
return Prs_ManRangeSizeConcat( p, Value );
assert( 0 );
return 0;
}
static inline int Prs_ManRangeSizeArray( Prs_Ntk_t * p, Vec_Int_t * vSlices, int Start, int Stop )
{
int i, Sig, Count = 0;
assert( Vec_IntSize(vSlices) > 0 );
Vec_IntForEachEntryStartStop( vSlices, Sig, i, Start, Stop )
Count += Prs_ManRangeSizeSignal( p, Sig );
return Count;
}
////////////////////////////////////////////////////////////////////////
/// ITERATORS ///

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/**CFile****************************************************************
FileName [cbaPrsBuild.c]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Hierarchical word-level netlist.]
Synopsis [Parse tree to netlist transformation.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - November 29, 2014.]
Revision [$Id: cbaPrsBuild.c,v 1.00 2014/11/29 00:00:00 alanmi Exp $]
***********************************************************************/
#include "cba.h"
#include "cbaPrs.h"
ABC_NAMESPACE_IMPL_START
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Prs_ManVecFree( Vec_Ptr_t * vPrs )
{
Prs_Ntk_t * pNtk; int i;
Vec_PtrForEachEntry( Prs_Ntk_t *, vPrs, pNtk, i )
Prs_NtkFree( pNtk );
Vec_PtrFree( vPrs );
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Prs_NtkCountObjects( Prs_Ntk_t * pNtk )
{
Vec_Int_t * vFanins;
int i, Count = Prs_NtkObjNum(pNtk);
Prs_NtkForEachBox( pNtk, vFanins, i )
Count += Prs_BoxIONum(pNtk, i);
return Count;
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
// replaces NameIds of formal names by their index in the box model
void Prs_ManRemapOne( Vec_Int_t * vSigs, Prs_Ntk_t * pNtkBox, Vec_Int_t * vMap )
{
int i, NameId;
// map formal names into I/O indexes
Prs_NtkForEachPi( pNtkBox, NameId, i )
{
assert( Vec_IntEntry(vMap, NameId) == -1 );
Vec_IntWriteEntry( vMap, NameId, i + 1 ); // +1 to keep 1st form input non-zero
}
Prs_NtkForEachPo( pNtkBox, NameId, i )
{
assert( Vec_IntEntry(vMap, NameId) == -1 );
Vec_IntWriteEntry( vMap, NameId, Prs_NtkPiNum(pNtkBox) + i + 1 ); // +1 to keep 1st form input non-zero
}
// remap box
assert( Vec_IntSize(vSigs) % 2 == 0 );
Vec_IntForEachEntry( vSigs, NameId, i )
{
assert( Vec_IntEntry(vMap, NameId) != -1 );
Vec_IntWriteEntry( vSigs, i++, Vec_IntEntry(vMap, NameId) );
}
// unmap formal inputs
Prs_NtkForEachPi( pNtkBox, NameId, i )
Vec_IntWriteEntry( vMap, NameId, -1 );
Prs_NtkForEachPo( pNtkBox, NameId, i )
Vec_IntWriteEntry( vMap, NameId, -1 );
}
void Prs_ManRemapBoxes( Cba_Man_t * pNew, Vec_Ptr_t * vDes, Prs_Ntk_t * pNtk, Vec_Int_t * vMap )
{
Vec_Int_t * vSigs; int iBox;
Prs_NtkForEachBox( pNtk, vSigs, iBox )
if ( !Prs_BoxIsNode(pNtk, iBox) )
{
int NtkId = Prs_BoxNtk( pNtk, iBox );
int NtkIdNew = Cba_ManNtkFindId( pNew, Prs_NtkStr(pNtk, NtkId) );
Prs_BoxSetNtk( pNtk, iBox, NtkIdNew );
Prs_ManRemapOne( vSigs, Prs_ManNtk(vDes, NtkIdNew), vMap );
}
}
void Prs_ManCleanMap( Prs_Ntk_t * pNtk, Vec_Int_t * vMap )
{
Vec_Int_t * vSigs;
int i, k, NameId, Sig;
Prs_NtkForEachPi( pNtk, NameId, i )
Vec_IntWriteEntry( vMap, NameId, -1 );
Prs_NtkForEachBox( pNtk, vSigs, i )
Vec_IntForEachEntryDouble( vSigs, NameId, Sig, k )
Vec_IntWriteEntry( vMap, Prs_NtkSigName(pNtk, Sig), -1 );
Prs_NtkForEachPo( pNtk, NameId, i )
Vec_IntWriteEntry( vMap, NameId, -1 );
}
// create maps of NameId and boxes
void Prs_ManBuildNtk( Cba_Ntk_t * pNew, Vec_Ptr_t * vDes, Prs_Ntk_t * pNtk, Vec_Int_t * vMap, Vec_Int_t * vBoxes )
{
Prs_Ntk_t * pNtkBox; Vec_Int_t * vSigs; int iBox;
int i, Index, NameId, iObj, iConst0, iTerm;
int iNonDriven = -1, nNonDriven = 0;
assert( Prs_NtkPioNum(pNtk) == 0 );
Prs_ManRemapBoxes( pNew->pDesign, vDes, pNtk, vMap );
Cba_NtkStartNames( pNew );
// create primary inputs
Prs_NtkForEachPi( pNtk, NameId, i )
{
if ( Vec_IntEntry(vMap, NameId) != -1 )
printf( "Primary inputs %d and %d have the same name.\n", Vec_IntEntry(vMap, NameId), i );
iObj = Cba_ObjAlloc( pNew, CBA_OBJ_PI, -1, -1 );
Cba_ObjSetName( pNew, iObj, NameId );
Vec_IntWriteEntry( vMap, NameId, iObj );
}
// create box outputs
Vec_IntClear( vBoxes );
Prs_NtkForEachBox( pNtk, vSigs, iBox )
if ( !Prs_BoxIsNode(pNtk, iBox) )
{
pNtkBox = Prs_ManNtk( vDes, Prs_BoxNtk(pNtk, iBox) );
iObj = Cba_BoxAlloc( pNew, CBA_OBJ_BOX, Prs_NtkPiNum(pNtkBox), Prs_NtkPoNum(pNtkBox), Prs_BoxNtk(pNtk, iBox) );
Cba_ObjSetName( pNew, iObj, Prs_BoxName(pNtk, iBox) );
Vec_IntForEachEntry( vSigs, Index, i )
{
i++;
if ( --Index < Prs_NtkPiNum(pNtkBox) )
continue;
assert( Index - Prs_NtkPiNum(pNtkBox) < Prs_NtkPoNum(pNtkBox) );
// consider box output
NameId = Vec_IntEntry( vSigs, i );
NameId = Prs_NtkSigName( pNtk, NameId );
if ( Vec_IntEntry(vMap, NameId) != -1 )
printf( "Box output name %d is already driven.\n", NameId );
iTerm = Cba_BoxBo( pNew, iObj, Index - Prs_NtkPiNum(pNtkBox) );
Cba_ObjSetName( pNew, iTerm, NameId );
Vec_IntWriteEntry( vMap, NameId, iTerm );
}
// remember box
Vec_IntPush( vBoxes, iObj );
}
else
{
iObj = Cba_BoxAlloc( pNew, Prs_BoxNtk(pNtk, iBox), Prs_BoxIONum(pNtk, iBox)-1, 1, -1 );
// consider box output
NameId = Vec_IntEntryLast( vSigs );
NameId = Prs_NtkSigName( pNtk, NameId );
if ( Vec_IntEntry(vMap, NameId) != -1 )
printf( "Node output name %d is already driven.\n", NameId );
iTerm = Cba_BoxBo( pNew, iObj, 0 );
Cba_ObjSetName( pNew, iTerm, NameId );
Vec_IntWriteEntry( vMap, NameId, iTerm );
// remember box
Vec_IntPush( vBoxes, iObj );
}
// add fanins for box inputs
Prs_NtkForEachBox( pNtk, vSigs, iBox )
if ( !Prs_BoxIsNode(pNtk, iBox) )
{
pNtkBox = Prs_ManNtk( vDes, Prs_BoxNtk(pNtk, iBox) );
iObj = Vec_IntEntry( vBoxes, iBox );
Vec_IntForEachEntry( vSigs, Index, i )
{
i++;
if ( --Index >= Prs_NtkPiNum(pNtkBox) )
continue;
NameId = Vec_IntEntry( vSigs, i );
NameId = Prs_NtkSigName( pNtk, NameId );
iTerm = Cba_BoxBi( pNew, iObj, Index );
if ( Vec_IntEntry(vMap, NameId) == -1 )
{
iConst0 = Cba_BoxAlloc( pNew, CBA_BOX_C0, 0, 1, -1 );
Vec_IntWriteEntry( vMap, NameId, iConst0+1 );
if ( iNonDriven == -1 )
iNonDriven = NameId;
nNonDriven++;
}
Cba_ObjSetFanin( pNew, iTerm, Vec_IntEntry(vMap, NameId) );
Cba_ObjSetName( pNew, iTerm, NameId );
}
}
else
{
iObj = Vec_IntEntry( vBoxes, iBox );
Vec_IntForEachEntryStop( vSigs, Index, i, Vec_IntSize(vSigs)-2 )
{
NameId = Vec_IntEntry( vSigs, ++i );
NameId = Prs_NtkSigName( pNtk, NameId );
iTerm = Cba_BoxBi( pNew, iObj, i/2 );
if ( Vec_IntEntry(vMap, NameId) == -1 )
{
iConst0 = Cba_BoxAlloc( pNew, CBA_BOX_C0, 0, 1, -1 );
Vec_IntWriteEntry( vMap, NameId, iConst0+1 );
if ( iNonDriven == -1 )
iNonDriven = NameId;
nNonDriven++;
}
Cba_ObjSetFanin( pNew, iTerm, Vec_IntEntry(vMap, NameId) );
Cba_ObjSetName( pNew, iTerm, NameId );
}
}
// add fanins for primary outputs
Prs_NtkForEachPo( pNtk, NameId, i )
if ( Vec_IntEntry(vMap, NameId) == -1 )
{
iConst0 = Cba_BoxAlloc( pNew, CBA_BOX_C0, 0, 1, -1 );
Vec_IntWriteEntry( vMap, NameId, iConst0+1 );
if ( iNonDriven == -1 )
iNonDriven = NameId;
nNonDriven++;
}
Prs_NtkForEachPo( pNtk, NameId, i )
{
iObj = Cba_ObjAlloc( pNew, CBA_OBJ_PO, -1, Vec_IntEntry(vMap, NameId) );
Cba_ObjSetName( pNew, iObj, NameId );
}
if ( nNonDriven )
printf( "Module %s has %d non-driven nets (for example, %s).\n", Prs_NtkName(pNtk), nNonDriven, Prs_NtkStr(pNtk, iNonDriven) );
Prs_ManCleanMap( pNtk, vMap );
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Cba_Man_t * Prs_ManBuildCba( char * pFileName, Vec_Ptr_t * vDes )
{
Prs_Ntk_t * pNtk = Prs_ManRoot( vDes ); int i;
Cba_Man_t * pNew = Cba_ManAlloc( pFileName, Vec_PtrSize(vDes) );
Vec_Int_t * vMap = Vec_IntStartFull( Abc_NamObjNumMax(pNtk->pStrs) + 1 );
Vec_Int_t * vTmp = Vec_IntAlloc( Prs_NtkBoxNum(pNtk) );
Abc_NamDeref( pNew->pStrs );
pNew->pStrs = Abc_NamRef( pNtk->pStrs );
Vec_PtrForEachEntry( Prs_Ntk_t *, vDes, pNtk, i )
Cba_NtkAlloc( Cba_ManNtk(pNew, i), Prs_NtkId(pNtk), Prs_NtkPiNum(pNtk), Prs_NtkPoNum(pNtk), Prs_NtkCountObjects(pNtk) );
Vec_PtrForEachEntry( Prs_Ntk_t *, vDes, pNtk, i )
Prs_ManBuildNtk( Cba_ManNtk(pNew, i), vDes, pNtk, vMap, vTmp );
assert( Vec_IntCountEntry(vMap, -1) == Vec_IntSize(vMap) );
Vec_IntFree( vMap );
Vec_IntFree( vTmp );
return pNew;
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
ABC_NAMESPACE_IMPL_END

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/**CFile****************************************************************
FileName [cbaPrsTrans.c]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Hierarchical word-level netlist.]
Synopsis [Parse tree to netlist transformation.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - November 29, 2014.]
Revision [$Id: cbaPrsTrans.c,v 1.00 2014/11/29 00:00:00 alanmi Exp $]
***********************************************************************/
#include "cba.h"
#include "cbaPrs.h"
ABC_NAMESPACE_IMPL_START
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
ABC_NAMESPACE_IMPL_END

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/**CFile****************************************************************
FileName [cbaPtr.c]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Hierarchical word-level netlist.]
Synopsis [Simple interface with external tools.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - November 29, 2014.]
Revision [$Id: cbaPtr.c,v 1.00 2014/11/29 00:00:00 alanmi Exp $]
***********************************************************************/
#include "base/abc/abc.h"
#include "base/main/mainInt.h"
#include "map/mio/mio.h"
ABC_NAMESPACE_IMPL_START
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
/*
design = array containing design name (as the first entry in the array) followed by pointers to modules
module = array containing module name (as the first entry in the array) followed by pointers to 6 arrays:
{array of input names; array of output names; array of nodes; array of boxes,
array of floating-point input-arrival times; array of floating-point output-required times}
node = array containing output name, followed by node type, followed by input names
box = array containing model name, instance name, followed by pairs of formal/actual names for each port
Comments:
- in describing boxes
- input formal/actual name pairs should be listed before output name pairs
- the order of formal names should be the same as the order of inputs/outputs in the module description
- all formal names present in the module description should be listed
- if an input pin is not driven or an output pin has no fanout, the actual pin name is NULL
- word-level formal name "a" is written as bit-level names (a[0]. a[1], etc) ordered LSB to MSB
- primitive names should be given as char*-strings in description of nodes and boxes
- primitive modules should not be written, but the list of primitives and formal names should be provided
- constant 0/1 nets can be specified as char*-strings "NetConst0" and "NetConst1".
- arrays of input-arrival/output-required times in the module description are optional
*/
// elementary gates
typedef enum {
PTR_GATE_NONE = 0,
PTR_GATE_C0, // Const0T
PTR_GATE_C1, // Const1T
PTR_GATE_BUF, // BufT
PTR_GATE_INV, // InvT
PTR_GATE_AND, // AndT
PTR_GATE_NAND, // NandT
PTR_GATE_OR, // OrT
PTR_GATE_NOR, // NorT
PTR_GATE_XOR, // XorT
PTR_GATE_XNOR, // XnorT
PTR_GATE_UNKNOWN
} Ptr_ObjType_t;
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis [Free Ptr.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Cba_PtrFreeNtk( Vec_Ptr_t * vNtk )
{
Vec_PtrFree( (Vec_Ptr_t *)Vec_PtrEntry(vNtk, 1) );
Vec_PtrFree( (Vec_Ptr_t *)Vec_PtrEntry(vNtk, 2) );
Vec_VecFree( (Vec_Vec_t *)Vec_PtrEntry(vNtk, 3) );
Vec_VecFree( (Vec_Vec_t *)Vec_PtrEntry(vNtk, 4) );
if ( Vec_PtrSize(vNtk) > 5 )
Vec_FltFree( (Vec_Flt_t *)Vec_PtrEntry(vNtk, 5) );
if ( Vec_PtrSize(vNtk) > 6 )
Vec_FltFree( (Vec_Flt_t *)Vec_PtrEntry(vNtk, 6) );
Vec_PtrFree( vNtk );
}
void Cba_PtrFree( Vec_Ptr_t * vDes )
{
Vec_Ptr_t * vNtk; int i;
if ( !vDes ) return;
Vec_PtrForEachEntryStart( Vec_Ptr_t *, vDes, vNtk, i, 1 )
Cba_PtrFreeNtk( vNtk );
Vec_PtrFree( vDes );
}
/**Function*************************************************************
Synopsis [Count memory used by Ptr.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Cba_PtrMemoryArray( Vec_Ptr_t * vArray )
{
return (int)Vec_PtrMemory(vArray);
}
int Cba_PtrMemoryArrayArray( Vec_Ptr_t * vArrayArray )
{
Vec_Ptr_t * vArray; int i, nBytes = 0;
Vec_PtrForEachEntry( Vec_Ptr_t *, vArrayArray, vArray, i )
nBytes += Cba_PtrMemoryArray(vArray);
return nBytes;
}
int Cba_PtrMemoryNtk( Vec_Ptr_t * vNtk )
{
int nBytes = (int)Vec_PtrMemory(vNtk);
nBytes += Cba_PtrMemoryArray( (Vec_Ptr_t *)Vec_PtrEntry(vNtk, 1) );
nBytes += Cba_PtrMemoryArray( (Vec_Ptr_t *)Vec_PtrEntry(vNtk, 2) );
nBytes += Cba_PtrMemoryArrayArray( (Vec_Ptr_t *)Vec_PtrEntry(vNtk, 3) );
nBytes += Cba_PtrMemoryArrayArray( (Vec_Ptr_t *)Vec_PtrEntry(vNtk, 4) );
return nBytes;
}
int Cba_PtrMemory( Vec_Ptr_t * vDes )
{
Vec_Ptr_t * vNtk; int i, nBytes = (int)Vec_PtrMemory(vDes);
Vec_PtrForEachEntryStart( Vec_Ptr_t *, vDes, vNtk, i, 1 )
nBytes += Cba_PtrMemoryNtk(vNtk);
return nBytes;
}
/**Function*************************************************************
Synopsis [Dumping Ptr into a BLIF file.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Cba_PtrDumpSignalsBlif( FILE * pFile, Vec_Ptr_t * vSigs, int fSkipLastComma )
{
char * pSig; int i;
Vec_PtrForEachEntry( char *, vSigs, pSig, i )
fprintf( pFile, " %s", pSig );
}
void Cba_PtrDumpBoxBlif( FILE * pFile, Vec_Ptr_t * vBox )
{
char * pName; int i;
fprintf( pFile, ".subckt" );
fprintf( pFile, " %s", (char *)Vec_PtrEntry(vBox, 0) );
//fprintf( pFile, " %s", (char *)Vec_PtrEntry(vBox, 1) ); // do not write intance name in BLIF
Vec_PtrForEachEntryStart( char *, vBox, pName, i, 2 )
fprintf( pFile, " %s=%s", pName, (char *)Vec_PtrEntry(vBox, i+1) ), i++;
fprintf( pFile, "\n" );
}
void Cba_PtrDumpBoxesBlif( FILE * pFile, Vec_Ptr_t * vBoxes )
{
Vec_Ptr_t * vBox; int i;
Vec_PtrForEachEntry( Vec_Ptr_t *, vBoxes, vBox, i )
Cba_PtrDumpBoxBlif( pFile, vBox );
}
void Cba_PtrDumpModuleBlif( FILE * pFile, Vec_Ptr_t * vNtk )
{
fprintf( pFile, ".model %s\n", (char *)Vec_PtrEntry(vNtk, 0) );
fprintf( pFile, ".inputs" );
Cba_PtrDumpSignalsBlif( pFile, (Vec_Ptr_t *)Vec_PtrEntry(vNtk, 1), 0 );
fprintf( pFile, "\n" );
fprintf( pFile, ".outputs" );
Cba_PtrDumpSignalsBlif( pFile, (Vec_Ptr_t *)Vec_PtrEntry(vNtk, 2), 1 );
fprintf( pFile, "\n" );
assert( Vec_PtrSize((Vec_Ptr_t *)Vec_PtrEntry(vNtk, 3)) == 0 ); // no nodes; only boxes
Cba_PtrDumpBoxesBlif( pFile, (Vec_Ptr_t *)Vec_PtrEntry(vNtk, 4) );
fprintf( pFile, ".end\n\n" );
}
void Cba_PtrDumpBlif( char * pFileName, Vec_Ptr_t * vDes )
{
FILE * pFile;
Vec_Ptr_t * vNtk; int i;
pFile = fopen( pFileName, "wb" );
if ( pFile == NULL )
{
printf( "Cannot open output file \"%s\".\n", pFileName );
return;
}
fprintf( pFile, "// Design \"%s\" written by ABC on %s\n\n", (char *)Vec_PtrEntry(vDes, 0), Extra_TimeStamp() );
Vec_PtrForEachEntryStart( Vec_Ptr_t *, vDes, vNtk, i, 1 )
Cba_PtrDumpModuleBlif( pFile, vNtk );
fclose( pFile );
}
/**Function*************************************************************
Synopsis [Collect elementary gates from the library.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Cba_ManCollectGateNameOne( Mio_Library_t * pLib, Ptr_ObjType_t Type, word Truth, Vec_Ptr_t * vGateNames )
{
Mio_Gate_t * pGate = Mio_LibraryReadGateByTruth( pLib, Truth );
if ( pGate != NULL )
Vec_PtrWriteEntry( vGateNames, Type, Mio_GateReadName(pGate) );
}
Vec_Ptr_t * Cba_ManCollectGateNamesByTruth( Mio_Library_t * pLib )
{
static word uTruth, uTruths6[3] = {
ABC_CONST(0xAAAAAAAAAAAAAAAA),
ABC_CONST(0xCCCCCCCCCCCCCCCC),
ABC_CONST(0xF0F0F0F0F0F0F0F0),
};
Vec_Ptr_t * vGateNames = Vec_PtrStart( PTR_GATE_UNKNOWN );
Cba_ManCollectGateNameOne( pLib, PTR_GATE_C0, 0, vGateNames );
Cba_ManCollectGateNameOne( pLib, PTR_GATE_C1, ~(word)0, vGateNames );
Cba_ManCollectGateNameOne( pLib, PTR_GATE_BUF, uTruths6[0], vGateNames );
Cba_ManCollectGateNameOne( pLib, PTR_GATE_INV, ~uTruths6[0], vGateNames );
Cba_ManCollectGateNameOne( pLib, PTR_GATE_AND, (uTruths6[0] & uTruths6[1]), vGateNames );
Cba_ManCollectGateNameOne( pLib, PTR_GATE_NAND, ~(uTruths6[0] & uTruths6[1]), vGateNames );
Cba_ManCollectGateNameOne( pLib, PTR_GATE_OR, (uTruths6[0] | uTruths6[1]), vGateNames );
Cba_ManCollectGateNameOne( pLib, PTR_GATE_NOR, ~(uTruths6[0] | uTruths6[1]), vGateNames );
Cba_ManCollectGateNameOne( pLib, PTR_GATE_XOR, (uTruths6[0] ^ uTruths6[1]), vGateNames );
Cba_ManCollectGateNameOne( pLib, PTR_GATE_XNOR, ~(uTruths6[0] ^ uTruths6[1]), vGateNames );
return vGateNames;
}
/**Function*************************************************************
Synopsis [This procedure transforms tech-ind Ptr into mapped Ptr.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Cba_PtrUpdateBox( Vec_Ptr_t * vBox, Vec_Ptr_t * vGatesNames )
{
Mio_Gate_t * pGate; Mio_Pin_t * pPin; int i = 1;
Mio_Library_t * pLib = (Mio_Library_t *)Abc_FrameReadLibGen( Abc_FrameGetGlobalFrame() );
// update gate name
char * pNameNew, * pName = (char *)Vec_PtrEntry(vBox, 0);
if ( !strcmp(pName, "Const0T") )
pNameNew = (char *)Vec_PtrEntry(vGatesNames, PTR_GATE_C0);
else if ( !strcmp(pName, "Const1T") )
pNameNew = (char *)Vec_PtrEntry(vGatesNames, PTR_GATE_C1);
else if ( !strcmp(pName, "BufT") )
pNameNew = (char *)Vec_PtrEntry(vGatesNames, PTR_GATE_BUF);
else if ( !strcmp(pName, "InvT") )
pNameNew = (char *)Vec_PtrEntry(vGatesNames, PTR_GATE_INV);
else if ( !strcmp(pName, "AndT") )
pNameNew = (char *)Vec_PtrEntry(vGatesNames, PTR_GATE_AND);
else if ( !strcmp(pName, "NandT") )
pNameNew = (char *)Vec_PtrEntry(vGatesNames, PTR_GATE_NAND);
else if ( !strcmp(pName, "OrT") )
pNameNew = (char *)Vec_PtrEntry(vGatesNames, PTR_GATE_OR);
else if ( !strcmp(pName, "NorT") )
pNameNew = (char *)Vec_PtrEntry(vGatesNames, PTR_GATE_NOR);
else if ( !strcmp(pName, "XorT") )
pNameNew = (char *)Vec_PtrEntry(vGatesNames, PTR_GATE_XOR);
else if ( !strcmp(pName, "XnorT") )
pNameNew = (char *)Vec_PtrEntry(vGatesNames, PTR_GATE_XNOR);
else // user hierarchy
return;
ABC_FREE( pName );
Vec_PtrWriteEntry( vBox, 0, Abc_UtilStrsav(pNameNew) );
// remove instance name
pName = (char *)Vec_PtrEntry(vBox, 1);
ABC_FREE( pName );
Vec_PtrWriteEntry( vBox, 1, NULL );
// update formal input names
pGate = Mio_LibraryReadGateByName( pLib, pNameNew, NULL );
Mio_GateForEachPin( pGate, pPin )
{
pName = (char *)Vec_PtrEntry( vBox, 2 * i );
ABC_FREE( pName );
pNameNew = Mio_PinReadName(pPin);
Vec_PtrWriteEntry( vBox, 2 * i++, Abc_UtilStrsav(pNameNew) );
}
// update output name
pName = (char *)Vec_PtrEntry( vBox, 2 * i );
pNameNew = Mio_GateReadOutName(pGate);
Vec_PtrWriteEntry( vBox, 2 * i++, Abc_UtilStrsav(pNameNew) );
assert( 2 * i == Vec_PtrSize(vBox) );
}
Vec_Ptr_t * Cba_PtrTransformSigs( Vec_Ptr_t * vSig )
{
char * pName; int i;
Vec_Ptr_t * vNew = Vec_PtrAllocExact( Vec_PtrSize(vSig) );
Vec_PtrForEachEntry( char *, vSig, pName, i )
Vec_PtrPush( vNew, Abc_UtilStrsav(pName) );
return vNew;
}
Vec_Ptr_t * Cba_PtrTransformBox( Vec_Ptr_t * vBox, Vec_Ptr_t * vGatesNames )
{
char * pName; int i;
Vec_Ptr_t * vNew = Vec_PtrAllocExact( Vec_PtrSize(vBox) );
Vec_PtrForEachEntry( char *, vBox, pName, i )
Vec_PtrPush( vNew, Abc_UtilStrsav(pName) );
if ( vGatesNames )
Cba_PtrUpdateBox( vNew, vGatesNames );
return vNew;
}
Vec_Ptr_t * Cba_PtrTransformBoxes( Vec_Ptr_t * vBoxes, Vec_Ptr_t * vGatesNames )
{
Vec_Ptr_t * vBox; int i;
Vec_Ptr_t * vNew = Vec_PtrAllocExact( Vec_PtrSize(vBoxes) );
Vec_PtrForEachEntry( Vec_Ptr_t *, vBoxes, vBox, i )
Vec_PtrPush( vNew, Cba_PtrTransformBox(vBox, vGatesNames) );
return vNew;
}
Vec_Ptr_t * Cba_PtrTransformNtk( Vec_Ptr_t * vNtk, Vec_Ptr_t * vGatesNames )
{
char * pName = (char *)Vec_PtrEntry(vNtk, 0);
Vec_Ptr_t * vInputs = (Vec_Ptr_t *)Vec_PtrEntry(vNtk, 1);
Vec_Ptr_t * vOutputs = (Vec_Ptr_t *)Vec_PtrEntry(vNtk, 2);
Vec_Ptr_t * vBoxes = (Vec_Ptr_t *)Vec_PtrEntry(vNtk, 4);
Vec_Ptr_t * vNew = Vec_PtrAllocExact( Vec_PtrSize(vNtk) );
Vec_PtrPush( vNew, Abc_UtilStrsav(pName) );
Vec_PtrPush( vNew, Cba_PtrTransformSigs(vInputs) );
Vec_PtrPush( vNew, Cba_PtrTransformSigs(vOutputs) );
Vec_PtrPush( vNew, Vec_PtrAllocExact(0) );
Vec_PtrPush( vNew, Cba_PtrTransformBoxes(vBoxes, vGatesNames) );
return vNew;
}
Vec_Ptr_t * Cba_PtrTransformTest( Vec_Ptr_t * vDes )
{
Mio_Library_t * pLib;
Vec_Ptr_t * vGatesNames;
Vec_Ptr_t * vNtk, * vNew; int i;
// dump BLIF before transformation
Cba_PtrDumpBlif( "test1.blif", vDes );
if ( Abc_FrameGetGlobalFrame() == NULL )
{
printf( "ABC framework is not started.\n" );
return NULL;
}
pLib = (Mio_Library_t *)Abc_FrameReadLibGen( Abc_FrameGetGlobalFrame() );
if ( pLib == NULL )
{
printf( "Standard cell library is not entered.\n" );
return NULL;
}
vGatesNames = Cba_ManCollectGateNamesByTruth( pLib );
// transform
vNew = Vec_PtrAllocExact( Vec_PtrSize(vDes) );
Vec_PtrPush( vNew, Abc_UtilStrsav((char *)Vec_PtrEntry(vDes, 0)) );
Vec_PtrForEachEntryStart( Vec_Ptr_t *, vDes, vNtk, i, 1 )
Vec_PtrPush( vNew, Cba_PtrTransformNtk(vNtk, vGatesNames) );
// dump BLIF after transformation
Cba_PtrDumpBlif( "test2.blif", vNew );
Vec_PtrFree( vGatesNames );
return vNew;
}
/**Function*************************************************************
Synopsis [Test the testing procedure.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Cba_PtrTransformTestTest()
{
char * pFileName = "c/hie/dump/1/netlist_1.v";
Abc_Ntk_t * pNtk = Io_ReadNetlist( pFileName, Io_ReadFileType(pFileName), 0 );
extern Vec_Ptr_t * Ptr_AbcDeriveDes( Abc_Ntk_t * pNtk );
Vec_Ptr_t * vDes = Ptr_AbcDeriveDes( pNtk );
Vec_Ptr_t * vNew = Cba_PtrTransformTest( vDes );
Cba_PtrFree( vDes );
Cba_PtrFree( vNew );
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
ABC_NAMESPACE_IMPL_END

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/**CFile****************************************************************
FileName [cbaPtrAbc.c]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Hierarchical word-level netlist.]
Synopsis [Simple interface with external tools.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - November 29, 2014.]
Revision [$Id: cbaPtrAbc.c,v 1.00 2014/11/29 00:00:00 alanmi Exp $]
***********************************************************************/
#include "cba.h"
#include "base/abc/abc.h"
#include "map/mio/mio.h"
#include "base/main/mainInt.h"
ABC_NAMESPACE_IMPL_START
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis [Node type conversions.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
char * Ptr_HopToType( Abc_Obj_t * pObj )
{
static word uTruth, uTruths6[3] = {
ABC_CONST(0xAAAAAAAAAAAAAAAA),
ABC_CONST(0xCCCCCCCCCCCCCCCC),
ABC_CONST(0xF0F0F0F0F0F0F0F0),
};
assert( Abc_ObjIsNode(pObj) );
uTruth = Hop_ManComputeTruth6( (Hop_Man_t *)Abc_ObjNtk(pObj)->pManFunc, (Hop_Obj_t *)pObj->pData, Abc_ObjFaninNum(pObj) );
/*
if ( uTruth == 0 ) return "CBA_BOX_C0";
if ( uTruth == ~(word)0 ) return "CBA_BOX_C1";
if ( uTruth == uTruths6[0] ) return "CBA_BOX_BUF";
if ( uTruth == ~uTruths6[0] ) return "CBA_BOX_INV";
if ( uTruth == (uTruths6[0] & uTruths6[1]) ) return "CBA_BOX_AND";
if ( uTruth ==~(uTruths6[0] & uTruths6[1]) ) return "CBA_BOX_NAND";
if ( uTruth == (uTruths6[0] | uTruths6[1]) ) return "CBA_BOX_OR";
if ( uTruth ==~(uTruths6[0] | uTruths6[1]) ) return "CBA_BOX_NOR";
if ( uTruth == (uTruths6[0] ^ uTruths6[1]) ) return "CBA_BOX_XOR";
if ( uTruth ==~(uTruths6[0] ^ uTruths6[1]) ) return "CBA_BOX_XNOR";
*/
if ( uTruth == 0 ) return "Const0T";
if ( uTruth == ~(word)0 ) return "Const1T";
if ( uTruth == uTruths6[0] ) return "BufT";
if ( uTruth == ~uTruths6[0] ) return "InvT";
if ( uTruth == (uTruths6[0] & uTruths6[1]) ) return "AndT";
if ( uTruth ==~(uTruths6[0] & uTruths6[1]) ) return "NandT";
if ( uTruth == (uTruths6[0] | uTruths6[1]) ) return "OrT";
if ( uTruth ==~(uTruths6[0] | uTruths6[1]) ) return "NorT";
if ( uTruth == (uTruths6[0] ^ uTruths6[1]) ) return "XorT";
if ( uTruth ==~(uTruths6[0] ^ uTruths6[1]) ) return "XnorT";
assert( 0 );
return NULL;
}
/**Function*************************************************************
Synopsis [Create Ptr from Abc_Ntk_t.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
char * Ptr_AbcObjName( Abc_Obj_t * pObj )
{
if ( Abc_ObjIsNet(pObj) || Abc_ObjIsBox(pObj) )
return Abc_ObjName(pObj);
if ( Abc_ObjIsCi(pObj) || Abc_ObjIsNode(pObj) )
return Ptr_AbcObjName(Abc_ObjFanout0(pObj));
if ( Abc_ObjIsCo(pObj) )
return Ptr_AbcObjName(Abc_ObjFanin0(pObj));
assert( 0 );
return NULL;
}
static int Ptr_CheckArray( Vec_Ptr_t * vArray )
{
assert( Vec_PtrSize(vArray) == Vec_PtrCap(vArray) );
return 1;
}
Vec_Ptr_t * Ptr_AbcDeriveNode( Abc_Obj_t * pObj )
{
Abc_Obj_t * pFanin; int i;
Vec_Ptr_t * vNode = Vec_PtrAllocExact( 2 + 2 * (1 + Abc_ObjFaninNum(pObj)) );
assert( Abc_ObjIsNode(pObj) );
if ( Abc_NtkHasAig(pObj->pNtk) )
Vec_PtrPush( vNode, Ptr_HopToType(pObj) );
else if ( Abc_NtkHasSop(pObj->pNtk) )
Vec_PtrPush( vNode, Ptr_SopToTypeName((char *)pObj->pData) );
else assert( 0 );
Vec_PtrPush( vNode, Ptr_AbcObjName(pObj) );
assert( Abc_ObjFaninNum(pObj) <= 2 );
Abc_ObjForEachFanin( pObj, pFanin, i )
{
Vec_PtrPush( vNode, i ? "r" : "l" );
Vec_PtrPush( vNode, Ptr_AbcObjName(pFanin) );
}
Vec_PtrPush( vNode, "o" );
Vec_PtrPush( vNode, Ptr_AbcObjName(pObj) );
assert( Ptr_CheckArray(vNode) );
return vNode;
}
Vec_Ptr_t * Ptr_AbcDeriveBox( Abc_Obj_t * pObj )
{
Abc_Obj_t * pNext; int i;
Abc_Ntk_t * pNtk = Abc_ObjModel(pObj);
Vec_Ptr_t * vBox = Vec_PtrAllocExact( 2 + 2 * Abc_ObjFaninNum(pObj) + 2 * Abc_ObjFanoutNum(pObj) );
assert( Abc_ObjIsBox(pObj) );
Vec_PtrPush( vBox, Abc_NtkName(pNtk) );
Vec_PtrPush( vBox, Ptr_AbcObjName(pObj) );
Abc_ObjForEachFanin( pObj, pNext, i )
{
Vec_PtrPush( vBox, Ptr_AbcObjName(Abc_NtkPi(pNtk, i)) );
Vec_PtrPush( vBox, Ptr_AbcObjName(pNext) );
}
Abc_ObjForEachFanout( pObj, pNext, i )
{
Vec_PtrPush( vBox, Ptr_AbcObjName(Abc_NtkPo(pNtk, i)) );
Vec_PtrPush( vBox, Ptr_AbcObjName(pNext) );
}
assert( Ptr_CheckArray(vBox) );
return vBox;
}
Vec_Ptr_t * Ptr_AbcDeriveBoxes( Abc_Ntk_t * pNtk )
{
Abc_Obj_t * pObj; int i;
Vec_Ptr_t * vBoxes = Vec_PtrAllocExact( Abc_NtkBoxNum(pNtk) + Abc_NtkNodeNum(pNtk) );
Abc_NtkForEachBox( pNtk, pObj, i )
Vec_PtrPush( vBoxes, Ptr_AbcDeriveBox(pObj) );
Abc_NtkForEachNode( pNtk, pObj, i )
Vec_PtrPush( vBoxes, Ptr_AbcDeriveNode(pObj) );
assert( Ptr_CheckArray(vBoxes) );
return vBoxes;
}
Vec_Ptr_t * Ptr_AbcDeriveInputs( Abc_Ntk_t * pNtk )
{
Abc_Obj_t * pObj; int i;
Vec_Ptr_t * vSigs = Vec_PtrAllocExact( Abc_NtkPiNum(pNtk) );
Abc_NtkForEachPi( pNtk, pObj, i )
Vec_PtrPush( vSigs, Ptr_AbcObjName(pObj) );
assert( Ptr_CheckArray(vSigs) );
return vSigs;
}
Vec_Ptr_t * Ptr_AbcDeriveOutputs( Abc_Ntk_t * pNtk )
{
Abc_Obj_t * pObj; int i;
Vec_Ptr_t * vSigs = Vec_PtrAllocExact( Abc_NtkPoNum(pNtk) );
Abc_NtkForEachPo( pNtk, pObj, i )
Vec_PtrPush( vSigs, Ptr_AbcObjName(pObj) );
assert( Ptr_CheckArray(vSigs) );
return vSigs;
}
Vec_Ptr_t * Ptr_AbcDeriveNtk( Abc_Ntk_t * pNtk )
{
Vec_Ptr_t * vNtk = Vec_PtrAllocExact( 5 );
Vec_PtrPush( vNtk, Abc_NtkName(pNtk) );
Vec_PtrPush( vNtk, Ptr_AbcDeriveInputs(pNtk) );
Vec_PtrPush( vNtk, Ptr_AbcDeriveOutputs(pNtk) );
Vec_PtrPush( vNtk, Vec_PtrAllocExact(0) );
Vec_PtrPush( vNtk, Ptr_AbcDeriveBoxes(pNtk) );
assert( Ptr_CheckArray(vNtk) );
return vNtk;
}
Vec_Ptr_t * Ptr_AbcDeriveDes( Abc_Ntk_t * pNtk )
{
Vec_Ptr_t * vDes;
Abc_Ntk_t * pTemp; int i;
vDes = Vec_PtrAllocExact( 1 + Vec_PtrSize(pNtk->pDesign->vModules) );
Vec_PtrPush( vDes, pNtk->pDesign->pName );
Vec_PtrForEachEntry( Abc_Ntk_t *, pNtk->pDesign->vModules, pTemp, i )
Vec_PtrPush( vDes, Ptr_AbcDeriveNtk(pTemp) );
assert( Ptr_CheckArray(vDes) );
return vDes;
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Ptr_ManExperiment( Abc_Ntk_t * pNtk )
{
abctime clk = Abc_Clock();
char * pFileName = Extra_FileNameGenericAppend(pNtk->pDesign->pName, "_out.blif");
Vec_Ptr_t * vDes = Ptr_AbcDeriveDes( pNtk );
printf( "Converting to Ptr: Memory = %6.3f MB ", 1.0*Cba_PtrMemory(vDes)/(1<<20) );
Abc_PrintTime( 1, "Time", Abc_Clock() - clk );
Cba_PtrDumpBlif( pFileName, vDes );
printf( "Finished writing output file \"%s\". ", pFileName );
Abc_PrintTime( 1, "Time", Abc_Clock() - clk );
Cba_PtrFree( vDes );
}
/**Function*************************************************************
Synopsis [Create Cba_Man_t from tech-ind Ptr.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
static inline int Ptr_NameToType( char * pSop )
{
if ( !strcmp(pSop, "Const0T") ) return CBA_BOX_C0;
if ( !strcmp(pSop, "Const1T") ) return CBA_BOX_C1;
if ( !strcmp(pSop, "BufT") ) return CBA_BOX_BUF;
if ( !strcmp(pSop, "InvT") ) return CBA_BOX_INV;
if ( !strcmp(pSop, "AndT") ) return CBA_BOX_AND;
if ( !strcmp(pSop, "NandT") ) return CBA_BOX_NAND;
if ( !strcmp(pSop, "OrT") ) return CBA_BOX_OR;
if ( !strcmp(pSop, "NorT") ) return CBA_BOX_NOR;
if ( !strcmp(pSop, "XorT") ) return CBA_BOX_XOR;
if ( !strcmp(pSop, "XnorT") ) return CBA_BOX_XNOR;
return CBA_OBJ_BOX;
}
int Ptr_ManCountNtk( Vec_Ptr_t * vNtk )
{
Vec_Ptr_t * vInputs = (Vec_Ptr_t *)Vec_PtrEntry(vNtk, 1);
Vec_Ptr_t * vOutputs = (Vec_Ptr_t *)Vec_PtrEntry(vNtk, 2);
Vec_Ptr_t * vNodes = (Vec_Ptr_t *)Vec_PtrEntry(vNtk, 3);
Vec_Ptr_t * vBoxes = (Vec_Ptr_t *)Vec_PtrEntry(vNtk, 4);
Vec_Ptr_t * vBox; int i, Counter = 0;
assert( Vec_PtrSize(vNodes) == 0 );
Counter += Vec_PtrSize(vInputs);
Counter += Vec_PtrSize(vOutputs);
Vec_PtrForEachEntry( Vec_Ptr_t *, vBoxes, vBox, i )
Counter += Vec_PtrSize(vBox)/2;
return Counter;
}
int Cba_BoxCountOutputs( Cba_Ntk_t * pNtk, char * pBoxNtk )
{
int ModuleId = Cba_ManNtkFindId( pNtk->pDesign, pBoxNtk );
if ( ModuleId == -1 )
return 1;
return Cba_NtkPoNumAlloc( Cba_ManNtk(pNtk->pDesign, ModuleId) );
}
int Cba_NtkDeriveFromPtr( Cba_Ntk_t * pNtk, Vec_Ptr_t * vNtk, Vec_Int_t * vMap, Vec_Int_t * vBox2Id )
{
char * pName, * pModuleName = (char *)Vec_PtrEntry(vNtk, 0);
Vec_Ptr_t * vInputs = (Vec_Ptr_t *)Vec_PtrEntry(vNtk, 1);
Vec_Ptr_t * vOutputs = (Vec_Ptr_t *)Vec_PtrEntry(vNtk, 2);
Vec_Ptr_t * vBoxes = (Vec_Ptr_t *)Vec_PtrEntry(vNtk, 4), * vBox;
int i, k, iObj, iTerm, NameId;
// start network with the given name
NameId = Abc_NamStrFindOrAdd( pNtk->pDesign->pStrs, pModuleName, NULL );
assert( Cba_NtkNameId(pNtk) == NameId );
// map driven NameIds into their ObjIds for PIs
Vec_PtrForEachEntry( char *, vInputs, pName, i )
{
NameId = Abc_NamStrFindOrAdd( pNtk->pDesign->pStrs, pName, NULL );
if ( Vec_IntGetEntryFull(vMap, NameId) != -1 )
{ printf( "PI with name \"%s\" is not unique module \"%s\".\n", pName, pModuleName ); return 0; }
iObj = Cba_ObjAlloc( pNtk, CBA_OBJ_PI, -1, -1 );
Cba_ObjSetName( pNtk, iObj, NameId );
Vec_IntSetEntryFull( vMap, NameId, iObj );
}
// map driven NameIds into their ObjIds for BOs
Vec_IntClear( vBox2Id );
Vec_PtrForEachEntry( Vec_Ptr_t *, vBoxes, vBox, i )
{
char * pBoxNtk = (char *)Vec_PtrEntry(vBox, 0);
char * pBoxName = (char *)Vec_PtrEntry(vBox, 1);
int nOutputs = Cba_BoxCountOutputs( pNtk, pBoxNtk );
int nInputs = Vec_PtrSize(vBox)/2 - nOutputs - 1;
int NtkId = Cba_ManNtkFindId( pNtk->pDesign, pBoxNtk );
assert( Vec_PtrSize(vBox) % 2 == 0 );
assert( nOutputs > 0 && 2*(nOutputs + 1) <= Vec_PtrSize(vBox) );
iObj = Cba_BoxAlloc( pNtk, Ptr_NameToType(pBoxNtk), nInputs, nOutputs, NtkId );
if ( NtkId >= 0 )
Cba_NtkSetHost( Cba_ManNtk(pNtk->pDesign, NtkId), Cba_NtkId(pNtk), iObj );
Cba_ObjSetName( pNtk, iObj, Abc_NamStrFindOrAdd(pNtk->pDesign->pStrs, pBoxName, NULL) );
Cba_BoxForEachBo( pNtk, iObj, iTerm, k )
{
pName = (char *)Vec_PtrEntry( vBox, Vec_PtrSize(vBox) - 2*(nOutputs - k) + 1 );
NameId = Abc_NamStrFindOrAdd( pNtk->pDesign->pStrs, pName, NULL );
if ( Vec_IntGetEntryFull(vMap, NameId) != -1 )
{ printf( "Signal \"%s\" has multiple drivers in module \"%s\".\n", pName, pModuleName ); return 0; }
Cba_ObjSetName( pNtk, iTerm, NameId );
Vec_IntSetEntryFull( vMap, NameId, iTerm );
}
Vec_IntPush( vBox2Id, iObj );
}
assert( Vec_IntSize(vBox2Id) == Vec_PtrSize(vBoxes) );
// connect BIs
Vec_PtrForEachEntry( Vec_Ptr_t *, vBoxes, vBox, i )
{
iObj = Vec_IntEntry( vBox2Id, i );
Cba_BoxForEachBi( pNtk, iObj, iTerm, k )
{
pName = (char *)Vec_PtrEntry( vBox, 2*(k + 1) + 1 );
NameId = Abc_NamStrFindOrAdd( pNtk->pDesign->pStrs, pName, NULL );
if ( Vec_IntGetEntryFull(vMap, NameId) == -1 )
printf( "Signal \"%s\" in not driven in module \"%s\".\n", pName, pModuleName );
Cba_ObjSetFanin( pNtk, iTerm, Vec_IntGetEntryFull(vMap, NameId) );
Cba_ObjSetName( pNtk, iTerm, NameId );
}
}
// connect POs
Vec_PtrForEachEntry( char *, vOutputs, pName, i )
{
NameId = Abc_NamStrFindOrAdd( pNtk->pDesign->pStrs, pName, NULL );
if ( Vec_IntGetEntryFull(vMap, NameId) == -1 )
printf( "PO with name \"%s\" in not driven in module \"%s\".\n", pName, pModuleName );
iObj = Cba_ObjAlloc( pNtk, CBA_OBJ_PO, -1, Vec_IntGetEntryFull(vMap, NameId) );
Cba_ObjSetName( pNtk, iObj, NameId );
}
// update map
Cba_NtkForEachCi( pNtk, iObj )
Vec_IntSetEntryFull( vMap, Cba_ObjName(pNtk, iObj), -1 );
// double check
Vec_IntForEachEntry( vMap, iObj, i )
assert( iObj == -1 );
assert( Cba_NtkObjNum(pNtk) == Vec_StrCap(&pNtk->vType) );
return 1;
}
Cba_Man_t * Cba_PtrTransformToCba( Vec_Ptr_t * vDes )
{
char * pName = (char *)Vec_PtrEntry(vDes, 0);
Cba_Man_t * pNew = Cba_ManAlloc( pName, Vec_PtrSize(vDes) - 1 );
Vec_Int_t * vMap = Vec_IntStartFull( 1000 );
Vec_Int_t * vBox2Id = Vec_IntAlloc( 1000 );
// create interfaces
Cba_Ntk_t * pNtk; int i;
Cba_ManForEachNtk( pNew, pNtk, i )
{
Vec_Ptr_t * vNtk = (Vec_Ptr_t *)Vec_PtrEntry(vDes, i+1);
Vec_Ptr_t * vInputs = (Vec_Ptr_t *)Vec_PtrEntry(vNtk, 1);
Vec_Ptr_t * vOutputs = (Vec_Ptr_t *)Vec_PtrEntry(vNtk, 2);
int NameId = Abc_NamStrFindOrAdd( pNew->pStrs, (char *)Vec_PtrEntry(vNtk, 0), NULL );
Cba_NtkAlloc( pNtk, NameId, Vec_PtrSize(vInputs), Vec_PtrSize(vOutputs), Ptr_ManCountNtk(vNtk) );
Cba_NtkStartNames( pNtk );
}
// parse the networks
Cba_ManForEachNtk( pNew, pNtk, i )
{
Vec_Ptr_t * vNtk = (Vec_Ptr_t *)Vec_PtrEntry(vDes, i+1);
if ( !Cba_NtkDeriveFromPtr( pNtk, vNtk, vMap, vBox2Id ) )
break;
}
if ( i < Cba_ManNtkNum(pNew) )
Cba_ManFree(pNew), pNew = NULL;
Vec_IntFree( vBox2Id );
Vec_IntFree( vMap );
return pNew;
}
/**Function*************************************************************
Synopsis [Create Ptr from mapped Cba_Man_t.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Vec_Ptr_t * Cba_NtkTransformToPtrBox( Cba_Ntk_t * p, int iBox )
{
int i, iTerm, fUser = Cba_ObjIsBoxUser( p, iBox );
Cba_Ntk_t * pBoxNtk = Cba_BoxNtk( p, iBox );
Mio_Library_t * pLib = (Mio_Library_t *)p->pDesign->pMioLib;
Mio_Gate_t * pGate = Mio_LibraryReadGateByName( pLib, Cba_BoxNtkName(p, iBox), NULL );
Vec_Ptr_t * vBox = Vec_PtrAllocExact( Cba_BoxSize(p, iBox) );
Vec_PtrPush( vBox, Cba_BoxNtkName(p, iBox) );
Vec_PtrPush( vBox, Cba_ObjNameStr(p, iBox) );
Cba_BoxForEachBi( p, iBox, iTerm, i )
{
Vec_PtrPush( vBox, fUser ? Cba_ObjNameStr(pBoxNtk, Cba_NtkPi(pBoxNtk, i)) : Mio_GateReadPinName(pGate, i) );
Vec_PtrPush( vBox, Cba_ObjNameStr(p, iTerm) );
}
Cba_BoxForEachBo( p, iBox, iTerm, i )
{
Vec_PtrPush( vBox, fUser ? Cba_ObjNameStr(pBoxNtk, Cba_NtkPo(pBoxNtk, i)) : Mio_GateReadOutName(pGate) );
Vec_PtrPush( vBox, Cba_ObjNameStr(p, iTerm) );
}
assert( Ptr_CheckArray(vBox) );
return vBox;
}
Vec_Ptr_t * Cba_NtkTransformToPtrBoxes( Cba_Ntk_t * p )
{
int iBox;
Vec_Ptr_t * vBoxes = Vec_PtrAllocExact( Cba_NtkBoxNum(p) );
Cba_NtkForEachBox( p, iBox )
Vec_PtrPush( vBoxes, Cba_NtkTransformToPtrBox(p, iBox) );
assert( Ptr_CheckArray(vBoxes) );
return vBoxes;
}
Vec_Ptr_t * Cba_NtkTransformToPtrInputs( Cba_Ntk_t * p )
{
int i, iTerm;
Vec_Ptr_t * vSigs = Vec_PtrAllocExact( Cba_NtkPiNum(p) );
Cba_NtkForEachPi( p, iTerm, i )
Vec_PtrPush( vSigs, Cba_ObjNameStr(p, iTerm) );
assert( Ptr_CheckArray(vSigs) );
return vSigs;
}
Vec_Ptr_t * Cba_NtkTransformToPtrOutputs( Cba_Ntk_t * p )
{
int i, iTerm;
Vec_Ptr_t * vSigs = Vec_PtrAllocExact( Cba_NtkPoNum(p) );
Cba_NtkForEachPo( p, iTerm, i )
Vec_PtrPush( vSigs, Cba_ObjNameStr(p, iTerm) );
assert( Ptr_CheckArray(vSigs) );
return vSigs;
}
Vec_Ptr_t * Cba_NtkTransformToPtr( Cba_Ntk_t * p )
{
Vec_Ptr_t * vNtk = Vec_PtrAllocExact(5);
Vec_PtrPush( vNtk, Cba_NtkName(p) );
Vec_PtrPush( vNtk, Cba_NtkTransformToPtrInputs(p) );
Vec_PtrPush( vNtk, Cba_NtkTransformToPtrOutputs(p) );
Vec_PtrPush( vNtk, Vec_PtrAllocExact(0) );
Vec_PtrPush( vNtk, Cba_NtkTransformToPtrBoxes(p) );
assert( Ptr_CheckArray(vNtk) );
return vNtk;
}
Vec_Ptr_t * Cba_PtrDeriveFromCba( Cba_Man_t * p )
{
Vec_Ptr_t * vDes;
Cba_Ntk_t * pTemp; int i;
if ( p == NULL )
return NULL;
vDes = Vec_PtrAllocExact( 1 + Cba_ManNtkNum(p) );
Vec_PtrPush( vDes, p->pName );
Cba_ManForEachNtk( p, pTemp, i )
Vec_PtrPush( vDes, Cba_NtkTransformToPtr(pTemp) );
assert( Ptr_CheckArray(vDes) );
return vDes;
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
ABC_NAMESPACE_IMPL_END

382
src/base/cba/cbaReadBlif.c
View File

@ -4,9 +4,9 @@
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Verilog parser.]
PackageName [Hierarchical word-level netlist.]
Synopsis [Parses several flavors of word-level Verilog.]
Synopsis [BLIF parser.]
Author [Alan Mishchenko]
@ -18,7 +18,6 @@
***********************************************************************/
#include "cba.h"
#include "cbaPrs.h"
ABC_NAMESPACE_IMPL_START
@ -29,21 +28,21 @@ ABC_NAMESPACE_IMPL_START
// BLIF keywords
typedef enum {
CBA_BLIF_NONE = 0, // 0: unused
CBA_BLIF_MODEL, // 1: .model
CBA_BLIF_INOUTS, // 2: .inouts
CBA_BLIF_INPUTS, // 3: .inputs
CBA_BLIF_OUTPUTS, // 4: .outputs
CBA_BLIF_NAMES, // 5: .names
CBA_BLIF_SUBCKT, // 6: .subckt
CBA_BLIF_GATE, // 7: .gate
CBA_BLIF_LATCH, // 8: .latch
CBA_BLIF_SHORT, // 9: .short
CBA_BLIF_END, // 10: .end
CBA_BLIF_UNKNOWN // 11: unknown
PRS_BLIF_NONE = 0, // 0: unused
PRS_BLIF_MODEL, // 1: .model
PRS_BLIF_INOUTS, // 2: .inouts
PRS_BLIF_INPUTS, // 3: .inputs
PRS_BLIF_OUTPUTS, // 4: .outputs
PRS_BLIF_NAMES, // 5: .names
PRS_BLIF_SUBCKT, // 6: .subckt
PRS_BLIF_GATE, // 7: .gate
PRS_BLIF_LATCH, // 8: .latch
PRS_BLIF_SHORT, // 9: .short
PRS_BLIF_END, // 10: .end
PRS_BLIF_UNKNOWN // 11: unknown
} Cba_BlifType_t;
const char * s_BlifTypes[CBA_BLIF_UNKNOWN+1] = {
const char * s_BlifTypes[PRS_BLIF_UNKNOWN+1] = {
NULL, // 0: unused
".model", // 1: .model
".inouts", // 2: .inputs
@ -58,15 +57,12 @@ const char * s_BlifTypes[CBA_BLIF_UNKNOWN+1] = {
NULL // 11: unknown
};
static inline void Cba_PrsAddBlifDirectives( Cba_Prs_t * p )
static inline void Prs_NtkAddBlifDirectives( Prs_Man_t * p )
{
int i;
for ( i = 1; s_BlifTypes[i]; i++ )
Abc_NamStrFindOrAdd( p->pDesign->pNames, (char *)s_BlifTypes[i], NULL );
assert( Abc_NamObjNumMax(p->pDesign->pNames) == i );
for ( i = 1; i < CBA_NODE_UNKNOWN; i++ )
Abc_NamStrFindOrAdd( p->pDesign->pFuncs, Ptr_TypeToSop(i), NULL );
assert( Abc_NamObjNumMax(p->pDesign->pFuncs) == i );
Abc_NamStrFindOrAdd( p->pStrs, (char *)s_BlifTypes[i], NULL );
assert( Abc_NamObjNumMax(p->pStrs) == i );
}
@ -85,19 +81,19 @@ static inline void Cba_PrsAddBlifDirectives( Cba_Prs_t * p )
SeeAlso []
***********************************************************************/
static inline int Cba_CharIsSpace( char c ) { return c == ' ' || c == '\t' || c == '\r'; }
static inline int Cba_CharIsStop( char c ) { return c == '#' || c == '\\' || c == '\n' || c == '='; }
static inline int Cba_CharIsLit( char c ) { return c == '0' || c == '1' || c == '-'; }
static inline int Prs_CharIsSpace( char c ) { return c == ' ' || c == '\t' || c == '\r'; }
static inline int Prs_CharIsStop( char c ) { return c == '#' || c == '\\' || c == '\n' || c == '='; }
static inline int Prs_CharIsLit( char c ) { return c == '0' || c == '1' || c == '-'; }
static inline int Cba_PrsIsSpace( Cba_Prs_t * p ) { return Cba_CharIsSpace(*p->pCur); }
static inline int Cba_PrsIsStop( Cba_Prs_t * p ) { return Cba_CharIsStop(*p->pCur); }
static inline int Cba_PrsIsLit( Cba_Prs_t * p ) { return Cba_CharIsLit(*p->pCur); }
static inline int Prs_ManIsSpace( Prs_Man_t * p ) { return Prs_CharIsSpace(*p->pCur); }
static inline int Prs_ManIsStop( Prs_Man_t * p ) { return Prs_CharIsStop(*p->pCur); }
static inline int Prs_ManIsLit( Prs_Man_t * p ) { return Prs_CharIsLit(*p->pCur); }
static inline int Cba_PrsIsChar( Cba_Prs_t * p, char c ) { return *p->pCur == c; }
static inline int Cba_PrsIsChar2( Cba_Prs_t * p, char c ) { return *p->pCur++ == c; }
static inline int Prs_ManIsChar( Prs_Man_t * p, char c ) { return *p->pCur == c; }
static inline int Prs_ManIsChar2( Prs_Man_t * p, char c ) { return *p->pCur++ == c; }
static inline void Cba_PrsSkip( Cba_Prs_t * p ) { p->pCur++; }
static inline char Cba_PrsSkip2( Cba_Prs_t * p ) { return *p->pCur++; }
static inline void Prs_ManSkip( Prs_Man_t * p ) { p->pCur++; }
static inline char Prs_ManSkip2( Prs_Man_t * p ) { return *p->pCur++; }
/**Function*************************************************************
@ -111,79 +107,77 @@ static inline char Cba_PrsSkip2( Cba_Prs_t * p ) { return *p->pCur++;
SeeAlso []
***********************************************************************/
static inline void Cba_PrsSkipToChar( Cba_Prs_t * p, char c )
static inline void Prs_ManSkipToChar( Prs_Man_t * p, char c )
{
while ( !Cba_PrsIsChar(p, c) )
Cba_PrsSkip(p);
while ( !Prs_ManIsChar(p, c) )
Prs_ManSkip(p);
}
static inline void Cba_PrsSkipSpaces( Cba_Prs_t * p )
static inline void Prs_ManSkipSpaces( Prs_Man_t * p )
{
while ( 1 )
{
while ( Cba_PrsIsSpace(p) )
Cba_PrsSkip(p);
if ( Cba_PrsIsChar(p, '\\') )
while ( Prs_ManIsSpace(p) )
Prs_ManSkip(p);
if ( Prs_ManIsChar(p, '\\') )
{
Cba_PrsSkipToChar( p, '\n' );
Cba_PrsSkip(p);
Prs_ManSkipToChar( p, '\n' );
Prs_ManSkip(p);
continue;
}
if ( Cba_PrsIsChar(p, '#') )
Cba_PrsSkipToChar( p, '\n' );
if ( Prs_ManIsChar(p, '#') )
Prs_ManSkipToChar( p, '\n' );
break;
}
assert( !Cba_PrsIsSpace(p) );
assert( !Prs_ManIsSpace(p) );
}
static inline int Cba_PrsReadName( Cba_Prs_t * p )
static inline int Prs_ManReadName( Prs_Man_t * p )
{
char * pStart;
Cba_PrsSkipSpaces( p );
if ( Cba_PrsIsChar(p, '\n') )
Prs_ManSkipSpaces( p );
if ( Prs_ManIsChar(p, '\n') )
return 0;
pStart = p->pCur;
while ( !Cba_PrsIsSpace(p) && !Cba_PrsIsStop(p) )
Cba_PrsSkip(p);
while ( !Prs_ManIsSpace(p) && !Prs_ManIsStop(p) )
Prs_ManSkip(p);
if ( pStart == p->pCur )
return 0;
return Abc_NamStrFindOrAddLim( p->pDesign->pNames, pStart, p->pCur, NULL );
return Abc_NamStrFindOrAddLim( p->pStrs, pStart, p->pCur, NULL );
}
static inline int Cba_PrsReadList( Cba_Prs_t * p )
static inline int Prs_ManReadList( Prs_Man_t * p )
{
int iToken;
Vec_IntClear( &p->vTemp );
while ( (iToken = Cba_PrsReadName(p)) )
while ( (iToken = Prs_ManReadName(p)) )
Vec_IntPush( &p->vTemp, iToken );
if ( Vec_IntSize(&p->vTemp) == 0 ) return Cba_PrsErrorSet(p, "Signal list is empty.", 1);
if ( Vec_IntSize(&p->vTemp) == 0 ) return Prs_ManErrorSet(p, "Signal list is empty.", 1);
return 0;
}
static inline int Cba_PrsReadList2( Cba_Prs_t * p )
static inline int Prs_ManReadList2( Prs_Man_t * p )
{
int iToken;
Vec_IntFill( &p->vTemp, 1, -1 );
while ( (iToken = Cba_PrsReadName(p)) )
Vec_IntPush( &p->vTemp, iToken );
iToken = Vec_IntPop(&p->vTemp);
if ( Vec_IntSize(&p->vTemp) == 0 ) return Cba_PrsErrorSet(p, "Signal list is empty.", 1);
Vec_IntWriteEntry( &p->vTemp, 0, iToken );
Vec_IntClear( &p->vTemp );
while ( (iToken = Prs_ManReadName(p)) )
Vec_IntPushTwo( &p->vTemp, 0, iToken );
if ( Vec_IntSize(&p->vTemp) == 0 ) return Prs_ManErrorSet(p, "Signal list is empty.", 1);
return 0;
}
static inline int Cba_PrsReadList3( Cba_Prs_t * p )
static inline int Prs_ManReadList3( Prs_Man_t * p )
{
Vec_IntClear( &p->vTemp );
while ( !Cba_PrsIsChar(p, '\n') )
while ( !Prs_ManIsChar(p, '\n') )
{
int iToken = Cba_PrsReadName(p);
if ( iToken == 0 ) return Cba_PrsErrorSet(p, "Cannot read formal name.", 1);
int iToken = Prs_ManReadName(p);
if ( iToken == 0 ) return Prs_ManErrorSet(p, "Cannot read formal name.", 1);
Vec_IntPush( &p->vTemp, iToken );
Cba_PrsSkipSpaces( p );
if ( !Cba_PrsIsChar2(p, '=') ) return Cba_PrsErrorSet(p, "Cannot find symbol \"=\".", 1);
iToken = Cba_PrsReadName(p);
if ( iToken == 0 ) return Cba_PrsErrorSet(p, "Cannot read actual name.", 1);
Prs_ManSkipSpaces( p );
if ( !Prs_ManIsChar2(p, '=') ) return Prs_ManErrorSet(p, "Cannot find symbol \"=\".", 1);
iToken = Prs_ManReadName(p);
if ( iToken == 0 ) return Prs_ManErrorSet(p, "Cannot read actual name.", 1);
Vec_IntPush( &p->vTemp, iToken );
Cba_PrsSkipSpaces( p );
Prs_ManSkipSpaces( p );
}
if ( Vec_IntSize(&p->vTemp) == 0 ) return Cba_PrsErrorSet(p, "Cannot read a list of formal/actual names.", 1);
if ( Vec_IntSize(&p->vTemp) % 2 ) return Cba_PrsErrorSet(p, "The number of formal/actual names is not even.", 1);
if ( Vec_IntSize(&p->vTemp) == 0 ) return Prs_ManErrorSet(p, "Cannot read a list of formal/actual names.", 1);
if ( Vec_IntSize(&p->vTemp) % 2 ) return Prs_ManErrorSet(p, "The number of formal/actual names is not even.", 1);
return 0;
}
@ -198,38 +192,39 @@ static inline int Cba_PrsReadList3( Cba_Prs_t * p )
SeeAlso []
***********************************************************************/
static inline int Cba_PrsReadCube( Cba_Prs_t * p )
static inline int Prs_ManReadCube( Prs_Man_t * p )
{
assert( Cba_PrsIsLit(p) );
while ( Cba_PrsIsLit(p) )
Vec_StrPush( &p->vCover, Cba_PrsSkip2(p) );
Cba_PrsSkipSpaces( p );
if ( Cba_PrsIsChar(p, '\n') )
assert( Prs_ManIsLit(p) );
while ( Prs_ManIsLit(p) )
Vec_StrPush( &p->vCover, Prs_ManSkip2(p) );
Prs_ManSkipSpaces( p );
if ( Prs_ManIsChar(p, '\n') )
{
if ( Vec_StrSize(&p->vCover) != 1 ) return Cba_PrsErrorSet(p, "Cannot read cube.", 1);
if ( Vec_StrSize(&p->vCover) != 1 ) return Prs_ManErrorSet(p, "Cannot read cube.", 1);
// fix single literal cube by adding space
Vec_StrPush( &p->vCover, Vec_StrEntry(&p->vCover,0) );
Vec_StrWriteEntry( &p->vCover, 0, ' ' );
Vec_StrPush( &p->vCover, '\n' );
return 0;
}
if ( !Cba_PrsIsLit(p) ) return Cba_PrsErrorSet(p, "Cannot read output literal.", 1);
if ( !Prs_ManIsLit(p) ) return Prs_ManErrorSet(p, "Cannot read output literal.", 1);
Vec_StrPush( &p->vCover, ' ' );
Vec_StrPush( &p->vCover, Cba_PrsSkip2(p) );
Vec_StrPush( &p->vCover, Prs_ManSkip2(p) );
Vec_StrPush( &p->vCover, '\n' );
Cba_PrsSkipSpaces( p );
if ( !Cba_PrsIsChar(p, '\n') ) return Cba_PrsErrorSet(p, "Cannot read end of cube.", 1);
Prs_ManSkipSpaces( p );
if ( !Prs_ManIsChar(p, '\n') ) return Prs_ManErrorSet(p, "Cannot read end of cube.", 1);
return 0;
}
static inline void Cba_PrsSaveCover( Cba_Prs_t * p )
static inline void Prs_ManSaveCover( Prs_Man_t * p )
{
int iToken;
assert( Vec_StrSize(&p->vCover) > 0 );
Vec_StrPush( &p->vCover, '\0' );
iToken = Abc_NamStrFindOrAdd( p->pDesign->pFuncs, Vec_StrArray(&p->vCover), NULL );
assert( Vec_IntEntryLast(&p->vFuncsCur) == 1 );
Vec_IntWriteEntry( &p->vFuncsCur, Vec_IntSize(&p->vFuncsCur)-1, iToken );
iToken = Abc_NamStrFindOrAdd( p->pStrs, Vec_StrArray(&p->vCover), NULL );
Vec_StrClear( &p->vCover );
// set the cover to the module of this box
assert( Prs_BoxNtk(p->pNtk, Prs_NtkBoxNum(p->pNtk)-1) == 1 ); // default const 0
Prs_BoxSetNtk( p->pNtk, Prs_NtkBoxNum(p->pNtk)-1, iToken );
}
/**Function*************************************************************
@ -243,144 +238,140 @@ static inline void Cba_PrsSaveCover( Cba_Prs_t * p )
SeeAlso []
***********************************************************************/
static inline int Cba_PrsReadInouts( Cba_Prs_t * p )
static inline int Prs_ManReadInouts( Prs_Man_t * p )
{
if ( Cba_PrsReadList(p) ) return 1;
Vec_IntAppend( &p->vInoutsCur, &p->vTemp );
if ( Prs_ManReadList(p) ) return 1;
Vec_IntAppend( &p->pNtk->vInouts, &p->vTemp );
return 0;
}
static inline int Cba_PrsReadInputs( Cba_Prs_t * p )
static inline int Prs_ManReadInputs( Prs_Man_t * p )
{
if ( Cba_PrsReadList(p) ) return 1;
Vec_IntAppend( &p->vInputsCur, &p->vTemp );
if ( Prs_ManReadList(p) ) return 1;
Vec_IntAppend( &p->pNtk->vInputs, &p->vTemp );
return 0;
}
static inline int Cba_PrsReadOutputs( Cba_Prs_t * p )
static inline int Prs_ManReadOutputs( Prs_Man_t * p )
{
if ( Cba_PrsReadList(p) ) return 1;
Vec_IntAppend( &p->vOutputsCur, &p->vTemp );
if ( Prs_ManReadList(p) ) return 1;
Vec_IntAppend( &p->pNtk->vOutputs, &p->vTemp );
return 0;
}
static inline int Cba_PrsReadNode( Cba_Prs_t * p )
static inline int Prs_ManReadNode( Prs_Man_t * p )
{
if ( Cba_PrsReadList2(p) ) return 1;
if ( Prs_ManReadList2(p) ) return 1;
// save results
Vec_IntPush( &p->vTypesCur, CBA_OBJ_NODE );
Vec_IntPush( &p->vFuncsCur, 1 ); // default const 0 function
Vec_IntPush( &p->vFaninsCur, Cba_ManHandleArray(p->pDesign, &p->vTemp) );
Prs_NtkAddBox( p->pNtk, 1, 0, &p->vTemp ); // default const 0 function
return 0;
}
static inline int Cba_PrsReadBox( Cba_Prs_t * p, int fGate )
static inline int Prs_ManReadBox( Prs_Man_t * p, int fGate )
{
int iToken = Cba_PrsReadName(p);
if ( iToken == 0 ) return Cba_PrsErrorSet(p, "Cannot read model name.", 1);
if ( Cba_PrsReadList3(p) ) return 1;
int iToken = Prs_ManReadName(p);
if ( iToken == 0 ) return Prs_ManErrorSet(p, "Cannot read model name.", 1);
if ( Prs_ManReadList3(p) ) return 1;
// save results
Vec_IntPush( &p->vTypesCur, CBA_OBJ_BOX );
Vec_IntPush( &p->vFuncsCur, iToken );
Vec_IntPush( &p->vFaninsCur, Cba_ManHandleArray(p->pDesign, &p->vTemp) );
Prs_NtkAddBox( p->pNtk, iToken, 0, &p->vTemp );
if ( fGate ) p->pNtk->fMapped = 1;
return 0;
}
static inline int Cba_PrsReadLatch( Cba_Prs_t * p )
static inline int Prs_ManReadLatch( Prs_Man_t * p )
{
int iToken = Cba_PrsReadName(p);
Vec_IntFill( &p->vTemp, 2, -1 );
if ( iToken == 0 ) return Cba_PrsErrorSet(p, "Cannot read latch input.", 1);
int iToken = Prs_ManReadName(p);
Vec_IntClear( &p->vTemp );
if ( iToken == 0 ) return Prs_ManErrorSet(p, "Cannot read latch input.", 1);
Vec_IntWriteEntry( &p->vTemp, 1, iToken );
iToken = Cba_PrsReadName(p);
if ( iToken == 0 ) return Cba_PrsErrorSet(p, "Cannot read latch output.", 1);
iToken = Prs_ManReadName(p);
if ( iToken == 0 ) return Prs_ManErrorSet(p, "Cannot read latch output.", 1);
Vec_IntWriteEntry( &p->vTemp, 0, iToken );
Cba_PrsSkipSpaces( p );
if ( Cba_PrsIsChar(p, '0') )
Prs_ManSkipSpaces( p );
if ( Prs_ManIsChar(p, '0') )
iToken = 0;
else if ( Cba_PrsIsChar(p, '1') )
else if ( Prs_ManIsChar(p, '1') )
iToken = 1;
else
iToken = 2;
Cba_PrsSkipToChar( p, '\n' );
Prs_ManSkipToChar( p, '\n' );
// save results
Vec_IntPush( &p->vTypesCur, CBA_OBJ_LATCH );
Vec_IntPush( &p->vFuncsCur, iToken );
Vec_IntPush( &p->vFaninsCur, Cba_ManHandleArray(p->pDesign, &p->vTemp) );
Prs_NtkAddBox( p->pNtk, -1, iToken, &p->vTemp ); // -1 stands for latch
return 0;
}
static inline int Cba_PrsReadShort( Cba_Prs_t * p )
static inline int Prs_ManReadShort( Prs_Man_t * p )
{
int iToken = Cba_PrsReadName(p);
Vec_IntFill( &p->vTemp, 2, -1 );
if ( iToken == 0 ) return Cba_PrsErrorSet(p, "Cannot read .short input.", 1);
int iToken = Prs_ManReadName(p);
Vec_IntClear( &p->vTemp );
if ( iToken == 0 ) return Prs_ManErrorSet(p, "Cannot read .short input.", 1);
Vec_IntWriteEntry( &p->vTemp, 1, iToken );
iToken = Cba_PrsReadName(p);
if ( iToken == 0 ) return Cba_PrsErrorSet(p, "Cannot read .short output.", 1);
iToken = Prs_ManReadName(p);
if ( iToken == 0 ) return Prs_ManErrorSet(p, "Cannot read .short output.", 1);
Vec_IntWriteEntry( &p->vTemp, 0, iToken );
Cba_PrsSkipSpaces( p );
if ( !Cba_PrsIsChar(p, '\n') ) return Cba_PrsErrorSet(p, "Trailing symbols on .short line.", 1);
Prs_ManSkipSpaces( p );
if ( !Prs_ManIsChar(p, '\n') ) return Prs_ManErrorSet(p, "Trailing symbols on .short line.", 1);
// save results
Vec_IntPush( &p->vTypesCur, CBA_OBJ_NODE );
Vec_IntPush( &p->vFuncsCur, 2 ); // default buffer function
Vec_IntPush( &p->vFaninsCur, Cba_ManHandleArray(p->pDesign, &p->vTemp) );
iToken = Abc_NamStrFindOrAdd( p->pStrs, "1 1\n", NULL );
Prs_NtkAddBox( p->pNtk, iToken, 0, &p->vTemp );
return 0;
}
static inline int Cba_PrsReadModel( Cba_Prs_t * p )
static inline int Prs_ManReadModel( Prs_Man_t * p )
{
if ( p->iModuleName > 0 ) return Cba_PrsErrorSet(p, "Parsing previous model is unfinished.", 1);
p->iModuleName = Cba_PrsReadName(p);
Cba_PrsSkipSpaces( p );
if ( !Cba_PrsIsChar(p, '\n') ) return Cba_PrsErrorSet(p, "Trailing symbols on .model line.", 1);
int iToken;
if ( p->pNtk != NULL ) return Prs_ManErrorSet(p, "Parsing previous model is unfinished.", 1);
iToken = Prs_ManReadName(p);
if ( iToken == 0 ) return Prs_ManErrorSet(p, "Cannot read model name.", 1);
Prs_ManInitializeNtk( p, iToken, 0 );
Prs_ManSkipSpaces( p );
if ( !Prs_ManIsChar(p, '\n') ) return Prs_ManErrorSet(p, "Trailing symbols on .model line.", 1);
return 0;
}
static inline int Cba_PrsReadEnd( Cba_Prs_t * p )
static inline int Prs_ManReadEnd( Prs_Man_t * p )
{
if ( p->iModuleName == 0 ) return Cba_PrsErrorSet(p, "Directive .end without .model.", 1);
//printf( "Saving model \"%s\".\n", Abc_NamStr(p->pDesign->pNames, p->iModuleName) );
Cba_PrsAddCurrentModel( p, p->iModuleName );
p->iModuleName = 0;
Cba_PrsSkipSpaces( p );
if ( !Cba_PrsIsChar(p, '\n') ) return Cba_PrsErrorSet(p, "Trailing symbols on .end line.", 1);
if ( p->pNtk == 0 ) return Prs_ManErrorSet(p, "Directive .end without .model.", 1);
//printf( "Saving model \"%s\".\n", Abc_NamStr(p->pStrs, p->iModuleName) );
Prs_ManFinalizeNtk( p );
Prs_ManSkipSpaces( p );
if ( !Prs_ManIsChar(p, '\n') ) return Prs_ManErrorSet(p, "Trailing symbols on .end line.", 1);
return 0;
}
static inline int Cba_PrsReadDirective( Cba_Prs_t * p )
static inline int Prs_ManReadDirective( Prs_Man_t * p )
{
int iToken;
if ( !Cba_PrsIsChar(p, '.') )
return Cba_PrsReadCube( p );
if ( !Prs_ManIsChar(p, '.') )
return Prs_ManReadCube( p );
if ( Vec_StrSize(&p->vCover) > 0 ) // SOP was specified for the previous node
Cba_PrsSaveCover( p );
iToken = Cba_PrsReadName( p );
if ( iToken == CBA_BLIF_MODEL )
return Cba_PrsReadModel( p );
if ( iToken == CBA_BLIF_INOUTS )
return Cba_PrsReadInouts( p );
if ( iToken == CBA_BLIF_INPUTS )
return Cba_PrsReadInputs( p );
if ( iToken == CBA_BLIF_OUTPUTS )
return Cba_PrsReadOutputs( p );
if ( iToken == CBA_BLIF_NAMES )
return Cba_PrsReadNode( p );
if ( iToken == CBA_BLIF_SUBCKT )
return Cba_PrsReadBox( p, 0 );
if ( iToken == CBA_BLIF_GATE )
return Cba_PrsReadBox( p, 1 );
if ( iToken == CBA_BLIF_LATCH )
return Cba_PrsReadLatch( p );
if ( iToken == CBA_BLIF_SHORT )
return Cba_PrsReadShort( p );
if ( iToken == CBA_BLIF_END )
return Cba_PrsReadEnd( p );
printf( "Cannot read directive \"%s\".\n", Abc_NamStr(p->pDesign->pNames, iToken) );
Prs_ManSaveCover( p );
iToken = Prs_ManReadName( p );
if ( iToken == PRS_BLIF_MODEL )
return Prs_ManReadModel( p );
if ( iToken == PRS_BLIF_INOUTS )
return Prs_ManReadInouts( p );
if ( iToken == PRS_BLIF_INPUTS )
return Prs_ManReadInputs( p );
if ( iToken == PRS_BLIF_OUTPUTS )
return Prs_ManReadOutputs( p );
if ( iToken == PRS_BLIF_NAMES )
return Prs_ManReadNode( p );
if ( iToken == PRS_BLIF_SUBCKT )
return Prs_ManReadBox( p, 0 );
if ( iToken == PRS_BLIF_GATE )
return Prs_ManReadBox( p, 1 );
if ( iToken == PRS_BLIF_LATCH )
return Prs_ManReadLatch( p );
if ( iToken == PRS_BLIF_SHORT )
return Prs_ManReadShort( p );
if ( iToken == PRS_BLIF_END )
return Prs_ManReadEnd( p );
printf( "Cannot read directive \"%s\".\n", Abc_NamStr(p->pStrs, iToken) );
return 1;
}
static inline int Cba_PrsReadLines( Cba_Prs_t * p )
static inline int Prs_ManReadLines( Prs_Man_t * p )
{
while ( p->pCur[1] != '\0' )
{
assert( Cba_PrsIsChar(p, '\n') );
Cba_PrsSkip(p);
Cba_PrsSkipSpaces( p );
if ( Cba_PrsIsChar(p, '\n') )
assert( Prs_ManIsChar(p, '\n') );
Prs_ManSkip(p);
Prs_ManSkipSpaces( p );
if ( Prs_ManIsChar(p, '\n') )
continue;
if ( Cba_PrsReadDirective(p) )
if ( Prs_ManReadDirective(p) )
return 1;
}
return 0;
@ -397,19 +388,18 @@ static inline int Cba_PrsReadLines( Cba_Prs_t * p )
SeeAlso []
***********************************************************************/
Cba_Man_t * Cba_PrsReadBlif( char * pFileName )
Vec_Ptr_t * Prs_ManReadBlif( char * pFileName )
{
Cba_Man_t * pDesign = NULL;
Cba_Prs_t * p = Cba_PrsAlloc( pFileName );
Vec_Ptr_t * vPrs = NULL;
Prs_Man_t * p = Prs_ManAlloc( pFileName );
if ( p == NULL )
return NULL;
Cba_PrsAddBlifDirectives( p );
Cba_PrsReadLines( p );
if ( Cba_PrsErrorPrint(p) )
ABC_SWAP( Cba_Man_t *, pDesign, p->pDesign );
Cba_PrsFree( p );
Cba_PrsRemapBoxModels( pDesign );
return pDesign;
Prs_NtkAddBlifDirectives( p );
Prs_ManReadLines( p );
if ( Prs_ManErrorPrint(p) )
ABC_SWAP( Vec_Ptr_t *, vPrs, p->vNtks );
Prs_ManFree( p );
return vPrs;
}
/**Function*************************************************************
@ -423,22 +413,22 @@ Cba_Man_t * Cba_PrsReadBlif( char * pFileName )
SeeAlso []
***********************************************************************/
void Cba_PrsReadBlifTest( char * pFileName )
void Prs_ManReadBlifTest()
{
abctime clk = Abc_Clock();
extern void Cba_PrsWriteBlif( char * pFileName, Cba_Man_t * pDes );
Cba_Man_t * p = Cba_PrsReadBlif( "aga/ray/ray_hie_oper.blif" );
if ( !p ) return;
printf( "Finished reading %d networks. ", Cba_ManNtkNum(p) );
printf( "NameIDs = %d. ", Abc_NamObjNumMax(p->pNames) );
printf( "Memory = %.2f MB. ", 1.0*Cba_ManMemory(p)/(1<<20) );
extern void Prs_ManWriteBlif( char * pFileName, Vec_Ptr_t * vPrs );
// Vec_Ptr_t * vPrs = Prs_ManReadBlif( "aga/ray/ray_hie_oper.blif" );
Vec_Ptr_t * vPrs = Prs_ManReadBlif( "c/hie/dump/1/netlist_1_out8.blif" );
if ( !vPrs ) return;
printf( "Finished reading %d networks. ", Vec_PtrSize(vPrs) );
printf( "NameIDs = %d. ", Abc_NamObjNumMax(Prs_ManRoot(vPrs)->pStrs) );
printf( "Memory = %.2f MB. ", 1.0*Prs_ManMemory(vPrs)/(1<<20) );
Abc_PrintTime( 1, "Time", Abc_Clock() - clk );
// Abc_NamPrint( p->pDesign->pNames );
Cba_PrsWriteBlif( "aga/ray/ray_hie_oper_out.blif", p );
Cba_ManFree( p );
// Abc_NamPrint( p->pStrs );
Prs_ManWriteBlif( "c/hie/dump/1/netlist_1_out8_out.blif", vPrs );
Prs_ManVecFree( vPrs );
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////

894
src/base/cba/cbaReadVer.c
View File

File diff suppressed because it is too large Load Diff

733
src/base/cba/cbaSimple.c
View File

@ -1,733 +0,0 @@
/**CFile****************************************************************
FileName [cbaSimple.c]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Verilog parser.]
Synopsis [Parses several flavors of word-level Verilog.]
Author [Alan Mishchenko]
Affiliation [UC Berkeley]
Date [Ver. 1.0. Started - November 29, 2014.]
Revision [$Id: cbaSimple.c,v 1.00 2014/11/29 00:00:00 alanmi Exp $]
***********************************************************************/
#include "cba.h"
#include "cbaPrs.h"
#include "base/abc/abc.h"
ABC_NAMESPACE_IMPL_START
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
/*
design = array containing design name (as the first entry in the array) followed by pointers to modules
module = array containing module name (as the first entry in the array) followed by pointers to 6 arrays:
{array of input names; array of output names; array of nodes; array of boxes,
array of floating-point input-arrival times; array of floating-point output-required times}
node = array containing output name, followed by node type, followed by input names
box = array containing model name, instance name, followed by pairs of formal/actual names for each port
Comments:
- in describing boxes
- input formal/actual name pairs should be listed before output name pairs
- the order of formal names should be the same as the order of inputs/outputs in the module description
- all formal names present in the module description should be listed
- if an input pin is not driven or an output pin has no fanout, the actual pin name is NULL
- word-level formal name "a" is written as bit-level names (a[0]. a[1], etc) ordered LSB to MSB
- primitive names should be given as char*-strings in description of nodes and boxes
- primitive modules should not be written, but the list of primitives and formal names should be provided
- constant 0/1 nets can be specified as char*-strings "NetConst0" and "NetConst1".
- arrays of input-arrival/output-required times in the module description are optional
*/
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Function*************************************************************
Synopsis [Node type conversions.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Cba_NodeType_t Ptr_HopToType( Abc_Obj_t * pObj )
{
static word uTruth, uTruths6[3] = {
ABC_CONST(0xAAAAAAAAAAAAAAAA),
ABC_CONST(0xCCCCCCCCCCCCCCCC),
ABC_CONST(0xF0F0F0F0F0F0F0F0),
};
assert( Abc_ObjIsNode(pObj) );
uTruth = Hop_ManComputeTruth6( (Hop_Man_t *)Abc_ObjNtk(pObj)->pManFunc, (Hop_Obj_t *)pObj->pData, Abc_ObjFaninNum(pObj) );
if ( uTruth == 0 ) return CBA_NODE_C0;
if ( uTruth == ~(word)0 ) return CBA_NODE_C1;
if ( uTruth == uTruths6[0] ) return CBA_NODE_BUF;
if ( uTruth == ~uTruths6[0] ) return CBA_NODE_INV;
if ( uTruth == (uTruths6[0] & uTruths6[1]) ) return CBA_NODE_AND;
if ( uTruth == (uTruths6[0] | uTruths6[1]) ) return CBA_NODE_OR;
if ( uTruth == (uTruths6[0] ^ uTruths6[1]) ) return CBA_NODE_XOR;
if ( uTruth == (uTruths6[0] ^~uTruths6[1]) ) return CBA_NODE_XNOR;
assert( 0 );
return CBA_NODE_NONE;
}
/**Function*************************************************************
Synopsis [Dumping hierarchical Abc_Ntk_t in Ptr form.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
char * Ptr_AbcObjName( Abc_Obj_t * pObj )
{
if ( Abc_ObjIsNet(pObj) || Abc_ObjIsBox(pObj) )
return Abc_ObjName(pObj);
if ( Abc_ObjIsCi(pObj) || Abc_ObjIsNode(pObj) )
return Ptr_AbcObjName(Abc_ObjFanout0(pObj));
if ( Abc_ObjIsCo(pObj) )
return Ptr_AbcObjName(Abc_ObjFanin0(pObj));
assert( 0 );
return NULL;
}
static int Ptr_CheckArray( Vec_Ptr_t * vArray )
{
if ( Vec_PtrSize(vArray) == 0 )
return 1;
if ( Abc_MaxInt(8, Vec_PtrSize(vArray)) == Vec_PtrCap(vArray) )
return 1;
assert( 0 );
return 0;
}
Vec_Ptr_t * Ptr_AbcDeriveNode( Abc_Obj_t * pObj )
{
Abc_Obj_t * pFanin; int i;
Vec_Ptr_t * vNode = Vec_PtrAlloc( 2 + Abc_ObjFaninNum(pObj) );
assert( Abc_ObjIsNode(pObj) );
Vec_PtrPush( vNode, Ptr_AbcObjName(pObj) );
if ( Abc_NtkHasAig(pObj->pNtk) )
Vec_PtrPush( vNode, Abc_Int2Ptr(Ptr_HopToType(pObj)) );
else if ( Abc_NtkHasSop(pObj->pNtk) )
Vec_PtrPush( vNode, Abc_Int2Ptr(Ptr_SopToType((char *)pObj->pData)) );
else assert( 0 );
Abc_ObjForEachFanin( pObj, pFanin, i )
Vec_PtrPush( vNode, Ptr_AbcObjName(pFanin) );
assert( Ptr_CheckArray(vNode) );
return vNode;
}
Vec_Ptr_t * Ptr_AbcDeriveNodes( Abc_Ntk_t * pNtk )
{
Abc_Obj_t * pObj; int i;
Vec_Ptr_t * vNodes = Vec_PtrAlloc( Abc_NtkNodeNum(pNtk) );
Abc_NtkForEachNode( pNtk, pObj, i )
Vec_PtrPush( vNodes, Ptr_AbcDeriveNode(pObj) );
assert( Ptr_CheckArray(vNodes) );
return vNodes;
}
Vec_Ptr_t * Ptr_AbcDeriveBox( Abc_Obj_t * pObj )
{
Abc_Obj_t * pNext; int i;
Abc_Ntk_t * pModel = Abc_ObjModel(pObj);
Vec_Ptr_t * vBox = Vec_PtrAlloc( 2 + 2 * Abc_ObjFaninNum(pObj) + 2 * Abc_ObjFanoutNum(pObj) );
assert( Abc_ObjIsBox(pObj) );
Vec_PtrPush( vBox, Abc_NtkName(pModel) );
Vec_PtrPush( vBox, Ptr_AbcObjName(pObj) );
Abc_ObjForEachFanin( pObj, pNext, i )
{
Vec_PtrPush( vBox, Ptr_AbcObjName(Abc_NtkPi(pModel, i)) );
Vec_PtrPush( vBox, Ptr_AbcObjName(pNext) );
}
Abc_ObjForEachFanout( pObj, pNext, i )
{
Vec_PtrPush( vBox, Ptr_AbcObjName(Abc_NtkPo(pModel, i)) );
Vec_PtrPush( vBox, Ptr_AbcObjName(pNext) );
}
assert( Ptr_CheckArray(vBox) );
return vBox;
}
Vec_Ptr_t * Ptr_AbcDeriveBoxes( Abc_Ntk_t * pNtk )
{
Abc_Obj_t * pObj; int i;
Vec_Ptr_t * vBoxes = Vec_PtrAlloc( Abc_NtkBoxNum(pNtk) );
Abc_NtkForEachBox( pNtk, pObj, i )
Vec_PtrPush( vBoxes, Ptr_AbcDeriveBox(pObj) );
assert( Ptr_CheckArray(vBoxes) );
return vBoxes;
}
Vec_Ptr_t * Ptr_AbcDeriveInputs( Abc_Ntk_t * pNtk )
{
Abc_Obj_t * pObj; int i;
Vec_Ptr_t * vSigs = Vec_PtrAlloc( Abc_NtkPiNum(pNtk) );
Abc_NtkForEachPi( pNtk, pObj, i )
Vec_PtrPush( vSigs, Ptr_AbcObjName(pObj) );
assert( Ptr_CheckArray(vSigs) );
return vSigs;
}
Vec_Ptr_t * Ptr_AbcDeriveOutputs( Abc_Ntk_t * pNtk )
{
Abc_Obj_t * pObj; int i;
Vec_Ptr_t * vSigs = Vec_PtrAlloc( Abc_NtkPoNum(pNtk) );
Abc_NtkForEachPo( pNtk, pObj, i )
Vec_PtrPush( vSigs, Ptr_AbcObjName(pObj) );
assert( Ptr_CheckArray(vSigs) );
return vSigs;
}
Vec_Ptr_t * Ptr_AbcDeriveNtk( Abc_Ntk_t * pNtk )
{
Vec_Ptr_t * vNtk = Vec_PtrAlloc( 5 );
Vec_PtrPush( vNtk, Abc_NtkName(pNtk) );
Vec_PtrPush( vNtk, Ptr_AbcDeriveInputs(pNtk) );
Vec_PtrPush( vNtk, Ptr_AbcDeriveOutputs(pNtk) );
Vec_PtrPush( vNtk, Ptr_AbcDeriveNodes(pNtk) );
Vec_PtrPush( vNtk, Ptr_AbcDeriveBoxes(pNtk) );
assert( Ptr_CheckArray(vNtk) );
return vNtk;
}
Vec_Ptr_t * Ptr_AbcDeriveDes( Abc_Ntk_t * pNtk )
{
Vec_Ptr_t * vDes;
Abc_Ntk_t * pTemp; int i;
vDes = Vec_PtrAlloc( 1 + Vec_PtrSize(pNtk->pDesign->vModules) );
Vec_PtrPush( vDes, pNtk->pDesign->pName );
Vec_PtrForEachEntry( Abc_Ntk_t *, pNtk->pDesign->vModules, pTemp, i )
Vec_PtrPush( vDes, Ptr_AbcDeriveNtk(pTemp) );
assert( Ptr_CheckArray(vDes) );
return vDes;
}
/**Function*************************************************************
Synopsis [Dumping Ptr into a Verilog file.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Ptr_ManDumpNodeBlif( FILE * pFile, Vec_Ptr_t * vNode )
{
char * pName; int i;
fprintf( pFile, ".names" );
Vec_PtrForEachEntryStart( char *, vNode, pName, i, 2 )
fprintf( pFile, " %s", pName );
fprintf( pFile, " %s\n", (char *)Vec_PtrEntry(vNode, 0) );
fprintf( pFile, "%s", Ptr_TypeToSop( Abc_Ptr2Int(Vec_PtrEntry(vNode, 1)) ) );
}
void Ptr_ManDumpNodesBlif( FILE * pFile, Vec_Ptr_t * vNodes )
{
Vec_Ptr_t * vNode; int i;
Vec_PtrForEachEntry( Vec_Ptr_t *, vNodes, vNode, i )
Ptr_ManDumpNodeBlif( pFile, vNode );
}
void Ptr_ManDumpBoxBlif( FILE * pFile, Vec_Ptr_t * vBox )
{
char * pName; int i;
fprintf( pFile, ".subckt %s", (char *)Vec_PtrEntry(vBox, 0) );
Vec_PtrForEachEntryStart( char *, vBox, pName, i, 2 )
fprintf( pFile, " %s=%s", pName, (char *)Vec_PtrEntry(vBox, i+1) ), i++;
fprintf( pFile, "\n" );
}
void Ptr_ManDumpBoxesBlif( FILE * pFile, Vec_Ptr_t * vBoxes )
{
Vec_Ptr_t * vBox; int i;
Vec_PtrForEachEntry( Vec_Ptr_t *, vBoxes, vBox, i )
Ptr_ManDumpBoxBlif( pFile, vBox );
}
void Ptr_ManDumpSignalsBlif( FILE * pFile, Vec_Ptr_t * vSigs, int fSkipLastComma )
{
char * pSig; int i;
Vec_PtrForEachEntry( char *, vSigs, pSig, i )
fprintf( pFile, " %s", pSig );
}
void Ptr_ManDumpModuleBlif( FILE * pFile, Vec_Ptr_t * vNtk )
{
fprintf( pFile, ".model %s\n", (char *)Vec_PtrEntry(vNtk, 0) );
fprintf( pFile, ".inputs" );
Ptr_ManDumpSignalsBlif( pFile, (Vec_Ptr_t *)Vec_PtrEntry(vNtk, 1), 0 );
fprintf( pFile, "\n" );
fprintf( pFile, ".outputs" );
Ptr_ManDumpSignalsBlif( pFile, (Vec_Ptr_t *)Vec_PtrEntry(vNtk, 2), 1 );
fprintf( pFile, "\n" );
Ptr_ManDumpNodesBlif( pFile, (Vec_Ptr_t *)Vec_PtrEntry(vNtk, 3) );
Ptr_ManDumpBoxesBlif( pFile, (Vec_Ptr_t *)Vec_PtrEntry(vNtk, 4) );
fprintf( pFile, ".end\n\n" );
}
void Ptr_ManDumpBlif( char * pFileName, Vec_Ptr_t * vDes )
{
FILE * pFile;
Vec_Ptr_t * vNtk; int i;
pFile = fopen( pFileName, "wb" );
if ( pFile == NULL )
{
printf( "Cannot open output file \"%s\".\n", pFileName );
return;
}
fprintf( pFile, "// Design \"%s\" written by ABC on %s\n\n", (char *)Vec_PtrEntry(vDes, 0), Extra_TimeStamp() );
Vec_PtrForEachEntryStart( Vec_Ptr_t *, vDes, vNtk, i, 1 )
Ptr_ManDumpModuleBlif( pFile, vNtk );
fclose( pFile );
}
/**Function*************************************************************
Synopsis [Dumping Ptr into a Verilog file.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Ptr_ManDumpNodeVerilog( FILE * pFile, Vec_Ptr_t * vNode )
{
char * pName; int i;
fprintf( pFile, "%s", Ptr_TypeToName( (Cba_NodeType_t)Abc_Ptr2Int(Vec_PtrEntry(vNode, 1)) ) );
fprintf( pFile, "( %s", (char *)Vec_PtrEntry(vNode, 0) );
Vec_PtrForEachEntryStart( char *, vNode, pName, i, 2 )
fprintf( pFile, ", %s", pName );
fprintf( pFile, " );\n" );
}
void Ptr_ManDumpNodesVerilog( FILE * pFile, Vec_Ptr_t * vNodes )
{
Vec_Ptr_t * vNode; int i;
Vec_PtrForEachEntry( Vec_Ptr_t *, vNodes, vNode, i )
Ptr_ManDumpNodeVerilog( pFile, vNode );
}
void Ptr_ManDumpBoxVerilog( FILE * pFile, Vec_Ptr_t * vBox )
{
char * pName; int i;
fprintf( pFile, "%s %s (", (char *)Vec_PtrEntry(vBox, 0), (char *)Vec_PtrEntry(vBox, 1) );
Vec_PtrForEachEntryStart( char *, vBox, pName, i, 2 )
fprintf( pFile, " .%s(%s)%s", pName, (char *)Vec_PtrEntry(vBox, i+1), i >= Vec_PtrSize(vBox)-2 ? "" : "," ), i++;
fprintf( pFile, " );\n" );
}
void Ptr_ManDumpBoxesVerilog( FILE * pFile, Vec_Ptr_t * vBoxes )
{
Vec_Ptr_t * vBox; int i;
Vec_PtrForEachEntry( Vec_Ptr_t *, vBoxes, vBox, i )
Ptr_ManDumpBoxVerilog( pFile, vBox );
}
void Ptr_ManDumpSignalsVerilog( FILE * pFile, Vec_Ptr_t * vSigs, int fSkipLastComma )
{
char * pSig; int i;
Vec_PtrForEachEntry( char *, vSigs, pSig, i )
fprintf( pFile, " %s%s", pSig, (fSkipLastComma && i == Vec_PtrSize(vSigs)-1) ? "" : "," );
}
void Ptr_ManDumpModuleVerilog( FILE * pFile, Vec_Ptr_t * vNtk )
{
fprintf( pFile, "module %s\n", (char *)Vec_PtrEntry(vNtk, 0) );
fprintf( pFile, "(\n" );
Ptr_ManDumpSignalsVerilog( pFile, (Vec_Ptr_t *)Vec_PtrEntry(vNtk, 1), 0 );
fprintf( pFile, "\n" );
Ptr_ManDumpSignalsVerilog( pFile, (Vec_Ptr_t *)Vec_PtrEntry(vNtk, 2), 1 );
fprintf( pFile, "\n);\ninput" );
Ptr_ManDumpSignalsVerilog( pFile, (Vec_Ptr_t *)Vec_PtrEntry(vNtk, 1), 1 );
fprintf( pFile, ";\noutput" );
Ptr_ManDumpSignalsVerilog( pFile, (Vec_Ptr_t *)Vec_PtrEntry(vNtk, 2), 1 );
fprintf( pFile, ";\n\n" );
Ptr_ManDumpNodesVerilog( pFile, (Vec_Ptr_t *)Vec_PtrEntry(vNtk, 3) );
fprintf( pFile, "\n" );
Ptr_ManDumpBoxesVerilog( pFile, (Vec_Ptr_t *)Vec_PtrEntry(vNtk, 4) );
fprintf( pFile, "endmodule\n\n" );
}
void Ptr_ManDumpVerilog( char * pFileName, Vec_Ptr_t * vDes )
{
FILE * pFile;
Vec_Ptr_t * vNtk; int i;
pFile = fopen( pFileName, "wb" );
if ( pFile == NULL )
{
printf( "Cannot open output file \"%s\".\n", pFileName );
return;
}
fprintf( pFile, "// Design \"%s\" written by ABC on %s\n\n", (char *)Vec_PtrEntry(vDes, 0), Extra_TimeStamp() );
Vec_PtrForEachEntryStart( Vec_Ptr_t *, vDes, vNtk, i, 1 )
Ptr_ManDumpModuleVerilog( pFile, vNtk );
fclose( pFile );
}
/**Function*************************************************************
Synopsis [Count memory used by Ptr.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Ptr_ManMemArray( Vec_Ptr_t * vArray )
{
return (int)Vec_PtrMemory(vArray);
}
int Ptr_ManMemArrayArray( Vec_Ptr_t * vArrayArray )
{
Vec_Ptr_t * vArray; int i, nBytes = 0;
Vec_PtrForEachEntry( Vec_Ptr_t *, vArrayArray, vArray, i )
nBytes += Ptr_ManMemArray(vArray);
return nBytes;
}
int Ptr_ManMemNtk( Vec_Ptr_t * vNtk )
{
int nBytes = (int)Vec_PtrMemory(vNtk);
nBytes += Ptr_ManMemArray( (Vec_Ptr_t *)Vec_PtrEntry(vNtk, 1) );
nBytes += Ptr_ManMemArray( (Vec_Ptr_t *)Vec_PtrEntry(vNtk, 2) );
nBytes += Ptr_ManMemArrayArray( (Vec_Ptr_t *)Vec_PtrEntry(vNtk, 3) );
nBytes += Ptr_ManMemArrayArray( (Vec_Ptr_t *)Vec_PtrEntry(vNtk, 4) );
return nBytes;
}
int Ptr_ManMemDes( Vec_Ptr_t * vDes )
{
Vec_Ptr_t * vNtk; int i, nBytes = (int)Vec_PtrMemory(vDes);
Vec_PtrForEachEntryStart( Vec_Ptr_t *, vDes, vNtk, i, 1 )
nBytes += Ptr_ManMemNtk(vNtk);
return nBytes;
}
/**Function*************************************************************
Synopsis [Free Ptr.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Ptr_ManFreeNtk( Vec_Ptr_t * vNtk )
{
Vec_PtrFree( (Vec_Ptr_t *)Vec_PtrEntry(vNtk, 1) );
Vec_PtrFree( (Vec_Ptr_t *)Vec_PtrEntry(vNtk, 2) );
Vec_VecFree( (Vec_Vec_t *)Vec_PtrEntry(vNtk, 3) );
Vec_VecFree( (Vec_Vec_t *)Vec_PtrEntry(vNtk, 4) );
Vec_PtrFree( vNtk );
}
void Ptr_ManFreeDes( Vec_Ptr_t * vDes )
{
Vec_Ptr_t * vNtk; int i;
Vec_PtrForEachEntryStart( Vec_Ptr_t *, vDes, vNtk, i, 1 )
Ptr_ManFreeNtk( vNtk );
Vec_PtrFree( vDes );
}
/**Function*************************************************************
Synopsis [Count memory use used by Ptr.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Ptr_ManExperiment( Abc_Ntk_t * pNtk )
{
abctime clk = Abc_Clock();
char * pFileName = Extra_FileNameGenericAppend(pNtk->pDesign->pName, "_out.blif");
Vec_Ptr_t * vDes = Ptr_AbcDeriveDes( pNtk );
printf( "Converting to Ptr: Memory = %6.3f MB ", 1.0*Ptr_ManMemDes(vDes)/(1<<20) );
Abc_PrintTime( 1, "Time", Abc_Clock() - clk );
Ptr_ManDumpBlif( pFileName, vDes );
printf( "Finished writing output file \"%s\". ", pFileName );
Abc_PrintTime( 1, "Time", Abc_Clock() - clk );
Ptr_ManFreeDes( vDes );
}
/**Function*************************************************************
Synopsis [Dumping hierarchical Cba_Ntk_t in Ptr form.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Vec_Ptr_t * Ptr_CbaDeriveNode( Cba_Ntk_t * pNtk, int iObj )
{
Vec_Int_t * vFanins = Cba_ObjFaninVec( pNtk, iObj );
Vec_Ptr_t * vNode = Vec_PtrAlloc( 2 + Vec_IntSize(vFanins) );
int i, iFanin;
assert( Cba_ObjIsNode(pNtk, iObj) );
Vec_PtrPush( vNode, Cba_ObjNameStr(pNtk, iObj) );
if ( Abc_NamObjNumMax(pNtk->pDesign->pFuncs) > 1 )
Vec_PtrPush( vNode, Cba_NtkFuncStr( pNtk, Cba_ObjFuncId(pNtk, iObj) ) );
else
Vec_PtrPush( vNode, Abc_Int2Ptr(Cba_ObjFuncId(pNtk, iObj)) );
Vec_IntForEachEntry( vFanins, iFanin, i )
Vec_PtrPush( vNode, Cba_ObjNameStr(pNtk, iFanin) );
assert( Ptr_CheckArray(vNode) );
return vNode;
}
Vec_Ptr_t * Ptr_CbaDeriveNodes( Cba_Ntk_t * pNtk )
{
int i;
Vec_Ptr_t * vNodes = Vec_PtrAlloc( Cba_NtkNodeNum(pNtk) );
Cba_NtkForEachNode( pNtk, i )
Vec_PtrPush( vNodes, Ptr_CbaDeriveNode(pNtk, i) );
assert( Ptr_CheckArray(vNodes) );
return vNodes;
}
Vec_Ptr_t * Ptr_CbaDeriveBox( Cba_Ntk_t * pNtk, int iObj )
{
int i, iTerm;
Vec_Int_t * vFanins = Cba_ObjFaninVec( pNtk, iObj );
Cba_Ntk_t * pModel = Cba_ObjBoxModel( pNtk, iObj );
Vec_Ptr_t * vBox = Vec_PtrAlloc( 2 + Cba_NtkPiNum(pModel) + Cba_NtkPoNum(pModel) );
assert( Cba_ObjIsBox(pNtk, iObj) );
assert( Cba_NtkPiNum(pModel) == Vec_IntSize(vFanins) );
Vec_PtrPush( vBox, Cba_NtkName(pModel) );
Vec_PtrPush( vBox, Vec_IntSize(&pNtk->vInstIds) ? Cba_ObjInstStr(pNtk, iObj) : NULL );
Cba_NtkForEachPi( pModel, iTerm, i )
{
Vec_PtrPush( vBox, Cba_ObjNameStr(pModel, iTerm) );
Vec_PtrPush( vBox, Cba_ObjNameStr(pNtk, Vec_IntEntry(vFanins, i)) );
}
Cba_NtkForEachPo( pModel, iTerm, i )
{
Vec_PtrPush( vBox, Cba_ObjNameStr(pModel, iTerm) );
Vec_PtrPush( vBox, Cba_ObjNameStr(pNtk, iObj+1+i) );
}
assert( Ptr_CheckArray(vBox) );
return vBox;
}
Vec_Ptr_t * Ptr_CbaDeriveBoxes( Cba_Ntk_t * pNtk )
{
int i;
Vec_Ptr_t * vBoxes = Vec_PtrAlloc( Cba_NtkBoxNum(pNtk) );
Cba_NtkForEachBox( pNtk, i )
Vec_PtrPush( vBoxes, Ptr_CbaDeriveBox(pNtk, i) );
assert( Ptr_CheckArray(vBoxes) );
return vBoxes;
}
Vec_Ptr_t * Ptr_CbaDeriveInputs( Cba_Ntk_t * pNtk )
{
int i, iObj;
Vec_Ptr_t * vSigs = Vec_PtrAlloc( Cba_NtkPiNum(pNtk) );
Cba_NtkForEachPi( pNtk, iObj, i )
Vec_PtrPush( vSigs, Cba_ObjNameStr(pNtk, iObj) );
assert( Ptr_CheckArray(vSigs) );
return vSigs;
}
Vec_Ptr_t * Ptr_CbaDeriveOutputs( Cba_Ntk_t * pNtk )
{
int i, iObj;
Vec_Ptr_t * vSigs = Vec_PtrAlloc( Cba_NtkPoNum(pNtk) );
Cba_NtkForEachPo( pNtk, iObj, i )
Vec_PtrPush( vSigs, Cba_ObjNameStr(pNtk, iObj) );
assert( Ptr_CheckArray(vSigs) );
return vSigs;
}
Vec_Ptr_t * Ptr_CbaDeriveNtk( Cba_Ntk_t * pNtk )
{
Vec_Ptr_t * vNtk = Vec_PtrAlloc( 5 );
Vec_PtrPush( vNtk, Cba_NtkName(pNtk) );
Vec_PtrPush( vNtk, Ptr_CbaDeriveInputs(pNtk) );
Vec_PtrPush( vNtk, Ptr_CbaDeriveOutputs(pNtk) );
Vec_PtrPush( vNtk, Ptr_CbaDeriveNodes(pNtk) );
Vec_PtrPush( vNtk, Ptr_CbaDeriveBoxes(pNtk) );
assert( Ptr_CheckArray(vNtk) );
return vNtk;
}
Vec_Ptr_t * Ptr_CbaDeriveDes( Cba_Man_t * p )
{
Vec_Ptr_t * vDes;
Cba_Ntk_t * pTemp; int i;
vDes = Vec_PtrAlloc( 1 + Cba_ManNtkNum(p) );
Vec_PtrPush( vDes, p->pName );
Cba_ManForEachNtk( p, pTemp, i )
Vec_PtrPush( vDes, Ptr_CbaDeriveNtk(pTemp) );
assert( Ptr_CheckArray(vDes) );
return vDes;
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Vec_Int_t * Cba_PrsReadList( Cba_Man_t * p, Vec_Ptr_t * vNames, Vec_Int_t * vList, int nSkip, int nSkip2 )
{
char * pName; int i;
Vec_IntClear( vList );
Vec_PtrForEachEntry( char *, vNames, pName, i )
if ( i != nSkip && i != nSkip2 )
Vec_IntPush( vList, Abc_NamStrFindOrAdd(p->pNames, pName, NULL) );
return vList;
}
void Cba_PrsReadNodes( Cba_Man_t * p, Vec_Ptr_t * vNodes, Vec_Int_t * vTypesCur, Vec_Int_t * vFuncsCur, Vec_Int_t * vFaninsCur, Vec_Int_t * vInstIdsCur, Vec_Int_t * vList )
{
Vec_Ptr_t * vNode; int i;
Vec_PtrForEachEntry( Vec_Ptr_t *, vNodes, vNode, i )
{
Vec_IntPush( vTypesCur, CBA_OBJ_NODE );
Vec_IntPush( vFuncsCur, (Cba_NodeType_t)Abc_Ptr2Int(Vec_PtrEntry(vNode, 1)) );
Vec_IntPush( vFaninsCur, Cba_ManHandleArray(p, Cba_PrsReadList(p, vNode, vList, 1, -1)) );
Vec_IntPush( vInstIdsCur, 0 );
}
}
void Cba_PrsReadBoxes( Cba_Man_t * p, Vec_Ptr_t * vBoxes, Vec_Int_t * vTypesCur, Vec_Int_t * vFuncsCur, Vec_Int_t * vFaninsCur, Vec_Int_t * vInstIdsCur, Vec_Int_t * vList )
{
Vec_Ptr_t * vBox; int i;
Vec_PtrForEachEntry( Vec_Ptr_t *, vBoxes, vBox, i )
{
Vec_IntPush( vTypesCur, CBA_OBJ_BOX );
Vec_IntPush( vFuncsCur, Abc_NamStrFindOrAdd(p->pModels, Vec_PtrEntry(vBox, 0), NULL) );
Vec_IntPush( vFaninsCur, Cba_ManHandleArray(p, Cba_PrsReadList(p, vBox, vList, 0, 1)) );
Vec_IntPush( vInstIdsCur, Abc_NamStrFindOrAdd(p->pNames, Vec_PtrEntry(vBox, 1), NULL) );
}
}
void Cba_PrsReadModule( Cba_Man_t * p, Cba_Ntk_t * pNtk, Vec_Ptr_t * vNtk, Vec_Int_t * vList )
{
Vec_Ptr_t * vInputs = (Vec_Ptr_t *)Vec_PtrEntry(vNtk, 1);
Vec_Ptr_t * vOutputs = (Vec_Ptr_t *)Vec_PtrEntry(vNtk, 2);
Vec_Ptr_t * vNodes = (Vec_Ptr_t *)Vec_PtrEntry(vNtk, 3);
Vec_Ptr_t * vBoxes = (Vec_Ptr_t *)Vec_PtrEntry(vNtk, 4);
Cba_ManAllocArray( p, &pNtk->vInputs, Vec_PtrSize(vInputs) );
Cba_ManAllocArray( p, &pNtk->vOutputs, Vec_PtrSize(vOutputs) );
Cba_ManAllocArray( p, &pNtk->vTypes, Vec_PtrSize(vNodes) + Vec_PtrSize(vBoxes) );
Cba_ManAllocArray( p, &pNtk->vFuncs, Vec_PtrSize(vNodes) + Vec_PtrSize(vBoxes) );
Cba_ManAllocArray( p, &pNtk->vFanins, Vec_PtrSize(vNodes) + Vec_PtrSize(vBoxes) );
Cba_ManAllocArray( p, &pNtk->vInstIds, Vec_PtrSize(vNodes) + Vec_PtrSize(vBoxes) );
Cba_PrsReadList( p, vInputs, &pNtk->vInputs, -1, -1 );
Cba_PrsReadList( p, vOutputs, &pNtk->vOutputs, -1, -1 );
Cba_PrsReadNodes( p, vNodes, &pNtk->vTypes, &pNtk->vFuncs, &pNtk->vFanins, &pNtk->vInstIds, vList );
Cba_PrsReadBoxes( p, vBoxes, &pNtk->vTypes, &pNtk->vFuncs, &pNtk->vFanins, &pNtk->vInstIds, vList );
}
Cba_Man_t * Cba_PrsReadPtr( Vec_Ptr_t * vDes )
{
Vec_Ptr_t * vNtk; int i;
Vec_Int_t * vList = Vec_IntAlloc( 100 );
Cba_Man_t * p = Cba_ManAlloc( NULL, (char *)Vec_PtrEntry(vDes, 0) );
Vec_PtrForEachEntryStart( Vec_Ptr_t *, vDes, vNtk, i, 1 )
Cba_NtkAlloc( p, (char *)Vec_PtrEntry(vNtk, 0) );
Vec_PtrForEachEntryStart( Vec_Ptr_t *, vDes, vNtk, i, 1 )
Cba_PrsReadModule( p, Cba_ManNtk(p, i), vNtk, vList );
Vec_IntFree( vList );
return p;
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Cba_ManReadDesExperiment( Abc_Ntk_t * pNtk )
{
extern Cba_Man_t * Cba_ManBlastTest( Cba_Man_t * p );
abctime clk = Abc_Clock();
Cba_Man_t * p, * pTemp;
char * pFileName;
// derive Ptr from ABC
Vec_Ptr_t * vDes = Ptr_AbcDeriveDes( pNtk );
printf( "Converting to Ptr: Memory = %6.3f MB ", 1.0*Ptr_ManMemDes(vDes)/(1<<20) );
Abc_PrintTime( 1, "Time", Abc_Clock() - clk );
// dump
pFileName = Extra_FileNameGenericAppend(pNtk->pDesign->pName, "_out1.blif");
// Ptr_ManDumpBlif( pFileName, vDes );
printf( "Finished writing output file \"%s\". ", pFileName );
Abc_PrintTime( 1, "Time", Abc_Clock() - clk );
clk = Abc_Clock();
// derive CBA from Ptr
p = Cba_PrsReadPtr( vDes );
Ptr_ManFreeDes( vDes );
// dump
pFileName = Extra_FileNameGenericAppend(pNtk->pDesign->pName, "_out2.blif");
// Cba_PrsWriteBlif( pFileName, p );
printf( "Finished writing output file \"%s\". ", pFileName );
Abc_PrintTime( 1, "Time", Abc_Clock() - clk );
// Abc_NamPrint( p->pNames );
clk = Abc_Clock();
// build CBA from CBA
p = Cba_ManBuild( pTemp = p );
Cba_ManFree( pTemp );
// dump
pFileName = Extra_FileNameGenericAppend(pNtk->pDesign->pName, "_out3.blif");
// Cba_ManWriteBlif( pFileName, p );
printf( "Finished writing output file \"%s\". ", pFileName );
Abc_PrintTime( 1, "Time", Abc_Clock() - clk );
clk = Abc_Clock();
// duplicate CBA
p = Cba_ManDup( pTemp = p );
Cba_ManFree( pTemp );
// dump
pFileName = Extra_FileNameGenericAppend(pNtk->pDesign->pName, "_out4.blif");
// Cba_ManWriteBlif( pFileName, p );
printf( "Finished writing output file \"%s\". ", pFileName );
Abc_PrintTime( 1, "Time", Abc_Clock() - clk );
clk = Abc_Clock();
// CBA->GIA->CBA
p = Cba_ManBlastTest( pTemp = p );
Cba_ManFree( pTemp );
// dump
pFileName = Extra_FileNameGenericAppend(pNtk->pDesign->pName, "_out5.blif");
Cba_ManWriteBlif( pFileName, p );
printf( "Finished writing output file \"%s\". ", pFileName );
Abc_PrintTime( 1, "Time", Abc_Clock() - clk );
clk = Abc_Clock();
Cba_ManFree( p );
}
////////////////////////////////////////////////////////////////////////
/// END OF FILE ///
////////////////////////////////////////////////////////////////////////
ABC_NAMESPACE_IMPL_END

168
src/base/cba/cbaWriteBlif.c
View File

@ -4,9 +4,9 @@
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Verilog parser.]
PackageName [Hierarchical word-level netlist.]
Synopsis [Parses several flavors of word-level Verilog.]
Synopsis [Verilog parser.]
Author [Alan Mishchenko]
@ -14,7 +14,7 @@
Date [Ver. 1.0. Started - November 29, 2014.]
Revision [$Id: cbaWriteVer.c,v 1.00 2014/11/29 00:00:00 alanmi Exp $]
Revision [$Id: cbaWriteBlif.c,v 1.00 2014/11/29 00:00:00 alanmi Exp $]
***********************************************************************/
@ -44,84 +44,79 @@ ABC_NAMESPACE_IMPL_START
SeeAlso []
***********************************************************************/
void Cba_PrsWriteBlifArray( FILE * pFile, Cba_Ntk_t * p, Vec_Int_t * vFanins, int fFirst )
void Prs_ManWriteBlifArray( FILE * pFile, Prs_Ntk_t * p, Vec_Int_t * vFanins )
{
int NameId, i;
Vec_IntForEachEntryStart( vFanins, NameId, i, fFirst )
fprintf( pFile, " %s", Cba_NtkStr(p, NameId) );
if ( fFirst )
fprintf( pFile, " %s", Cba_NtkStr(p, Vec_IntEntry(vFanins,0)) );
int i, NameId;
Vec_IntForEachEntry( vFanins, NameId, i )
fprintf( pFile, " %s", Prs_NtkStr(p, NameId) );
fprintf( pFile, "\n" );
}
void Cba_PrsWriteBlifArray2( FILE * pFile, Cba_Ntk_t * p, Vec_Int_t * vFanins )
void Prs_ManWriteBlifLines( FILE * pFile, Prs_Ntk_t * p )
{
int FormId, NameId, i;
assert( Vec_IntSize(vFanins) % 2 == 0 );
Vec_IntForEachEntryDouble( vFanins, FormId, NameId, i )
fprintf( pFile, " %s=%s", Cba_NtkStr(p, FormId), Cba_NtkStr(p, NameId) );
fprintf( pFile, "\n" );
}
void Cba_PrsWriteBlifLines( FILE * pFile, Cba_Ntk_t * p )
{
int i, Type;
Cba_NtkForEachObjType( p, Type, i )
if ( Type == CBA_OBJ_NODE ) // .names/assign/box2 (no formal/actual binding)
Vec_Int_t * vBox;
int i, k, FormId, ActId;
Prs_NtkForEachBox( p, vBox, i )
{
int NtkId = Prs_BoxNtk(p, i);
assert( Prs_BoxIONum(p, i) > 0 );
assert( Vec_IntSize(vBox) % 2 == 0 );
if ( NtkId == -1 ) // latch
{
fprintf( pFile, ".latch" );
fprintf( pFile, " %s", Prs_NtkStr(p, Vec_IntEntry(vBox, 1)) );
fprintf( pFile, " %s", Prs_NtkStr(p, Vec_IntEntry(vBox, 3)) );
fprintf( pFile, " %c\n", '0' + Prs_BoxName(p, i) );
}
else if ( Prs_BoxIsNode(p, i) ) // node
{
fprintf( pFile, ".names" );
Cba_PrsWriteBlifArray( pFile, p, Cba_ObjFaninVec(p, i), 1 );
//fprintf( pFile, "%s", Cba_NtkFuncStr(p, Cba_ObjFuncId(p, i)) );
fprintf( pFile, "%s", Ptr_TypeToSop( Cba_ObjFuncId(p, i) ) );
Vec_IntForEachEntryDouble( vBox, FormId, ActId, k )
fprintf( pFile, " %s", Prs_NtkStr(p, ActId) );
fprintf( pFile, "\n%s", Prs_NtkStr(p, NtkId) );
}
else if ( Type == CBA_OBJ_BOX ) // .names/assign/box2 (no formal/actual binding)
else // box
{
fprintf( pFile, ".subckt" );
fprintf( pFile, " %s", Cba_NtkName(Cba_ObjBoxModel(p, i)) );
Cba_PrsWriteBlifArray2( pFile, p, Cba_ObjFaninVec(p, i) );
}
else if ( Type == CBA_OBJ_LATCH ) // .names/assign/box2 (no formal/actual binding)
{
Vec_Int_t * vFanins = Cba_ObjFaninVec(p, i);
fprintf( pFile, ".latch" );
fprintf( pFile, " %s", Cba_NtkStr(p, Vec_IntEntry(vFanins, 1)) );
fprintf( pFile, " %s", Cba_NtkStr(p, Vec_IntEntry(vFanins, 0)) );
fprintf( pFile, " %c\n", '0' + Cba_ObjFuncId(p, i) );
fprintf( pFile, " %s", Prs_NtkStr(p, NtkId) );
Vec_IntForEachEntryDouble( vBox, FormId, ActId, k )
fprintf( pFile, " %s=%s", Prs_NtkStr(p, FormId), Prs_NtkStr(p, ActId) );
fprintf( pFile, "\n" );
}
}
}
void Cba_PrsWriteBlifNtk( FILE * pFile, Cba_Ntk_t * p )
void Prs_ManWriteBlifNtk( FILE * pFile, Prs_Ntk_t * p )
{
assert( Vec_IntSize(&p->vTypes) == Cba_NtkObjNum(p) );
assert( Vec_IntSize(&p->vFuncs) == Cba_NtkObjNum(p) );
// write header
fprintf( pFile, ".model %s\n", Cba_NtkName(p) );
fprintf( pFile, ".model %s\n", Prs_NtkStr(p, p->iModuleName) );
if ( Vec_IntSize(&p->vInouts) )
fprintf( pFile, ".inouts" );
if ( Vec_IntSize(&p->vInouts) )
Cba_PrsWriteBlifArray( pFile, p, &p->vInouts, 0 );
Prs_ManWriteBlifArray( pFile, p, &p->vInouts );
fprintf( pFile, ".inputs" );
Cba_PrsWriteBlifArray( pFile, p, &p->vInputs, 0 );
Prs_ManWriteBlifArray( pFile, p, &p->vInputs );
fprintf( pFile, ".outputs" );
Cba_PrsWriteBlifArray( pFile, p, &p->vOutputs, 0 );
Prs_ManWriteBlifArray( pFile, p, &p->vOutputs );
// write objects
Cba_PrsWriteBlifLines( pFile, p );
Prs_ManWriteBlifLines( pFile, p );
fprintf( pFile, ".end\n\n" );
}
void Cba_PrsWriteBlif( char * pFileName, Cba_Man_t * p )
void Prs_ManWriteBlif( char * pFileName, Vec_Ptr_t * vPrs )
{
FILE * pFile;
Cba_Ntk_t * pNtk;
int i;
pFile = fopen( pFileName, "wb" );
Prs_Ntk_t * pNtk = Prs_ManRoot(vPrs);
FILE * pFile = fopen( pFileName, "wb" ); int i;
if ( pFile == NULL )
{
printf( "Cannot open output file \"%s\".\n", pFileName );
return;
}
fprintf( pFile, "# Design \"%s\" written by ABC on %s\n\n", Cba_ManName(p), Extra_TimeStamp() );
Cba_ManForEachNtk( p, pNtk, i )
Cba_PrsWriteBlifNtk( pFile, pNtk );
fprintf( pFile, "# Design \"%s\" written by ABC on %s\n\n", Prs_NtkStr(pNtk, pNtk->iModuleName), Extra_TimeStamp() );
Vec_PtrForEachEntry( Prs_Ntk_t *, vPrs, pNtk, i )
Prs_ManWriteBlifNtk( pFile, pNtk );
fclose( pFile );
}
/**Function*************************************************************
Synopsis [Write elaborated design.]
@ -153,67 +148,52 @@ void Cba_ManWriteBlifArray( FILE * pFile, Cba_Ntk_t * p, Vec_Int_t * vFanins, in
void Cba_ManWriteBlifArray2( FILE * pFile, Cba_Ntk_t * p, int iObj )
{
int iTerm, i;
Cba_Ntk_t * pModel = Cba_ObjBoxModel( p, iObj );
Cba_Ntk_t * pModel = Cba_BoxNtk( p, iObj );
Cba_NtkForEachPi( pModel, iTerm, i )
fprintf( pFile, " %s=%s", Cba_ObjNameStr(pModel, iTerm), Cba_ObjNameStr(p, Cba_ObjBoxBi(p, iObj, i)) );
fprintf( pFile, " %s=%s", Cba_ObjNameStr(pModel, iTerm), Cba_ObjNameStr(p, Cba_BoxBi(p, iObj, i)) );
Cba_NtkForEachPo( pModel, iTerm, i )
fprintf( pFile, " %s=%s", Cba_ObjNameStr(pModel, iTerm), Cba_ObjNameStr(p, Cba_ObjBoxBo(p, iObj, i)) );
fprintf( pFile, " %s=%s", Cba_ObjNameStr(pModel, iTerm), Cba_ObjNameStr(p, Cba_BoxBo(p, iObj, i)) );
fprintf( pFile, "\n" );
}
void Cba_ManWriteBlifLines( FILE * pFile, Cba_Ntk_t * p )
{
int Type, i;
Cba_NtkForEachObjType( p, Type, i )
int i, k, iTerm;
Cba_NtkForEachBox( p, i )
{
if ( Type == CBA_OBJ_NODE ) // .names/assign/box2 (no formal/actual binding)
{
if ( p->pDesign->pMioLib ) // mapped
{
char * pGateName = Abc_NamStr( p->pDesign->pFuncs, Cba_ObjFuncId(p, i) );
Mio_Gate_t * pGate = Mio_LibraryReadGateByName( (Mio_Library_t *)p->pDesign->pMioLib, pGateName, NULL );
fprintf( pFile, ".gate %s", pGateName );
Cba_ManWriteBlifGate( pFile, p, pGate, Cba_ObjFaninVec(p, i), i );
}
else if ( Abc_NamObjNumMax(p->pDesign->pFuncs) > 1 ) // SOP functions
{
fprintf( pFile, ".names" );
Cba_ManWriteBlifArray( pFile, p, Cba_ObjFaninVec(p, i), i );
fprintf( pFile, "%s", Cba_ObjFuncStr(p, i) );
}
else
{
fprintf( pFile, ".names" );
Cba_ManWriteBlifArray( pFile, p, Cba_ObjFaninVec(p, i), i );
//fprintf( pFile, "%s", Cba_NtkFuncStr(p, Cba_ObjFuncId(p, i)) );
fprintf( pFile, "%s", Ptr_TypeToSop( Cba_ObjFuncId(p, i) ) );
}
}
else if ( Type == CBA_OBJ_BOX ) // .names/assign/box2 (no formal/actual binding)
if ( Cba_ObjIsBoxUser(p, i) )
{
fprintf( pFile, ".subckt" );
fprintf( pFile, " %s", Cba_NtkName(Cba_ObjBoxModel(p, i)) );
fprintf( pFile, " %s", Cba_NtkName(Cba_BoxNtk(p, i)) );
Cba_ManWriteBlifArray2( pFile, p, i );
}
else if ( Type == CBA_OBJ_LATCH ) // .names/assign/box2 (no formal/actual binding)
else if ( Cba_ObjIsGate(p, i) )
{
Vec_Int_t * vFanins = Cba_ObjFaninVec(p, i);
fprintf( pFile, ".latch" );
fprintf( pFile, " %s", Cba_ObjNameStr(p, Vec_IntEntry(vFanins, 1)) );
fprintf( pFile, " %s", Cba_ObjNameStr(p, Vec_IntEntry(vFanins, 0)) );
fprintf( pFile, " %c\n", '0' + Cba_ObjFuncId(p, i) );
char * pGateName = Abc_NamStr(p->pDesign->pMods, Cba_BoxNtkId(p, i));
Mio_Library_t * pLib = (Mio_Library_t *)Abc_FrameReadLibGen( Abc_FrameGetGlobalFrame() );
Mio_Gate_t * pGate = Mio_LibraryReadGateByName( pLib, pGateName, NULL );
fprintf( pFile, ".gate %s", pGateName );
Cba_BoxForEachBi( p, i, iTerm, k )
fprintf( pFile, " %s=%s", Mio_GateReadPinName(pGate, k), Cba_ObjNameStr(p, iTerm) );
Cba_BoxForEachBo( p, i, iTerm, k )
fprintf( pFile, " %s=%s", Mio_GateReadOutName(pGate), Cba_ObjNameStr(p, iTerm) );
fprintf( pFile, "\n" );
}
else
{
fprintf( pFile, ".names" );
Cba_BoxForEachBi( p, i, iTerm, k )
fprintf( pFile, " %s", Cba_ObjNameStr(p, iTerm) );
Cba_BoxForEachBo( p, i, iTerm, k )
fprintf( pFile, " %s", Cba_ObjNameStr(p, iTerm) );
fprintf( pFile, "\n%s", Ptr_TypeToSop(Cba_ObjType(p, i)) );
}
}
}
void Cba_ManWriteBlifNtk( FILE * pFile, Cba_Ntk_t * p )
{
assert( Vec_IntSize(&p->vTypes) == Cba_NtkObjNum(p) );
assert( Vec_IntSize(&p->vFuncs) == Cba_NtkObjNum(p) );
assert( Vec_IntSize(&p->vFanin) == Cba_NtkObjNum(p) );
// write header
fprintf( pFile, ".model %s\n", Cba_NtkName(p) );
if ( Vec_IntSize(&p->vInouts) )
fprintf( pFile, ".inouts" );
if ( Vec_IntSize(&p->vInouts) )
Cba_ManWriteBlifArray( pFile, p, &p->vInouts, -1 );
fprintf( pFile, ".inputs" );
Cba_ManWriteBlifArray( pFile, p, &p->vInputs, -1 );
fprintf( pFile, ".outputs" );
@ -228,7 +208,7 @@ void Cba_ManWriteBlif( char * pFileName, Cba_Man_t * p )
Cba_Ntk_t * pNtk;
int i;
// check the library
if ( Abc_NamObjNumMax(p->pFuncs) > 1 && p->pMioLib != Abc_FrameReadLibGen() )
if ( p->pMioLib && p->pMioLib != Abc_FrameReadLibGen() )
{
printf( "Genlib library used in the mapped design is not longer a current library.\n" );
return;

339
src/base/cba/cbaWriteVer.c
View File

@ -1,12 +1,12 @@
/**CFile****************************************************************
FileName [cba.c]
FileName [cbaWriteVer.c]
SystemName [ABC: Logic synthesis and verification system.]
PackageName [Verilog parser.]
PackageName [Hierarchical word-level netlist.]
Synopsis [Parses several flavors of word-level Verilog.]
Synopsis [Verilog writer.]
Author [Alan Mishchenko]
@ -14,12 +14,13 @@
Date [Ver. 1.0. Started - November 29, 2014.]
Revision [$Id: cba.c,v 1.00 2014/11/29 00:00:00 alanmi Exp $]
Revision [$Id: cbaWriteVer.c,v 1.00 2014/11/29 00:00:00 alanmi Exp $]
***********************************************************************/
#include "cba.h"
#include "cbaPrs.h"
#include "base/main/main.h"
ABC_NAMESPACE_IMPL_START
@ -42,147 +43,142 @@ ABC_NAMESPACE_IMPL_START
SeeAlso []
***********************************************************************/
void Cba_PrsWriteVerilogMux( FILE * pFile, Cba_Ntk_t * p, Vec_Int_t * vFanins )
void Prs_ManWriteVerilogConcat( FILE * pFile, Prs_Ntk_t * p, int Con )
{
int NameId, RangeId, i;
char * pStrs[4] = { " = ", " ? ", " : ", ";\n" };
assert( Vec_IntSize(vFanins) == 8 );
fprintf( pFile, " assign " );
Vec_IntForEachEntryDouble( vFanins, NameId, RangeId, i )
{
fprintf( pFile, "%s%s%s", Cba_NtkStr(p, NameId), RangeId > 0 ? Cba_NtkStr(p, RangeId) : "", pStrs[i/2] );
}
}
void Cba_PrsWriteVerilogConcat( FILE * pFile, Cba_Ntk_t * p, int Id )
{
extern void Cba_PrsWriteVerilogArray2( FILE * pFile, Cba_Ntk_t * p, Vec_Int_t * vFanins );
extern void Prs_ManWriteVerilogArray( FILE * pFile, Prs_Ntk_t * p, Vec_Int_t * vSigs, int Start, int Stop, int fOdd );
Vec_Int_t * vSigs = Prs_CatSignals(p, Con);
fprintf( pFile, "{" );
Cba_PrsWriteVerilogArray2( pFile, p, Cba_ObjFaninVec2(p, Id) );
Prs_ManWriteVerilogArray( pFile, p, vSigs, 0, Vec_IntSize(vSigs), 0 );
fprintf( pFile, "}" );
}
void Cba_PrsWriteVerilogArray2( FILE * pFile, Cba_Ntk_t * p, Vec_Int_t * vFanins )
void Prs_ManWriteVerilogSignal( FILE * pFile, Prs_Ntk_t * p, int Sig )
{
int NameId, RangeId, i;
assert( Vec_IntSize(vFanins) % 2 == 0 );
Vec_IntForEachEntryDouble( vFanins, NameId, RangeId, i )
int Value = Abc_Lit2Var2( Sig );
Prs_ManType_t Type = Abc_Lit2Att2( Sig );
if ( Type == CBA_PRS_NAME || Type == CBA_PRS_CONST )
fprintf( pFile, "%s", Prs_NtkStr(p, Value) );
else if ( Type == CBA_PRS_SLICE )
fprintf( pFile, "%s%s", Prs_NtkStr(p, Prs_SliceName(p, Value)), Prs_NtkStr(p, Prs_SliceRange(p, Value)) );
else if ( Type == CBA_PRS_CONCAT )
Prs_ManWriteVerilogConcat( pFile, p, Value );
else assert( 0 );
}
void Prs_ManWriteVerilogArray( FILE * pFile, Prs_Ntk_t * p, Vec_Int_t * vSigs, int Start, int Stop, int fOdd )
{
int i, Sig;
assert( Vec_IntSize(vSigs) > 0 );
Vec_IntForEachEntryStartStop( vSigs, Sig, i, Start, Stop )
{
assert( RangeId >= -2 );
if ( RangeId == -2 )
Cba_PrsWriteVerilogConcat( pFile, p, NameId-1 );
else if ( RangeId == -1 )
fprintf( pFile, "%s", Cba_NtkStr(p, NameId) );
else
fprintf( pFile, "%s%s", Cba_NtkStr(p, NameId), RangeId ? Cba_NtkStr(p, RangeId) : "" );
fprintf( pFile, "%s", (i == Vec_IntSize(vFanins) - 2) ? "" : ", " );
if ( fOdd && !(i & 1) )
continue;
Prs_ManWriteVerilogSignal( pFile, p, Sig );
fprintf( pFile, "%s", i == Stop - 1 ? "" : ", " );
}
}
void Cba_PrsWriteVerilogArray3( FILE * pFile, Cba_Ntk_t * p, Vec_Int_t * vFanins )
void Prs_ManWriteVerilogArray2( FILE * pFile, Prs_Ntk_t * p, Vec_Int_t * vSigs )
{
int FormId, NameId, RangeId, i;
assert( Vec_IntSize(vFanins) % 3 == 0 );
Vec_IntForEachEntryTriple( vFanins, FormId, NameId, RangeId, i )
int i, FormId, ActSig;
assert( Vec_IntSize(vSigs) % 2 == 0 );
Vec_IntForEachEntryDouble( vSigs, FormId, ActSig, i )
{
fprintf( pFile, ".%s(", Cba_NtkStr(p, FormId) );
if ( RangeId == -2 )
Cba_PrsWriteVerilogConcat( pFile, p, NameId-1 );
else if ( RangeId == -1 )
fprintf( pFile, "%s", Cba_NtkStr(p, NameId) );
else
fprintf( pFile, "%s%s", Cba_NtkStr(p, NameId), RangeId ? Cba_NtkStr(p, RangeId) : "" );
fprintf( pFile, ")%s", (i == Vec_IntSize(vFanins) - 3) ? "" : ", " );
fprintf( pFile, "." );
fprintf( pFile, "%s", Prs_NtkStr(p, FormId) );
fprintf( pFile, "(" );
Prs_ManWriteVerilogSignal( pFile, p, ActSig );
fprintf( pFile, ")%s", (i == Vec_IntSize(vSigs) - 2) ? "" : ", " );
}
}
void Cba_PrsWriteVerilogNodes( FILE * pFile, Cba_Ntk_t * p )
void Prs_ManWriteVerilogMux( FILE * pFile, Prs_Ntk_t * p, Vec_Int_t * vSigs )
{
int Type, Func, i;
Cba_NtkForEachObjType( p, Type, i )
if ( Type == CBA_OBJ_NODE ) // .names/assign/box2 (no formal/actual binding)
int i, FormId, ActSig;
char * pStrs[4] = { " = ", " ? ", " : ", ";\n" };
assert( Vec_IntSize(vSigs) == 8 );
fprintf( pFile, " assign " );
Prs_ManWriteVerilogSignal( pFile, p, Vec_IntEntryLast(vSigs) );
fprintf( pFile, "%s", pStrs[0] );
Vec_IntForEachEntryDouble( vSigs, FormId, ActSig, i )
{
Prs_ManWriteVerilogSignal( pFile, p, ActSig );
fprintf( pFile, "%s", pStrs[1+i/2] );
if ( i == 4 )
break;
}
}
void Prs_ManWriteVerilogBoxes( FILE * pFile, Prs_Ntk_t * p )
{
Vec_Int_t * vBox; int i;
Prs_NtkForEachBox( p, vBox, i )
{
int NtkId = Prs_BoxNtk(p, i);
if ( NtkId == CBA_BOX_MUX )
Prs_ManWriteVerilogMux( pFile, p, vBox );
else if ( Prs_BoxIsNode(p, i) ) // node ------- check order of fanins
{
Func = Cba_ObjFuncId(p, i);
if ( Func >= CBA_NODE_BUF && Func <= CBA_NODE_XNOR )
{
fprintf( pFile, " %s (", Ptr_TypeToName(Func) );
Cba_PrsWriteVerilogArray2( pFile, p, Cba_ObjFaninVec(p, i) );
fprintf( pFile, ");\n" );
}
else if ( Func == CBA_NODE_MUX )
Cba_PrsWriteVerilogMux( pFile, p, Cba_ObjFaninVec(p, i) );
else
{
//char * pName = Cba_NtkStr(p, Func);
assert( 0 );
}
fprintf( pFile, " %s (", Ptr_TypeToName(NtkId) );
Prs_ManWriteVerilogSignal( pFile, p, Vec_IntEntryLast(vBox) );
if ( Prs_BoxIONum(p, i) > 1 )
fprintf( pFile, ", " );
Prs_ManWriteVerilogArray( pFile, p, vBox, 0, Vec_IntSize(vBox)-2, 1 );
fprintf( pFile, ");\n" );
}
else // box
{
//char * s = Prs_NtkStr(p, Vec_IntEntry(vBox, 0));
fprintf( pFile, " %s %s (", Prs_NtkStr(p, NtkId), Prs_BoxName(p, i) ? Prs_NtkStr(p, Prs_BoxName(p, i)) : "" );
Prs_ManWriteVerilogArray2( pFile, p, vBox );
fprintf( pFile, ");\n" );
}
}
void Cba_PrsWriteVerilogBoxes( FILE * pFile, Cba_Ntk_t * p )
{
int i;
Cba_NtkForEachBox( p, i ) // .subckt/.gate/box (formal/actual binding)
{
fprintf( pFile, " %s %s (", Cba_NtkName(Cba_ObjBoxModel(p, i)), Cba_ObjInstStr(p, i) );
Cba_PrsWriteVerilogArray3( pFile, p, Cba_ObjFaninVec(p, i) );
fprintf( pFile, ");\n" );
}
}
void Cba_PrsWriteVerilogSignals( FILE * pFile, Cba_Ntk_t * p, int SigType )
void Prs_ManWriteVerilogIos( FILE * pFile, Prs_Ntk_t * p, int SigType )
{
int NameId, RangeId, i;
char * pSigNames[4] = { "inout", "input", "output", "wire" };
Vec_Int_t * vSigs[4] = { &p->vInouts, &p->vInputs, &p->vOutputs, &p->vWires };
Vec_IntForEachEntryDouble( vSigs[SigType], NameId, RangeId, i )
fprintf( pFile, " %s %s%s;\n", pSigNames[SigType], RangeId ? Cba_NtkStr(p, RangeId) : "", Cba_NtkStr(p, NameId) );
char * pSigNames[4] = { "inout", "input", "output", "wire" };
Vec_Int_t * vSigs[4] = { &p->vInouts, &p->vInputs, &p->vOutputs, &p->vWires };
Vec_Int_t * vSigsR[4] = { &p->vInoutsR, &p->vInputsR, &p->vOutputsR, &p->vWiresR };
if ( SigType == 3 )
fprintf( pFile, "\n" );
Vec_IntForEachEntryTwo( vSigs[SigType], vSigsR[SigType], NameId, RangeId, i )
fprintf( pFile, " %s %s%s;\n", pSigNames[SigType], RangeId ? Prs_NtkStr(p, RangeId) : "", Prs_NtkStr(p, NameId) );
}
void Cba_PrsWriteVerilogSignalList( FILE * pFile, Cba_Ntk_t * p, int SigType, int fSkipComma )
void Prs_ManWriteVerilogIoOrder( FILE * pFile, Prs_Ntk_t * p, Vec_Int_t * vOrder )
{
int NameId, RangeId, i;
Vec_Int_t * vSigs[4] = { &p->vInouts, &p->vInputs, &p->vOutputs, &p->vWires };
Vec_IntForEachEntryDouble( vSigs[SigType], NameId, RangeId, i )
fprintf( pFile, "%s%s", Cba_NtkStr(p, NameId), (fSkipComma && i == Vec_IntSize(vSigs[SigType]) - 2) ? "" : ", " );
int i, NameId;
Vec_IntForEachEntry( vOrder, NameId, i )
fprintf( pFile, "%s%s", Prs_NtkStr(p, NameId), i == Vec_IntSize(vOrder) - 1 ? "" : ", " );
}
void Cba_PrsWriteVerilogNtk( FILE * pFile, Cba_Ntk_t * p )
void Prs_ManWriteVerilogNtk( FILE * pFile, Prs_Ntk_t * p )
{
int s;
assert( Vec_IntSize(&p->vTypes) == Cba_NtkObjNum(p) );
assert( Vec_IntSize(&p->vFuncs) == Cba_NtkObjNum(p) );
assert( Vec_IntSize(&p->vInstIds) == Cba_NtkObjNum(p) );
// write header
fprintf( pFile, "module %s (\n", Cba_NtkName(p) );
for ( s = 0; s < 3; s++ )
{
if ( s == 0 && Vec_IntSize(&p->vInouts) == 0 )
continue;
fprintf( pFile, " " );
Cba_PrsWriteVerilogSignalList( pFile, p, s, s==2 );
fprintf( pFile, "\n" );
}
fprintf( pFile, " );\n" );
fprintf( pFile, "module %s (\n ", Prs_NtkStr(p, p->iModuleName) );
Prs_ManWriteVerilogIoOrder( pFile, p, &p->vOrder );
fprintf( pFile, "\n );\n" );
// write declarations
for ( s = 0; s < 4; s++ )
Cba_PrsWriteVerilogSignals( pFile, p, s );
Prs_ManWriteVerilogIos( pFile, p, s );
fprintf( pFile, "\n" );
// write objects
Cba_PrsWriteVerilogNodes( pFile, p );
Cba_PrsWriteVerilogBoxes( pFile, p );
Prs_ManWriteVerilogBoxes( pFile, p );
fprintf( pFile, "endmodule\n\n" );
}
void Cba_PrsWriteVerilog( char * pFileName, Cba_Man_t * p )
void Prs_ManWriteVerilog( char * pFileName, Vec_Ptr_t * vPrs )
{
FILE * pFile;
Cba_Ntk_t * pNtk;
int i;
pFile = fopen( pFileName, "wb" );
Prs_Ntk_t * pNtk = Prs_ManRoot(vPrs); int i;
FILE * pFile = fopen( pFileName, "wb" );
if ( pFile == NULL )
{
printf( "Cannot open output file \"%s\".\n", pFileName );
return;
}
fprintf( pFile, "// Design \"%s\" written by ABC on %s\n\n", Cba_ManName(p), Extra_TimeStamp() );
Cba_ManForEachNtk( p, pNtk, i )
Cba_PrsWriteVerilogNtk( pFile, pNtk );
fprintf( pFile, "// Design \"%s\" written by ABC on %s\n\n", Prs_NtkStr(pNtk, pNtk->iModuleName), Extra_TimeStamp() );
Vec_PtrForEachEntry( Prs_Ntk_t *, vPrs, pNtk, i )
Prs_ManWriteVerilogNtk( pFile, pNtk );
fclose( pFile );
}
/**Function*************************************************************
Synopsis [Collect all nodes names used that are not inputs/outputs.]
@ -194,47 +190,42 @@ void Cba_PrsWriteVerilog( char * pFileName, Cba_Man_t * p )
SeeAlso []
***********************************************************************/
Vec_Int_t * Cba_NtkCollectWires( Cba_Ntk_t * p, Vec_Int_t * vMap )
Vec_Int_t * Cba_NtkCollectWires( Cba_Ntk_t * p, Vec_Int_t * vMap, Vec_Int_t * vWires )
{
Vec_Int_t * vWires = &p->vWires;
int i, iObj, iFanin, Type, NameId;
int i, k, iTerm, iObj, NameId;
Vec_IntClear( vWires );
Cba_NtkForEachPi( p, iObj, i )
Vec_IntWriteEntry( vMap, Cba_ObjNameId(p, iObj), 1 );
Vec_IntWriteEntry( vMap, Cba_ObjName(p, iObj), 1 );
Cba_NtkForEachPo( p, iObj, i )
Vec_IntWriteEntry( vMap, Cba_ObjNameId(p, iObj), 1 );
Cba_NtkForEachObjType( p, Type, iObj )
Vec_IntWriteEntry( vMap, Cba_ObjName(p, iObj), 1 );
Cba_NtkForEachBox( p, iObj )
{
if ( Type == CBA_OBJ_NODE )
Cba_BoxForEachBi( p, iObj, iTerm, k )
{
Vec_Int_t * vFanins = Cba_ObjFaninVec( p, iObj );
Vec_IntForEachEntry( vFanins, iFanin, i )
{
NameId = Cba_ObjNameId( p, iFanin );
if ( Vec_IntEntry(vMap, NameId) == 0 )
{
Vec_IntWriteEntry( vMap, NameId, 1 );
Vec_IntPush( vWires, NameId );
}
}
}
else if ( Cba_ObjIsPo(p, iObj) || Cba_ObjIsBi(p, iObj) )
{
iFanin = Cba_ObjFanin0( p, iObj );
NameId = Cba_ObjNameId( p, iFanin );
NameId = Cba_ObjName( p, iTerm );
if ( Vec_IntEntry(vMap, NameId) == 0 )
{
Vec_IntWriteEntry( vMap, NameId, 1 );
Vec_IntPush( vWires, NameId );
Vec_IntPush( vWires, iTerm );
}
}
Cba_BoxForEachBo( p, iObj, iTerm, k )
{
NameId = Cba_ObjName( p, iTerm );
if ( Vec_IntEntry(vMap, NameId) == 0 )
{
Vec_IntWriteEntry( vMap, NameId, 1 );
Vec_IntPush( vWires, iTerm );
}
}
}
Cba_NtkForEachPi( p, iObj, i )
Vec_IntWriteEntry( vMap, Cba_ObjNameId(p, iObj), 0 );
Vec_IntWriteEntry( vMap, Cba_ObjName(p, iObj), 0 );
Cba_NtkForEachPo( p, iObj, i )
Vec_IntWriteEntry( vMap, Cba_ObjNameId(p, iObj), 0 );
Vec_IntForEachEntry( vWires, NameId, i )
Vec_IntWriteEntry( vMap, NameId, 0 );
Vec_IntWriteEntry( vMap, Cba_ObjName(p, iObj), 0 );
Vec_IntForEachEntry( vWires, iObj, i )
Vec_IntWriteEntry( vMap, Cba_ObjName(p, iObj), 0 );
//Vec_IntSort( vWires, 0 );
return vWires;
}
@ -256,40 +247,39 @@ void Cba_ManWriteVerilogArray2( FILE * pFile, Cba_Ntk_t * p, int iObj, Vec_Int_t
Vec_IntForEachEntry( vFanins, iFanin, i )
fprintf( pFile, "%s%s", Cba_ObjNameStr(p, iFanin), (i == Vec_IntSize(vFanins) - 1) ? "" : ", " );
}
void Cba_ManWriteVerilogNodes( FILE * pFile, Cba_Ntk_t * p )
{
int Func, i;
Cba_NtkForEachNode( p, i ) // .names/assign/box2 (no formal/actual binding)
{
Func = Cba_ObjFuncId(p, i);
if ( Func >= CBA_NODE_BUF && Func <= CBA_NODE_XNOR )
{
fprintf( pFile, " %s (", Ptr_TypeToName(Func) );
Cba_ManWriteVerilogArray2( pFile, p, i, Cba_ObjFaninVec(p, i) );
fprintf( pFile, ");\n" );
}
else assert( 0 );
}
}
void Cba_ManWriteVerilogBoxes( FILE * pFile, Cba_Ntk_t * p )
{
int i, k, iTerm;
Cba_NtkForEachBox( p, i ) // .subckt/.gate/box (formal/actual binding)
{
Cba_Ntk_t * pModel = Cba_ObjBoxModel( p, i );
fprintf( pFile, " %s %s (", Cba_NtkName(pModel), Vec_IntSize(&p->vInstIds) ? Cba_ObjInstStr(p, i) : "" );
Cba_NtkForEachPi( pModel, iTerm, k )
fprintf( pFile, " %s=%s", Cba_ObjNameStr(pModel, iTerm), Cba_ObjNameStr(p, Cba_ObjBoxBi(p, i, k)) );
Cba_NtkForEachPo( pModel, iTerm, k )
fprintf( pFile, " %s=%s", Cba_ObjNameStr(pModel, iTerm), Cba_ObjNameStr(p, Cba_ObjBoxBo(p, i, k)) );
fprintf( pFile, "\n" );
if ( Cba_ObjIsBoxUser(p, i) )
{
Cba_Ntk_t * pModel = Cba_BoxNtk( p, i );
fprintf( pFile, " %s %s (", Cba_NtkName(pModel), Cba_ObjNameStr(p, i) ? Cba_ObjNameStr(p, i) : "" );
Cba_NtkForEachPi( pModel, iTerm, k )
fprintf( pFile, "%s.%s(%s)", k ? ", " : "", Cba_ObjNameStr(pModel, iTerm), Cba_ObjNameStr(p, Cba_BoxBi(p, i, k)) );
Cba_NtkForEachPo( pModel, iTerm, k )
fprintf( pFile, "%s.%s(%s)", Cba_NtkPiNum(pModel) ? ", " : "", Cba_ObjNameStr(pModel, iTerm), Cba_ObjNameStr(p, Cba_BoxBo(p, i, k)) );
fprintf( pFile, ")\n" );
}
else
{
Cba_ObjType_t Type = Cba_ObjType( p, i );
int nInputs = Cba_BoxBiNum(p, i);
fprintf( pFile, " %s (", Ptr_TypeToName(Type) );
Cba_BoxForEachBo( p, i, iTerm, k )
fprintf( pFile, "%s%s", Cba_ObjNameStr(p, iTerm), nInputs ? ", " : "" );
Cba_BoxForEachBi( p, i, iTerm, k )
fprintf( pFile, "%s%s", Cba_ObjNameStr(p, iTerm), k < nInputs - 1 ? ", " : "" );
fprintf( pFile, ");\n" );
}
}
}
void Cba_ManWriteVerilogSignals( FILE * pFile, Cba_Ntk_t * p, int SigType, int fNoRange )
void Cba_ManWriteVerilogSignals( FILE * pFile, Cba_Ntk_t * p, int SigType, int fNoRange, Vec_Int_t * vWires )
{
int NameId, RangeId, i;
char * pSigNames[4] = { "inout", "input", "output", "wire" };
Vec_Int_t * vSigs[4] = { &p->vInouts, &p->vInputs, &p->vOutputs, &p->vWires };
char * pSigNames[3] = { "input", "output", "wire" };
Vec_Int_t * vSigs[3] = { &p->vInputs, &p->vOutputs, vWires };
if ( fNoRange )
{
Vec_IntForEachEntry( vSigs[SigType], NameId, i )
@ -301,10 +291,10 @@ void Cba_ManWriteVerilogSignals( FILE * pFile, Cba_Ntk_t * p, int SigType, int f
fprintf( pFile, " %s %s%s;\n", pSigNames[SigType], RangeId ? Cba_NtkStr(p, RangeId) : "", SigType==3 ? Cba_NtkStr(p, NameId) : Cba_ObjNameStr(p, NameId) );
}
}
void Cba_ManWriteVerilogSignalList( FILE * pFile, Cba_Ntk_t * p, int SigType, int fSkipComma, int fNoRange )
void Cba_ManWriteVerilogSignalList( FILE * pFile, Cba_Ntk_t * p, int SigType, int fSkipComma, int fNoRange, Vec_Int_t * vWires )
{
int NameId, RangeId, i;
Vec_Int_t * vSigs[4] = { &p->vInouts, &p->vInputs, &p->vOutputs, &p->vWires };
Vec_Int_t * vSigs[3] = { &p->vInputs, &p->vOutputs, vWires };
if ( fNoRange )
{
Vec_IntForEachEntry( vSigs[SigType], NameId, i )
@ -316,40 +306,41 @@ void Cba_ManWriteVerilogSignalList( FILE * pFile, Cba_Ntk_t * p, int SigType, in
fprintf( pFile, "%s%s", Cba_ObjNameStr(p, NameId), (fSkipComma && i == Vec_IntSize(vSigs[SigType]) - 2) ? "" : ", " );
}
}
void Cba_ManWriteVerilogNtk( FILE * pFile, Cba_Ntk_t * p, Vec_Int_t * vMap )
void Cba_ManWriteVerilogNtk( FILE * pFile, Cba_Ntk_t * p, Vec_Int_t * vMap, Vec_Int_t * vWires )
{
int s;
assert( Vec_IntSize(&p->vTypes) == Cba_NtkObjNum(p) );
assert( Vec_IntSize(&p->vFuncs) == Cba_NtkObjNum(p) );
assert( Vec_IntSize(&p->vFanin) == Cba_NtkObjNum(p) );
// collect wires
Cba_NtkCollectWires( p, vMap );
Cba_NtkCollectWires( p, vMap, vWires );
// write header
fprintf( pFile, "module %s (\n", Cba_NtkName(p) );
for ( s = 0; s < 3; s++ )
for ( s = 0; s < 2; s++ )
{
if ( s == 0 && Vec_IntSize(&p->vInouts) == 0 )
continue;
fprintf( pFile, " " );
Cba_ManWriteVerilogSignalList( pFile, p, s, s==2, 1 );
Cba_ManWriteVerilogSignalList( pFile, p, s, s==2, 1, vWires );
fprintf( pFile, "\n" );
}
fprintf( pFile, " );\n" );
// write declarations
for ( s = 0; s < 4; s++ )
Cba_ManWriteVerilogSignals( pFile, p, s, 1 );
for ( s = 0; s < 3; s++ )
Cba_ManWriteVerilogSignals( pFile, p, s, 1, vWires );
fprintf( pFile, "\n" );
// write objects
Cba_ManWriteVerilogNodes( pFile, p );
Cba_ManWriteVerilogBoxes( pFile, p );
fprintf( pFile, "endmodule\n\n" );
Vec_IntErase( &p->vWires );
}
void Cba_ManWriteVerilog( char * pFileName, Cba_Man_t * p )
{
FILE * pFile;
Cba_Ntk_t * pNtk;
Vec_Int_t * vMap;
Vec_Int_t * vMap, * vWires;
int i;
// check the library
if ( p->pMioLib && p->pMioLib != Abc_FrameReadLibGen() )
{
printf( "Genlib library used in the mapped design is not longer a current library.\n" );
return;
}
pFile = fopen( pFileName, "wb" );
if ( pFile == NULL )
{
@ -358,9 +349,11 @@ void Cba_ManWriteVerilog( char * pFileName, Cba_Man_t * p )
}
fprintf( pFile, "// Design \"%s\" written by ABC on %s\n\n", Cba_ManName(p), Extra_TimeStamp() );
Cba_ManAssignInternNames( p );
vMap = Vec_IntStart( Abc_NamObjNumMax(p->pNames) + 1 );
vMap = Vec_IntStart( Abc_NamObjNumMax(p->pStrs) + 1 );
vWires = Vec_IntAlloc( 1000 );
Cba_ManForEachNtk( p, pNtk, i )
Cba_ManWriteVerilogNtk( pFile, pNtk, vMap );
Cba_ManWriteVerilogNtk( pFile, pNtk, vMap, vWires );
Vec_IntFree( vWires );
Vec_IntFree( vMap );
fclose( pFile );
}

6
src/base/cba/module.make
View File

@ -1,10 +1,12 @@
SRC += src/base/cba/cbaBlast.c \
src/base/cba/cbaBuild.c \
src/base/cba/cbaCom.c \
src/base/cba/cbaLib.c \
src/base/cba/cbaNtk.c \
src/base/cba/cbaPrsBuild.c \
src/base/cba/cbaPrsTrans.c \
src/base/cba/cbaPtr.c \
src/base/cba/cbaPtrAbc.c \
src/base/cba/cbaReadBlif.c \
src/base/cba/cbaReadVer.c \
src/base/cba/cbaSimple.c \
src/base/cba/cbaWriteBlif.c \
src/base/cba/cbaWriteVer.c

1
src/map/mio/mio.h
View File

@ -98,6 +98,7 @@ extern Mio_Gate_t * Mio_LibraryReadGates ( Mio_Library_t * pLib );
extern Mio_Gate_t ** Mio_LibraryReadGateArray ( Mio_Library_t * pLib );
extern Mio_Gate_t * Mio_LibraryReadGateByName ( Mio_Library_t * pLib, char * pName, char * pOutName );
extern char * Mio_LibraryReadSopByName ( Mio_Library_t * pLib, char * pName );
extern Mio_Gate_t * Mio_LibraryReadGateByTruth( Mio_Library_t * pLib, word t );
extern Mio_Gate_t * Mio_LibraryReadConst0 ( Mio_Library_t * pLib );
extern Mio_Gate_t * Mio_LibraryReadConst1 ( Mio_Library_t * pLib );
extern Mio_Gate_t * Mio_LibraryReadNand2 ( Mio_Library_t * pLib );

20
src/map/mio/mioApi.c
View File

@ -110,6 +110,26 @@ Mio_Gate_t * Mio_LibraryReadGateByName( Mio_Library_t * pLib, char * pName, char
return NULL;
}
/**Function*************************************************************
Synopsis [Returns the first gate in the library with the given TT.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Mio_Gate_t * Mio_LibraryReadGateByTruth( Mio_Library_t * pLib, word t )
{
Mio_Gate_t * pGate;
Mio_LibraryForEachGate( pLib, pGate )
if ( pGate->nInputs <= 6 && pGate->uTruth == t )
return pGate;
return NULL;
}
/**Function*************************************************************
Synopsis [Read Mvc of the gate by name.]

2
src/misc/util/utilNam.c
View File

@ -478,7 +478,7 @@ int Abc_NamStrFindOrAddLim( Abc_Nam_t * p, char * pStr, char * pLim, int * pfFou
***********************************************************************/
char * Abc_NamStr( Abc_Nam_t * p, int NameId )
{
return NameId? Abc_NamIntToStr(p, NameId) : NULL;
return NameId > 0 ? Abc_NamIntToStr(p, NameId) : NULL;
}
/**Function*************************************************************

23
src/misc/vec/vecInt.h
View File

@ -65,7 +65,9 @@ struct Vec_Int_t_
for ( i = 0; (i < Vec_IntSize(vVec1)) && (((Entry1) = Vec_IntEntry(vVec1, i)), 1) && (((Entry2) = Vec_IntEntry(vVec2, i)), 1); i++ )
#define Vec_IntForEachEntryDouble( vVec, Entry1, Entry2, i ) \
for ( i = 0; (i+1 < Vec_IntSize(vVec)) && (((Entry1) = Vec_IntEntry(vVec, i)), 1) && (((Entry2) = Vec_IntEntry(vVec, i+1)), 1); i += 2 )
#define Vec_IntForEachEntryTriple( vVec, Entry1, Entry2, Entry3, i ) \
#define Vec_IntForEachEntryDoubleStart( vVec, Entry1, Entry2, i, Start ) \
for ( i = Start; (i+1 < Vec_IntSize(vVec)) && (((Entry1) = Vec_IntEntry(vVec, i)), 1) && (((Entry2) = Vec_IntEntry(vVec, i+1)), 1); i += 2 )
#define Vec_IntForEachEntryTriple( vVec, Entry1, Entry2, Entry3, i ) \
for ( i = 0; (i+2 < Vec_IntSize(vVec)) && (((Entry1) = Vec_IntEntry(vVec, i)), 1) && (((Entry2) = Vec_IntEntry(vVec, i+1)), 1) && (((Entry3) = Vec_IntEntry(vVec, i+2)), 1); i += 3 )
#define Vec_IntForEachEntryThisNext( vVec, This, Next, i ) \
for ( i = 0, (This) = (Next) = (Vec_IntSize(vVec) ? Vec_IntEntry(vVec, 0) : -1); (i+1 < Vec_IntSize(vVec)) && (((Next) = Vec_IntEntry(vVec, i+1)), 1); i += 2, (This) = (Next) )
@ -613,6 +615,11 @@ static inline int Vec_IntGetEntry( Vec_Int_t * p, int i )
Vec_IntFillExtra( p, i + 1, 0 );
return Vec_IntEntry( p, i );
}
static inline int Vec_IntGetEntryFull( Vec_Int_t * p, int i )
{
Vec_IntFillExtra( p, i + 1, -1 );
return Vec_IntEntry( p, i );
}
/**Function*************************************************************
@ -1170,6 +1177,20 @@ static inline int Vec_IntCountEntry( Vec_Int_t * p, int Entry )
Counter += (p->pArray[i] == Entry);
return Counter;
}
static inline int Vec_IntCountLarger( Vec_Int_t * p, int Entry )
{
int i, Counter = 0;
for ( i = 0; i < p->nSize; i++ )
Counter += (p->pArray[i] > Entry);
return Counter;
}
static inline int Vec_IntCountSmaller( Vec_Int_t * p, int Entry )
{
int i, Counter = 0;
for ( i = 0; i < p->nSize; i++ )
Counter += (p->pArray[i] < Entry);
return Counter;
}
/**Function*************************************************************

33
src/misc/vec/vecStr.h
View File

@ -704,6 +704,39 @@ static inline int Vec_StrSum( Vec_Str_t * p )
return Counter;
}
/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
static inline int Vec_StrCountEntry( Vec_Str_t * p, char Entry )
{
int i, Counter = 0;
for ( i = 0; i < p->nSize; i++ )
Counter += (p->pArray[i] == Entry);
return Counter;
}
static inline int Vec_StrCountLarger( Vec_Str_t * p, char Entry )
{
int i, Counter = 0;
for ( i = 0; i < p->nSize; i++ )
Counter += (p->pArray[i] > Entry);
return Counter;
}
static inline int Vec_StrCountSmaller( Vec_Str_t * p, char Entry )
{
int i, Counter = 0;
for ( i = 0; i < p->nSize; i++ )
Counter += (p->pArray[i] < Entry);
return Counter;
}
/**Function*************************************************************
Synopsis [Compares two strings.]