mirror of https://github.com/YosysHQ/abc.git
Fanout restriction in &edge.
This commit is contained in:
Alan Mishchenko
parent
e3e6236663
commit
a093091004
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@ -48,6 +48,7 @@ struct Seg_Man_t_
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// window
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Gia_Man_t * pGia;
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Vec_Int_t * vPolars; // polarity
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Vec_Int_t * vToSkip; // edges to skip
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Vec_Int_t * vEdges; // edges as fanin/fanout pairs
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Vec_Int_t * vFirsts; // first SAT variable
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Vec_Int_t * vNvars; // number of SAT variables
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@ -75,20 +76,27 @@ extern sat_solver * Sbm_AddCardinSolver( int LogN, Vec_Int_t ** pvVars );
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SeeAlso []
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***********************************************************************/
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Vec_Int_t * Seg_ManCountIntEdges( Gia_Man_t * p, Vec_Int_t * vPolars )
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Vec_Int_t * Seg_ManCountIntEdges( Gia_Man_t * p, Vec_Int_t * vPolars, Vec_Int_t * vToSkip, int nFanouts )
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{
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int i, iLut, iFanin;
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Vec_Int_t * vEdges = Vec_IntAlloc( 1000 );
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assert( Gia_ManHasMapping(p) );
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Vec_IntClear( vPolars );
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Vec_IntClear( vToSkip );
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if ( nFanouts )
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Gia_ManSetLutRefs( p );
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Gia_ManForEachLut( p, iLut )
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Gia_LutForEachFanin( p, iLut, iFanin, i )
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if ( Gia_ObjIsAnd(Gia_ManObj(p, iFanin)) )
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{
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if ( p->vEdge1 && Gia_ObjCheckEdge(p, iFanin, iLut) )
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Vec_IntPush( vPolars, Vec_IntSize(vEdges)/2 );
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if ( nFanouts && Gia_ObjLutRefNumId(p, iFanin) >= nFanouts )
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Vec_IntPush( vToSkip, Vec_IntSize(vEdges)/2 );
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Vec_IntPushTwo( vEdges, iFanin, iLut );
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}
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if ( nFanouts )
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ABC_FREE( p->pLutRefs );
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return vEdges;
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}
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Vec_Wec_t * Seg_ManCollectObjEdges( Vec_Int_t * vEdges, int nObjs )
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@ -144,12 +152,13 @@ int Seg_ManCountIntLevels( Seg_Man_t * p, int iStartVar )
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SeeAlso []
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***********************************************************************/
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Seg_Man_t * Seg_ManAlloc( Gia_Man_t * pGia )
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Seg_Man_t * Seg_ManAlloc( Gia_Man_t * pGia, int nFanouts )
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{
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int nVarsAll;
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Seg_Man_t * p = ABC_CALLOC( Seg_Man_t, 1 );
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p->vPolars = Vec_IntAlloc( 1000 );
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p->vEdges = Seg_ManCountIntEdges( pGia, p->vPolars );
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p->vToSkip = Vec_IntAlloc( 1000 );
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p->vEdges = Seg_ManCountIntEdges( pGia, p->vPolars, p->vToSkip, nFanouts );
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p->nVars = Vec_IntSize(p->vEdges)/2;
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p->LogN = Abc_Base2Log(p->nVars);
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p->Power2 = 1 << p->LogN;
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@ -180,6 +189,7 @@ void Seg_ManClean( Seg_Man_t * p )
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Vec_IntClear( p->vNvars );
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Vec_IntClear( p->vLits );
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Vec_IntClear( p->vPolars );
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Vec_IntClear( p->vToSkip );
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// other
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Gia_ManFillValue( p->pGia );
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}
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@ -193,6 +203,7 @@ void Seg_ManStop( Seg_Man_t * p )
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Vec_IntFree( p->vNvars );
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Vec_IntFree( p->vLits );
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Vec_IntFree( p->vPolars );
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Vec_IntFree( p->vToSkip );
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ABC_FREE( p->pLevels );
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// other
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ABC_FREE( p );
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@ -217,7 +228,7 @@ void Seg_ManCreateCnf( Seg_Man_t * p, int fTwo, int fVerbose )
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Vec_Int_t * vLevel;
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int iLut, iFanin, iFirst;
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int pLits[3], Count = 0;
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int i, k, nVars, value;
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int i, k, nVars, Edge, value;
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abctime clk = Abc_Clock();
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// edge delay constraints
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int nConstr = sat_solver_nclauses(p->pSat);
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@ -380,6 +391,13 @@ void Seg_ManCreateCnf( Seg_Man_t * p, int fTwo, int fVerbose )
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}
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}
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Vec_WecFree( vObjEdges );
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// block forbidden edges
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Vec_IntForEachEntry( p->vToSkip, Edge, i )
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{
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pLits[0] = Abc_Var2Lit( Edge, 1 );
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value = sat_solver_addclause( p->pSat, pLits, pLits+1 );
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assert( value );
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}
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if ( fVerbose )
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printf( "Edge constraints = %d. ", sat_solver_nclauses(p->pSat) - nConstr );
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if ( fVerbose )
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@ -418,7 +436,7 @@ Vec_Int_t * Seg_ManConvertResult( Seg_Man_t * p )
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SeeAlso []
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***********************************************************************/
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void Seg_ManComputeDelay( Gia_Man_t * pGia, int DelayInit, int fTwo, int fVerbose )
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void Seg_ManComputeDelay( Gia_Man_t * pGia, int DelayInit, int nFanouts, int fTwo, int fVerbose )
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{
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int nBTLimit = 0;
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int nTimeOut = 0;
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@ -428,7 +446,7 @@ void Seg_ManComputeDelay( Gia_Man_t * pGia, int DelayInit, int fTwo, int fVerbos
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abctime clk = Abc_Clock();
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Vec_Int_t * vEdges2 = NULL;
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int i, iLut, iFirst, nVars, status, Delay, nConfs;
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Seg_Man_t * p = Seg_ManAlloc( pGia );
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Seg_Man_t * p = Seg_ManAlloc( pGia, nFanouts );
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Vec_Int_t * vVars = Vec_IntStartNatural( p->nVars );
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int DelayStart = DelayInit ? DelayInit : p->DelayMax;
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@ -447,16 +465,20 @@ void Seg_ManComputeDelay( Gia_Man_t * pGia, int DelayInit, int fTwo, int fVerbos
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// increment delay gradually
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for ( Delay = p->DelayMax; Delay >= 0; Delay-- )
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{
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// we constrain COs, although it would be fine to constrain only POs
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Gia_ManForEachCoDriver( p->pGia, pObj, i )
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{
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if ( !Gia_ObjIsAnd(pObj) )
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continue;
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iLut = Gia_ObjId( p->pGia, pObj );
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iFirst = Vec_IntEntry( p->vFirsts, iLut );
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nVars = Vec_IntEntry( p->vNvars, iLut );
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if ( Delay < nVars )
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sat_solver_push( p->pSat, Abc_Var2Lit(iFirst + Delay, 1) );
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if ( Delay < nVars && !sat_solver_push(p->pSat, Abc_Var2Lit(iFirst + Delay, 1)) )
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break;
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}
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if ( i < Gia_ManCoNum(p->pGia) )
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{
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printf( "Proved UNSAT for delay %d. ", Delay );
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Abc_PrintTime( 1, "Time", Abc_Clock() - clk );
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break;
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}
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if ( Delay > DelayStart )
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continue;
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@ -34858,11 +34858,11 @@ usage:
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int Abc_CommandAbc9Edge( Abc_Frame_t * pAbc, int argc, char ** argv )
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{
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extern int Edg_ManAssignEdgeNew( Gia_Man_t * p, int nEdges, int fVerbose );
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extern void Seg_ManComputeDelay( Gia_Man_t * pGia, int Delay, int fTwo, int fVerbose );
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extern void Seg_ManComputeDelay( Gia_Man_t * pGia, int Delay, int nFanouts, int fTwo, int fVerbose );
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int c, DelayMax = 0, nEdges = 1, fReverse = 0, fUsePack = 0, fUseOld = 0, fVerbose = 0;
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int c, DelayMax = 0, nFanouts = 0, nEdges = 1, fReverse = 0, fUsePack = 0, fUseOld = 0, fVerbose = 0;
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Extra_UtilGetoptReset();
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while ( ( c = Extra_UtilGetopt( argc, argv, "DErpovh" ) ) != EOF )
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while ( ( c = Extra_UtilGetopt( argc, argv, "DFErpovh" ) ) != EOF )
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{
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switch ( c )
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{
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@ -34875,6 +34875,15 @@ int Abc_CommandAbc9Edge( Abc_Frame_t * pAbc, int argc, char ** argv )
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DelayMax = atoi(argv[globalUtilOptind]);
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globalUtilOptind++;
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break;
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case 'F':
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if ( globalUtilOptind >= argc )
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{
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Abc_Print( -1, "Command line switch \"-F\" should be followed by a positive integer.\n" );
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goto usage;
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}
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nFanouts = atoi(argv[globalUtilOptind]);
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globalUtilOptind++;
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break;
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case 'E':
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if ( globalUtilOptind >= argc )
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{
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@ -34934,7 +34943,7 @@ int Abc_CommandAbc9Edge( Abc_Frame_t * pAbc, int argc, char ** argv )
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if ( !fUseOld )
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{
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//Edg_ManAssignEdgeNew( pAbc->pGia, nEdges, fVerbose );
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Seg_ManComputeDelay( pAbc->pGia, DelayMax, nEdges==2, fVerbose );
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Seg_ManComputeDelay( pAbc->pGia, DelayMax, nFanouts, nEdges==2, fVerbose );
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return 0;
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}
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if ( pAbc->pGia->pManTime && fReverse )
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@ -34950,9 +34959,10 @@ int Abc_CommandAbc9Edge( Abc_Frame_t * pAbc, int argc, char ** argv )
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return 0;
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usage:
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Abc_Print( -2, "usage: &edge [-DE num] [-rpovh]\n" );
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Abc_Print( -2, "usage: &edge [-DFE num] [-rpovh]\n" );
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Abc_Print( -2, "\t find edge assignment of the LUT-mapped network\n" );
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Abc_Print( -2, "\t-D num : the upper bound on delay [default = %d]\n", DelayMax );
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Abc_Print( -2, "\t-F num : skip using edge if fanout higher than this [default = %d]\n", nFanouts );
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Abc_Print( -2, "\t-E num : the limit on the number of edges (1 <= num <= 2) [default = %d]\n", nEdges );
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Abc_Print( -2, "\t-r : toggles using reverse order [default = %s]\n", fReverse? "yes": "no" );
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Abc_Print( -2, "\t-p : toggles deriving edges from packing [default = %s]\n", fUsePack? "yes": "no" );
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