mirror of https://github.com/YosysHQ/abc.git
New command to dump LUT network.
This commit is contained in:
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579bcccc65
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f5ee46eb3c
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@ -1408,6 +1408,7 @@ extern Gia_Man_t * Gia_ManUpdateExtraAig2( void * pTime, Gia_Man_t * pAi
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extern Gia_Man_t * Gia_ManDupCollapse( Gia_Man_t * p, Gia_Man_t * pBoxes, Vec_Int_t * vBoxPres, int fSeq );
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extern int Gia_ManVerifyWithBoxes( Gia_Man_t * pGia, int nBTLimit, int nTimeLim, int fSeq, int fVerbose, char * pFileSpec );
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/*=== giaTruth.c ===========================================================*/
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extern word Gia_LutComputeTruth6( Gia_Man_t * p, int iObj, Vec_Wrd_t * vTruths );
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extern word Gia_ObjComputeTruthTable6Lut( Gia_Man_t * p, int iObj, Vec_Wrd_t * vTemp );
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extern word Gia_ObjComputeTruthTable6( Gia_Man_t * p, Gia_Obj_t * pObj, Vec_Int_t * vSupp, Vec_Wrd_t * vTruths );
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extern void Gia_ObjCollectInternal( Gia_Man_t * p, Gia_Obj_t * pObj );
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@ -52,6 +52,48 @@ static inline word * Gla_ObjTruthDup( Gia_Man_t * p, word * pDst, word * pSrc, i
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/// FUNCTION DEFINITIONS ///
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////////////////////////////////////////////////////////////////////////
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/**Function*************************************************************
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Synopsis [Compute truth table.]
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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word Gia_LutComputeTruth6_rec( Gia_Man_t * p, int iNode, Vec_Wrd_t * vTruths )
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{
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Gia_Obj_t * pObj;
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word Truth0, Truth1;
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if ( Gia_ObjIsTravIdCurrentId(p, iNode) )
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return Vec_WrdEntry(vTruths, iNode);
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Gia_ObjSetTravIdCurrentId(p, iNode);
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pObj = Gia_ManObj( p, iNode );
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assert( Gia_ObjIsAnd(pObj) );
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Truth0 = Gia_LutComputeTruth6_rec( p, Gia_ObjFaninId0p(p, pObj), vTruths );
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Truth1 = Gia_LutComputeTruth6_rec( p, Gia_ObjFaninId1p(p, pObj), vTruths );
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if ( Gia_ObjFaninC0(pObj) )
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Truth0 = ~Truth0;
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if ( Gia_ObjFaninC1(pObj) )
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Truth1 = ~Truth1;
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Vec_WrdWriteEntry( vTruths, iNode, Truth0 & Truth1 );
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return Truth0 & Truth1;
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}
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word Gia_LutComputeTruth6( Gia_Man_t * p, int iObj, Vec_Wrd_t * vTruths )
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{
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int k, iFan;
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assert( Gia_ObjIsLut(p, iObj) );
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Gia_ManIncrementTravId( p );
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Gia_LutForEachFanin( p, iObj, iFan, k )
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{
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Vec_WrdWriteEntry( vTruths, iFan, s_Truths6[k] );
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Gia_ObjSetTravIdCurrentId( p, iFan );
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}
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return Gia_LutComputeTruth6_rec( p, iObj, vTruths );
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}
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/**Function*************************************************************
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Synopsis [Computes truth table of a 6-LUT.]
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@ -1930,6 +1930,98 @@ Vec_Int_t * Gia_ManPoXSim( Gia_Man_t * p, int nFrames, int fVerbose )
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return vRes;
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}
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#define MAX_LUT_SIZE 8
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typedef struct Gia_MapLut_t_
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{
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int Type; // node type: PI=1, PO=2, LUT=3
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int Out; // ID
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int StartId; // -1
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int nFans; // fanin count
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float Delay; // 0.0
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int pFans[MAX_LUT_SIZE]; // fanin IDs
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unsigned pTruth[MAX_LUT_SIZE<6?1:(1<<(MAX_LUT_SIZE-5))]; // the truth table
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} Gia_MapLut_t;
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/**Function*************************************************************
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Synopsis []
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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void Gia_AigerWriteLut( Gia_Man_t * p, char * pFileName )
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{
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Gia_Obj_t * pObj;
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int i, k, iFan, iLut = 0;
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int LutSizeMax = Gia_ManLutSizeMax( p );
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int nUints = Abc_TruthWordNum(LutSizeMax);
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int nLuts = 1 + Gia_ManCiNum(p) + Gia_ManCoNum(p) + Gia_ManLutNum(p);
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Gia_MapLut_t * pLuts = ABC_CALLOC( Gia_MapLut_t, nLuts );
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Vec_Wrd_t * vTruths = Vec_WrdStart( Gia_ManObjNum(p) );
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assert( LutSizeMax <= 6 );
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// set obj numbers
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// constant
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pLuts->Type = 3;
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memset( pLuts->pTruth, 0xFF, sizeof(unsigned) * nUints );
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Gia_ManFillValue(p);
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Gia_ManConst0(p)->Value = pLuts[iLut].Out = Abc_Var2Lit( iLut, 0 );
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iLut++;
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// inputs
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Gia_ManForEachCi( p, pObj, i )
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{
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pLuts[iLut].Type = 1;
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memset( pLuts[iLut].pTruth, 0xAA, sizeof(unsigned) * nUints );
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pObj->Value = pLuts[iLut].Out = Abc_Var2Lit( iLut, 0 );
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iLut++;
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}
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// nodes
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Gia_ManForEachObj( p, pObj, i )
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if ( i && Gia_ObjIsLut(p, i) )
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{
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pLuts[iLut].Type = 3;
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Gia_LutForEachFanin( p, i, iFan, k )
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pLuts[iLut].pFans[k] = Gia_ManObj(p, iFan)->Value;
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pLuts[iLut].nFans = k;
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*(word *)pLuts[iLut].pTruth = Gia_LutComputeTruth6(p, i, vTruths);
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pObj->Value = pLuts[iLut].Out = Abc_Var2Lit( iLut, 0 );
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iLut++;
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}
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// outputs
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Gia_ManForEachCo( p, pObj, i )
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{
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pLuts[iLut].Type = 2;
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pLuts[iLut].pFans[0] = Gia_ObjFanin0(pObj)->Value;
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if ( Gia_ObjFaninC0(pObj) ^ Gia_ObjIsConst0(Gia_ObjFanin0(pObj)) )
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memset( pLuts[iLut].pTruth, 0x55, sizeof(unsigned) * nUints );
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else
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memset( pLuts[iLut].pTruth, 0xAA, sizeof(unsigned) * nUints );
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pLuts[iLut].nFans = 1;
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pObj->Value = pLuts[iLut].Out = Abc_Var2Lit( iLut, 0 );
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iLut++;
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}
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assert( iLut == nLuts );
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// dump into a file
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{
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FILE * pFile = fopen( pFileName, "wb" );
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if ( pFile == NULL )
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printf( "Cannot open file \"%s\" for writing.\n", pFileName );
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else
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{
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int nSize1 = nLuts * sizeof(Gia_MapLut_t);
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int nSize2 = fwrite( pLuts, 1, nSize1, pFile );
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assert( nSize1 == nSize2 );
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printf( "Successfully dumped %d bytes of binary data.\n", nSize1 );
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}
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fclose( pFile );
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}
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ABC_FREE( pLuts );
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Vec_WrdFree( vTruths );
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}
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////////////////////////////////////////////////////////////////////////
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/// END OF FILE ///
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////////////////////////////////////////////////////////////////////////
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@ -342,6 +342,7 @@ static int Abc_CommandAbc9ReadStg ( Abc_Frame_t * pAbc, int argc, cha
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static int Abc_CommandAbc9ReadVer ( Abc_Frame_t * pAbc, int argc, char ** argv );
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static int Abc_CommandAbc9WriteVer ( Abc_Frame_t * pAbc, int argc, char ** argv );
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static int Abc_CommandAbc9Write ( Abc_Frame_t * pAbc, int argc, char ** argv );
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static int Abc_CommandAbc9WriteLut ( Abc_Frame_t * pAbc, int argc, char ** argv );
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static int Abc_CommandAbc9Ps ( Abc_Frame_t * pAbc, int argc, char ** argv );
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static int Abc_CommandAbc9PFan ( Abc_Frame_t * pAbc, int argc, char ** argv );
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static int Abc_CommandAbc9PSig ( Abc_Frame_t * pAbc, int argc, char ** argv );
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@ -965,6 +966,7 @@ void Abc_Init( Abc_Frame_t * pAbc )
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Cmd_CommandAdd( pAbc, "ABC9", "&read_ver", Abc_CommandAbc9ReadVer, 0 );
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Cmd_CommandAdd( pAbc, "ABC9", "&write_ver", Abc_CommandAbc9WriteVer, 0 );
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Cmd_CommandAdd( pAbc, "ABC9", "&w", Abc_CommandAbc9Write, 0 );
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Cmd_CommandAdd( pAbc, "ABC9", "&wlut", Abc_CommandAbc9WriteLut, 0 );
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Cmd_CommandAdd( pAbc, "ABC9", "&ps", Abc_CommandAbc9Ps, 0 );
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Cmd_CommandAdd( pAbc, "ABC9", "&pfan", Abc_CommandAbc9PFan, 0 );
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Cmd_CommandAdd( pAbc, "ABC9", "&psig", Abc_CommandAbc9PSig, 0 );
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@ -26841,6 +26843,87 @@ usage:
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return 1;
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}
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/**Function*************************************************************
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Synopsis []
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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int Abc_CommandAbc9WriteVer( Abc_Frame_t * pAbc, int argc, char ** argv )
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{
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char * pFileSpec = NULL;
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Abc_Ntk_t * pNtkSpec = NULL;
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char * pFileName;
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char ** pArgvNew;
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int c, nArgcNew;
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int fVerbose = 0;
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Extra_UtilGetoptReset();
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while ( ( c = Extra_UtilGetopt( argc, argv, "Svh" ) ) != EOF )
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{
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switch ( c )
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{
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case 'S':
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if ( globalUtilOptind >= argc )
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{
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Abc_Print( -1, "Command line switch \"-S\" should be followed by a file name.\n" );
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goto usage;
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}
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pFileSpec = argv[globalUtilOptind];
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globalUtilOptind++;
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break;
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case 'v':
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fVerbose ^= 1;
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break;
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case 'h':
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goto usage;
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default:
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goto usage;
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}
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}
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pArgvNew = argv + globalUtilOptind;
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nArgcNew = argc - globalUtilOptind;
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if ( nArgcNew != 1 )
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{
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Abc_Print( -1, "Expecting output file name on the command line.\n" );
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return 1;
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}
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pFileName = argv[globalUtilOptind];
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if ( pAbc->pNtkCur == NULL )
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{
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Abc_Print( -1, "There is no mapped file to write.\n" );
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return 1;
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}
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if ( pFileSpec == NULL )
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{
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Abc_Print( -1, "The specification file is not given.\n" );
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return 1;
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}
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pNtkSpec = Io_ReadNetlist( pFileSpec, Io_ReadFileType(pFileSpec), 0 );
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if ( pNtkSpec == NULL )
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{
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Abc_Print( -1, "Reading hierarchical Verilog for the specification has failed.\n" );
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return 1;
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}
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Abc_NtkInsertHierarchyGia( pNtkSpec, pAbc->pNtkCur, fVerbose );
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Io_WriteVerilog( pNtkSpec, pFileName );
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Abc_NtkDelete( pNtkSpec );
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return 0;
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usage:
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Abc_Print( -2, "usage: &write_ver [-S <file>] [-vh] <file>\n" );
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Abc_Print( -2, "\t writes hierarchical Verilog after mapping\n" );
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Abc_Print( -2, "\t-S file : file name for the original hierarchical design (required)\n" );
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Abc_Print( -2, "\t-v : toggle verbose output [default = %s]\n", fVerbose? "yes": "no" );
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Abc_Print( -2, "\t-h : print the command usage\n");
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Abc_Print( -2, "\t<file> : the file name\n");
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return 1;
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}
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/**Function*************************************************************
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Synopsis []
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@ -26927,28 +27010,18 @@ usage:
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SeeAlso []
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***********************************************************************/
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int Abc_CommandAbc9WriteVer( Abc_Frame_t * pAbc, int argc, char ** argv )
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int Abc_CommandAbc9WriteLut( Abc_Frame_t * pAbc, int argc, char ** argv )
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{
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char * pFileSpec = NULL;
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Abc_Ntk_t * pNtkSpec = NULL;
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extern void Gia_AigerWriteLut( Gia_Man_t * pGia, char * pFileName );
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char * pFileName;
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char ** pArgvNew;
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int c, nArgcNew;
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int fVerbose = 0;
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Extra_UtilGetoptReset();
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while ( ( c = Extra_UtilGetopt( argc, argv, "Svh" ) ) != EOF )
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while ( ( c = Extra_UtilGetopt( argc, argv, "vh" ) ) != EOF )
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{
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switch ( c )
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{
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case 'S':
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if ( globalUtilOptind >= argc )
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{
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Abc_Print( -1, "Command line switch \"-S\" should be followed by a file name.\n" );
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goto usage;
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}
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pFileSpec = argv[globalUtilOptind];
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globalUtilOptind++;
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break;
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case 'v':
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fVerbose ^= 1;
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break;
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@ -26962,38 +27035,29 @@ int Abc_CommandAbc9WriteVer( Abc_Frame_t * pAbc, int argc, char ** argv )
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nArgcNew = argc - globalUtilOptind;
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if ( nArgcNew != 1 )
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{
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Abc_Print( -1, "Expecting output file name on the command line.\n" );
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Abc_Print( -1, "There is no file name.\n" );
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return 1;
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}
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pFileName = argv[globalUtilOptind];
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if ( pAbc->pNtkCur == NULL )
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if ( pAbc->pGia == NULL )
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{
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Abc_Print( -1, "There is no mapped file to write.\n" );
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Abc_Print( -1, "Abc_CommandAbc9WriteLut(): There is no AIG to write.\n" );
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return 1;
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}
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if ( pFileSpec == NULL )
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if ( !Gia_ManHasMapping(pAbc->pGia) )
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{
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Abc_Print( -1, "The specification file is not given.\n" );
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Abc_Print( -1, "Abc_CommandAbc9WriteLut(): AIG has no mapping.\n" );
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return 1;
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}
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pNtkSpec = Io_ReadNetlist( pFileSpec, Io_ReadFileType(pFileSpec), 0 );
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if ( pNtkSpec == NULL )
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{
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Abc_Print( -1, "Reading hierarchical Verilog for the specification has failed.\n" );
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return 1;
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}
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Abc_NtkInsertHierarchyGia( pNtkSpec, pAbc->pNtkCur, fVerbose );
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Io_WriteVerilog( pNtkSpec, pFileName );
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Abc_NtkDelete( pNtkSpec );
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Gia_AigerWriteLut( pAbc->pGia, pFileName );
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return 0;
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usage:
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Abc_Print( -2, "usage: &write_ver [-S <file>] [-vh] <file>\n" );
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Abc_Print( -2, "\t writes hierarchical Verilog after mapping\n" );
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Abc_Print( -2, "\t-S file : file name for the original hierarchical design (required)\n" );
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Abc_Print( -2, "\t-v : toggle verbose output [default = %s]\n", fVerbose? "yes": "no" );
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Abc_Print( -2, "\t-h : print the command usage\n");
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Abc_Print( -2, "\t<file> : the file name\n");
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Abc_Print( -2, "usage: &wlut [-umvh] <file>\n" );
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Abc_Print( -2, "\t writes the the current LUT mapping into a binary file\n" );
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Abc_Print( -2, "\t-v : toggle verbose output [default = %s]\n", fVerbose? "yes": "no" );
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Abc_Print( -2, "\t-h : print the command usage\n");
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Abc_Print( -2, "\t<file> : the file name\n");
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return 1;
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}
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