mirror of https://github.com/VLSIDA/OpenRAM.git
make channel router better
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parent
691f7a989e
commit
48a7065b31
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@ -12,7 +12,7 @@ from openram import debug
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from openram.tech import drc
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from .vector import vector
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from .design import design
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from openram import OPTS
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class channel_net():
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def __init__(self, net_name, pins, vertical):
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@ -326,13 +326,24 @@ class channel_route(design):
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max_x = max([pin.center().x for pin in pins])
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min_x = min([pin.center().x for pin in pins])
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min_y = min([pin.center().y for pin in pins])
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max_y = max([pin.center().y for pin in pins])
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# see the channel is at top or bottom
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if min_y < 0: # port0, min_x need to change
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min_x = min_x - 0.1 # in order to add jog at the dff pins, avoid overlap with vdd pins, left shift vertical line at dout pin
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port = 0
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else: # port1, max_x need to change
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max_x = max_x - 0.1 # in order to add jog at the dff pins, avoid overlap with vdd pins, left shift vertical line at dout pin
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port = 1
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if min_y < 0: # port0
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for pin in pins:
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if pin.center().x == max_x:
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if pin.center().y == max_y:
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min_x = min_x - 0.1 # in order to add jog at the dff pins, avoid overlap with vdd pins, left shift vertical line at dout pin
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else: # pin has max_x is under track
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max_x = max_x - 0.1
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port = 0
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else: # port1
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for pin in pins:
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if pin.center().x == max_x:
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if pin.center().y == max_y:
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max_x = max_x - 0.1 # in order to add jog at the dff pins, avoid overlap with vdd pins, left shift vertical line at dout pin
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else: # pin has max_x is under track
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min_x = min_x - 0.1
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port = 1
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# if we are less than a pitch, just create a non-preferred layer jog
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non_preferred_route = max_x - min_x <= pitch
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half_layer_width = 0.5 * drc["minwidth_{0}".format(self.vertical_layer)]
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@ -368,6 +379,8 @@ class channel_route(design):
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# Route each pin to the trunk
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for pin in pins:
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debug.warning("pin name in net ----> {0}".format(pin.name))
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debug.warning("wmask or not --> {0}".format(OPTS.write_size))
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# Find the correct side of the pin
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if pin.cy() < trunk_offset.y:
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pin_pos = pin.center()
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