mirror of https://github.com/VLSIDA/OpenRAM.git
count wordlines from bottom going up
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@ -151,7 +151,7 @@ class bitcell_base_array(design):
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wl_names = self.cell.get_all_wl_names()
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for row in range(self.row_size):
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for port in self.all_ports:
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wl_pin = self.cell_inst[self.row_size - 1 - row, 0].get_pin(wl_names[port])
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wl_pin = self.cell_inst[row, 0].get_pin(wl_names[port])
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self.add_layout_pin(text="wl_{0}_{1}".format(port, row),
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layer=wl_pin.layer,
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offset=wl_pin.ll().scale(0, 1),
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