Commit Graph

1110 Commits

Author SHA1 Message Date
Gwenhael Goavec-Merou 533dd1ea5f altera: cosmetic/linter 2025-02-01 08:28:17 +01:00
Gwenhael Goavec-Merou 959201a21f altera: MAX10 fully rework POF to internal flash mapping, added UFM write and note related to internal flash sections vs POF UFM/CFM sections 2025-02-01 08:14:07 +01:00
Gwenhael Goavec-Merou c3170cdfb9 altera: MAX10: added pgm_success_addr/done_bit_addr 2025-02-01 08:12:04 +01:00
Gwenhael Goavec-Merou 8e104d723c pofParser: displayHeader: improve messages 2025-02-01 08:09:59 +01:00
Gwenhael Goavec-Merou 6f42d28d5e pofParser: honour CFM1/CFM2 data pointer 2025-02-01 08:09:29 +01:00
Gwenhael Goavec-Merou 8160e716e8 pofParser: flag 0x11: added unknown section when verbose 2025-02-01 08:08:59 +01:00
Gwenhael Goavec-Merou 8f46edc8b3 pofParser: parseHeader: better message + note 2025-02-01 08:08:34 +01:00
Gwenhael Goavec-Merou 154bf5b5ec pofParser: added flag 0x13 parsing with usercode extract 2025-02-01 08:07:42 +01:00
Gwenhael Goavec-Merou 65afd7da0b pofParser: getData/getLength: check if section exists: return data/length or null/-1 2025-02-01 08:06:59 +01:00
Maciej Dudek e8d8ecc363 Fix snprintf usage
Some code used snprintf on std::string objects.
This caused unexpected behaviour where '\0' was printed to the output file.
This commit adds intermediate char* buffer which is later used to
initialize std::string. This string is later resized to the correct
expected length.

Signed-off-by: Maciej Dudek <mdudek@antmicro.com>
2025-01-24 11:48:37 +01:00
Gwenhael Goavec-Merou 5847ec2666 doc/boards.yml,src/board.hpp: fixed ac701 device code 2025-01-15 06:57:42 +01:00
steward-fu f4fee37cea Added STEP-MXO2_V2 board support. 2025-01-11 23:14:36 +08:00
steward-fu 79cf67e964 Added STEP-MAX10 V1 support. 2025-01-10 07:39:30 +08:00
Gwenhael Goavec-Merou 867f18236e
Merge pull request #505 from steward-fu/master
Add Altera 10M02SCM153C8G Support.
2025-01-09 07:19:25 +01:00
steward-fu ce92b577d5 Added 10M02SCM153C8G support. 2025-01-09 07:35:50 +08:00
ZhiYuanNJ fcaf836a40
Update ch347jtag.cpp
Update read/write timeout
2025-01-08 13:13:28 +08:00
Gwenhael Goavec-Merou 7dac3ef447 altera: first draft for max10 native support (with pof and only for internal flash) 2024-12-31 18:42:52 +01:00
Gwenhael Goavec-Merou 01039bc710 libgpiodJtagBitbang: simplify code when libgpiodv2 is used 2024-12-31 08:31:49 +01:00
Gwenhael Goavec-Merou 2103316baf lattice: added support for reset method (only tested with ECP5 2024-12-19 14:59:35 +01:00
Gwenhael Goavec-Merou 318ebcab22 main.cpp: added default value for user_flash in struct arguments args 2024-12-15 16:45:39 +01:00
Gwenhael Goavec-Merou a06bae1f5e part.hpp: cosmetic 2024-12-15 16:04:20 +01:00
Jean THOMAS 46ff6cb2eb gowin: Implement user flash programming for GW1N9 2024-12-11 12:19:07 +01:00
Jean THOMAS ffa006d0ee Add 'user-flash' CLI argument 2024-12-11 12:01:37 +01:00
Jean THOMAS a1108ca981 gowin: Add GW1N9 detection 2024-12-11 11:49:29 +01:00
Jean THOMAS 91608ca206 gowin: Use std::unique_ptr instead of manual RAII 2024-12-11 11:43:07 +01:00
Florent Kermarrec daa91c9a41 src/part.hpp: Add Altera Max10 10M16SAU169C8G support (Used by LimeSDR Mini V1). 2024-11-26 16:02:28 +01:00
Gwenhael Goavec-Merou c0a9115be9 part.hpp: added Gowin GW2A-55 2024-11-26 07:25:30 +01:00
Nicolas Schodet f6f48a7b27 Add support for VCU108 board and Virtex UltraScale 2024-11-12 23:51:55 +01:00
Gwenhael Goavec-Merou 0fd653e353 xilinx: replaced reverseWord by configBitstreamParser::reverse_32 2024-11-09 11:26:45 +01:00
Gwenhael Goavec-Merou e75e15bb63 configBitstreamParser: added static method to switch bits for 32bits value 2024-11-09 11:26:02 +01:00
Gwenhael Goavec-Merou 543be23d03 main,spiFlash,xilinx: fix warnings 2024-11-09 11:24:16 +01:00
sab 7acd1f2014 Add Support for Altera Max II EPM240T100C5N Board 2024-10-16 08:53:21 -04:00
Andreas Galauner 43fcc6ce2c Add ID and spiOverJtag bitstream for Stratix V GS D5 2024-10-10 19:59:31 +02:00
Miguel Flores-Acton 406e99c93a Add xc2c64a QFN48 2024-10-01 13:45:44 -04:00
Shareef Jalloq 9c9ce07ad8 feat: adding support for the xc7z030 2024-09-26 17:41:49 +01:00
bma 8e67d2ee04 arguments: fix read_dna and read_xadc typo 2024-09-25 07:24:15 +02:00
Gwenhael Goavec-Merou abb64a6aa1 spiFlash: added S25FL128S display register 2024-09-23 07:16:23 +02:00
Gwenhael Goavec-Merou b6963ad4a9 spiFlash: added MX25L enable/disable quad + display status register 2024-09-23 07:14:23 +02:00
Gwenhael Goavec-Merou faa1fc76fc core,xilinx,device: added option/methods to enable/disable quad mode on SPI Flash 2024-09-23 07:09:30 +02:00
Gwenhael Goavec-Merou 242357c46f spiFlash: added method to enable/disable Quad mode support 2024-09-23 07:06:05 +02:00
Gwenhael Goavec-Merou 924de0a13a spiFlashdb: added quad support for S125FL 2024-09-23 07:00:56 +02:00
Gwenhael Goavec-Merou 81422b6ca3
Merge pull request #481 from acceleratedtech/jwise/ti180-soj
efinix: add spiOverJtag support for Ti180J484
2024-08-31 08:20:04 +02:00
Joshua Wise ffd32a61d2 Efinix: do not allow untested detect_flash() non-SoJ path until someone tries it out for sure 2024-08-29 18:08:57 -04:00
Gwenhael Goavec-Merou fca69cc702 spiFlash: added configuration/nonvolatile configuration register for spansion and micron SPI Flash 2024-08-25 09:34:14 +02:00
Gwenhael Goavec-Merou 5d6daed815 spiFlashdb: added quad bit mask and corresponding register 2024-08-25 09:32:13 +02:00
Gwenhael Goavec-Merou 755802afe1 spiFlashdb: added some flash's datasheet link 2024-08-25 09:31:13 +02:00
Greg Steiert ad01d986c1 adding support for cyc5000 2024-08-24 21:32:00 -07:00
Gwenhael Goavec-Merou 533b5b626a spiFlashdb.hpp: reorder entries, reformat 2024-08-23 07:20:53 +02:00
Joshua Wise 90e62e07c3 efinix: add support for flash detect and flash dump in SoJ mode 2024-08-19 21:29:30 -04:00
Joshua Wise 5ec6eae63b part.hpp: add Efinix Titanium Ti180 2024-08-07 19:24:52 -07:00
Gwenhael Goavec-Merou 9edf1edb3f board, doc: added KNJN Dragon-L PCI Express & HDMI FPGA board (Spartan6 xc6slx25tcsg324 2024-08-03 09:22:49 +02:00
Gwenhael Goavec-Merou 0d657f0f65 spiFlashdb: added TI M25P80 (0x202014) 2024-08-03 09:22:02 +02:00
Gwenhael Goavec-Merou 1d2b18aeaf part: Xilinx spartan6 LX25T (xc6slx25T) 2024-08-01 08:47:19 +02:00
Gwenhael Goavec-Merou a509a28fa6 part.hpp: Xilinx spartan7 xc7s6 variant 2024-08-01 08:14:46 +02:00
Gwenhael Goavec-Merou 768c6efcce gowin: added detect_flash/erase_flash for gw2a FPGAs 2024-07-30 08:50:34 +02:00
Gwenhael Goavec-Merou a7cb7ec050 efinix: program(): thow exception when something fails 2024-07-29 07:54:38 +02:00
Gwenhael Goavec-Merou aed4f9a263 efinix: programJTAG return type void -> bool 2024-07-29 07:54:35 +02:00
Gwenhael Goavec-Merou bba3d9f3fb efinix: programSPI return type void -> bool 2024-07-29 07:54:13 +02:00
Gwenhael Goavec-Merou a7a1a788ff spiFlash: 0x0000 is not a valid jedec id 2024-07-29 07:45:45 +02:00
Julio Nunes Avelar 7e4b42b795
Adding support for AMD Virtex 7 FPGA VC709 Connectivity Kit Board 2024-07-12 23:32:14 -03:00
Julio Nunes Avelar 1042b6c269
Add xc7vx690t 2024-07-12 23:19:04 -03:00
Gwenhael Goavec-Merou 58cc5033f0 spiFlash: removed unused variable (#468) 2024-07-06 08:51:28 +02:00
Gwenhael Goavec-Merou f6b6f6f9d8 spiFlash: added get_bp_mask to return default bp mask (unknown device) or compute mask based on bp_offset. Replace all manual mask compute. (#468) 2024-07-04 08:17:49 +02:00
Stéphane Potvin e3f315a121 Add support for Numato Systems Mimas A7 board. 2024-06-22 08:03:14 -04:00
Uwe Bonnes 53530f7316 main: In help output, show how to detect flash 2024-06-20 16:25:41 +02:00
Christoph Metzner a341d1f441
add new device (Intel MAX10M40SCE144C8G) (#461)
* add 10M40SCE144

* change name
2024-06-13 15:09:32 +02:00
Gwenhael Goavec-Merou c468a69fc9 all devices / spiInterface / main: added method / infra to detect flash chip with --detect -f 2024-06-09 09:28:52 +02:00
Gwenhael Goavec-Merou d0dd71a28a spiFlash: display_status_reg simplify again 2024-06-09 09:26:27 +02:00
Gwenhael Goavec-Merou 36b1a7f9d9 spiFlash: read_id: display jedec ID. display_status_reg small fixes 2024-06-09 09:14:38 +02:00
Gwenhael Goavec-Merou 3ba0012a2c xilinx: added WBSTAR & BOOTSTS register read/decode. Fixed dec/hex format and padding 2024-06-04 08:45:51 +02:00
Gwenhael Goavec-Merou cb523199cc spiFlash: enable_protection/disable_protection: uses mask to only deal by bp 2024-06-03 16:18:14 +02:00
Gwenhael Goavec-Merou 2b80ce158b spiFlash: added ask before writting TB when OTP, added missing write_enable and fixed mask 2024-06-03 15:23:12 +02:00
Gwenhael Goavec-Merou be188c0223 spiFlashdb.hpp: added IS25LP256D chip support 2024-06-03 11:27:51 +02:00
Colin O'Flynn ed492715e1 xilinx: Add XADC reads of VCC registers 2024-05-23 09:40:19 -03:00
Gwenhael Goavec-Merou 578c899327 ../src/gwu2x_jtag.cpp 2024-05-22 20:54:14 +02:00
Gwenhael Goavec-Merou 26b4516aeb added lilygo-t-fpga board (based on gwu2x #434) 2024-05-20 21:18:20 +02:00
Gwenhael Goavec-Merou 53578876d5 added support for Gowin GWU2X USB (JTAG mode) (#434) 2024-05-20 21:10:29 +02:00
Gwenhael Goavec-Merou 7e90d071d9 libusb_ll: rework. Splitted scan method -> help futur dev with a common code to detect/select usb devices 2024-05-20 16:18:50 +02:00
Gwenhael Goavec-Merou 37a0f9c03e device: fixed warning in read_registers 2024-05-20 16:16:42 +02:00
Michael Schenk 6e85edaa9a
adding support for XC2C64A-xVQ44 with ID 0x06e5e093 (#458)
* adding support for XC2C64A-xVQ44

* remove comment
2024-05-19 17:13:16 +02:00
Evan Kahn 66c47fe3bd Add support for EP4CE6E22 and EP4CE10F17 2024-04-30 14:51:29 -04:00
Hans Baier 55b094ce00 add EP4CGX150 2024-04-27 16:18:23 +07:00
Florent Kermarrec 943a458f03 src/part.hpp: Add xcau15p support. 2024-04-25 17:17:47 +02:00
Gwenhael Goavec-Merou 4fe3d7ccc1 xilinx: added readback access to registers (stat, conf, ...) 2024-04-21 14:35:23 +02:00
Gwenhael Goavec-Merou 99147efa27 board,doc: added CERN SPEC45 support 2024-03-28 22:15:17 +01:00
Gwenhael Goavec-Merou 9b35959198 part: added xilinx xc6slx45t 2024-03-28 22:14:52 +01:00
Gwenhael Goavec-Merou 172295fb38 spiFlashdb: added M25P32 chip 2024-03-28 22:12:57 +01:00
Gwenhael Goavec-Merou 62f818cd68
Merge pull request #450 from kalata23/master
Added Zetta ZD25WQ16CSIGT
2024-03-28 22:02:21 +01:00
kalata23 206795c9c7 Added Zetta ZD25WQ16CSIGT 2024-03-28 14:20:08 +02:00
uint69-t 089bc5aa4e Add support for the Cyclone II 2024-03-27 12:58:50 -03:00
Gwenhael Goavec-Merou 02c33271e0 lattice,xilinx: new try to fix (again) uint64_t print format 2024-03-18 06:57:59 +01:00
Gwenhael Goavec-Merou 1d276ebb9d spiFlashdb: MX25R6435F: added missing bp bit 4 2024-03-15 07:02:31 +01:00
Gwenhael Goavec-Merou 41ecac5d0c
Merge pull request #447 from pu-cc/spiflashdb-mx25r643f
spiFlashdb: add MX25R6435F and fix SPIFlash::bp_to_len
2024-03-15 07:00:12 +01:00
Patrick Urban 972ded1298 spiFlashdb: add MX25R6435F and fix SPIFlash::bp_to_len 2024-03-15 00:44:17 +01:00
Patrick Urban 7dc3ff7803 gatemate: fix jtag-spi-bypass with dirtyJtag 2024-03-15 00:13:12 +01:00
Patrick Urban e52d647d7b gatemate: fix passive spi segfaults and improve verbosity 2024-03-15 00:11:11 +01:00
Patrick Urban 5bb8ce83b3 gatemate: fix CFG_MD typos 2024-03-15 00:07:05 +01:00
Patrick Urban 2e5c35edde gatemate: remove flash reset, power_up and read_id duplicates 2024-03-14 23:31:34 +01:00
Patrick Urban 1304f67f1b gatemate: fix unintended gpio access with dirtyJtag cables 2024-03-14 18:02:50 +01:00
Gwenhael Goavec-Merou f1bf4fdf57 jtag,main,xilinx: fix warnings, lint 2024-03-09 10:21:21 +01:00
Gwenhael Goavec-Merou 6366518ff7 device,ftdiJtagMPSSE,jtag: check/lint happy 2024-03-07 06:58:31 +01:00
Gwenhael Goavec-Merou 6dc2e752f4 ch347jtag: drop unused sync_cb 2024-03-07 06:57:27 +01:00
Uwe Bonnes e299061992 xilinx.cpp: After programming, go to bypass
Needed for xc7s50 on VMM3 boards to detect FLASH
2024-03-04 15:33:25 +01:00
Gwenhael Goavec-Merou bcbd8aa0e3 new board: olimex_gatemateevb Olimex GateMate A1 EVB 2024-03-03 08:25:55 +01:00
Uwe Bonnes 645471a16c spiFlashdb.hpp: Detect N25Q256A. 2024-03-01 13:38:23 +01:00
Uwe Bonnes f57abf9024 Add Trenz TEC0330 board. 2024-03-01 13:38:12 +01:00
Uwe Bonnes 88c4d86e63 Add xc7vx330t 2024-03-01 10:50:28 +01:00
Uwe Bonnes ae39b2c556 board.hpp: Add TE0712-8 Board (XC7A200TFBG484) 2024-02-28 22:46:01 +01:00
Gwenhael Goavec-Merou a2d8bc861f
Merge pull request #437 from UweBonnes/xc6v
Add spilOverJtag for Virtex6
2024-02-28 22:03:53 +01:00
ZhiYuanNJ 4af0bf6ed5
update CH347 (#424) 2024-02-28 20:44:49 +01:00
Uwe Bonnes a926ab9b88 Add (Cern) VMM3 board 2024-02-28 11:50:10 +01:00
Uwe Bonnes 0e99360d1c Add (Cern) VEC_V6 Board 2024-02-28 11:50:10 +01:00
Uwe Bonnes 354d3f86ab Virtex6: Add spiOverJtag for Virtex6, detect xc6vlx130 and provide bitfile for xc6vlx130tff784 2024-02-28 11:50:10 +01:00
Uwe Bonnes 956d9355a6 Add S25FL128L flash 2024-02-28 11:50:10 +01:00
Gwenhael Goavec-Merou 85d9ca5d20 board: added digilent cmoda7_15t 2024-02-26 21:18:33 +01:00
Gwenhael Goavec 0182d592be dfu,ftdipp_mpsse: sprintf -> snprintf 2024-02-20 20:59:13 +01:00
Gwenhael Goavec-Merou 3165552994 DFU: fix code to accept tinyDFU implementation (where not altsettings have an DFU descriptor) 2024-02-15 06:45:13 +01:00
Giovanni Bruni ffc519c0e2 lattice: improve info about "BSE Error Code" from Device Status Register 2024-02-13 09:32:30 +01:00
Giovanni Bruni e923ef4059 lattice nexus boards: change from CABLE_DEFAULT (i.e. 6MHz) to CABLE_MHZ(1) (i.e. 1MHz)
as at 6MHz the download of bitstreams is not stable.

With "not stable" we mean that:
- when dealing with Certus/Crosslink, most of the times it works
- when dealing with CertusPro devices, most of the times it doesn't work

We think this is due to the size of the bitstream and the way that the
transmission/storing is handled on the receiving side (i.e. the FPGA).
2024-02-13 09:24:47 +01:00
Giovanni Bruni 0f9422f09a latticeBitParser: add support for loading Lattice (Nexus) encrypted bitstreams,
by adding key and preamble of encrypted bitstreams to if statements.
2024-02-13 09:22:34 +01:00
Michael Davidsaver daa1e38799 xvc client: handle failed ll_write()
Avoids "Send instruction failed" in a tight loop...
2024-02-11 14:25:00 -08:00
Michael Davidsaver 4c737b2b96 xvc client ensure send() entire buffer 2024-02-11 14:25:00 -08:00
Gwenhael Goavec-Merou 39be00fd56
Merge pull request #427 from jgroman/master
Fix Tang Primer 25K SRAM loading when flash is erased
2024-02-02 13:09:45 +01:00
jgroman eba9c37027 Fix SRAM loading on invalid flash 2024-02-02 12:54:17 +01:00
sigmaeo fc58ffed38
Update spiFlashdb.hpp for Macronix MX25L3233F used on Cmod A7-35T
Digilent changed from Micron N25Q032A to Macronix MX25L3233F in 2020/2021, so this flash is needed in openfpgaloader to load to Cmod A7-35T
2024-02-01 19:48:21 +01:00
Gwenhael Goavec-Merou f9c1aa4eed
Merge pull request #423 from jgroman/master
Add faulty MPSEE cmd 8E workaround
2024-01-29 07:17:50 +01:00
jgroman 33eaf58869 Add faulty MPSEE cmd 8E workaround 2024-01-27 13:02:46 +01:00
Michal Sieron 1aaa1b37ac board: add Antmicro LPDDR4 Tester board
Signed-off-by: Michal Sieron <msieron@antmicro.com>
2024-01-25 12:29:12 +01:00
Michal Sieron 59f5759888 board: add Antmicro DDR5 Tester board
Signed-off-by: Michal Sieron <msieron@antmicro.com>
2024-01-25 12:25:07 +01:00
Michal Sieron 17939d587e board: add Antmicro DDR4 Tester board
Signed-off-by: Michal Sieron <msieron@antmicro.com>
2024-01-25 12:23:27 +01:00
Gwenhael Goavec-Merou 308e47c5c0
Merge pull request #420 from sean-anderson-seco/xilinx-ids
xilinx: Add remaining ZynqMP IDs
2024-01-19 07:25:54 +01:00
Sean Anderson da0f6f6f2a xilinx: Add remaining ZynqMP IDs
The IDs were taken from UG1085 v2.2 table 1-2.
2024-01-18 14:50:23 -05:00
Sean Anderson 9943c3072a lattice: Add all MachXO[23] part IDs
The version field is the only difference between many parts in the
MachXO[23] family, including between different families. Add the version
field to all parts, fixing detection of some MachXO3 parts as MachXO2s.
The id codes were extracted from the BSDL files on Lattice's website.
2024-01-18 13:48:50 -05:00
Chuang Zhu 4148be3d31 part: 0x012bc043 is for LCMXO2-4000HC
I found this when I was trying to program a LCMXO2-4000HC, but
openFPGALoader said it is a LCMX03LF-4300C:

	$ openFPGALoader --detect
	No cable or board specified: using direct ft2232 interface
	Jtag frequency : requested 6.00MHz   -> real 6.00MHz
	index 0:
		idcode 0x12bc043
		manufacturer lattice
		family MachXO3LF
		model  LCMX03LF-4300C
		irlength 8

From what I found on the internet, the idcode for LCMX03LF-4300C seems
to be 0x612BC043:
https://bsdl.info/details.htm?sid=b483da5dec63d6cd88ca59b002289d77
2024-01-11 10:00:02 +08:00
Gwenhael Goavec-Merou a3826614b3 gowin: writeFLASH: increase delay before CRC check (required for 9K device) 2024-01-09 19:56:53 +01:00
Gwenhael Goavec-Merou 0b59efcb42 src/gowin: GW5A/SPI flash: adding delay after erase flash and after SPI mode instruction. Seems fixed write error. 2024-01-09 18:48:21 +01:00
Gwenhael Goavec-Merou 62ad3a3003 gowin: fix flash erase for GW1NSR-4C: during shiftDR sequence TDI MUST be 0x0000 2024-01-04 07:24:02 +01:00
Gwenhael Goavec-Merou c51dbcb0ed
Merge pull request #410 from pu-cc/gatemate-chain-fix
gatemate: fix configuration byte alignment in jtag chains
2023-12-27 14:42:29 +01:00
Patrick Urban 001f20c884 gatemate: use more suitable change to RUN_TEST_IDLE state 2023-12-27 13:38:13 +01:00
Catherine 8c6c0ee85a Add WebAssembly support. 2023-12-22 21:07:33 +00:00
Catherine bca3bd6623 Use correct format specifier for printing uint64_t. 2023-12-22 21:07:23 +00:00
Gwenhael Goavec-Merou cd40de37cb main: allows mcufw only mode for gowin 2023-12-14 13:13:48 +01:00
Gwenhael Goavec-Merou 22f33618b0 gowin: mcufw may be written without fs (but this erase all memory) 2023-12-14 13:13:29 +01:00
Gwenhael Goavec-Merou 2093ce7520 gowin: fix gw1n external flash access 2023-12-14 11:48:14 +01:00
Gwenhael Goavec-Merou 1dbc9e664b gowin: programFlash/writeFlash: disable previous rewrite (fix write with tangnano4k) 2023-12-14 11:38:34 +01:00
Patrick Urban 1dfdec6ce1 gatemate: fix configuration in jtag chains 2023-12-12 10:21:30 +01:00
Gwenhael Goavec-Merou ed547ed893 boards: adding AMD Virtex UltraScale+ FPGA VCU1525 Acceleration Development Kit 2023-12-11 12:23:37 +01:00
Gwenhael Goavec-Merou d8186c5e8a gowin: GW5AST work around 2023-12-11 07:20:37 +01:00
Gwenhael Goavec-Merou 1c7a4afd01 ftdipp_mpsse: display/typo 2023-12-11 07:18:02 +01:00
Gwenhael Goavec-Merou bd917d51ef gowin: try second eraseSRAM before writeSRAM. Not always working but better... 2023-12-10 08:14:06 +01:00