46a0560927
display: std::endl -> \n
2025-08-26 17:51:31 +02:00
850c3d74e0
progressBar: added eol for each progressBar update when no STDOUT_FILENO
2025-08-26 17:49:01 +02:00
2580aed994
esp_usb_jtag: added support for https://github.com/espressif/esp-usb-bridge + small adjusts
2025-08-25 09:38:00 +02:00
c818641cae
main: list_boards: print 'Undefined' when fpga_part or cable_name is empty
2025-08-07 11:00:49 +02:00
bc864100ff
main: list_boards now displays fpga_part too
2025-08-07 09:53:28 +02:00
6a1e0ff65e
Merge pull request #575 from 0xDRRB/master
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Add Altera Cyclone 10 LP 10CL080 support
2025-07-29 09:58:31 +02:00
c51c53ee33
Add Altera Cyclone 10 LP 10CL080
2025-07-28 13:27:06 +02:00
a53aedb137
gowin: added (undocumented) sequence to be performed when CRC Error bit is set
2025-07-20 10:23:19 +02:00
42a4801180
cable: added Altera USB Blaster III (missing link in doc
2025-07-20 09:36:53 +02:00
388f0b4c90
spiFlashdb: added XTX XT25F32B-S chip
2025-07-20 09:32:12 +02:00
5997c202fc
99-openfpgaloader.rules: added entry for ULX3S/ULX4M (DFU mode)
2025-07-19 09:45:26 +02:00
b99672b69e
board: added ULX4M (DFU)
2025-07-19 09:45:04 +02:00
5e91e20e29
Merge pull request #571 from pu-cc/gatemate-jtag-bypass
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colognechip: Simplify handling of JTAG bypass bits
2025-07-10 09:43:50 +02:00
3b932dc542
colognechip: Simplify number of jtag bypass bits
2025-07-09 16:13:18 +02:00
3b1a40b798
part.hpp: MAX10: only keep size+Single(S)/Dual-supply(D). Sort between single-supply and dual-supply
2025-07-04 07:28:05 +02:00
880ed6f5c9
Merge pull request #568 from csantosb/master
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Document use of udev rules under GuixSystem
2025-07-03 10:52:03 +02:00
626084947d
doc/guide/install.rst: udev rules instructions under GuixSystem.
2025-07-03 10:43:40 +02:00
4bd9840e46
altera: fix Wc99-designator
2025-07-02 07:17:17 +02:00
b06220f71f
spiOverJtag/build.py: added default value for model variable
2025-06-30 18:26:59 +02:00
b2aa12b582
spiFlash, spiFlashdb: added global_lock flag and uses it instead of jedec_id ( #566 )
2025-06-30 18:26:22 +02:00
afb7bbeec2
Merge pull request #565 from ziyao233/cmsisdap/avoid-memcpy-on-overlapping-buffer
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cmsisDAP: Avoid memcpy() on possibly overlapping buffer
2025-06-30 10:15:35 +02:00
a1ea0c98fc
cmsisDAP: Avoid memcpy() on possibly overlapping buffer
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I observed strange cmsisDAP behavior when building openFPGALoader with
Clang/musl in release mode: CmsisDAP:display_info() shows the correct
hardware capability that supports JTAG,
...
firmware version : 0254
hardware capabilities : 13
SWO trace buffer size : NA
...
but the detection of JTAG fails in the constructor with a strange
response sequence,
Hardware cap 00 01 00
JTAG init failed with: JTAG is not supported by the probe
With some digging, it's found that the CmsisDAP::xfer() method without
an instruction parameter may be called by the constructor with a rx_buff
pointer overlapping with _ll_buffer, for which memmove() instead of
memcpy() should be used. The behavior of memcpy() is undefined when dst
and src overlap.
Fixes: 53c5d35da6
2025-06-28 11:53:25 +00:00
e3e93a394e
main: SPI mode without board: check file_size (must be > 0)
2025-06-25 19:21:46 +02:00
dd3204a6e0
main, board: added --pins argument compatible with SPI mode
2025-06-25 19:10:13 +02:00
319c08e841
latticeSSPI: uses registers struct for status
2025-06-19 09:51:44 +02:00
dede406ebc
latticeSSPI: ECP5 driver for Slave SPI mode
2025-06-19 08:34:29 +02:00
21d4fccf28
altera,libusb_ll,mcsParser: fix some compiler's warnings
2025-06-19 08:30:35 +02:00
803bdfecce
altera: MAX10: added --flash-sector support with arbitrary binary file
2025-06-18 18:57:26 +02:00
10fbb8a153
doc/FPGAs,doc/vendors/lattice: added Lattice ECP3
2025-06-18 16:25:40 +02:00
775477ba8e
part: added Lattice ECP3 LFE3-70E
2025-06-18 16:20:32 +02:00
a7b56c3732
lattice: added ECP3 family support (SRAM only)
2025-06-18 16:20:23 +02:00
3d7cb14195
README.md: added list of sponsors (hardware/boards and/or features funder)
2025-06-18 15:33:11 +02:00
098cdd466a
jtag: allows caller to specify tdi level in toggleClk method
2025-06-18 10:01:16 +02:00
f41f85b9d4
doc/cable: added arm-usb-tiny-h reference
2025-06-12 09:51:21 +02:00
586d30d6eb
Merge pull request #563 from jmi2k/arm-usb-tiny-h
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Add cable support for ARM-USB-TINY-H based off ARM-USB-OCD-H
2025-06-12 07:59:15 +02:00
3723bf7571
Add cable support for ARM-USB-TINY-H based off ARM-USB-OCD-H
2025-06-10 21:54:54 +02:00
347088efb4
ice40: Reuses prepare_flash_access/post_flash_access as much as possible. Removed dupplicated Flash dump informations. Be coherent to status message
2025-06-08 07:20:00 +02:00
2e1c7e29a4
spiFlash: cosmetic 'Read flash ' -> 'Reading' ( #558 )
2025-06-08 07:01:14 +02:00
765ed526e3
spiFlash: dump: honour _verbose level
2025-06-04 21:38:00 +02:00
32f744979c
ice40: uses verbose_level for SPIFlash instead of verbose/quiet ( #555 )
2025-06-03 11:26:38 +02:00
c6d4a8bff1
device: added verbose_level attribute
2025-06-03 11:24:36 +02:00
5f6c1bfcd4
Merge pull request #543 from trabucayre/spiOverJtag_v2
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SpiOverJtag v2
2025-05-29 08:41:10 +02:00
6c4a48f445
spiOverJtag: reworks Artix and Spartan 7 approach:
...
For a specific FPGA size, pins name is only a matter of package,
internally physical pads are the same: a unique bitstream per size is
necessary. This also simplify build.py by removing complexity to
extract model, size and package.
- a dict is added with supported packages per size
- only one bitstream is produces for artix/spartan7 size, package+size bitstreams are only symlinks.
- constraints files are also updated with BSCANE2/DRCK clocks constraints
- the gz is produces by build.py instead of by the Makefile
- all possibles bitstreams for XC7A/XC7S are now present.
2025-05-26 09:53:25 +02:00
589b161d4e
spiOverJtag/.gitignore: ignore vivado files
2025-05-26 09:53:20 +02:00
03045dc407
xilinx: adapted code to support existing spiOverJtag bitstreams (v1) and new bitstreams (v2)
2025-05-26 09:53:10 +02:00
ba48d53409
main: added detect_flash in SPI Mode and with a manufacturer
2025-05-24 07:50:51 +02:00
e135f1820b
ice40: added detect_flash support
2025-05-24 07:48:21 +02:00
10ba59c1ec
libusb_ll,ftdipp_mpsse: Bus and Device must be both == 0 to use filter or uses VID/PID
2025-05-24 07:46:58 +02:00
6c4dbe94cc
Merge pull request #553 from cheyao/master
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Add support for icepi zero
2025-05-23 07:27:18 +02:00
7c423c15fd
Add icepi zero to board.hpp
2025-05-23 07:02:44 +02:00
Gwenhael Goavec-Merou
Denis Bodor
Patrick Urban
Cayetano Santos
Yao Zi
José Miguel Sánchez García
Gwenhael Goavec-Merou
Cyao