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Add (Cern) VEC_V6 Board

This commit is contained in:
Uwe Bonnes 2024-02-26 21:40:09 +01:00
parent 354d3f86ab
commit 0e99360d1c
2 changed files with 8 additions and 0 deletions
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7
doc/boards.yml
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@ -797,6 +797,13 @@
Memory: NA
Flash: OK
- ID: vec_v6
Description: Xilinx VCU118
URL: https://vmm-srs.docs.cern.ch/
FPGA: xc6vlx130tff784
Memory: OK
Flash: OK
- ID: vcu118
Description: Xilinx VCU118
URL: https://www.xilinx.com/products/boards-and-kits/vcu118.html

1
src/board.hpp
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@ -225,6 +225,7 @@ static std::map <std::string, target_board_t> board_list = {
DFU_BOARD("ulx3s_dfu", "", "dfu", 0x1d50, 0x614b, 0),
JTAG_BOARD("usrpx300", "xc7k325tffg900", "digilent", 0, 0, CABLE_MHZ(15)),
JTAG_BOARD("usrpx310", "xc7k410tffg900", "digilent", 0, 0, CABLE_MHZ(15)),
JTAG_BOARD("vec_v6", "xc6vlx130tff784", "ft2232", 0, 0, CABLE_DEFAULT),
JTAG_BOARD("vcu118", "xcvu9p-flga2104", "jtag-smt2-nc", 0, 0, CABLE_DEFAULT),
JTAG_BOARD("vcu128", "xcvu37p-fsvh2892", "ft4232", 0, 0, CABLE_DEFAULT),
JTAG_BOARD("vcu1525", "xcvu9p-fsgd2104", "ft4232", 0, 0, CABLE_MHZ(15)),