spiFlash: display_status_reg simplify again
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@ -571,7 +571,7 @@ void SPIFlash::read_id()
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void SPIFlash::display_status_reg(uint8_t reg)
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{
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const uint32_t jedec_id = (_jedec_id >> 8) & 0xffffff;
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const uint16_t dev_id = (_jedec_id >> 16) & 0xffff;
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uint8_t tb, bp;
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if (!_flash_model) {
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tb = (reg >> 5) & 0x01;
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@ -589,11 +589,11 @@ void SPIFlash::display_status_reg(uint8_t reg)
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// status register
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printf("RDSR : 0x%02x\n", reg);
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if (jedec_id != 0xBF2642) {
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if ((_jedec_id >> 8) != 0xBF26) {
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printf("WIP : %d\n", reg&0x01);
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printf("WEL : %d\n", (reg>>1)&0x01);
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printf("BP : %x\n", bp);
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if (jedec_id != 0x9d60 && (jedec_id >> 8) != 0xc220) {
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if (dev_id != 0x9d60 && dev_id != 0xc220) {
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printf("TB : %d\n", tb);
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} else { // ISSI IS25LP
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printf("QE : %d\n", ((reg >> 6) & 0x01));
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@ -610,7 +610,7 @@ void SPIFlash::display_status_reg(uint8_t reg)
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}
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/* function register */
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switch (jedec_id >> 8) {
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switch (dev_id) {
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case 0x9d60:
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_spi->spi_put(FLASH_RDFR, NULL, ®, 1);
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printf("\nFunction Register\n");
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@ -621,7 +621,7 @@ void SPIFlash::display_status_reg(uint8_t reg)
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printf("ESUS : %d\n", ((reg >> 3) & 0x01));
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printf("IRL : %x\n", ((reg >> 4) & 0x0f));
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break;
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case 0x010216:
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case 0x0102:
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_spi->spi_put(FLASH_RDCR, NULL, ®, 1);
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printf("\nConfiguration Register\n");
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printf("RDCR : %02x\n", reg);
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