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xilinx: Add remaining ZynqMP IDs 

The IDs were taken from UG1085 v2.2 table 1-2.
This commit is contained in:
Sean Anderson 2024-01-18 14:42:15 -05:00
parent 6e99e96eb4
commit da0f6f6f2a
1 changed files with 44 additions and 10 deletions
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54
src/part.hpp
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@ -108,17 +108,51 @@ static std::map <uint32_t, fpga_model> fpga_list = {
* 0x03 must be written into JTAG_CTRL followed by RTI and
* a new scan to discover PL TAP and ARM DAP
*/
{0x08e22126, {"xilinx", "zynqmp_cfgn", "xczu2cg", 4}},
{0x08e70126, {"xilinx", "zynqmp_cfgn", "xczu9eg", 4}},
{0x08e80126, {"xilinx", "zynqmp_cfgn","xczu11eg", 4}},
{0x28eb2126, {"xilinx", "zynqmp_cfgn","xczu17eg", 4}},
{0x08e60126, {"xilinx", "zynqmp_cfgn", "xczu7ev", 4}},
{0x08e22126, {"xilinx", "zynqmp_cfgn", "xczu2cg/eg", 4}},
{0x08e20126, {"xilinx", "zynqmp_cfgn", "xczu3cg/eg", 4}},
{0x08e42126, {"xilinx", "zynqmp_cfgn", "xczu4cg/eg/ev", 4}},
{0x08e40126, {"xilinx", "zynqmp_cfgn", "xczu5cg/eg/ev", 4}},
{0x08e72126, {"xilinx", "zynqmp_cfgn", "xczu6cg/eg", 4}},
{0x08e60126, {"xilinx", "zynqmp_cfgn", "xczu7cg/eg/ev", 4}},
{0x08e70126, {"xilinx", "zynqmp_cfgn", "xczu9eg", 4}},
{0x08e80126, {"xilinx", "zynqmp_cfgn", "xczu11eg", 4}},
{0x08ea0126, {"xilinx", "zynqmp_cfgn", "xczu15eg", 4}},
{0x08eb2126, {"xilinx", "zynqmp_cfgn", "xczu17eg", 4}},
{0x08eb0126, {"xilinx", "zynqmp_cfgn", "xczu19eg", 4}},
{0x08fc2126, {"xilinx", "zynqmp_cfgn", "xczu21dr", 4}},
{0x08fca126, {"xilinx", "zynqmp_cfgn", "xczu25dr", 4}},
{0x08fc8126, {"xilinx", "zynqmp_cfgn", "xczu27dr", 4}},
{0x08fc0126, {"xilinx", "zynqmp_cfgn", "xczu28dr", 4}},
{0x08fc4126, {"xilinx", "zynqmp_cfgn", "xczu29dr", 4}},
{0x08fcc126, {"xilinx", "zynqmp_cfgn", "xczu39dr", 4}},
{0x08ffa126, {"xilinx", "zynqmp_cfgn", "xczu43dr", 4}},
{0x08ff0126, {"xilinx", "zynqmp_cfgn", "xczu46dr", 4}},
{0x08ffe126, {"xilinx", "zynqmp_cfgn", "xczu47dr", 4}},
{0x08ff6126, {"xilinx", "zynqmp_cfgn", "xczu48dr", 4}},
{0x08ffc126, {"xilinx", "zynqmp_cfgn", "xczu49dr", 4}},
{0x04711093, {"xilinx", "zynqmp", "xczu2cg", 6}},
{0x04738093, {"xilinx", "zynqmp", "xczu9eg", 6}},
{0x04740093, {"xilinx", "zynqmp", "xczu11eg", 6}},
{0x14759093, {"xilinx", "zynqmp", "xczu17eg", 6}},
{0x04730093, {"xilinx", "zynqmp", "xczu7ev", 6}},
{0x04711093, {"xilinx", "zynqmp", "xczu2cg/eg", 6}},
{0x04710093, {"xilinx", "zynqmp", "xczu3cg/eg", 6}},
{0x04721093, {"xilinx", "zynqmp", "xczu4cg/eg/ev", 6}},
{0x04720093, {"xilinx", "zynqmp", "xczu5cg/eg/ev", 6}},
{0x04739093, {"xilinx", "zynqmp", "xczu6cg/eg", 6}},
{0x04730093, {"xilinx", "zynqmp", "xczu7cg/eg/ev", 6}},
{0x04738093, {"xilinx", "zynqmp", "xczu9eg", 6}},
{0x04740093, {"xilinx", "zynqmp", "xczu11eg", 6}},
{0x04750093, {"xilinx", "zynqmp", "xczu15eg", 6}},
{0x04759093, {"xilinx", "zynqmp", "xczu17eg", 6}},
{0x04758093, {"xilinx", "zynqmp", "xczu19eg", 6}},
{0x047e1093, {"xilinx", "zynqmp", "xczu21dr", 6}},
{0x047e5093, {"xilinx", "zynqmp", "xczu25dr", 6}},
{0x047e4093, {"xilinx", "zynqmp", "xczu27dr", 6}},
{0x047e0093, {"xilinx", "zynqmp", "xczu28dr", 6}},
{0x047e2093, {"xilinx", "zynqmp", "xczu29dr", 6}},
{0x047e6093, {"xilinx", "zynqmp", "xczu39dr", 6}},
{0x047fd093, {"xilinx", "zynqmp", "xczu43dr", 6}},
{0x047f8093, {"xilinx", "zynqmp", "xczu46dr", 6}},
{0x047ff093, {"xilinx", "zynqmp", "xczu47dr", 6}},
{0x047fb093, {"xilinx", "zynqmp", "xczu48dr", 6}},
{0x047fe093, {"xilinx", "zynqmp", "xczu49dr", 6}},
/**************************************************************************/
/* Altera */