doc/boards.yml,src/board.hpp: fixed ac701 device code
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@ -1,7 +1,7 @@
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- ID: ac701
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Description: Xilinx Artix-7 FPGA AC701 Evaluation Kit
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URL: https://www.xilinx.com/products/boards-and-kits/ek-a7-ac701-g.html
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FPGA: Artix xc7a200t2fbg676c
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FPGA: Artix xc7a200tfbg676
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Memory: OK
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Flash: NT
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Constraints: AC701
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@ -102,7 +102,7 @@ typedef struct {
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{_name, {"", _cable, _fpga_part, 0, 0, 0, COMM_DFU, {}, {}, 0, _vid, _pid, _alt}}
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static std::map <std::string, target_board_t> board_list = {
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JTAG_BOARD("ac701", "xc7a200t2fbg676c", "digilent", 0, 0, CABLE_DEFAULT),
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JTAG_BOARD("ac701", "xc7a200tfbg676", "digilent", 0, 0, CABLE_DEFAULT),
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JTAG_BOARD("acornCle215", "xc7a200tsbg484", "", 0, 0, CABLE_DEFAULT),
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JTAG_BOARD("analogMax", "", "ft2232", 0, 0, CABLE_DEFAULT),
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JTAG_BOARD("litex-acorn-baseboard-mini", "xc7a200tsbg484", "", 0, 0, CABLE_DEFAULT),
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