boards: adding AMD Virtex UltraScale+ FPGA VCU1525 Acceleration Development Kit

This commit is contained in:
Gwenhael Goavec-Merou 2023-12-11 12:23:23 +01:00
parent d8186c5e8a
commit ed547ed893
2 changed files with 22 additions and 14 deletions

View File

@ -769,6 +769,27 @@
Memory: NA
Flash: OK
- ID: vcu118
Description: Xilinx VCU118
URL: https://www.xilinx.com/products/boards-and-kits/vcu118.html
FPGA: Virtex UltraScale+ xcvu9p-flga2104
Memory: OK
Flash: OK
- ID: vcu128
Description: Xilinx VCU128
URL: https://www.xilinx.com/products/boards-and-kits/vcu128.html
FPGA: Virtex UltraScale+ xcvu37p-fsvh2892
Memory: OK
Flash: OK
- ID: vcu1525
Description: AMD Virtex UltraScale+ FPGA VCU1525 Acceleration Development Kit
URL: https://www.xilinx.com/products/boards-and-kits/vcu1525-a.html
FPGA: Virtex UltraScale+ xcvu9p-fsgd2104
Memory: OK
Flash: NT
- ID: xtrx
Description: FairWaves XTRXPro
URL: https://www.crowdsupply.com/fairwaves/xtrx
@ -855,17 +876,3 @@
FPGA: zynq7000 xc7z020clg400
Memory: OK
Flash: NA
- ID: vcu118
Description: Xilinx VCU118
URL: https://www.xilinx.com/products/boards-and-kits/vcu118.html
FPGA: Virtex UltraScale+ xcvu9p-flga2104
Memory: OK
Flash: OK
- ID: vcu128
Description: Xilinx VCU128
URL: https://www.xilinx.com/products/boards-and-kits/vcu128.html
FPGA: Virtex UltraScale+ xcvu37p-fsvh2892
Memory: OK
Flash: OK

View File

@ -223,6 +223,7 @@ static std::map <std::string, target_board_t> board_list = {
JTAG_BOARD("usrpx310", "xc7k410tffg900", "digilent", 0, 0, CABLE_MHZ(15)),
JTAG_BOARD("vcu118", "xcvu9p-flga2104", "jtag-smt2-nc", 0, 0, CABLE_DEFAULT),
JTAG_BOARD("vcu128", "xcvu37p-fsvh2892", "ft4232", 0, 0, CABLE_DEFAULT),
JTAG_BOARD("vcu1525", "xcvu9p-fsgd2104", "ft4232", 0, 0, CABLE_MHZ(15)),
JTAG_BOARD("xem8320", "xcau25p-2ffvb676", "" , 0, 0, CABLE_DEFAULT),
JTAG_BOARD("xyloni_jtag", "t8f81", "efinix_jtag_ft4232", 0, 0, CABLE_DEFAULT),
SPI_BOARD("xyloni_spi", "efinix", "efinix_spi_ft4232",