Update the rpm spec file to handle package suffixes.

If the builder wants to build the package with an install suffix, the %{suff} variable makes that easy. Just define that value as needed, and there you go.
Fix dependency file (-M) generation.
2026-08-27 08:16:13 +02:00 · 2009-02-25 14:49:16 -08:00 · 2009-02-25 13:59:28 -08:00 · 2009-02-24 13:50:18 -08:00 · 2009-02-24 09:10:10 -08:00 · 2009-02-24 07:33:42 -08:00
288 changed files with 10555 additions and 7636 deletions
@@ -1,27 +0,0 @@
-lexor_keyword.cc
-parse.h
-parse.cc
-parse.cc.output
-parse.output
-syn-rules.cc
-syn-rules.cc.output
-syn-rules.output
-lexor.cc
-iverilog-vpi
-iverilog-vpi.pdf
-iverilog-vpi.ps
-ivl
-ivl.exp
-dep
-configure
-Makefile
-check
-check.cc
-check.vvp
-config.status
-config.log
-config.cache
-autom4te.cache
-config.h
-_pli_types.h
-dosify
@@ -0,0 +1,76 @@
+# Lines that start with '#' are comments.
+#
+# This file is for the development branch of Icarus Verilog.
+#
+# The following files will be ignored by git.
+
+# Object files and libraries
+*.[oa]
+
+# From autoconf
+configure
+config.log
+config.status
+Makefile
+
+/_pli_types.h
+config.h
+/tgt-vvp/vvp_config.h
+/tgt-vhdl/vhdl_config.h
+/vpi/vpi_config.h
+/version.h
+/version_tag.h
+
+# Directories
+autom4te.cache
+dep
+
+# Compiler back end and library files
+/tgt-vvp/*.conf
+*.tgt
+*.vpi
+/cadpli/cadpli.vpl
+
+# lex, yacc and gperf output
+/driver/cflexor.c
+/driver/cfparse.c
+/driver/cfparse.h
+/driver/cfparse.output
+
+/ivlpp/lexor.c
+
+/lexor.cc
+/lexor_keyword.cc
+/parse.cc
+/parse.h
+/parse.output
+/syn-rules.cc
+/syn-rules.output
+
+/vpi/sdf_lexor.c
+/vpi/sdf_parse.c
+/vpi/sdf_parse.h
+/vpi/sdf_parse.output
+/vpi/sys_readmem_lex.c
+
+/vvp/lexor.cc
+/vvp/parse.cc
+/vvp/parse.h
+/vvp/parse.output
+
+# Program created files
+/vvp/tables.cc
+
+# The executables.
+*.exe
+/driver/iverilog
+/iverilog-vpi
+/ivl
+/ivlpp/ivlpp
+/vvp/vvp
+
+/ivl.exp
+/vvp/vvp.exp
+
+# Check output
+/check.vvp
@@ -16,9 +16,6 @@
 *    along with this program; if not, write to the Free Software
 *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
 */
-#ifdef HAVE_CVS_IDENT
-#ident "$Id: Attrib.cc,v 1.6 2004/02/20 18:53:33 steve Exp $"
-#endif

 # include "config.h"

@@ -102,37 +99,3 @@ const verinum& Attrib::attr_value(unsigned idx) const
      assert(idx < nlist_);
      return list_[idx].val;
 }
-
-
-/*
- * $Log: Attrib.cc,v $
- * Revision 1.6  2004/02/20 18:53:33  steve
- *  Addtrbute keys are perm_strings.
- *
- * Revision 1.5  2002/08/12 01:34:58  steve
- *  conditional ident string using autoconfig.
- *
- * Revision 1.4  2002/05/26 01:39:02  steve
- *  Carry Verilog 2001 attributes with processes,
- *  all the way through to the ivl_target API.
- *
- *  Divide signal reference counts between rval
- *  and lval references.
- *
- * Revision 1.3  2002/05/23 03:08:50  steve
- *  Add language support for Verilog-2001 attribute
- *  syntax. Hook this support into existing $attribute
- *  handling, and add number and void value types.
- *
- *  Add to the ivl_target API new functions for access
- *  of complex attributes attached to gates.
- *
- * Revision 1.2  2001/07/25 03:10:48  steve
- *  Create a config.h.in file to hold all the config
- *  junk, and support gcc 3.0. (Stephan Boettcher)
- *
- * Revision 1.1  2000/12/04 17:37:03  steve
- *  Add Attrib class for holding NetObj attributes.
- *
- */
-
@@ -18,9 +18,6 @@
 *    along with this program; if not, write to the Free Software
 *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
 */
-#ifdef HAVE_CVS_IDENT
-#ident "$Id: Attrib.h,v 1.5 2004/02/20 18:53:33 steve Exp $"
-#endif

 # include  "StringHeap.h"
 # include  "verinum.h"
@@ -60,31 +57,4 @@ class Attrib {
      Attrib& operator= (const Attrib&);
 };

-/*
- * $Log: Attrib.h,v $
- * Revision 1.5  2004/02/20 18:53:33  steve
- *  Addtrbute keys are perm_strings.
- *
- * Revision 1.4  2002/08/12 01:34:58  steve
- *  conditional ident string using autoconfig.
- *
- * Revision 1.3  2002/05/26 01:39:02  steve
- *  Carry Verilog 2001 attributes with processes,
- *  all the way through to the ivl_target API.
- *
- *  Divide signal reference counts between rval
- *  and lval references.
- *
- * Revision 1.2  2002/05/23 03:08:50  steve
- *  Add language support for Verilog-2001 attribute
- *  syntax. Hook this support into existing $attribute
- *  handling, and add number and void value types.
- *
- *  Add to the ivl_target API new functions for access
- *  of complex attributes attached to gates.
- *
- * Revision 1.1  2000/12/04 17:37:03  steve
- *  Add Attrib class for holding NetObj attributes.
- *
- */
 #endif
@@ -16,9 +16,6 @@
 *    along with this program; if not, write to the Free Software
 *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
 */
-#ifdef HAVE_CVS_IDENT
-#ident "$Id: HName.cc,v 1.8 2007/06/02 03:42:12 steve Exp $"
-#endif

 # include  "config.h"
 # include  "HName.h"
@@ -120,33 +117,3 @@ ostream& operator<< (ostream&out, const hname_t&that)
      return out;
 }

-/*
- * $Log: HName.cc,v $
- * Revision 1.8  2007/06/02 03:42:12  steve
- *  Properly evaluate scope path expressions.
- *
- * Revision 1.7  2007/05/16 19:12:33  steve
- *  Fix hname_t use of space for 1 perm_string.
- *
- * Revision 1.6  2007/04/26 03:06:21  steve
- *  Rework hname_t to use perm_strings.
- *
- * Revision 1.5  2002/11/02 03:27:52  steve
- *  Allow named events to be referenced by
- *  hierarchical names.
- *
- * Revision 1.4  2002/08/12 01:34:58  steve
- *  conditional ident string using autoconfig.
- *
- * Revision 1.3  2002/01/05 04:36:06  steve
- *  include malloc.h only when available.
- *
- * Revision 1.2  2001/12/18 04:52:45  steve
- *  Include config.h for namespace declaration.
- *
- * Revision 1.1  2001/12/03 04:47:14  steve
- *  Parser and pform use hierarchical names as hname_t
- *  objects instead of encoded strings.
- *
- */
-
@@ -18,41 +18,38 @@
 #
 SHELL = /bin/sh

-# Normally, the "make" will build all the files only by dependencies.
-# The MODE, however, can control your rebuild intentions. The proper way
-# to use the MODE is on the make command like, this this:
+# The interesting make targets are:
 #
-#    make MODE=XXXX all
+#   make version
+#      Force the version_tag.h file to be rebuilt. Otherwise, it will only
+#      be built if it is missing.
 #
-# The possible MODE= values are:
+#   make all
+#   make install
 #
-# regular
-#    Build as normal
-#
-# full
-#    Do some extra builds. in particular:
-#    Build version.h again, even if it already exists.
-#
-MODE=regular
-
-# This version string is only used in the version message printed
-# by the compiler. It reflects the assigned version number for the
-# product as a whole. Most components also print the CVS Name: token
-# in order to get a more automatic version stamp as well.
-VERSION = 0.9.devel
+# The "suffix" is used as an installation suffix. It modifies certain
+# key install paths/files such that a build and install of Icarus Verilog
+# with the same $(prefix) but a different $(suffix) will not interfere.
+# The normal configuratin leaves suffix empty
+suffix = @install_suffix@

 prefix = @prefix@
 exec_prefix = @exec_prefix@
 srcdir = @srcdir@
 datarootdir = @datarootdir@

-SUBDIRS = @subdirs@
+SUBDIRS = ivlpp vvp vpi libveriuser cadpli tgt-null tgt-stub tgt-vvp \
+          tgt-vhdl driver
+# Only run distclean for these driectories.
+NOTUSED = tgt-fpga tgt-pal tgt-verilog

 VPATH = $(srcdir)

 bindir = @bindir@
 libdir = @libdir@
-includedir = @includedir@
+# This is actually the directory where we install our own header files.
+# It is a little different from the generic includedir.
+includedir = @includedir@/iverilog$(suffix)
 mandir = @mandir@

 dllib=@DLLIB@
@@ -69,16 +66,13 @@ MAN = @MAN@
 PS2PDF = @PS2PDF@
 GIT = @GIT@

-CPPFLAGS = @ident_support@ @DEFS@ -I. -I$(srcdir) -DVERSION='"$(VERSION)"' @CPPFLAGS@
+CPPFLAGS = @DEFS@ -I. -I$(srcdir) @CPPFLAGS@
 CXXFLAGS = -Wall @CXXFLAGS@
 PICFLAGS = @PICFLAG@
 LDFLAGS = @rdynamic@ @LDFLAGS@

-all: dep version.h ivl@EXEEXT@
-	for dir in $(SUBDIRS); do (cd $$dir ; $(MAKE) VERSION=$(VERSION) $@); done
-	for dir in ivlpp ; \
-	    do (cd $$dir ; $(MAKE) VERSION=$(VERSION) $@); done
-	cd driver ; $(MAKE) VERSION=$(VERSION) $@
+all: dep config.h _pli_types.h version.h ivl@EXEEXT@
+	for dir in $(SUBDIRS); do (cd $$dir ; $(MAKE) $@); done

 # In the windows world, the installer will need a dosify program to
 # dosify text files.
@@ -98,8 +92,9 @@ check: all

 clean:
 	for dir in $(SUBDIRS); do (cd $$dir ; $(MAKE) $@); done
-	for dir in vpi ivlpp tgt-verilog tgt-pal driver driver-vpi; \
-	    do (cd $$dir ; $(MAKE) $@); done
+ifeq (@MINGW32@,no)
+	(cd driver-vpi ; $(MAKE) $@)
+endif
 	rm -f *.o parse.cc parse.cc.output parse.h lexor.cc
 	rm -f ivl.exp iverilog-vpi.pdf iverilog-vpi.ps parse.output
 	rm -f syn-rules.output dosify.exe ivl@EXEEXT@ check.vvp
@@ -108,12 +103,14 @@ clean:

 distclean: clean
 	for dir in $(SUBDIRS); do (cd $$dir ; $(MAKE) $@); done
-	for dir in vpi ivlpp tgt-verilog tgt-pal driver driver-vpi; \
-	    do (cd $$dir ; $(MAKE) $@); done
+ifeq (@MINGW32@,no)
+	(cd driver-vpi ; $(MAKE) $@)
+endif
+	for dir in $(NOTUSED); do (cd $$dir ; $(MAKE) $@); done
 	rm -f Makefile config.status config.log config.cache config.h
 	rm -f _pli_types.h

-TT = t-dll.o t-dll-api.o t-dll-expr.o t-dll-proc.o
+TT = t-dll.o t-dll-api.o t-dll-expr.o t-dll-proc.o t-dll-analog.o
 FF = cprop.o nodangle.o synth.o synth2.o syn-rules.o

 O = main.o async.o design_dump.o discipline.o dup_expr.o \
@@ -134,8 +131,14 @@ PExpr.o PGate.o PGenerate.o PScope.o PSpec.o \
 PTask.o PUdp.o PFunction.o PWire.o Statement.o AStatement.o StringHeap.o \
 $(FF) $(TT)

-Makefile: Makefile.in config.h.in config.status
-	./config.status
+Makefile: $(srcdir)/Makefile.in config.status
+	./config.status --file=$@
+
+config.h: $(srcdir)/config.h.in
+	./config.status --header=$@
+
+_pli_types.h: $(srcdir)/_pli_types.h.in
+	./config.status --header=$@


 ifeq (@WIN32@,yes)
@@ -158,12 +161,13 @@ SUBDIRS += driver-vpi
 else
 all: dep iverilog-vpi

-iverilog-vpi: iverilog-vpi.sh
+iverilog-vpi: iverilog-vpi.sh Makefile
 	sed -e 's;@SHARED@;@shared@;' -e 's;@PIC@;@PICFLAG@;' \
+	    -e 's;@SUFFIX@;$(suffix);' \
 	    -e 's;@IVCC@;$(CC);' \
 	    -e 's;@IVCXX@;$(CXX);' \
 	    -e 's;@IVCFLAGS@;$(CXXFLAGS);' \
-	    -e 's;@INCLUDEDIR@;@includedir@;' \
+	    -e 's;@INCLUDEDIR@;$(includedir);' \
 	    -e 's;@LIBDIR@;@libdir@;' $< > $@
 	chmod +x $@
 endif
@@ -201,130 +205,115 @@ iverilog-vpi.ps: $(srcdir)/iverilog-vpi.man
 iverilog-vpi.pdf: iverilog-vpi.ps
 	$(PS2PDF) iverilog-vpi.ps iverilog-vpi.pdf

+# The version.h header file is the concatenation of a relatively static
+# base version and the detailed version tag.
+version.h: $(srcdir)/version_base.in version_tag.h
+	cat $(srcdir)/version_base.in version_tag.h > version.h
+
 # For VERSION_TAG in driver/main.c, first try git-describe, then look for a
 # version.h file in the source tree (included in snapshots and releases), and
 # finally use nothing.
-ifeq ($(MODE),full)
-.PHONY: version.h
-endif
+
 # "true" and "false" in the next few lines are Unix shell command names
 ifeq ($(GIT),none)
 GIT_PRESENT = false
 else
 GIT_PRESENT = true
 endif
-version.h:
+version_tag.h version:
 	@if $(GIT_PRESENT) && test -d $(srcdir)/.git; then \
 	    echo "Using git-describe for VERSION_TAG"; \
 	    tmp=`$(GIT) --git-dir $(srcdir)/.git describe \
 		   | sed -e 's;\(.*\);#define VERSION_TAG "\1";'`; \
-	    echo "$$tmp" | diff - $@ > /dev/null 2>&1 || echo "$$tmp" > $@ || exit 1; \
-	elif test -r $(srcdir)/$@; then \
-	    echo "Using $(srcdir)/$@ for VERSION_TAG"; \
-	    diff $(srcdir)/$@ $@ > /dev/null 2>&1 || cp $(srcdir)/$@ $@; \
+	    echo "$$tmp" | diff - version_tag.h > /dev/null 2>&1 || echo "$$tmp" > version_tag.h || exit 1; \
+	elif test -r $(srcdir)/version_tag.h; then \
+	    echo "Using $(srcdir)/version_tag.h for VERSION_TAG"; \
+	    diff $(srcdir)/version_tag.h version_tag.h > /dev/null 2>&1 || cp $(srcdir)/version_tag.h version_tag.h; \
 	else \
 	    echo "Using empty VERSION_TAG"; \
-	    echo '#define VERSION_TAG ""' > $@; \
+	    echo '#define VERSION_TAG ""' > version_tag.h; \
 	fi

 ifeq (@MINGW32@,yes)
 ifeq ($(MAN),none)
-INSTALL_DOC = $(mandir)/man1/iverilog-vpi.1
+INSTALL_DOC = $(mandir)/man1/iverilog-vpi$(suffix).1
 else
 ifeq ($(PS2PDF),none)
-INSTALL_DOC = $(mandir)/man1/iverilog-vpi.1
+INSTALL_DOC = $(mandir)/man1/iverilog-vpi$(suffix).1
 else
-INSTALL_DOC = $(prefix)/iverilog-vpi.pdf $(mandir)/man1/iverilog-vpi.1
+INSTALL_DOC = $(prefix)/iverilog-vpi$(suffix).pdf $(mandir)/man1/iverilog-vpi$(suffix).1
 all: dep iverilog-vpi.pdf
 endif
 endif
 INSTALL_DOCDIR = $(mandir)/man1
 else
-INSTALL_DOC = $(mandir)/man1/iverilog-vpi.1
+INSTALL_DOC = $(mandir)/man1/iverilog-vpi$(suffix).1
 INSTALL_DOCDIR = $(mandir)/man1
 endif

 ifeq (@MINGW32@,yes)
-WIN32_INSTALL = $(prefix)/hello.vl $(prefix)/sqrt.vl $(prefix)/sqrt-virtex.v $(prefix)/QUICK_START.txt
+WIN32_INSTALL =
 else
-WIN32_INSTALL = $(bindir)/iverilog-vpi
+WIN32_INSTALL = $(bindir)/iverilog-vpi$(suffix)
 endif

-install: all installdirs $(libdir)/ivl/ivl@EXEEXT@  $(libdir)/ivl/include/constants.vams $(libdir)/ivl/include/disciplines.vams $(includedir)/ivl_target.h $(includedir)/_pli_types.h $(includedir)/vpi_user.h $(includedir)/acc_user.h $(includedir)/veriuser.h $(WIN32_INSTALL) $(INSTALL_DOC)
+install: all installdirs $(libdir)/ivl$(suffix)/ivl@EXEEXT@  $(libdir)/ivl$(suffix)/include/constants.vams $(libdir)/ivl$(suffix)/include/disciplines.vams $(includedir)/ivl_target.h $(includedir)/_pli_types.h $(includedir)/vpi_user.h $(includedir)/acc_user.h $(includedir)/veriuser.h $(WIN32_INSTALL) $(INSTALL_DOC)
 	for dir in $(SUBDIRS); do (cd $$dir ; $(MAKE) $@); done
-	for dir in vpi ivlpp driver; \
-	    do (cd $$dir ; $(MAKE) $@); done

-$(bindir)/iverilog-vpi: ./iverilog-vpi
-	$(INSTALL_SCRIPT) ./iverilog-vpi $(DESTDIR)$(bindir)/iverilog-vpi
+$(bindir)/iverilog-vpi$(suffix): ./iverilog-vpi
+	$(INSTALL_SCRIPT) ./iverilog-vpi "$(DESTDIR)$(bindir)/iverilog-vpi$(suffix)"

-$(libdir)/ivl/ivl@EXEEXT@: ./ivl@EXEEXT@
-	$(INSTALL_PROGRAM) ./ivl@EXEEXT@ $(DESTDIR)$(libdir)/ivl/ivl@EXEEXT@
+$(libdir)/ivl$(suffix)/ivl@EXEEXT@: ./ivl@EXEEXT@
+	$(INSTALL_PROGRAM) ./ivl@EXEEXT@ "$(DESTDIR)$(libdir)/ivl$(suffix)/ivl@EXEEXT@"

-$(libdir)/ivl/include/constants.vams: $(srcdir)/constants.vams
-	$(INSTALL_DATA) $(srcdir)/constants.vams $(DESTDIR)$(libdir)/ivl/include/constants.vams
+$(libdir)/ivl$(suffix)/include/constants.vams: $(srcdir)/constants.vams
+	$(INSTALL_DATA) $(srcdir)/constants.vams "$(DESTDIR)$(libdir)/ivl$(suffix)/include/constants.vams"

-$(libdir)/ivl/include/disciplines.vams: $(srcdir)/disciplines.vams
-	$(INSTALL_DATA) $(srcdir)/disciplines.vams $(DESTDIR)$(libdir)/ivl/include/disciplines.vams
+$(libdir)/ivl$(suffix)/include/disciplines.vams: $(srcdir)/disciplines.vams
+	$(INSTALL_DATA) $(srcdir)/disciplines.vams "$(DESTDIR)$(libdir)/ivl$(suffix)/include/disciplines.vams"

 $(includedir)/ivl_target.h: $(srcdir)/ivl_target.h
-	$(INSTALL_DATA) $(srcdir)/ivl_target.h $(DESTDIR)$(includedir)/ivl_target.h
+	$(INSTALL_DATA) $(srcdir)/ivl_target.h "$(DESTDIR)$(includedir)/ivl_target.h"

 $(includedir)/_pli_types.h: _pli_types.h
-	$(INSTALL_DATA) $< $(DESTDIR)$(includedir)/_pli_types.h
+	$(INSTALL_DATA) $< "$(DESTDIR)$(includedir)/_pli_types.h"

 $(includedir)/vpi_user.h: $(srcdir)/vpi_user.h
-	$(INSTALL_DATA) $(srcdir)/vpi_user.h $(DESTDIR)$(includedir)/vpi_user.h
+	$(INSTALL_DATA) $(srcdir)/vpi_user.h "$(DESTDIR)$(includedir)/vpi_user.h"

 $(includedir)/acc_user.h: $(srcdir)/acc_user.h
-	$(INSTALL_DATA) $(srcdir)/acc_user.h $(DESTDIR)$(includedir)/acc_user.h
+	$(INSTALL_DATA) $(srcdir)/acc_user.h "$(DESTDIR)$(includedir)/acc_user.h"

 $(includedir)/veriuser.h: $(srcdir)/veriuser.h
-	$(INSTALL_DATA) $(srcdir)/veriuser.h $(DESTDIR)$(includedir)/veriuser.h
+	$(INSTALL_DATA) $(srcdir)/veriuser.h "$(DESTDIR)$(includedir)/veriuser.h"

-$(mandir)/man1/iverilog-vpi.1: $(srcdir)/iverilog-vpi.man
-	$(INSTALL_DATA) $(srcdir)/iverilog-vpi.man $(DESTDIR)$(mandir)/man1/iverilog-vpi.1
+$(mandir)/man1/iverilog-vpi$(suffix).1: $(srcdir)/iverilog-vpi.man
+	$(INSTALL_DATA) $(srcdir)/iverilog-vpi.man "$(DESTDIR)$(mandir)/man1/iverilog-vpi$(suffix).1"

-$(prefix)/iverilog-vpi.pdf: iverilog-vpi.pdf
-	$(INSTALL_DATA) iverilog-vpi.pdf $(DESTDIR)$(prefix)/iverilog-vpi.pdf
+$(prefix)/iverilog-vpi$(suffix).pdf: iverilog-vpi.pdf
+	$(INSTALL_DATA) iverilog-vpi.pdf "$(DESTDIR)$(prefix)/iverilog-vpi$(suffix).pdf"

-# In windows installations, put a few examples and the quick_start
-# into the destination directory.
-ifeq (@MINGW32@,yes)
-$(prefix)/hello.vl: $(srcdir)/examples/hello.vl
-	./dosify.exe $(srcdir)/examples/hello.vl tmp.vl
-	mv tmp.vl $(prefix)/hello.vl

-$(prefix)/sqrt.vl: $(srcdir)/examples/sqrt.vl
-	./dosify.exe $(srcdir)/examples/sqrt.vl tmp.vl
-	mv tmp.vl $(prefix)/sqrt.vl
-
-$(prefix)/sqrt-virtex.v: $(srcdir)/examples/sqrt-virtex.v
-	./dosify.exe $(srcdir)/examples/sqrt-virtex.v tmp.vl
-	mv tmp.vl $(prefix)/sqrt-virtex.v
-
-$(prefix)/QUICK_START.txt: $(srcdir)/QUICK_START.txt
-	./dosify.exe $(srcdir)/QUICK_START.txt tmp.txt
-	mv tmp.txt $(prefix)/QUICK_START.txt
-endif
-
-installdirs: mkinstalldirs
-	$(srcdir)/mkinstalldirs $(DESTDIR)$(bindir) $(DESTDIR)$(includedir) $(DESTDIR)$(libdir)/ivl \
-	    $(DESTDIR)$(libdir)/ivl/include $(DESTDIR)$(mandir) $(DESTDIR)$(mandir)/man1
+installdirs: $(srcdir)/mkinstalldirs
+	$(srcdir)/mkinstalldirs "$(DESTDIR)$(bindir)" \
+	    "$(DESTDIR)$(includedir)" \
+	    "$(DESTDIR)$(libdir)/ivl$(suffix)" \
+	    "$(DESTDIR)$(libdir)/ivl$(suffix)/include" \
+	    "$(DESTDIR)$(mandir)" \
+	    "$(DESTDIR)$(mandir)/man1"

 uninstall:
 	for dir in $(SUBDIRS); do (cd $$dir ; $(MAKE) $@); done
-	for dir in vpi ivlpp driver; \
-	    do (cd $$dir ; $(MAKE) $@); done
 	for f in ivl@EXEEXT@ include/constants.vams include/disciplines.vams; \
-	    do rm -f $(DESTDIR)$(libdir)/ivl/$$f; done
-	-rmdir $(DESTDIR)$(libdir)/ivl/include
-	-rmdir $(DESTDIR)$(libdir)/ivl
-	for f in verilog iverilog-vpi gverilog@EXEEXT@; \
-	    do rm -f $(DESTDIR)$(bindir)/$$f; done
+	    do rm -f "$(DESTDIR)$(libdir)/ivl$(suffix)/$$f"; done
+	-rmdir "$(DESTDIR)$(libdir)/ivl$(suffix)/include"
+	-rmdir "$(DESTDIR)$(libdir)/ivl$(suffix)"
+	for f in verilog$(suffix) iverilog-vpi$(suffix) gverilog$(suffix)@EXEEXT@; \
+	    do rm -f "$(DESTDIR)$(bindir)/$$f"; done
 	for f in ivl_target.h vpi_user.h _pli_types.h acc_user.h veriuser.h; \
-	    do rm -f $(DESTDIR)$(includedir)/$$f; done
-	rm -f $(DESTDIR)$(mandir)/man1/iverilog-vpi.1 $(DESTDIR)$(prefix)/iverilog-vpi.pdf
+	    do rm -f "$(DESTDIR)$(includedir)/$$f"; done
+	-test X$(suffix) = X || rmdir "$(DESTDIR)/$(includedir)"
+	rm -f "$(DESTDIR)$(mandir)/man1/iverilog-vpi$(suffix).1" "$(DESTDIR)$(prefix)/iverilog-vpi$(suffix).pdf"


 -include $(patsubst %.o, dep/%.d, $O)
@@ -109,7 +109,7 @@ static NetExpr* make_delay_nets(Design*des, NetScope*scope, NetExpr*expr)
      if (dynamic_cast<NetEConst*> (expr))
 	    return expr;

-      NetNet*sig = expr->synthesize(des, scope);
+      NetNet*sig = expr->synthesize(des, scope, expr);
      if (sig == 0) {
 	    cerr << expr->get_fileline() << ": error: Expression " << *expr
 		 << " is not suitable for delay expression." << endl;
@@ -18,9 +18,6 @@
 *    along with this program; if not, write to the Free Software
 *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
 */
-#ifdef HAVE_CVS_IDENT
-#ident "$Id: PDelays.h,v 1.9 2006/01/03 05:22:14 steve Exp $"
-#endif

 # include  "svector.h"
 # include  <string>
@@ -72,34 +69,4 @@ class PDelays {

 ostream& operator << (ostream&o, const PDelays&);

-/*
- * $Log: PDelays.h,v $
- * Revision 1.9  2006/01/03 05:22:14  steve
- *  Handle complex net node delays.
- *
- * Revision 1.8  2006/01/02 05:33:19  steve
- *  Node delays can be more general expressions in structural contexts.
- *
- * Revision 1.7  2002/08/12 01:34:58  steve
- *  conditional ident string using autoconfig.
- *
- * Revision 1.6  2002/06/14 03:25:51  steve
- *  Compiler portability.
- *
- * Revision 1.5  2001/12/29 20:19:31  steve
- *  Do not delete delay expressions of UDP instances.
- *
- * Revision 1.4  2001/11/22 06:20:59  steve
- *  Use NetScope instead of string for scope path.
- *
- * Revision 1.3  2001/01/16 02:44:17  steve
- *  Use the iosfwd header if available.
- *
- * Revision 1.2  2000/02/23 02:56:53  steve
- *  Macintosh compilers do not support ident.
- *
- * Revision 1.1  1999/09/04 19:11:46  steve
- *  Add support for delayed non-blocking assignments.
- *
- */
 #endif
@@ -16,9 +16,6 @@
 *    along with this program; if not, write to the Free Software
 *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
 */
-#ifdef HAVE_CVS_IDENT
-#ident "$Id: PEvent.cc,v 1.5 2004/02/19 06:57:10 steve Exp $"
-#endif

 # include "config.h"

@@ -38,26 +35,3 @@ perm_string  PEvent::name() const
      return name_;
 }

-/*
- * $Log: PEvent.cc,v $
- * Revision 1.5  2004/02/19 06:57:10  steve
- *  Memory and Event names use perm_string.
- *
- * Revision 1.4  2003/03/01 06:25:30  steve
- *  Add the lex_strings string handler, and put
- *  scope names and system task/function names
- *  into this table. Also, permallocate event
- *  names from the beginning.
- *
- * Revision 1.3  2002/08/12 01:34:58  steve
- *  conditional ident string using autoconfig.
- *
- * Revision 1.2  2001/07/25 03:10:48  steve
- *  Create a config.h.in file to hold all the config
- *  junk, and support gcc 3.0. (Stephan Boettcher)
- *
- * Revision 1.1  2000/04/01 19:31:57  steve
- *  Named events as far as the pform.
- *
- */
-
@@ -18,9 +18,6 @@
 *    along with this program; if not, write to the Free Software
 *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
 */
-#ifdef HAVE_CVS_IDENT
-#ident "$Id: PEvent.h,v 1.9 2004/02/19 06:57:10 steve Exp $"
-#endif

 # include  "LineInfo.h"
 # include  "StringHeap.h"
@@ -54,38 +51,4 @@ class PEvent : public LineInfo {
      PEvent& operator= (const PEvent&);
 };

-/*
- * $Log: PEvent.h,v $
- * Revision 1.9  2004/02/19 06:57:10  steve
- *  Memory and Event names use perm_string.
- *
- * Revision 1.8  2003/03/01 06:25:30  steve
- *  Add the lex_strings string handler, and put
- *  scope names and system task/function names
- *  into this table. Also, permallocate event
- *  names from the beginning.
- *
- * Revision 1.7  2003/01/30 16:23:07  steve
- *  Spelling fixes.
- *
- * Revision 1.6  2002/08/12 01:34:58  steve
- *  conditional ident string using autoconfig.
- *
- * Revision 1.5  2001/12/03 04:47:14  steve
- *  Parser and pform use hierarchical names as hname_t
- *  objects instead of encoded strings.
- *
- * Revision 1.4  2001/01/16 02:44:18  steve
- *  Use the iosfwd header if available.
- *
- * Revision 1.3  2000/04/09 17:44:30  steve
- *  Catch event declarations during scope elaborate.
- *
- * Revision 1.2  2000/04/04 03:20:15  steve
- *  Simulate named event trigger and waits.
- *
- * Revision 1.1  2000/04/01 19:31:57  steve
- *  Named events as far as the pform.
- *
- */
 #endif
@@ -95,11 +95,29 @@ PEBLogic::~PEBLogic()
 {
 }

-PEBShift::PEBShift(char op, PExpr*l, PExpr*r)
+PEBLeftWidth::PEBLeftWidth(char op, PExpr*l, PExpr*r)
 : PEBinary(op, l, r)
 {
 }

+PEBLeftWidth::~PEBLeftWidth()
+{
+}
+
+PEBPower::PEBPower(char op, PExpr*l, PExpr*r)
+: PEBLeftWidth(op, l, r)
+{
+}
+
+PEBPower::~PEBPower()
+{
+}
+
+PEBShift::PEBShift(char op, PExpr*l, PExpr*r)
+: PEBLeftWidth(op, l, r)
+{
+}
+
 PEBShift::~PEBShift()
 {
 }
@@ -152,7 +170,7 @@ bool PECallFunction::has_aa_term(Design*des, NetScope*scope) const
 }

 PEConcat::PEConcat(const svector<PExpr*>&p, PExpr*r)
-: parms_(p), repeat_(r)
+: parms_(p), tested_widths_(p.count()), repeat_(r)
 {
 }

@@ -1,7 +1,7 @@
 #ifndef __PExpr_H
 #define __PExpr_H
 /*
- * Copyright (c) 1998-2008 Stephen Williams <[email protected]>
+ * Copyright (c) 1998-2009 Stephen Williams <[email protected]>
 *
 *    This source code is free software; you can redistribute it
 *    and/or modify it in source code form under the terms of the GNU
@@ -21,6 +21,7 @@

 # include  <string>
 # include  <vector>
+# include  <valarray>
 # include  "netlist.h"
 # include  "verinum.h"
 # include  "LineInfo.h"
@@ -142,8 +143,6 @@ class PExpr : public LineInfo {
      ivl_variable_type_t expr_type_;
      unsigned expr_width_;

-      static void suppress_binary_operand_sign_if_needed_(NetExpr*lp, NetExpr*rp);
-
    private: // not implemented
      PExpr(const PExpr&);
      PExpr& operator= (const PExpr&);
@@ -181,7 +180,10 @@ class PEConcat : public PExpr {
 				     bool bidirectional_flag) const;
    private:
      svector<PExpr*>parms_;
+      std::valarray<unsigned>tested_widths_;
+
      PExpr*repeat_;
+      NetExpr*repeat_expr_;
 };

 /*
@@ -291,8 +293,18 @@ class PEIdent : public PExpr {
      pform_name_t path_;

    private:
-	// Common functions to calculate parts of part/bit selects.
-      bool calculate_parts_(Design*, NetScope*, long&msb, long&lsb) const;
+	// Common functions to calculate parts of part/bit
+	// selects. These methods return true if the expressions
+	// elaborate/calculate, or false if there is some sort of
+	// source error.
+
+	// The calculate_parts_ method calculates the range
+	// expressions of a part select for the current object. The
+	// part select expressions are elaborated and evaluated, and
+	// the values written to the msb/lsb arguments. If there are
+	// invalid bits (xz) in either expression, then the defined
+	// flag is set to *false*.
+      bool calculate_parts_(Design*, NetScope*, long&msb, long&lsb, bool&defined) const;
      NetExpr* calculate_up_do_base_(Design*, NetScope*) const;
      bool calculate_param_range_(Design*, NetScope*,
 				  const NetExpr*msb_ex, long&msb,
@@ -480,15 +492,20 @@ class PEBinary : public PExpr {
      PExpr*left_;
      PExpr*right_;

-      NetExpr*elaborate_expr_base_(Design*, NetExpr*lp, NetExpr*rp, int use_wid) const;
-      NetExpr*elaborate_eval_expr_base_(Design*, NetExpr*lp, NetExpr*rp, int use_wid) const;
+      NetExpr*elaborate_expr_base_(Design*, NetExpr*lp, NetExpr*rp,
+				   int use_wid, bool is_pexpr =false) const;
+      NetExpr*elaborate_eval_expr_base_(Design*, NetExpr*lp, NetExpr*rp,
+					int use_wid) const;

      NetExpr*elaborate_expr_base_bits_(Design*, NetExpr*lp, NetExpr*rp, int use_wid) const;
-      NetExpr*elaborate_expr_base_div_(Design*, NetExpr*lp, NetExpr*rp, int use_wid) const;
+      NetExpr*elaborate_expr_base_div_(Design*, NetExpr*lp, NetExpr*rp,
+				       int use_wid, bool is_pexpr) const;
      NetExpr*elaborate_expr_base_lshift_(Design*, NetExpr*lp, NetExpr*rp, int use_wid) const;
      NetExpr*elaborate_expr_base_rshift_(Design*, NetExpr*lp, NetExpr*rp, int use_wid) const;
-      NetExpr*elaborate_expr_base_mult_(Design*, NetExpr*lp, NetExpr*rp, int use_wid) const;
-      NetExpr*elaborate_expr_base_add_(Design*, NetExpr*lp, NetExpr*rp, int use_wid) const;
+      NetExpr*elaborate_expr_base_mult_(Design*, NetExpr*lp, NetExpr*rp,
+					int use_wid, bool is_pexpr) const;
+      NetExpr*elaborate_expr_base_add_(Design*, NetExpr*lp, NetExpr*rp,
+				       int use_wid, bool is_pexpr) const;

 };

@@ -531,18 +548,51 @@ class PEBLogic  : public PEBinary {
      NetExpr*elaborate_pexpr(Design*des, NetScope*sc) const;
 };

-class PEBShift  : public PEBinary {
+/*
+ * A couple of the binary operands have a special sub-expression rule
+ * where the expression width is carried entirely by the left
+ * expression, and the right operand is self-determined.
+ */
+class PEBLeftWidth  : public PEBinary {
+
+    public:
+      explicit PEBLeftWidth(char op, PExpr*l, PExpr*r);
+      ~PEBLeftWidth() =0;
+
+      virtual NetExpr*elaborate_expr_leaf(Design*des, NetExpr*lp, NetExpr*rp,
+					  int expr_wid) const =0;
+
+    protected:
+      virtual unsigned test_width(Design*des, NetScope*scope,
+				  unsigned min, unsigned lval,
+				  ivl_variable_type_t&expr_type,
+				  bool&flag);
+
+      virtual NetExpr*elaborate_expr(Design*des, NetScope*scope,
+				     int expr_width, bool sys_task_arg) const;
+
+      virtual NetExpr*elaborate_pexpr(Design*des, NetScope*scope) const;
+
+};
+
+class PEBPower  : public PEBLeftWidth {
+
+    public:
+      explicit PEBPower(char op, PExpr*l, PExpr*r);
+      ~PEBPower();
+
+      NetExpr*elaborate_expr_leaf(Design*des, NetExpr*lp, NetExpr*rp,
+				  int expr_wid) const;
+};
+
+class PEBShift  : public PEBLeftWidth {

    public:
      explicit PEBShift(char op, PExpr*l, PExpr*r);
      ~PEBShift();

-      virtual unsigned test_width(Design*des, NetScope*scope,
-				  unsigned min, unsigned lval,
-				  ivl_variable_type_t&expr_type,
-				  bool&flag);
-      virtual NetExpr*elaborate_expr(Design*des, NetScope*,
-				     int expr_width, bool sys_task_arg) const;
+      NetExpr*elaborate_expr_leaf(Design*des, NetExpr*lp, NetExpr*rp,
+				  int expr_wid) const;
 };

 /*
@@ -571,6 +621,10 @@ class PETernary : public PExpr {
      virtual NetETernary*elaborate_pexpr(Design*des, NetScope*sc) const;
      virtual verinum* eval_const(Design*des, NetScope*sc) const;

+    private:
+      NetExpr* elab_and_eval_alternative_(Design*des, NetScope*scope,
+					  PExpr*expr, int use_wid) const;
+
    private:
      PExpr*expr_;
      PExpr*tru_;
@@ -615,7 +669,7 @@ class PECallFunction : public PExpr {
      bool check_call_matches_definition_(Design*des, NetScope*dscope) const;

      NetExpr* elaborate_sfunc_(Design*des, NetScope*scope, int expr_wid) const;
-      NetExpr* elaborate_access_func_(Design*des, NetScope*scope, int expr_wid) const;
+      NetExpr* elaborate_access_func_(Design*des, NetScope*scope, ivl_nature_t) const;
      unsigned test_width_sfunc_(Design*des, NetScope*scope,
 				 unsigned min, unsigned lval,
 				 ivl_variable_type_t&expr_type,
@@ -16,16 +16,15 @@
 *    along with this program; if not, write to the Free Software
 *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
 */
-#ifdef HAVE_CVS_IDENT
-#ident "$Id: PGenerate.cc,v 1.4 2007/06/02 03:42:12 steve Exp $"
-#endif

 # include  "PGenerate.h"
 # include  "PWire.h"
+# include  "ivl_assert.h"

 PGenerate::PGenerate(unsigned id)
 : id_number(id)
 {
+      direct_nested_ = false;
      parent = 0;
      lexical_scope = 0;
 }
@@ -38,3 +37,75 @@ void PGenerate::add_gate(PGate*gate)
 {
      gates.push_back(gate);
 }
+
+void PGenerate::probe_for_direct_nesting_(void)
+{
+      direct_nested_ = false;
+
+      ivl_assert(*this, scheme_type==GS_CASE_ITEM || scheme_type==GS_CONDIT || scheme_type==GS_ELSE);
+
+	// If this scheme has received an explicit name, then it
+	// cannot be direct nested.
+      if (scope_name[0] != '$') return;
+
+      if (tasks.size() > 0) return;
+      if (funcs.size() > 0) return;
+      if (gates.size() > 0) return;
+      if (parameters.size() > 0) return;
+      if (localparams.size() > 0) return;
+      if (events.size() > 0) return;
+      if (wires.size() > 0) return;
+      if (behaviors.size() > 0) return;
+      if (analog_behaviors.size() > 0) return;
+
+      if (generate_schemes.size() == 0) return;
+
+      switch (generate_schemes.size()) {
+	  case 1: {
+		PGenerate*child = generate_schemes.front();
+		if (child->scheme_type == GS_CONDIT)
+		      direct_nested_ = true;
+		if (child->scheme_type == GS_CASE)
+		      direct_nested_ = true;
+		break;
+	  }
+
+	  case 2: {
+		PGenerate*child1 = generate_schemes.front();
+		PGenerate*child2 = generate_schemes.back();
+		if (child1->scheme_type==GS_CONDIT && child2->scheme_type==GS_ELSE)
+		      direct_nested_ = true;
+		if (child2->scheme_type==GS_CONDIT && child1->scheme_type==GS_ELSE)
+		      direct_nested_ = true;
+		break;
+	  }
+      }
+}
+
+ostream& operator << (ostream&out, PGenerate::scheme_t type)
+{
+      switch (type) {
+	  case PGenerate::GS_NONE:
+	    out << "GS_NONE";
+	    break;
+	  case PGenerate::GS_LOOP:
+	    out << "GS_LOOP";
+	    break;
+	  case PGenerate::GS_CONDIT:
+	    out << "GS_CONDIT";
+	    break;
+	  case PGenerate::GS_ELSE:
+	    out << "GS_ELSE";
+	    break;
+	  case PGenerate::GS_CASE:
+	    out << "GS_CASE";
+	    break;
+	  case PGenerate::GS_CASE_ITEM:
+	    out << "GS_CASE_ITEM";
+	    break;
+	  case PGenerate::GS_NBLOCK:
+	    out << "GS_NBLOCK";
+	    break;
+      }
+      return out;
+}
@@ -25,6 +25,7 @@
 # include  "PScope.h"
 # include  <list>
 # include  <map>
+# include  <valarray>
 # include  "pform_types.h"

 class Design;
@@ -74,6 +75,10 @@ class PGenerate : public LineInfo, public LexicalScope {
      PExpr*loop_init;
      PExpr*loop_test;
      PExpr*loop_step;
+	// Case items may have multiple guard expression values. It is
+	// enough for any on of the guards to match the case statement
+	// test value.
+      std::valarray<PExpr*> item_test;

      list<PGate*> gates;
      void add_gate(PGate*);
@@ -104,18 +109,30 @@ class PGenerate : public LineInfo, public LexicalScope {
      bool generate_scope_case_(Design*des, NetScope*container);
      bool generate_scope_nblock_(Design*des, NetScope*container);

+	// Call probe during elaborate_scope to calulate the
+	// directed_nested_ flag. It is OK to store the direct_nested_
+	// information here because "direct nested" is a property of
+	// the lexical generate code.
+      void probe_for_direct_nesting_(void);
+      bool direct_nested_;
+
 	// Elaborate_scope within a generated scope.
      void elaborate_subscope_(Design*des, NetScope*scope);
+      void elaborate_subscope_direct_(Design*des, NetScope*scope);

 	// These are the scopes created by generate_scope.
      list<NetScope*>scope_list_;
 	// internal function called on each scope generated by this scheme.
      bool elaborate_sig_(Design*des, NetScope*scope) const;
+      bool elaborate_sig_direct_(Design*des, NetScope*scope) const;
      bool elaborate_(Design*des, NetScope*scope) const;
+      bool elaborate_direct_(Design*des, NetScope*scope) const;

    private: // not implemented
      PGenerate(const PGenerate&);
      PGenerate& operator= (const PGenerate&);
 };

+extern std::ostream& operator << (std::ostream&, PGenerate::scheme_t);
+
 #endif
@@ -16,9 +16,6 @@
 *    along with this program; if not, write to the Free Software
 *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
 */
-#ifdef HAVE_CVS_IDENT
-#ident "$Id: PSpec.cc,v 1.2 2007/02/12 01:52:21 steve Exp $"
-#endif

 # include  "PSpec.h"

@@ -18,9 +18,6 @@
 *    along with this program; if not, write to the Free Software
 *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
 */
-#ifdef HAVE_CVS_IDENT
-#ident "$Id: PSpec.h,v 1.3 2007/04/13 02:34:35 steve Exp $"
-#endif

 # include  "LineInfo.h"
 # include  "StringHeap.h"
@@ -16,9 +16,6 @@
 *    along with this program; if not, write to the Free Software
 *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
 */
-#ifdef HAVE_CVS_IDENT
-#ident "$Id: PUdp.cc,v 1.3 2004/03/08 00:47:44 steve Exp $"
-#endif

 # include  "PUdp.h"

@@ -38,16 +35,3 @@ unsigned PUdp::find_port(const char*name)
      return ports.count();
 }

-/*
- * $Log: PUdp.cc,v $
- * Revision 1.3  2004/03/08 00:47:44  steve
- *  primitive ports can bind bi name.
- *
- * Revision 1.2  2004/02/18 17:11:54  steve
- *  Use perm_strings for named langiage items.
- *
- * Revision 1.1  2003/07/15 05:07:13  steve
- *  Move PUdp constructor into compiled file.
- *
- */
-
@@ -18,9 +18,6 @@
 *    along with this program; if not, write to the Free Software
 *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
 */
-#ifdef HAVE_CVS_IDENT
-#ident "$Id: PUdp.h,v 1.12 2004/03/08 00:47:44 steve Exp $"
-#endif

 # include  <map>
 # include  "StringHeap.h"
@@ -78,53 +75,4 @@ class PUdp {
      PUdp& operator= (const PUdp&);
 };

-/*
- * $Log: PUdp.h,v $
- * Revision 1.12  2004/03/08 00:47:44  steve
- *  primitive ports can bind bi name.
- *
- * Revision 1.11  2004/02/18 17:11:54  steve
- *  Use perm_strings for named langiage items.
- *
- * Revision 1.10  2003/07/15 05:07:13  steve
- *  Move PUdp constructor into compiled file.
- *
- * Revision 1.9  2003/07/15 03:49:22  steve
- *  Spelling fixes.
- *
- * Revision 1.8  2003/01/30 16:23:07  steve
- *  Spelling fixes.
- *
- * Revision 1.7  2002/08/12 01:34:58  steve
- *  conditional ident string using autoconfig.
- *
- * Revision 1.6  2002/05/23 03:08:51  steve
- *  Add language support for Verilog-2001 attribute
- *  syntax. Hook this support into existing $attribute
- *  handling, and add number and void value types.
- *
- *  Add to the ivl_target API new functions for access
- *  of complex attributes attached to gates.
- *
- * Revision 1.5  2001/04/22 23:09:45  steve
- *  More UDP consolidation from Stephan Boettcher.
- *
- * Revision 1.4  2000/02/23 02:56:53  steve
- *  Macintosh compilers do not support ident.
- *
- * Revision 1.3  1999/06/15 03:44:53  steve
- *  Get rid of the STL vector template.
- *
- * Revision 1.2  1998/12/01 00:42:13  steve
- *  Elaborate UDP devices,
- *  Support UDP type attributes, and
- *  pass those attributes to nodes that
- *  are instantiated by elaboration,
- *  Put modules into a map instead of
- *  a simple list.
- *
- * Revision 1.1  1998/11/25 02:35:53  steve
- *  Parse UDP primitives all the way to pform.
- *
- */
 #endif
@@ -85,10 +85,6 @@ Normally, this command automatically figures out everything it needs
 to know. It generally works pretty well. There are a few flags to the
 configure script that modify its behavior:

-	--without-ipal
-	    This turns off support for Icarus PAL, whether ipal
-	    libraries are installed or not.
-
 	--prefix=<root>
 	    The default is /usr/local, which causes the tool suite to
 	    be compiled for install in /usr/local/bin,
@@ -99,27 +95,16 @@ configure script that modify its behavior:
 	    common to use --prefix=/opt.  You can configure for a non-root
 	    install with --prefix=$HOME.

-	--enable-vvp32 (experimental)
-	    If compiling on AMD64 systems, this enables the
-	    compilation of 32bit compatible vvp (vvp32) and the vpi
-	    modules that match.
-
-2.2.1 Special AMD64 Instructions
-
-(The Icarus Verilog RPM for x86_64 is build using these instructions.)
-
-If you are building for Linux/AMD64 (a.k.a x86_64) then to get the
-most out of your install, first make sure you have both 64bit and
-32bit development libraries installed. Then configure with this
-somewhat more complicated command:
-
-  ./configure libdir64='$(prefix)/lib64' vpidir1=vpi64 vpidir2=. --enable-vvp32
-
-This reflects the convention on AMD64 systems that 64bit libraries go
-into lib64 directories. The "--enable-vvp32" also turns on 32bit
-compatibility files. A 32bit version of vvp (vvp32) will be created,
-as well as 32bit versions of the development libraries and bundled VPI
-libraries.
+	--enable-suffix
+	--enable-suffix=<your-suffix>
+	--disable-suffix
+	    Enable/disable changing the names of install files to use
+	    a suffix string so that this version or install can co-
+	    exist with other versions. This renames the installed
+	    commands (iverilog, iverilog-vpi, vvp) and the installed
+	    library files and include directory so that installations
+	    with the same prefix but different suffix are guaranteed
+	    to not interfere with each other.

 2.3 (Optional) Testing

@@ -16,9 +16,6 @@
 *    along with this program; if not, write to the Free Software
 *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
 */
-#ifdef HAVE_CVS_IDENT
-#ident "$Id: StringHeap.cc,v 1.6 2004/02/18 17:11:54 steve Exp $"
-#endif

 # include  "StringHeap.h"
 #ifdef HAVE_MALLOC_H
@@ -179,28 +176,3 @@ bool operator < (perm_string a, perm_string b)
      return false;
 }

-/*
- * $Log: StringHeap.cc,v $
- * Revision 1.6  2004/02/18 17:11:54  steve
- *  Use perm_strings for named langiage items.
- *
- * Revision 1.5  2003/03/01 06:25:30  steve
- *  Add the lex_strings string handler, and put
- *  scope names and system task/function names
- *  into this table. Also, permallocate event
- *  names from the beginning.
- *
- * Revision 1.4  2003/01/27 05:09:17  steve
- *  Spelling fixes.
- *
- * Revision 1.3  2003/01/16 21:44:46  steve
- *  Keep some debugging status.
- *
- * Revision 1.2  2002/08/12 01:34:58  steve
- *  conditional ident string using autoconfig.
- *
- * Revision 1.1  2002/08/04 19:13:16  steve
- *  dll uses StringHeap for named items.
- *
- */
-
@@ -18,9 +18,6 @@
 *    along with this program; if not, write to the Free Software
 *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
 */
-#ifdef HAVE_CVS_IDENT
-#ident "$Id: StringHeap.h,v 1.6 2005/06/14 19:13:43 steve Exp $"
-#endif

 # include  "config.h"
 # include  <string>
@@ -120,28 +117,4 @@ class StringHeapLex  : private StringHeap {
      StringHeapLex& operator= (const StringHeapLex&);
 };

-/*
- * $Log: StringHeap.h,v $
- * Revision 1.6  2005/06/14 19:13:43  steve
- *  gcc3/4 compile errors.
- *
- * Revision 1.5  2004/02/18 17:11:54  steve
- *  Use perm_strings for named langiage items.
- *
- * Revision 1.4  2003/03/01 06:25:30  steve
- *  Add the lex_strings string handler, and put
- *  scope names and system task/function names
- *  into this table. Also, permallocate event
- *  names from the beginning.
- *
- * Revision 1.3  2003/01/16 21:44:46  steve
- *  Keep some debugging status.
- *
- * Revision 1.2  2002/08/12 01:34:58  steve
- *  conditional ident string using autoconfig.
- *
- * Revision 1.1  2002/08/04 19:13:16  steve
- *  dll uses StringHeap for named items.
- *
- */
 #endif
@@ -18,9 +18,6 @@
 *    along with this program; if not, write to the Free Software
 *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
 */
-#ifdef HAVE_CVS_IDENT
-#ident "$Id: _pli_types.h.in,v 1.8 2007/06/05 21:32:30 steve Exp $"
-#endif

 # undef HAVE_INTTYPES_H

@@ -88,42 +85,4 @@ typedef char           PLI_BYTE8;
 typedef unsigned char  PLI_UBYTE8;
 #endif

-/*
- * $Log: _pli_types.h.in,v $
- * Revision 1.8  2007/06/05 21:32:30  steve
- *  More standard PLI_BYTE8.
- *
- * Revision 1.7  2003/11/12 02:38:44  steve
- *  Clean up manual definitions of PLI_UINT64_FMT.
- *
- * Revision 1.6  2003/11/08 20:06:21  steve
- *  Spelling fixes in comments.
- *
- * Revision 1.5  2003/10/29 03:28:27  steve
- *  Add the PLU_UINT64_FMT string for formatting output.
- *
- * Revision 1.4  2003/10/29 03:23:12  steve
- *  Portably handle time format of VCD prints.
- *
- * Revision 1.3  2003/10/02 21:30:06  steve
- *  Use configured TIME_FMT in vcd dump printf.
- *
- * Revision 1.2  2003/10/02 19:33:44  steve
- *  Put libraries in libdir64.
- *
- * Revision 1.1  2003/09/30 01:33:13  steve
- *  Add PLI_UINT64 to _pli_types.h.
- *
- * Revision 1.2  2003/05/26 04:39:16  steve
- *  Typo type name.
- *
- * Revision 1.1  2003/02/17 06:39:47  steve
- *  Add at least minimal implementations for several
- *  acc_ functions. Add support for standard ACC
- *  string handling.
- *
- *  Add the _pli_types.h header file to carry the
- *  IEEE1364-2001 standard PLI type declarations.
- *
- */
 #endif
@@ -18,9 +18,6 @@
 *    along with this program; if not, write to the Free Software
 *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
 */
-#ifdef HAVE_CVS_IDENT
-#ident "$Id: acc_user.h,v 1.20 2003/12/17 15:45:07 steve Exp $"
-#endif

 /*
 * This header file contains the definitions and declarations needed
@@ -273,82 +270,4 @@ extern char* acc_version(void);

 EXTERN_C_END

-/*
- * $Log: acc_user.h,v $
- * Revision 1.20  2003/12/17 15:45:07  steve
- *  Add acc_set_scope function.
- *
- * Revision 1.19  2003/10/10 02:57:45  steve
- *  Some PLI1 stubs.
- *
- * Revision 1.18  2003/06/13 19:23:41  steve
- *  Add a bunch more PLI1 routines.
- *
- * Revision 1.17  2003/06/04 01:56:20  steve
- * 1) Adds configure logic to clean up compiler warnings
- * 2) adds acc_compare_handle, acc_fetch_range, acc_next_scope and
- *    tf_isetrealdelay, acc_handle_scope
- * 3) makes acc_next reentrant
- * 4) adds basic vpiWire type support
- * 5) fills in some acc_object_of_type() and acc_fetch_{full}type()
- * 6) add vpiLeftRange/RigthRange to signals
- *
- * Revision 1.16  2003/05/30 04:18:31  steve
- *  Add acc_next function.
- *
- * Revision 1.15  2003/05/29 02:35:41  steve
- *  acc_fetch_type supports module.
- *
- * Revision 1.14  2003/05/29 02:21:45  steve
- *  Implement acc_fetch_defname and its infrastructure in vvp.
- *
- * Revision 1.13  2003/05/24 03:02:04  steve
- *  Add implementation of acc_handle_by_name.
- *
- * Revision 1.12  2003/05/18 00:16:35  steve
- *  Add PLI_TRACE tracing of PLI1 modules.
- *
- *  Add tf_isetdelay and friends, and add
- *  callback return values for acc_vcl support.
- *
- * Revision 1.11  2003/04/24 18:57:05  steve
- *  Add acc_fetch_fulltype function.
- *
- * Revision 1.10  2003/04/20 02:48:39  steve
- *  Support value change callbacks.
- *
- * Revision 1.9  2003/04/12 18:57:13  steve
- *  More acc_ function stubs.
- *
- * Revision 1.8  2003/03/13 04:35:09  steve
- *  Add a bunch of new acc_ and tf_ functions.
- *
- * Revision 1.7  2003/02/17 06:39:47  steve
- *  Add at least minimal implementations for several
- *  acc_ functions. Add support for standard ACC
- *  string handling.
- *
- *  Add the _pli_types.h header file to carry the
- *  IEEE1364-2001 standard PLI type declarations.
- *
- * Revision 1.6  2002/08/12 01:34:58  steve
- *  conditional ident string using autoconfig.
- *
- * Revision 1.5  2002/06/11 15:19:12  steve
- *  Add acc_fetch_argc/argv/version (mruff)
- *
- * Revision 1.4  2002/06/07 02:58:58  steve
- *  Add a bunch of acc/tf functions. (mruff)
- *
- * Revision 1.3  2002/06/02 19:03:29  steve
- *  Add acc_handle_tfarg and acc_next_topmode
- *
- * Revision 1.2  2002/05/30 02:06:05  steve
- *  Implement acc_product_version.
- *
- * Revision 1.1  2002/05/23 03:46:42  steve
- *  Add the acc_user.h header file.
- *
- */
-
 #endif
@@ -1,29 +1,21 @@
-# AX_CPP_IDENT
-# ------------
-# Check if the C compiler supports #ident
-# Define and substitute ident_support if so.
-#
-# It would be simpler and more consistent with the rest of the autoconf
-# structure to AC_DEFINE(HAVE_CPP_IDENT) instead of
-# ident_support='-DHAVE_CVS_IDENT=1' and AC_SUBST(ident_support), but that
-# change would require all C files in the icarus top level directory to
-# put #include <config.h> before the #ifdef HAVE_CVS_IDENT (and change
-# HAVE_CVS_IDENT to HAVE_CPP_IDENT).   That would also remove all special
-# ident_support handling from the Makefile.  Manyana.
-#
-AC_DEFUN([AX_CPP_IDENT],
-[AC_CACHE_CHECK([for ident support in C compiler], ax_cv_cpp_ident,
-[AC_TRY_COMPILE([
-#ident "$Id: aclocal.m4,v 1.7 2007/05/16 23:59:12 steve Exp $"
-],[while (0) {}],
-[AS_VAR_SET(ax_cv_cpp_ident, yes)],
-[AS_VAR_SET(ax_cv_cpp_ident, no)])])
-if test $ax_cv_cpp_ident = yes; then
-  ident_support='-DHAVE_CVS_IDENT=1'
-fi
-AC_SUBST(ident_support)
-])# AC_CPP_IDENT

+# AX_ENABLE_SUFFIX
+# ----------------
+#  Create the configure option --enable-suffix[=suffix] to generate suffix
+# strings for the installed commands. This allows for shared installs of
+# different builds. Remember to change the default suffix string to some
+# value appropriate for the current version.
+AC_DEFUN([AX_ENABLE_SUFFIX],
+[AC_ARG_ENABLE([suffix],[Set the installation command suffix],[true],[enable_suffix=no])
+if test X$enable_suffix = Xyes; then
+  install_suffix='-0.9'
+elif test X$enable_suffix = Xno; then
+  install_suffix=''
+else
+  install_suffix="$enable_suffix"
+fi
+AC_SUBST(install_suffix)
+])# AX_ENABLE_SUFFIX

 # _AX_C_UNDERSCORES_MATCH_IFELSE(PATTERN, ACTION-IF-MATCH, ACTION-IF-NOMATCH)
 # ------------------------------
@@ -72,17 +64,22 @@ fi
 # Combined check for several flavors of Microsoft Windows so
 # their "issues" can be dealt with
 AC_DEFUN([AX_WIN32],
-[AC_CYGWIN
-AC_MINGW32
-WIN32=no
-AC_MSG_CHECKING([for Microsoft Windows])
-if test "$CYGWIN" = "yes" -o "$MINGW32" = "yes"
-then
-    WIN32=yes
-fi
+[AC_MSG_CHECKING([for Microsoft Windows])
+AC_REQUIRE([AC_CANONICAL_HOST]) []dnl
+case $host_os in
+     *cygwin*) MINGW32=no;  WIN32=yes;;
+
+      *mingw*) MINGW32=yes; WIN32=yes;;
+
+            *) MINGW32=no;  WIN32=no;;
+esac
 AC_SUBST(MINGW32)
 AC_SUBST(WIN32)
 AC_MSG_RESULT($WIN32)
+if test $WIN32 = yes; then
+AC_MSG_CHECKING([for MinGW])
+AC_MSG_RESULT($MINGW32)
+fi
 ])# AX_WIN32

 # AX_LD_EXTRALIBS
@@ -113,6 +110,10 @@ case "${host}" in
        shared="-shared -Wl,--enable-auto-image-base"
        ;;

+     *-*-mingw*)
+        shared="-shared -Wl,--enable-auto-image-base"
+        ;;
+
     *-*-hpux*)
        shared="-b"
        ;;
@@ -142,6 +143,10 @@ case "${host}" in
        PICFLAG=
        ;;

+     *-*-mingw*)
+        PICFLAG=
+        ;;
+
     *-*-hpux*)
        PICFLAG=+z
        ;;
@@ -177,6 +182,10 @@ case "${host}" in
        rdynamic=""
        ;;

+    *-*-mingw*)
+        rdynamic=""
+        ;;
+
    *-*-hpux*)
        rdynamic="-E"
        ;;
@@ -9,11 +9,5 @@
 echo "Autoconf in root..."
 autoconf -f

-for dir in vpi vvp tgt-vvp tgt-fpga tgt-stub tgt-vhdl libveriuser cadpli
-do
-    echo "Autoconf in $dir..."
-    ( cd ./$dir ; autoconf -f --include=.. )
-done
-
 echo "Precompiling lexor_keyword.gperf"
 gperf -o -i 7 -C -k 1-4,\$ -L ANSI-C -H keyword_hash -N check_identifier -t ./lexor_keyword.gperf > lexor_keyword.cc
@@ -1,7 +0,0 @@
-Makefile
-cadpli.vpl
-dep
-configure
-config.log
-config.status
-autom4te.cache
@@ -18,7 +18,7 @@
 #
 SHELL = /bin/sh

-VERSION = 0.9.devel
+suffix = @install_suffix@

 prefix = @prefix@
 exec_prefix = @exec_prefix@
@@ -30,14 +30,14 @@ bindir = @bindir@
 libdir = @libdir@
 includedir = $(prefix)/include

-vpidir = @libdir@/ivl
+vpidir = @libdir@/ivl$(suffix)

 CC = @CC@
 INSTALL = @INSTALL@
 INSTALL_PROGRAM = @INSTALL_PROGRAM@
 INSTALL_DATA = @INSTALL_DATA@

-CPPFLAGS = @ident_support@ -I$(srcdir) -I$(srcdir)/.. -I.. @CPPFLAGS@ @DEFS@ @PICFLAG@
+CPPFLAGS = -I$(srcdir) -I$(srcdir)/.. -I.. @CPPFLAGS@ @DEFS@ @PICFLAG@
 CFLAGS = -Wall @CFLAGS@
 LDFLAGS = @LDFLAGS@

@@ -59,6 +59,9 @@ dep:

 O = cadpli.o

+Makefile: $(srcdir)/Makefile.in ../config.status
+	../config.status --file=$@
+
 SYSTEM_VPI_LDFLAGS = -L../vvp -lvpi
 ifeq (@MINGW32@,yes)
    SYSTEM_VPI_LDFLAGS += @EXTRALIBS@
@@ -71,18 +74,18 @@ clean:
 	rm -rf *.o dep cadpli.vpl bin32

 distclean: clean
-	rm -f Makefile config.status config.log config.cache
+	rm -f Makefile config.log

-install: all installdirs $(vpidir)/cadpli.vpl $(INSTALL32)
+install: all installdirs $(vpidir)/cadpli.vpl

 $(vpidir)/cadpli.vpl: ./cadpli.vpl
-	$(INSTALL_PROGRAM) ./cadpli.vpl $(DESTDIR)$(vpidir)/cadpli.vpl
+	$(INSTALL_PROGRAM) ./cadpli.vpl "$(DESTDIR)$(vpidir)/cadpli.vpl"

-installdirs: ../mkinstalldirs
-	$(srcdir)/../mkinstalldirs $(DESTDIR)$(vpidir)
+installdirs: $(srcdir)/../mkinstalldirs
+	$(srcdir)/../mkinstalldirs "$(DESTDIR)$(vpidir)"

 uninstall: $(UNINSTALL32)
-	rm -f $(DESTDIR)$(vpidir)/cadpli.vpl
+	rm -f "$(DESTDIR)$(vpidir)/cadpli.vpl"

 uninstall32:

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2003 Stephen Williams (steve@icarus.com)
+ * Copyright (c) 2003-2008 Stephen Williams (steve@icarus.com)
 *
 *    This source code is free software; you can redistribute it
 *    and/or modify it in source code form under the terms of the GNU
@@ -16,9 +16,6 @@
 *    along with this program; if not, write to the Free Software
 *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
 */
-#ifdef HAVE_CVS_IDENT
-#ident "$Id: cadpli.c,v 1.7 2004/09/10 00:15:45 steve Exp $"
-#endif

 # include  <vpi_user.h>
 # include  <veriuser.h>
@@ -28,6 +25,7 @@
 #endif
 # include  <string.h>
 # include  <assert.h>
+# include  "config.h"
 # include  "ivl_dlfcn.h"

 typedef void* (*funcvp)(void);
@@ -87,34 +85,3 @@ void (*vlog_startup_routines[])() = {
      thunker_register,
      0
 };
-
-
-/*
- * $Log: cadpli.c,v $
- * Revision 1.7  2004/09/10 00:15:45  steve
- *  Remove bad casts.
- *
- * Revision 1.6  2004/09/05 21:19:51  steve
- *  Better type safety.
- *
- * Revision 1.5  2003/08/26 16:26:02  steve
- *  ifdef idents correctly.
- *
- * Revision 1.4  2003/04/30 01:28:06  steve
- *  Remove veriusertfs stuf.
- *
- * Revision 1.3  2003/02/22 04:04:38  steve
- *  Only include malloc.h if it is present.
- *
- * Revision 1.2  2003/02/17 00:01:25  steve
- *  Use a variant of ivl_dlfcn to do dynamic loading
- *  from within the cadpli module.
- *
- *  Change the +cadpli flag to -cadpli, to keep the
- *  plusargs namespace clear.
- *
- * Revision 1.1  2003/02/16 02:23:54  steve
- *  Add the cadpli interface module.
- *
- */
-
@@ -1,61 +0,0 @@
-AC_INIT(Makefile.in)
-
-AC_PROG_CC
-AC_PROG_CXX
-AC_CHECK_TOOL(STRIP, strip, true)
-
-AC_EXEEXT
-AC_SUBST(EXEEXT)
-
-# Combined check for Microsoft-related bogosities; sets WIN32 if found
-AX_WIN32
-
-AC_PROG_INSTALL
-
-AC_CHECK_HEADERS(malloc.h)
-
-AC_CHECK_SIZEOF(unsigned long long)
-AC_CHECK_SIZEOF(unsigned long)
-AC_CHECK_SIZEOF(unsigned)
-
-# --
-# Look for a dl library to use. First look for the standard dlopen
-# functions, and failing that look for the HP specific shl_load function.
-
-AC_CHECK_HEADERS(dlfcn.h dl.h, break)
-
-DLLIB=''
-AC_CHECK_LIB(dl,dlopen,[DLLIB=-ldl])
-if test -z "$DLLIB" ; then
-AC_CHECK_LIB(dld,shl_load,[DLLIB=-ldld])
-fi
-AC_SUBST(DLLIB)
-
-AX_CPP_PRECOMP
-
-# Compiler option for position independent code, needed when making shared objects.
-AX_C_PICFLAG
-
-# Linker option used when compiling the target
-AX_LD_RDYNAMIC
-
-# linker options when building a shared library
-AX_LD_SHAREDLIB_OPTS
-
-AX_LD_EXTRALIBS
-
-#######################
-## test for underscores. The vpi module loader in vvm needs to know this
-## in order to know the name of the start symbol for the .vpi module.
-#######################
-
-AX_C_UNDERSCORES_LEADING
-AX_C_UNDERSCORES_TRAILING
-
-#######################
-## end of test for underscores
-#######################
-
-AX_CPP_IDENT
-
-AC_OUTPUT(Makefile)
@@ -18,9 +18,6 @@
 *    along with this program; if not, write to the Free Software
 *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
 */
-#ifdef HAVE_CVS_IDENT
-#ident "$Id: ivl_dlfcn.h,v 1.3 2004/10/04 01:10:56 steve Exp $"
-#endif

 #if defined(__MINGW32__)
 # include <windows.h>
@@ -94,20 +91,4 @@ static __inline__ const char*dlerror(void)
 { return strerror( errno ); }
 #endif

-/*
- * $Log: ivl_dlfcn.h,v $
- * Revision 1.3  2004/10/04 01:10:56  steve
- *  Clean up spurious trailing white space.
- *
- * Revision 1.2  2003/12/12 05:43:08  steve
- *  Some systems dlsym requires leading _ or not on whim.
- *
- * Revision 1.1  2003/02/17 00:01:25  steve
- *  Use a variant of ivl_dlfcn to do dynamic loading
- *  from within the cadpli module.
- *
- *  Change the +cadpli flag to -cadpli, to keep the
- *  plusargs namespace clear.
- *
- */
 #endif
@@ -85,9 +85,9 @@ extern bool verbose_flag;
 extern bool debug_scopes;
 extern bool debug_eval_tree;
 extern bool debug_elaborate;
+extern bool debug_elab_pexpr;
 extern bool debug_synth2;
 extern bool debug_optimizer;
-extern bool debug_automatic;

 /* Path to a directory useful for finding subcomponents. */
 extern const char*basedir;
@@ -125,6 +125,11 @@ extern bool gn_verilog_ams_flag;
   is scalar and the net/register definition is vectored. */
 extern bool gn_io_range_error_flag;

+/* If this flag is true, then force re-evaluation of user functions
+   in a continuous assignment when any part of the expression is
+   re-evaluated. */
+extern bool gn_strict_ca_eval_flag;
+
 /* The bits of these GN_KEYWORDS_* constants define non-intersecting
   sets of keywords. The compiler enables groups of keywords by setting
   lexor_keyword_mask with the OR of the bits for the keywords to be
@@ -134,6 +139,7 @@ enum { GN_KEYWORDS_1364_1995        = 0x0001,
       GN_KEYWORDS_1364_2001_CONFIG = 0x0004,
       GN_KEYWORDS_1364_2005        = 0x0008,
       GN_KEYWORDS_VAMS_2_3         = 0x0010,
+       GN_KEYWORDS_1800_2005        = 0x0020,
       GN_KEYWORDS_ICARUS           = 0x8000
 };
 extern int lexor_keyword_mask;
@@ -18,9 +18,6 @@
 *    along with this program; if not, write to the Free Software
 *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
 */
-#ifdef HAVE_CVS_IDENT
-#ident "$Id: config.h.in,v 1.12 2007/02/02 04:33:00 steve Exp $"
-#endif

 #if defined(__cplusplus)
 #  if !defined(__GNUC__)
@@ -53,44 +50,4 @@
 # include  <inttypes.h>
 #endif

-/*
- * $Log: config.h.in,v $
- * Revision 1.12  2007/02/02 04:33:00  steve
- *  Use inttypes.h instead of stdint.h for portability.
- *
- * Revision 1.11  2004/10/04 01:10:52  steve
- *  Clean up spurious trailing white space.
- *
- * Revision 1.10  2003/08/26 16:26:01  steve
- *  ifdef idents correctly.
- *
- * Revision 1.9  2003/07/03 16:29:55  steve
- *  spemm WORDS_BIGENDIAN correctly.
- *
- * Revision 1.8  2003/03/07 02:44:33  steve
- *  Implement $realtobits.
- *
- * Revision 1.7  2003/02/20 00:49:24  steve
- *  detect -lz and -lbz2 libraries.
- *
- * Revision 1.6  2003/01/10 19:01:04  steve
- *  Only use libiberty.h if available.
- *
- * Revision 1.5  2002/08/11 23:39:33  steve
- *  Remove VVM option.
- *
- * Revision 1.4  2002/02/16 03:18:53  steve
- *  Make vvm optional, normally off.
- *
- * Revision 1.3  2001/10/18 16:16:23  steve
- *  Include HAVE_SYS_WAIT in config.h (PR#306)
- *
- * Revision 1.2  2001/09/15 18:27:04  steve
- *  Make configure detect malloc.h
- *
- * Revision 1.1  2001/07/25 03:10:48  steve
- *  Create a config.h.in file to hold all the config
- *  junk, and support gcc 3.0. (Stephan Boettcher)
- *
- */
 #endif /* __config_H */
@@ -2,11 +2,17 @@ dnl Process this file with autoconf to produce a configure script.
 AC_INIT(netlist.h)
 AC_CONFIG_HEADER(config.h)
 AC_CONFIG_HEADER(_pli_types.h)
+AC_CONFIG_HEADER(vvp/config.h)
+AC_CONFIG_HEADER(vpi/vpi_config.h)
+AC_CONFIG_HEADER(libveriuser/config.h)
+AC_CONFIG_HEADER(tgt-vvp/vvp_config.h)
+AC_CONFIG_HEADER(tgt-vhdl/vhdl_config.h)

 AC_CANONICAL_HOST
 dnl Checks for programs.
 AC_PROG_CC
 AC_PROG_CXX
+AC_PROG_RANLIB
 AC_CHECK_TOOL(STRIP, strip, true)
 AC_CHECK_PROGS(XGPERF,gperf,none)
 AC_CHECK_PROGS(MAN,man,none)
@@ -49,6 +55,18 @@ AC_LANG_CPLUSPLUS

 AC_CHECK_HEADERS(getopt.h malloc.h inttypes.h libiberty.h iosfwd sys/wait.h)

+AC_CHECK_SIZEOF(unsigned long long)
+AC_CHECK_SIZEOF(unsigned long)
+AC_CHECK_SIZEOF(unsigned)
+
+# vvp uses these...
+AC_CHECK_LIB(termcap, tputs)
+AC_CHECK_LIB(readline, readline)
+AC_CHECK_LIB(history, add_history)
+AC_CHECK_HEADERS(readline/readline.h readline/history.h sys/resource.h)
+case "${host}" in *linux*) AC_DEFINE([LINUX], [1], [Host operating system is Linux.]) ;; esac
+
+# vpi uses these
 AC_CHECK_LIB(z, gzwrite)
 AC_CHECK_LIB(z, gzwrite, HAVE_LIBZ=yes, HAVE_LIBZ=no)
 AC_SUBST(HAVE_LIBZ)
@@ -61,6 +79,18 @@ AC_CHECK_LIB(bz2, BZ2_bzdopen, HAVE_LIBBZ2=yes, HAVE_LIBBZ2=no)
 fi
 AC_SUBST(HAVE_LIBBZ2)

+# valgrind checks
+AC_ARG_WITH([valgrind], [AS_HELP_STRING([--with-valgrind],
+                                        [Add valgrind hooks])],
+            [], [check_valgrind=yes])
+
+AS_IF([test "x$check_valgrind" == xyes],
+      [AC_MSG_NOTICE([Not using valgrind hooks])],
+      [AC_CHECK_HEADER([valgrind/memcheck.h],
+                       [AC_DEFINE([CHECK_WITH_VALGRIND], [1],
+                                  [Define to one to use the valgrind hooks])],
+                       [AC_MSG_ERROR([Could not find <valgrind/memcheck.h>])])])
+
 AC_MSG_CHECKING(for sys/times)
 AC_TRY_LINK(
 #include <unistd.h>
@@ -92,6 +122,8 @@ AC_C_BIGENDIAN

 # $host

+AX_ENABLE_SUFFIX
+
 AX_LD_EXTRALIBS

 # Compiler option for position independent code, needed when making shared objects.
@@ -101,6 +133,31 @@ AX_C_PICFLAG
 # may modify CPPFLAGS and CFLAGS
 AX_CPP_PRECOMP

+# Processor specific compile flags
+case "${host}" in
+    alpha*-*-linux*)
+	CPPFLAGS="-mieee $CPPFLAGS"
+	CFLAGS="-mieee $CFLAGS"
+	;;
+esac
+
+# Do some more operating system specific setup. We put the file64_support
+# define in a substitution instead of simply a define because there
+# are source files (namely lxt support files) that don't include any
+# config.h header file.
+file64_support=''
+case "${host}" in
+    *-*-linux*)
+	AC_DEFINE([_LARGEFILE_SOURCE], [1], [Indicates LFS (i.e. the ability to create files larger than 2 GiB on 32-bit operating systems).])
+	file64_support='-D_LARGEFILE_SOURCE=1 -D_FILE_OFFSET_BITS=64'
+	;;
+esac
+AC_SUBST(file64_support)
+
+# Check that these functions exist. They are mostly C99
+# functions that older compilers may not yet support.
+AC_CHECK_FUNCS(lround nan fmin fmax fopen64)
+
 # Linker option used when compiling the target
 AX_LD_RDYNAMIC

@@ -119,9 +176,31 @@ AX_C_UNDERSCORES_TRAILING
 ## end of test for underscores
 #######################

-AX_CPP_IDENT
+#######################
+# Sanity check the configured results
+#######################
+
+AC_MSG_CHECKING(for sanity of prefix)
+if test X`echo "$prefix" | wc -w` != X1
+then
+AC_MSG_ERROR(cannot configure white space in prefix: $prefix)
+fi
+AC_MSG_RESULT(ok)
+
+AC_MSG_CHECKING(for sanity of exec_prefix)
+if test X`echo "$exec_prefix" | wc -w` != X1
+then
+AC_MSG_ERROR(cannot configure white space in exec_prefix: $exec_prefix)
+fi
+AC_MSG_RESULT(ok)
+
+AC_MSG_CHECKING(for sanity of libdir)
+if test X`echo "$libdir" | wc -w` != X1
+then
+AC_MSG_ERROR(cannot configure white space in libdir: $libdir)
+fi
+AC_MSG_RESULT(ok)

 # XXX disable tgt-fpga for the moment
-AC_CONFIG_SUBDIRS(vvp vpi tgt-stub tgt-null tgt-vvp tgt-vhdl libveriuser cadpli)

-AC_OUTPUT(Makefile ivlpp/Makefile driver/Makefile driver-vpi/Makefile tgt-null/Makefile tgt-verilog/Makefile tgt-pal/Makefile)
+AC_OUTPUT(Makefile ivlpp/Makefile vvp/Makefile vpi/Makefile driver/Makefile driver-vpi/Makefile cadpli/Makefile libveriuser/Makefile tgt-null/Makefile tgt-stub/Makefile tgt-vvp/Makefile tgt-vhdl/Makefile tgt-fpga/Makefile tgt-verilog/Makefile tgt-pal/Makefile)
@@ -136,6 +136,17 @@ ostream& operator <<(ostream&o, struct __ScopePathManip marg)
      return o;
 }

+void NetBranch::dump(ostream&o, unsigned ind) const
+{
+      static const char*pin_names[2] = {
+	    "terminal0",
+	    "terminal1" };
+
+      o << setw(ind) << "" << "branch island=" << get_island();
+      o << " // " << get_fileline() << endl;
+      dump_node_pins(o, ind+4, pin_names);
+}
+
 void NetDelaySrc::dump(ostream&o, unsigned ind) const
 {
      o << setw(ind) << "" << "specify delay";
@@ -204,7 +215,10 @@ void NetNet::dump_net(ostream&o, unsigned ind) const

      o << " (";
      for (unsigned idx = pin_count() ;  idx > 0 ;  idx -= 1)
-	    o << pin(idx-1).nexus()->get_init();
+	    if (const Nexus*tmp = pin(idx-1).nexus())
+		  o << tmp->get_init();
+	    else
+		  o << ".";
      o << ")" << endl;

      for (unsigned idx = 0 ;  idx < pin_count() ;  idx += 1) {
@@ -678,7 +692,7 @@ void NetTaskDef::dump(ostream&o, unsigned ind) const
 void NetTran::dump_node(ostream&o, unsigned ind) const
 {
      o << setw(ind) << "" << type_ << " " << name()
-	<< " island " << island;
+	<< " island " << get_island();
      if (type_ == IVL_SW_TRAN_VP) {
 	    o << " width=" << vector_width()
 	      << " part=" << part_width()
@@ -1107,7 +1121,11 @@ void NetScope::dump(ostream&o) const
 			o << "[" << *(*pp).second.msb
 			  << ":" << *(*pp).second.lsb << "] ";

-		  o << (*pp).first << " = "  << *(*pp).second.expr;
+		  o << (*pp).first << " = ";
+		  if (pp->second.expr)
+			o << *(*pp).second.expr;
+		  else
+			o << "<nil>";

 		  for (range_t*ran = (*pp).second.range ; ran ; ran = ran->next) {
 			if (ran->exclude_flag)
@@ -1511,6 +1529,13 @@ void Design::dump(ostream&o) const
 	    } while (cur != nodes_->node_next_);
      }

+      o << "ELABORATED BRANCHES:" << endl;
+
+      if (branches_) {
+	    for (NetBranch*cur = branches_ ; cur ; cur = cur->next_)
+		  cur->dump(o, 0);
+      }
+
      o << "ELABORATED PROCESSES:" << endl;

 	// Dump the processes.
@@ -19,17 +19,17 @@

 # include  "discipline.h"

-nature_t::nature_t(perm_string name__, perm_string access__)
+ivl_nature_s::ivl_nature_s(perm_string name__, perm_string access__)
 : name_(name__), access_(access__)
 {
 }

-nature_t::~nature_t()
+ivl_nature_s::~ivl_nature_s()
 {
 }

 ivl_discipline_s::ivl_discipline_s(perm_string name__, ivl_dis_domain_t domain__,
-				   nature_t*pot, nature_t*flow__)
+				   ivl_nature_t pot, ivl_nature_t flow__)
 : name_(name__), domain_(domain__), potential_(pot), flow_(flow__)
 {
 }
@@ -33,10 +33,10 @@

 extern std::ostream& operator << (std::ostream&, ivl_dis_domain_t);

-class nature_t : public LineInfo {
+class ivl_nature_s : public LineInfo {
    public:
-      explicit nature_t(perm_string name, perm_string access);
-      ~nature_t();
+      explicit ivl_nature_s(perm_string name, perm_string access);
+      ~ivl_nature_s();

      perm_string name() const   { return name_; }
 	// Identifier for the access function for this nature
@@ -50,28 +50,28 @@ class nature_t : public LineInfo {
 class ivl_discipline_s : public LineInfo {
    public:
      explicit ivl_discipline_s (perm_string name, ivl_dis_domain_t dom,
-				 nature_t*pot, nature_t*flow);
+				 ivl_nature_t pot, ivl_nature_t flow);
      ~ivl_discipline_s();

      perm_string name() const         { return name_; }
      ivl_dis_domain_t domain() const  { return domain_; }
-      const nature_t*potential() const { return potential_; }
-      const nature_t*flow() const      { return flow_; }
+      const ivl_nature_t potential() const { return potential_; }
+      const ivl_nature_t flow() const      { return flow_; }

    private:
      perm_string name_;
      ivl_dis_domain_t domain_;
-      nature_t*potential_;
-      nature_t*flow_;
+      ivl_nature_t potential_;
+      ivl_nature_t flow_;

    private: // not implemented
      ivl_discipline_s(const ivl_discipline_s&);
      ivl_discipline_s& operator = (const ivl_discipline_s&);
 };

-extern map<perm_string,nature_t*> natures;
+extern map<perm_string,ivl_nature_t> natures;
 extern map<perm_string,ivl_discipline_t> disciplines;
  // Map access function name to the nature that it accesses.
-extern map<perm_string,nature_t*> access_function_nature;
+extern map<perm_string,ivl_nature_t> access_function_nature;

 #endif
@@ -1,2 +0,0 @@
-Makefile
-iverilog-vpi.exe
@@ -18,7 +18,7 @@
 #
 SHELL = /bin/sh

-VERSION = 0.9.devel
+suffix = @install_suffix@

 prefix = @prefix@
 exec_prefix = @exec_prefix@
@@ -27,6 +27,8 @@ datarootdir = @datarootdir@

 VPATH = $(srcdir)

+suffix = @install_suffix@
+
 bindir = $(exec_prefix)/bin
 libdir = $(exec_prefix)/lib
 includedir = $(prefix)/include
@@ -39,7 +41,7 @@ INSTALL = @INSTALL@
 INSTALL_PROGRAM = @INSTALL_PROGRAM@
 INSTALL_DATA = @INSTALL_DATA@

-CPPFLAGS = @ident_support@ -I. -I$(srcdir)/.. -DVERSION='"$(VERSION)"' @CPPFLAGS@ @DEFS@
+CPPFLAGS = -I. -I$(srcdir)/.. @CPPFLAGS@ @DEFS@
 CFLAGS = -Wall @CFLAGS@
 LDFLAGS = @LDFLAGS@

@@ -48,24 +50,27 @@ all: iverilog-vpi@EXEEXT@
 check: all

 clean:
-	rm -f *.o config.h
-	rm -f iverilog-vpi@EXEEXT@
+	rm -f *.o config.h iverilog-vpi@EXEEXT@

 distclean: clean
-	rm -f Makefile
+	rm -f Makefile config.log
+
+Makefile: $(srcdir)/Makefile.in ../config.status
+	../config.status --file=$@

 O = main.o res.o

 iverilog-vpi@EXEEXT@: $O
 	$(CC) $(LDFLAGS) $O -o iverilog-vpi@EXEEXT@ @EXTRALIBS@

-
 main.o: main.c config.h
 	$(CC) $(CPPFLAGS) $(CFLAGS) -c $(srcdir)/main.c

-config.h: config.h.in
+
+config.h: $(srcdir)/config.h.in Makefile
 	sed -e 's;@IVLCC@;@CC@;' -e 's;@IVLCXX@;@CXX@;' \
-	    -e 's;@IVLCFLAGS@;@CXXFLAGS@;' \
+	    -e 's;@SUFFIX@;$(suffix);g' \
+	    -e 's;@IVLCFLAGS@;$(CFLAGS);' \
 	    -e 's;@SHARED@;@shared@;' $< > $@

 # Windows specific...
@@ -73,13 +78,13 @@ res.o: res.rc
 	windres -i res.rc -o res.o
 #

-install: all installdirs $(bindir)/iverilog-vpi@EXEEXT@
+install: all installdirs $(bindir)/iverilog-vpi$(suffix)@EXEEXT@

-$(bindir)/iverilog-vpi@EXEEXT@: ./iverilog-vpi@EXEEXT@
-	$(INSTALL_PROGRAM) ./iverilog-vpi@EXEEXT@ $(bindir)/iverilog-vpi@EXEEXT@
+$(bindir)/iverilog-vpi$(suffix)@EXEEXT@: ./iverilog-vpi@EXEEXT@
+	$(INSTALL_PROGRAM) ./iverilog-vpi@EXEEXT@ "$(bindir)/iverilog-vpi$(suffix)@EXEEXT@"

-installdirs: ../mkinstalldirs
-	$(srcdir)/../mkinstalldirs $(bindir)
+installdirs: $(srcdir)/../mkinstalldirs
+	$(srcdir)/../mkinstalldirs "$(bindir)"

 uninstall:
-	rm -f $(bindir)/iverilog-vpi@EXEEXT@
+	rm -f $(bindir)/iverilog-vpi$(suffix)@EXEEXT@
@@ -5,4 +5,5 @@
 #define IVERILOG_VPI_CXX       "@IVLCXX@"
 #define IVERILOG_VPI_CFLAGS    " @IVLCFLAGS@"
 #define IVERILOG_VPI_LDFLAGS   "@SHARED@"
-#define IVERILOG_VPI_LDLIBS    "-lveriuser -lvpi"
+#define IVERILOG_VPI_LDLIBS    "-lveriuser@SUFFIX@ -lvpi@SUFFIX@"
+#define IVERILOG_SUFFIX        "@SUFFIX@"
@@ -87,9 +87,9 @@ static void myExit(int exitVal)

 static void usage()
 {
-	fprintf(stderr,"usage: iverilog-vpi [src and obj files]...\n");
-	fprintf(stderr,"   or  iverilog-vpi -mingw=dir\n");
-	fprintf(stderr,"   or  iverilog-vpi -ivl=dir\n");
+	fprintf(stderr,"usage: iverilog-vpi" IVERILOG_SUFFIX " [src and obj files]...\n");
+	fprintf(stderr,"   or  iverilog-vpi" IVERILOG_SUFFIX " -mingw=dir\n");
+	fprintf(stderr,"   or  iverilog-vpi" IVERILOG_SUFFIX " -ivl=dir\n");
 	myExit(1);
 }

@@ -384,7 +384,7 @@ static int parse(int argc, char *argv[])
 		  /* Check for the --install-dir option */
 		else if (stricmp("--install-dir", argv[idx]) == 0) {
 			setup_ivl_environment();
-			printf("%s\\\\lib\\\\ivl\\\\.\n", gstr.pIVL);
+			printf("%s\\\\lib\\\\ivl" IVERILOG_SUFFIX "\\\\.\n", gstr.pIVL);
 			myExit(0);
 		}
 		  /* This is different than iverilog-vpi.sh, we don't
@@ -444,14 +444,14 @@ static void checkIvlDir(char *root)
 	initDynString(&path);
 	assign(&path,gstr.pIVL);
 	appendBackSlash(&path);
-	append(&path,"bin\\vvp.exe");
+	append(&path,"bin\\vvp" IVERILOG_SUFFIX ".exe");

 	irv = _stat(path,&stat_buf);
 	deInitDynString(path);

 	if (irv) {
 		fprintf(stderr,"error: %s does not appear to be the valid root directory of\n",root);
-		fprintf(stderr,"       Icarus Verilog.  Use the -ivl option of iverilog-vpi.exe to\n");
+		fprintf(stderr,"       Icarus Verilog.  Use the -ivl option of iverilog-vpi" IVERILOG_SUFFIX " to\n");
 		fprintf(stderr,"       point to the Icarus Verilog root directory.  For a Windows\n");
 		fprintf(stderr,"       command shell the option would be something like -ivl=c:\\iverilog\n");
 		fprintf(stderr,"       For a Cygwin shell the option would be something like\n");
@@ -503,7 +503,7 @@ static void setup_ivl_environment()
 		SetRegistryKey(IVL_REGKEY_IVL,gstr.pIVL);
 	} else if (!GetRegistryKey(IVL_REGKEY_IVL,&gstr.pIVL)) {
 			fprintf(stderr,"error: can not locate the Icarus Verilog root directory, use the -ivl option\n");
-			fprintf(stderr,"       of iverilog-vpi.exe to point to the Icarus Verilog root directory.\n");
+			fprintf(stderr,"       of iverilog-vpi" IVERILOG_SUFFIX " to point to the Icarus Verilog root directory.\n");
 			fprintf(stderr,"       For a Windows command shell the option would be something like\n");
 			fprintf(stderr,"       -ivl=c:\\iverilog  For a Cygwin shell the option would be something\n");
 			fprintf(stderr,"       like -ivl=c:\\\\iverilog\n");
@@ -511,20 +511,16 @@ static void setup_ivl_environment()
 		}

 	  /* Build up the CFLAGS option string */
-	assign(&gstr.pCFLAGS,IVERILOG_VPI_CFLAGS);
-	append(&gstr.pCFLAGS," -I");
+	assign(&gstr.pCFLAGS,IVERILOG_VPI_CFLAGS " -I");
 	append(&gstr.pCFLAGS,gstr.pIVL);
 	appendBackSlash(&gstr.pCFLAGS);
-	append(&gstr.pCFLAGS, "\\");
-	append(&gstr.pCFLAGS,"include");
+	append(&gstr.pCFLAGS,"\\include\\\\iverilog" IVERILOG_SUFFIX);

 	  /* Build up the LDFLAGS option string */
 	assign(&gstr.pLDLIBS,"-L");
 	append(&gstr.pLDLIBS,gstr.pIVL);
 	appendBackSlash(&gstr.pLDLIBS);
-	append(&gstr.pLDLIBS, "\\");
-	append(&gstr.pLDLIBS,"lib ");
-	append(&gstr.pLDLIBS,IVERILOG_VPI_LDLIBS);
+	append(&gstr.pLDLIBS,"\\lib " IVERILOG_VPI_LDLIBS);
 }

 /* compile source modules */
@@ -1,15 +0,0 @@
-a.out
-Makefile
-parse.c
-parse.h
-parse.output
-lexor.c
-cfparse.c
-cfparse.h
-cfparse.output
-cflexor.c
-foo.*
-iverilog
-iverilog.ps
-iverilog.pdf
-tmp.pdf
@@ -18,7 +18,7 @@
 #
 SHELL = /bin/sh

-VERSION = 0.9.devel
+suffix = @install_suffix@

 prefix = @prefix@
 exec_prefix = @exec_prefix@
@@ -41,19 +41,25 @@ INSTALL_DATA = @INSTALL_DATA@
 MAN = @MAN@
 PS2PDF = @PS2PDF@

-CPPFLAGS = @ident_support@ -I. -I.. -I$(srcdir)/.. -I$(srcdir) -DVERSION='"$(VERSION)"' @CPPFLAGS@ @DEFS@
+CPPFLAGS = -I. -I.. -I$(srcdir)/.. -I$(srcdir) @CPPFLAGS@ @DEFS@
 CFLAGS = -Wall @CFLAGS@
 LDFLAGS = @LDFLAGS@

-all: iverilog@EXEEXT@
+all: dep iverilog@EXEEXT@
+
+check: all

 clean:
 	rm -f *.o lexor.c parse.c parse.h parse.output
 	rm -f cflexor.c cfparse.c cfparse.h cfparse.output
 	rm -f iverilog@EXEEXT@ iverilog.pdf iverilog.ps
+	rm -rf dep

 distclean: clean
-	rm -f Makefile
+	rm -f Makefile config.log
+
+Makefile: $(srcdir)/Makefile.in ../config.status
+	../config.status --file=$@

 O = main.o substit.o cflexor.o cfparse.o

@@ -66,13 +72,18 @@ cflexor.c: cflexor.lex
 cfparse.h cfparse.c: cfparse.y
 	bison --verbose -t -d -o cfparse.c --name-prefix=cf $(srcdir)/cfparse.y

+dep:
+	mkdir dep

-main.o: main.c globals.h ../version.h
-	$(CC) $(CPPFLAGS) $(CFLAGS) -c -DIVL_ROOT='"@libdir@/ivl"'  -DIVL_INC='"@includedir@"' -DIVL_LIB='"@libdir@"' -DDLLIB='"@DLLIB@"' $(srcdir)/main.c
+%.o: %.c
+	$(CC) $(CPPFLAGS) $(CFLAGS) -MD -c $< -o $*.o
+	mv $*.d dep

-build_string.o: build_string.c globals.h
-cflexor.o: cflexor.c cfparse.h cfparse_misc.h globals.h
-cfparse.o: cfparse.c globals.h cfparse_misc.h
+main.o: main.c globals.h ../version.h Makefile
+	$(CC) $(CPPFLAGS) $(CFLAGS) -MD -c -DIVL_ROOT='"@libdir@/ivl$(suffix)"'  -DIVL_INC='"@includedir@"' -DIVL_LIB='"@libdir@"' -DDLLIB='"@DLLIB@"' $(srcdir)/main.c
+	mv $*.d dep
+
+cflexor.o: cflexor.c cfparse.h

 iverilog.ps: $(srcdir)/iverilog.man
 	$(MAN) -t $(srcdir)/iverilog.man > iverilog.ps
@@ -82,35 +93,37 @@ iverilog.pdf: iverilog.ps

 ifeq (@MINGW32@,yes)
 ifeq ($(MAN),none)
-INSTALL_DOC = $(mandir)/man1/iverilog.1
+INSTALL_DOC = $(mandir)/man1/iverilog$(suffix).1
 else
 ifeq ($(PS2PDF),none)
-INSTALL_DOC = $(mandir)/man1/iverilog.1
+INSTALL_DOC = $(mandir)/man1/iverilog$(suffix).1
 else
-INSTALL_DOC = $(prefix)/iverilog.pdf $(mandir)/man1/iverilog.1
+INSTALL_DOC = $(prefix)/iverilog$(suffix).pdf $(mandir)/man1/iverilog$(suffix).1
 all: iverilog.pdf
 endif
 endif
 INSTALL_DOCDIR = $(mandir)/man1
 else
-INSTALL_DOC = $(mandir)/man1/iverilog.1
+INSTALL_DOC = $(mandir)/man1/iverilog$(suffix).1
 INSTALL_DOCDIR = $(mandir)/man1
 endif

-install: all installdirs $(bindir)/iverilog@EXEEXT@ $(INSTALL_DOC)
+install: all installdirs $(bindir)/iverilog$(suffix)@EXEEXT@ $(INSTALL_DOC)

-$(bindir)/iverilog@EXEEXT@: ./iverilog@EXEEXT@
-	$(INSTALL_PROGRAM) ./iverilog@EXEEXT@ $(DESTDIR)$(bindir)/iverilog@EXEEXT@
+$(bindir)/iverilog$(suffix)@EXEEXT@: ./iverilog@EXEEXT@
+	$(INSTALL_PROGRAM) ./iverilog@EXEEXT@ "$(DESTDIR)$(bindir)/iverilog$(suffix)@EXEEXT@"

-$(mandir)/man1/iverilog.1: $(srcdir)/iverilog.man
-	$(INSTALL_DATA) $(srcdir)/iverilog.man $(DESTDIR)$(mandir)/man1/iverilog.1
+$(mandir)/man1/iverilog$(suffix).1: $(srcdir)/iverilog.man
+	$(INSTALL_DATA) $(srcdir)/iverilog.man "$(DESTDIR)$(mandir)/man1/iverilog$(suffix).1"

-$(prefix)/iverilog.pdf: iverilog.pdf
-	$(INSTALL_DATA) iverilog.pdf $(prefix)/iverilog.pdf
+$(prefix)/iverilog$(suffix).pdf: iverilog.pdf
+	$(INSTALL_DATA) iverilog.pdf "$(DESTDIR)$(prefix)/iverilog$(suffix).pdf"

-installdirs: ../mkinstalldirs
-	$(srcdir)/../mkinstalldirs $(DESTDIR)$(bindir) $(DESTDIR)$(INSTALL_DOCDIR)
+installdirs: $(srcdir)/../mkinstalldirs
+	$(srcdir)/../mkinstalldirs "$(DESTDIR)$(bindir)" "$(DESTDIR)$(INSTALL_DOCDIR)"

 uninstall:
-	rm -f $(DESTDIR)$(bindir)/iverilog@EXEEXT@
-	rm -f $(DESTDIR)$(mandir)/man1/iverilog.1 $(DESTDIR)$(prefix)/iverilog.pdf
+	rm -f "$(DESTDIR)$(bindir)/iverilog$(suffix)@EXEEXT@"
+	rm -f "$(DESTDIR)$(mandir)/man1/iverilog$(suffix).1" "$(DESTDIR)$(prefix)/iverilog$(suffix).pdf"
+
+-include $(patsubst %.o, dep/%.d, $O)
@@ -18,9 +18,6 @@
 *    along with this program; if not, write to the Free Software
 *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
 */
-#ifdef HAVE_CVS_IDENT
-#ident "$Id: globals.h,v 1.21 2007/04/19 02:52:53 steve Exp $"
-#endif

 # include  <stddef.h>

@@ -78,36 +75,4 @@ extern char warning_flags[];
 extern char* library_flags;
 extern char* library_flags2;

-/*
- * $Log: globals.h,v $
- * Revision 1.21  2007/04/19 02:52:53  steve
- *  Add support for -v flag in command file.
- *
- * Revision 1.20  2007/03/07 04:24:59  steve
- *  Make integer width controllable.
- *
- * Revision 1.19  2003/11/18 06:31:46  steve
- *  Remove the iverilog.conf file.
- *
- * Revision 1.18  2003/11/13 04:09:49  steve
- *  Pass flags through the temporary config file.
- *
- * Revision 1.17  2003/11/01 04:21:57  steve
- *  Add support for a target static config file.
- *
- * Revision 1.16  2002/08/12 01:35:01  steve
- *  conditional ident string using autoconfig.
- *
- * Revision 1.15  2002/06/23 20:10:51  steve
- *  Variable substitution in command files.
- *
- * Revision 1.14  2002/05/28 20:40:37  steve
- *  ivl indexes the search path for libraries, and
- *  supports case insensitive module-to-file lookup.
- *
- * Revision 1.13  2002/05/28 00:50:40  steve
- *  Add the ivl -C flag for bulk configuration
- *  from the driver, and use that to run library
- *  modules through the preprocessor.
- */
 #endif
@@ -1,4 +1,4 @@
-.TH iverilog 1 "April 22nd, 2008" Version "0.9.devel"
+.TH iverilog 1 "February 4th, 2009" "" "Version 0.9.devel"
 .SH NAME
 iverilog - Icarus Verilog compiler

@@ -68,7 +68,7 @@ other tools.
 Enable or disable (default) support for Verilog-AMS.
 .TP 8
 .B -gspecify\fI|\fP-gno-specify
-Enable (default) or disable specify block support. When enabled,
+Enable or disable (default) specify block support. When enabled,
 specify block code is elaborated. When disabled, specify blocks are
 parsed but ignored. Specify blocks are commonly not needed for RTL
 simulation, and in fact can hurt performance of the
@@ -81,6 +81,13 @@ include directory after all other explicit include directories. This
 standard include directory is a convenient place to install standard
 header files that a Verilog program may include.
 .TP 8
+.B -grelative-include\fI|\fP-gno-relative-include
+Enable or disable (default) adding the local files directory to
+the beginning of the include file search path. This allows files
+to be included relative to the current file not the more common
+files are only found in the working directory or in the specified
+include file search path.
+.TP 8
 .B -gxtypes\fI|\fP-gno-xtypes
 Enable (default) or disable support for extended types. Enabling
 extended types allows for new types that are supported by Icarus
@@ -97,6 +104,16 @@ reported as a error. Using \fI-gno-io-range-error\fP will produce a
 warning instead of a fatal error for the case of a vectored net/register
 and a scalar port declaration.
 .TP 8
+.B -gstrict-ca-eval\fI|\fP-gno-strict-ca-eval
+The standard requires that if any input to a continuous assignment
+expression changes value, the entire expression is re-evaluated. By
+default, parts of the expression that do not depend on the changed
+input value(s) are not re-evaluated. If an expression contains a call
+to a function that doesn't depend solely on its input values or that
+has side effects, the resulting behaviour will differ from that
+required by the standard. Using \fI-gstrict-ca-eval\fP will force
+standard compliant behaviour (with some loss in performance).
+.TP 8
 .B -I\fIincludedir\fP
 Append directory \fIincludedir\fP to list of directories searched
 for Verilog include files. The \fB-I\fP switch may be used many times
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2000-2008 Stephen Williams (steve@icarus.com)
+ * Copyright (c) 2000-2009 Stephen Williams (steve@icarus.com)
 *
 *    This source code is free software; you can redistribute it
 *    and/or modify it in source code form under the terms of the GNU
@@ -31,13 +31,14 @@ const char NOTICE[] =
 "  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\n"
 "  GNU General Public License for more details.\n"
 "\n"
-"  You should have received a copy of the GNU General Public License\n"
-"  along with this program; if not, write to the Free Software\n"
-"  Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA\n"
+"  You should have received a copy of the GNU General Public License along\n"
+"  with this program; if not, write to the Free Software Foundation, Inc.,\n"
+"  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.\n"
 ;

 const char HELP[] =
-"Usage: iverilog [-ESvV] [-B base] [-c cmdfile|-f cmdfile] [-g1|-g2|-g2x]\n"
+"Usage: iverilog [-ESvV] [-B base] [-c cmdfile|-f cmdfile]\n"
+"                [-g1995|-g2001|-g2005] [-g<feature>]\n"
 "                [-D macro[=defn]] [-I includedir] [-M depfile] [-m module]\n"
 "                [-N file] [-o filename] [-p flag=value]\n"
 "                [-s topmodule] [-t target] [-T min|typ|max]\n"
@@ -108,15 +109,21 @@ const char*targ  = "vvp";
 const char*depfile = 0;

 const char*generation = "2005";
-const char*gen_specify = "specify";
+const char*gen_specify = "no-specify";
 const char*gen_xtypes = "xtypes";
 const char*gen_icarus = "icarus-misc";
 const char*gen_io_range_error = "io-range-error";
+const char*gen_strict_ca_eval = "no-strict-ca-eval";
 const char*gen_verilog_ams = "no-verilog-ams";
+const char*gen_system_verilog = "no-system-verilog";

 /* Boolean: true means use a default include dir, false means don't */
 int gen_std_include = 1;

+/* Boolean: true means add the local file directory to the start
+   of the include list. */
+int gen_relative_include = 0;
+
 char warning_flags[16] = "";

 unsigned integer_width = 32;
@@ -262,17 +269,24 @@ static const char*my_tempfile(const char*str, FILE**fout)

 static int t_version_only(void)
 {
+      int rc;
      remove(source_path);
      free(source_path);

      fflush(0);
      snprintf(tmp, sizeof tmp, "%s%civlpp -V", pbase, sep);
-      system(tmp);
+      rc = system(tmp);
+      if (rc != 0) {
+	    fprintf(stderr, "Unable to get version from \"%s\"\n", tmp);
+      }

      fflush(0);
      snprintf(tmp, sizeof tmp, "%s%civl -V -C%s -C%s", pbase, sep,
 	       iconfig_path, iconfig_common_path);
-      system(tmp);
+      rc = system(tmp);
+      if (rc != 0) {
+	    fprintf(stderr, "Unable to get version from \"%s\"\n", tmp);
+      }

      if ( ! getenv("IVERILOG_ICONFIG")) {
 	    remove(iconfig_path);
@@ -584,6 +598,12 @@ int process_generation(const char*name)

      else if (strcmp(name,"no-std-include") == 0)
 	     gen_std_include = 0;
+      
+      else if (strcmp(name,"relative-include") == 0)
+	    gen_relative_include = 1;
+      
+      else if (strcmp(name,"no-relative-include") == 0)
+	    gen_relative_include = 0;

      else if (strcmp(name,"io-range-error") == 0)
 	    gen_io_range_error = "io-range-error";
@@ -591,11 +611,20 @@ int process_generation(const char*name)
      else if (strcmp(name,"no-io-range-error") == 0)
 	    gen_io_range_error = "no-io-range-error";

+      else if (strcmp(name,"strict-ca-eval") == 0)
+	    gen_strict_ca_eval = "strict-ca-eval";
+
+      else if (strcmp(name,"no-strict-ca-eval") == 0)
+	    gen_strict_ca_eval = "no-strict-ca-eval";
+
      else if (strcmp(name,"verilog-ams") == 0)
 	    gen_verilog_ams = "verilog-ams";

      else if (strcmp(name,"no-verilog-ams") == 0)
 	    gen_verilog_ams = "no-verilog-ams";
+      
+      else if (strcmp(name,"system-verilog") == 0)
+	    gen_system_verilog = "system-verilog";

      else {
 	    fprintf(stderr, "Unknown/Unsupported Language generation "
@@ -608,9 +637,12 @@ int process_generation(const char*name)
 		            "    specify | no-specify\n"
 		            "    verilog-ams | no-verilog-ams\n"
 		            "    std-include | no-std-include\n"
+		            "    relative-include | no-relative-include\n"
 		            "    xtypes | no-xtypes\n"
 		            "    icarus-misc | no-icarus-misc\n"
-		            "    io-range-error | no-io-range-error\n");
+		            "    io-range-error | no-io-range-error\n"
+		            "    strict-ca-eval | no-strict-ca-eval\n"
+					"    system-verilog\n");
 	    return 1;
      }

@@ -635,7 +667,7 @@ int main(int argc, char **argv)
 {
      int e_flag = 0;
      int version_flag = 0;
-      int opt, idx, rc;
+      int opt, idx;

 #ifdef __MINGW32__
      { char * s;
@@ -767,8 +799,7 @@ int main(int argc, char **argv)
 		  break;

 		case 'g':
-		  rc = process_generation(optarg);
-		  if (rc != 0)
+		  if (process_generation(optarg) != 0)
 			return -1;
 		  break;
 		case 'h':
@@ -844,7 +875,7 @@ int main(int argc, char **argv)

      if (version_flag || verbose_flag) {
 	    printf("Icarus Verilog version " VERSION " (" VERSION_TAG ")\n\n");
-	    printf("Copyright 1998-2008 Stephen Williams\n");
+	    printf("Copyright 1998-2009 Stephen Williams\n\n");
 	    puts(NOTICE);
      }

@@ -881,8 +912,10 @@ int main(int argc, char **argv)
      fprintf(iconfig_file, "generation:%s\n", gen_specify);
      fprintf(iconfig_file, "generation:%s\n", gen_xtypes);
      fprintf(iconfig_file, "generation:%s\n", gen_io_range_error);
+      fprintf(iconfig_file, "generation:%s\n", gen_strict_ca_eval);
      fprintf(iconfig_file, "generation:%s\n", gen_verilog_ams);
      fprintf(iconfig_file, "generation:%s\n", gen_icarus);
+      fprintf(iconfig_file, "generation:%s\n", gen_system_verilog);
      fprintf(iconfig_file, "warnings:%s\n", warning_flags);
      fprintf(iconfig_file, "out:%s\n", opath);
      if (depfile) fprintf(iconfig_file, "depfile:%s\n", depfile);
@@ -919,7 +952,13 @@ int main(int argc, char **argv)
 	   specifically disabled, then write that directory as the
 	   very last include directory to use... always. */
      if (gen_std_include) {
-	    fprintf(defines_file, "I:%s%cinclude", base, sep);
+	    fprintf(defines_file, "I:%s%cinclude\n", base, sep);
+      }
+
+      if (gen_relative_include) {
+	    fprintf(defines_file, "relative include:true\n");
+      } else {
+	    fprintf(defines_file, "relative include:false\n");
      }

      fclose(source_file);
@@ -928,6 +967,15 @@ int main(int argc, char **argv)
      fclose(defines_file);
      defines_file = 0;

+	/* If we are planning on opening a dependencies file, then
+	   open and truncate it here. The other phases of compilation
+	   will append to the file, so this is necessray to make sure
+	   it starts out empty. */
+      if (depfile) {
+	    FILE*fd = fopen(depfile, "w");
+	    fclose(fd);
+      }
+
      if (source_count == 0 && !version_flag) {
 	    fprintf(stderr, "%s: no source files.\n\n%s\n", argv[0], HELP);
 	    return 1;
@@ -16,9 +16,6 @@
 *    along with this program; if not, write to the Free Software
 *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
 */
-#ifdef HAVE_CVS_IDENT
-#ident "$Id: elab_anet.cc,v 1.13 2007/03/22 16:08:14 steve Exp $"
-#endif

 # include "config.h"

@@ -167,47 +164,3 @@ NetNet* PEIdent::elaborate_anet(Design*des, NetScope*scope) const
      return sig;
 }

-/*
- * $Log: elab_anet.cc,v $
- * Revision 1.13  2007/03/22 16:08:14  steve
- *  Spelling fixes from Larry
- *
- * Revision 1.12  2006/05/01 20:47:58  steve
- *  More explicit datatype setup.
- *
- * Revision 1.11  2005/07/11 16:56:50  steve
- *  Remove NetVariable and ivl_variable_t structures.
- *
- * Revision 1.10  2004/10/04 01:10:52  steve
- *  Clean up spurious trailing white space.
- *
- * Revision 1.9  2003/09/19 03:50:12  steve
- *  Remove find_memory method from Design class.
- *
- * Revision 1.8  2003/06/21 01:21:43  steve
- *  Harmless fixup of warnings.
- *
- * Revision 1.7  2003/03/06 00:28:41  steve
- *  All NetObj objects have lex_string base names.
- *
- * Revision 1.6  2003/01/27 05:09:17  steve
- *  Spelling fixes.
- *
- * Revision 1.5  2002/08/12 01:34:58  steve
- *  conditional ident string using autoconfig.
- *
- * Revision 1.4  2001/12/03 04:47:14  steve
- *  Parser and pform use hierarchical names as hname_t
- *  objects instead of encoded strings.
- *
- * Revision 1.3  2001/07/25 03:10:48  steve
- *  Create a config.h.in file to hold all the config
- *  junk, and support gcc 3.0. (Stephan Boettcher)
- *
- * Revision 1.2  2001/01/06 02:29:36  steve
- *  Support arrays of integers.
- *
- * Revision 1.1  2000/12/06 06:31:09  steve
- *  Check lvalue of procedural continuous assign (PR#29)
- *
- */
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2000-2008 Stephen Williams (steve@icarus.com)
+ * Copyright (c) 2000-2009 Stephen Williams (steve@icarus.com)
 *
 *    This source code is free software; you can redistribute it
 *    and/or modify it in source code form under the terms of the GNU
@@ -179,6 +179,19 @@ NetAssign_* PEIdent::elaborate_lval(Design*des,
 	    return 0;
      }

+	/* Get the signal referenced by the identifier, and make sure
+	   it is a register. Wires are not allows in this context,
+	   unless this is the l-value of a force. */
+      if ((reg->type() != NetNet::REG) && !is_force) {
+	    cerr << get_fileline() << ": error: " << path_ <<
+		  " is not a valid l-value in " << scope_path(scope) <<
+		  "." << endl;
+	    cerr << reg->get_fileline() << ":      : " << path_ <<
+		  " is declared here as " << reg->type() << "." << endl;
+	    des->errors += 1;
+	    return 0;
+      }
+
      if (reg->array_dimensions() > 0)
 	    return elaborate_lval_net_word_(des, scope, reg);

@@ -195,19 +208,6 @@ NetAssign_* PEIdent::elaborate_lval(Design*des,
 	    return lv;
      }

-	/* Get the signal referenced by the identifier, and make sure
-	   it is a register. Wires are not allows in this context,
-	   unless this is the l-value of a force. */
-      if ((reg->type() != NetNet::REG) && !is_force) {
-	    cerr << get_fileline() << ": error: " << path_ <<
-		  " is not a valid l-value in " << scope_path(scope) <<
-		  "." << endl;
-	    cerr << reg->get_fileline() << ":      : " << path_ <<
-		  " is declared here as " << reg->type() << "." << endl;
-	    des->errors += 1;
-	    return 0;
-      }
-

      if (use_sel == index_component_t::SEL_BIT) {
 	    NetAssign_*lv = new NetAssign_(reg);
@@ -243,6 +243,14 @@ NetAssign_* PEIdent::elaborate_lval_net_word_(Design*des,
      ivl_assert(*this, index_head.msb != 0);
      ivl_assert(*this, index_head.lsb == 0);

+      ivl_variable_type_t expr_type_tmp = IVL_VT_NO_TYPE;
+	// This not used, but it needs to have a default value.
+      bool unsized_flag_tmp = false;
+      index_head.msb->test_width(des, scope,
+			     reg->vector_width(), reg->vector_width(),
+			     expr_type_tmp,
+			     unsized_flag_tmp);
+
      NetExpr*word = elab_and_eval(des, scope, index_head.msb, -1);

 	// If there is a non-zero base to the memory, then build an
@@ -266,7 +274,7 @@ NetAssign_* PEIdent::elaborate_lval_net_word_(Design*des,
      if (NetEConst*word_const = dynamic_cast<NetEConst*>(word)) {
 	    verinum word_val = word_const->value();
 	    long index = word_val.as_long();
-	    assert (reg->array_count() <= LONG_MAX);
+
 	    if (index < 0 || index >= (long) reg->array_count()) {
 		  cerr << get_fileline() << ": warning: Constant array index "
 		       << (index + reg->array_first())
@@ -302,7 +310,16 @@ bool PEIdent::elaborate_lval_net_bit_(Design*des,

      NetNet*reg = lv->sig();

-	// Bit selects have a single select expression. Evaluate the
+      ivl_variable_type_t expr_type_tmp = IVL_VT_NO_TYPE;
+	// This not used, but it needs to have a default value.
+      bool unsized_flag_tmp = false;
+      index_tail.msb->test_width(des, scope,
+			     lv->lwidth(), lv->lwidth(),
+			     expr_type_tmp,
+			     unsized_flag_tmp);
+
+    
+    // Bit selects have a single select expression. Evaluate the
 	// constant value and treat it as a part select with a bit
 	// width of 1.
      NetExpr*mux = elab_and_eval(des, scope, index_tail.msb, -1);
@@ -353,10 +370,13 @@ bool PEIdent::elaborate_lval_net_part_(Design*des,
 	// constant. The calculate_parts_ function calculates the
 	// values into msb and lsb.
      long msb, lsb;
-      bool flag = calculate_parts_(des, scope, msb, lsb);
+      bool parts_defined_flag;
+      bool flag = calculate_parts_(des, scope, msb, lsb, parts_defined_flag);
      if (!flag)
 	    return false;

+      ivl_assert(*this, parts_defined_flag);
+
      NetNet*reg = lv->sig();
      assert(reg);

@@ -424,6 +444,14 @@ bool PEIdent::elaborate_lval_net_idx_(Design*des,
      unsigned long wid;
      calculate_up_do_width_(des, scope, wid);

+      ivl_variable_type_t expr_type_tmp = IVL_VT_NO_TYPE;
+	// This not used, but it needs to have a default value.
+      bool unsized_flag_tmp = false;
+      index_tail.msb->test_width(des, scope,
+			     wid, wid,
+			     expr_type_tmp,
+			     unsized_flag_tmp);
+
      NetExpr*base = elab_and_eval(des, scope, index_tail.msb, -1);

 	/* Correct the mux for the range of the vector. */
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1999-2008 Stephen Williams (steve@icarus.com)
+ * Copyright (c) 1999-2009 Stephen Williams (steve@icarus.com)
 *
 *    This source code is free software; you can redistribute it
 *    and/or modify it in source code form under the terms of the GNU
@@ -278,7 +278,9 @@ bool PEIdent::eval_part_select_(Design*des, NetScope*scope, NetNet*sig,
 	  case index_component_t::SEL_PART: {

 		long msb, lsb;
-		/* bool flag = */ calculate_parts_(des, scope, msb, lsb);
+		bool part_defined_flag;
+		/* bool flag = */ calculate_parts_(des, scope, msb, lsb, part_defined_flag);
+		ivl_assert(*this, part_defined_flag);

 		long lidx_tmp = sig->sb_to_idx(lsb);
 		long midx_tmp = sig->sb_to_idx(msb);
@@ -621,13 +623,51 @@ NetNet* PEIdent::elaborate_port(Design*des, NetScope*scope) const
      if (! eval_part_select_(des, scope, sig, midx, lidx))
 	    return 0;

+	/* If this is a part select of the entire signal (or no part
+	   select at all) then we're done. */
+      if ((lidx == 0) && (midx == (long)sig->vector_width()-1))
+	    return sig;

-      unsigned swid = midx - lidx + 1;
+      unsigned swid = abs(midx - lidx) + 1;
+      ivl_assert(*this, swid > 0 && swid < sig->vector_width());

-      if (swid < sig->vector_width()) {
-	    cerr << get_fileline() << ": XXXX: Forgot to implement part select"
-		 << " of signal port." << endl;
+      NetNet*tmp = new NetNet(scope, scope->local_symbol(),
+			      NetNet::WIRE, swid);
+      tmp->port_type(sig->port_type());
+      tmp->data_type(sig->data_type());
+      tmp->set_line(*this);
+      NetNode*ps = 0;
+      switch (sig->port_type()) {
+
+	  case NetNet::PINPUT:
+	    ps = new NetPartSelect(sig, sig->sb_to_idx(lidx), swid,
+				   NetPartSelect::PV);
+	    connect(tmp->pin(0), ps->pin(0));
+	    sig = tmp;
+	    break;
+
+	  case NetNet::POUTPUT:
+	    ps = new NetPartSelect(sig, sig->sb_to_idx(lidx), swid,
+				   NetPartSelect::VP);
+	    connect(tmp->pin(0), ps->pin(0));
+	    sig = tmp;
+	    break;
+
+	  case NetNet::PINOUT:
+	    ps = new NetTran(scope, scope->local_symbol(), sig->vector_width(),
+			     swid, sig->sb_to_idx(lidx));
+	    connect(sig->pin(0), ps->pin(0));
+	    connect(tmp->pin(0), ps->pin(1));
+	    sig = tmp;
+	    break;
+
+	  default:
+	    ivl_assert(*this, 0);
+	    break;
      }

+      ps->set_line(*this);
+      des->add_node(ps);
+
      return sig;
 }
@@ -53,7 +53,7 @@ NetExpr*PEBinary::elaborate_pexpr (Design*des, NetScope*scope) const
 	    return 0;
      }

-      NetExpr*tmp = elaborate_expr_base_(des, lp, rp, -2);
+      NetExpr*tmp = elaborate_expr_base_(des, lp, rp, -2, true);
      return tmp;
 }

@@ -67,8 +67,6 @@ NetExpr*PEBComp::elaborate_pexpr(Design*des, NetScope*scope) const
 	    return 0;
      }

-      suppress_binary_operand_sign_if_needed_(lp, rp);
-
      NetEBComp*tmp = new NetEBComp(op_, lp, rp);
      tmp->set_line(*this);
      bool flag = tmp->set_width(1);
@@ -81,6 +79,20 @@ NetExpr*PEBComp::elaborate_pexpr(Design*des, NetScope*scope) const
      return tmp;
 }

+NetExpr*PEBLeftWidth::elaborate_pexpr (Design*des, NetScope*scope) const
+{
+      NetExpr*lp = left_->elaborate_pexpr(des, scope);
+      NetExpr*rp = right_->elaborate_pexpr(des, scope);
+      if ((lp == 0) || (rp == 0)) {
+	    delete lp;
+	    delete rp;
+	    return 0;
+      }
+
+      NetExpr*tmp = elaborate_expr_leaf(des, lp, rp, -2);
+      return tmp;
+}
+
 NetExpr*PEBLogic::elaborate_pexpr(Design*des, NetScope*scope) const
 {
      NetExpr*lp = left_->elaborate_pexpr(des, scope);
@@ -438,3 +450,47 @@ NetExpr* PECallFunction::elaborate_pexpr(Design*des, NetScope*scope) const
      des->errors += 1;
      return 0;
 }
+
+void NetExpr::resolve_pexpr_type(void)
+{
+}
+
+void NetEBinary::resolve_pexpr_type(void)
+{
+      if (debug_elab_pexpr) {
+	    cerr << get_fileline() << ": debug: "
+		 << "Resolve_pexpr_type for binary " << human_readable_op(op_)
+		 << "." << endl;
+      }
+
+      left_->resolve_pexpr_type();
+      right_->resolve_pexpr_type();
+
+      switch (op_) {
+	  case '+':
+	  case '-':
+	  case '*':
+	  case '/':
+	    suppress_binary_operand_sign_if_needed(left_, right_);
+	    cast_signed_base_(left_->has_sign() && right_->has_sign());
+	    break;
+	  default:
+	    break;
+      }
+}
+
+void NetEParam::resolve_pexpr_type(void)
+{
+      if (debug_elab_pexpr) {
+	    cerr << get_fileline() << ": debug: "
+		 << "Resolve_pexpr_type for parameter " << reference_->first
+		 << "." << endl;
+      }
+
+      if (reference_->second.signed_flag) {
+	    cast_signed_base_(true);
+
+      } else {
+	    cast_signed_base_( reference_->second.expr->has_sign() );
+      }
+}
@@ -114,6 +114,7 @@ static void elaborate_parm_item_(perm_string name,
 	    tmp->high_open_flag = range->high_open_flag;

 	    if (range->low_expr) {
+		  probe_expr_width(des, scope, range->low_expr);
 		  tmp->low_expr = elab_and_eval(des, scope, range->low_expr, -1);
 		  ivl_assert(*range->low_expr, tmp->low_expr);
 	    } else {
@@ -130,6 +131,7 @@ static void elaborate_parm_item_(perm_string name,
 		  tmp->high_expr = tmp->low_expr;

 	    } else if (range->high_expr) {
+		  probe_expr_width(des, scope, range->high_expr);
 		  tmp->high_expr = elab_and_eval(des, scope, range->high_expr, -1);
 		  ivl_assert(*range->high_expr, tmp->high_expr);
 	    } else {
@@ -493,6 +495,7 @@ bool PGenerate::generate_scope_loop_(Design*des, NetScope*container)
 	// The initial value for the genvar does not need (nor can it
 	// use) the genvar itself, so we can evaluate this expression
 	// the same way any other parameter value is evaluated.
+      probe_expr_width(des, container, loop_init);
      NetExpr*init_ex = elab_and_eval(des, container, loop_init, -1);
      NetEConst*init = dynamic_cast<NetEConst*> (init_ex);
      if (init == 0) {
@@ -522,6 +525,7 @@ bool PGenerate::generate_scope_loop_(Design*des, NetScope*container)
 	    cerr << get_fileline() << ": debug: genvar init = " << genvar << endl;
      container->genvar_tmp = loop_index;
      container->genvar_tmp_val = genvar;
+      probe_expr_width(des, container, loop_test);
      NetExpr*test_ex = elab_and_eval(des, container, loop_test, -1);
      NetEConst*test = dynamic_cast<NetEConst*>(test_ex);
      if (test == 0) {
@@ -574,6 +578,7 @@ bool PGenerate::generate_scope_loop_(Design*des, NetScope*container)
 	    elaborate_subscope_(des, scope);

 	      // Calculate the step for the loop variable.
+	    probe_expr_width(des, container, loop_step);
 	    NetExpr*step_ex = elab_and_eval(des, container, loop_step, -1);
 	    NetEConst*step = dynamic_cast<NetEConst*>(step_ex);
 	    if (step == 0) {
@@ -590,6 +595,7 @@ bool PGenerate::generate_scope_loop_(Design*des, NetScope*container)
 	    container->genvar_tmp_val = genvar;
 	    delete step;
 	    delete test_ex;
+	    probe_expr_width(des, container, loop_test);
 	    test_ex = elab_and_eval(des, container, loop_test, -1);
 	    test = dynamic_cast<NetEConst*>(test_ex);
 	    assert(test);
@@ -604,6 +610,7 @@ bool PGenerate::generate_scope_loop_(Design*des, NetScope*container)

 bool PGenerate::generate_scope_condit_(Design*des, NetScope*container, bool else_flag)
 {
+      probe_expr_width(des, container, loop_test);
      NetExpr*test_ex = elab_and_eval(des, container, loop_test, -1);
      NetEConst*test = dynamic_cast<NetEConst*> (test_ex);
      if (test == 0) {
@@ -634,14 +641,26 @@ bool PGenerate::generate_scope_condit_(Design*des, NetScope*container, bool else
 	    des->errors += 1;
 	    return false;
      }
+
      if (debug_scopes)
 	    cerr << get_fileline() << ": debug: Generate condition "
 		 << (else_flag? "(else)" : "(if)")
 		 << " value=" << test->value() << ": Generate scope="
 		 << use_name << endl;

-      NetScope*scope = new NetScope(container, use_name,
-				    NetScope::GENBLOCK);
+      probe_for_direct_nesting_();
+      if (direct_nested_) {
+	    if (debug_scopes)
+		  cerr << get_fileline() << ": debug: Generate condition "
+		       << (else_flag? "(else)" : "(if)")
+		       << " detected direct nesting." << endl;
+	    elaborate_subscope_direct_(des, container);
+	    return true;
+      }
+
+	// If this is not directly nested, then generate a scope
+	// for myself. That is what I will pass to the subscope.
+      NetScope*scope = new NetScope(container, use_name, NetScope::GENBLOCK);
      scope->set_line(get_file(), get_lineno());

      elaborate_subscope_(des, scope);
@@ -651,6 +670,7 @@ bool PGenerate::generate_scope_condit_(Design*des, NetScope*container, bool else

 bool PGenerate::generate_scope_case_(Design*des, NetScope*container)
 {
+      probe_expr_width(des, container, loop_test);
      NetExpr*case_value_ex = elab_and_eval(des, container, loop_test, -1);
      NetEConst*case_value_co = dynamic_cast<NetEConst*>(case_value_ex);
      if (case_value_co == 0) {
@@ -673,24 +693,32 @@ bool PGenerate::generate_scope_case_(Design*des, NetScope*container)
 	    assert( item->scheme_type == PGenerate::GS_CASE_ITEM );

 	      // Detect that the item is a default.
-	    if (item->loop_test == 0) {
+	    if (item->item_test.size() == 0) {
 		  default_item = item;
 		  cur ++;
 		  continue;
 	    }

-	    NetExpr*item_value_ex = elab_and_eval(des, container, item->loop_test, -1);
-	    NetEConst*item_value_co = dynamic_cast<NetEConst*>(item_value_ex);
-	    assert(item_value_co);
+	    bool match_flag = false;
+	    for (unsigned idx = 0 ; idx < item->item_test.size() && !match_flag ; idx +=1 ) {
+		  probe_expr_width(des, container, item->item_test[idx]);
+		  NetExpr*item_value_ex = elab_and_eval(des, container, item->item_test[idx], -1);
+		  NetEConst*item_value_co = dynamic_cast<NetEConst*>(item_value_ex);
+		  assert(item_value_co);

-	      // If we stumble on the item that matches, then break
-	      // out now.
-	    if (case_value_co->value() == item_value_co->value()) {
+		  if (debug_scopes)
+			cerr << get_fileline() << ": debug: Generate case "
+			     << "item value=" << item_value_co->value() << endl;
+
+		  if (case_value_co->value() == item_value_co->value())
+			match_flag = true;
 		  delete item_value_co;
-		  break;
 	    }

-	    delete item_value_co;
+	      // If we stumble on the item that matches, then break out now.
+	    if (match_flag)
+		  break;
+
 	    cur ++;
      }

@@ -712,6 +740,15 @@ bool PGenerate::generate_scope_case_(Design*des, NetScope*container)
 	// The name of the scope to generate, whatever that item is.
      hname_t use_name (item->scope_name);

+      item->probe_for_direct_nesting_();
+      if (item->direct_nested_) {
+	    if (debug_scopes)
+		  cerr << get_fileline() << ": debug: Generate case item " << scope_name
+		       << " detected direct nesting." << endl;
+	    item->elaborate_subscope_direct_(des, container);
+	    return true;
+      }
+
      NetScope*scope = new NetScope(container, use_name,
 				    NetScope::GENBLOCK);
      scope->set_line(get_file(), get_lineno());
@@ -743,6 +780,15 @@ bool PGenerate::generate_scope_nblock_(Design*des, NetScope*container)
      return true;
 }

+void PGenerate::elaborate_subscope_direct_(Design*des, NetScope*scope)
+{
+      typedef list<PGenerate*>::const_iterator generate_it_t;
+      for (generate_it_t cur = generate_schemes.begin()
+		 ; cur != generate_schemes.end() ; cur ++ ) {
+	    (*cur) -> generate_scope(des, scope);
+      }
+}
+
 void PGenerate::elaborate_subscope_(Design*des, NetScope*scope)
 {
 	// Scan the generated scope for nested generate schemes,
@@ -785,6 +831,10 @@ void PGenerate::elaborate_subscope_(Design*des, NetScope*scope)
 	// Scan through all the named events in this scope.
      elaborate_scope_events_(des, scope, events);

+      if (debug_scopes)
+	    cerr << get_fileline() << ": debug: Generated scope " << scope_path(scope)
+		 << " by generate block " << scope_name << endl;
+
 	// Save the scope that we created, for future use.
      scope_list_.push_back(scope);
 }
@@ -900,6 +950,8 @@ void PGModule::elaborate_scope_mod_(Design*des, Module*mod, NetScope*sc) const
 */
 void PGModule::elaborate_scope_mod_instances_(Design*des, Module*mod, NetScope*sc) const
 {
+      if (msb_) probe_expr_width(des, sc, msb_);
+      if (lsb_) probe_expr_width(des, sc, lsb_);
      NetExpr*mse = msb_ ? elab_and_eval(des, sc, msb_, -1) : 0;
      NetExpr*lse = lsb_ ? elab_and_eval(des, sc, lsb_, -1) : 0;
      NetEConst*msb = dynamic_cast<NetEConst*> (mse);
@@ -1144,6 +1196,11 @@ void PBlock::elaborate_scope(Design*des, NetScope*scope) const
 		  des->errors += 1;
 		  return;
 	    }
+	    if (debug_scopes)
+		  cerr << get_fileline() << ": debug: "
+		       << "Elaborate block scope " << use_name
+		       << " within " << scope_path(scope) << endl;
+
 	    my_scope = new NetScope(scope, use_name, bl_type_==BL_PAR
 				    ? NetScope::FORK_JOIN
 				    : NetScope::BEGIN_END);
@@ -412,6 +412,9 @@ bool PGModule::elaborate_sig_udp_(Design*des, NetScope*scope, PUdp*udp) const

 bool PGenerate::elaborate_sig(Design*des,  NetScope*container) const
 {
+      if (direct_nested_)
+	    return elaborate_sig_direct_(des, container);
+
      bool flag = true;

 	// Handle the special case that this is a CASE scheme. In this
@@ -428,7 +431,7 @@ bool PGenerate::elaborate_sig(Design*des,  NetScope*container) const
 	    for (generate_it_t cur = generate_schemes.begin()
 		       ; cur != generate_schemes.end() ; cur ++) {
 		  PGenerate*item = *cur;
-		  if (! item->scope_list_.empty()) {
+		  if (item->direct_nested_ || !item->scope_list_.empty()) {
 			flag &= item->elaborate_sig(des, container);
 		  }
 	    }
@@ -454,6 +457,32 @@ bool PGenerate::elaborate_sig(Design*des,  NetScope*container) const
      return flag;
 }

+bool PGenerate::elaborate_sig_direct_(Design*des, NetScope*container) const
+{
+      if (debug_elaborate)
+	    cerr << get_fileline() << ": debug: "
+		 << "Direct nesting " << scope_name
+		 << " (scheme_type=" << scheme_type << ")"
+		 << " elaborate_sig in scope "
+		 << scope_path(container) << "." << endl;
+
+	// Elaborate_sig for a direct nested generated scheme knows
+	// that there are only sub_schemes to be elaborated.  There
+	// should be exactly 1 active generate scheme, search for it
+	// using this loop.
+      bool flag = true;
+      typedef list<PGenerate*>::const_iterator generate_it_t;
+      for (generate_it_t cur = generate_schemes.begin()
+		 ; cur != generate_schemes.end() ; cur ++) {
+	    PGenerate*item = *cur;
+	    if (item->direct_nested_ || !item->scope_list_.empty()) {
+		    // Found the item, and it is direct nested.
+		  flag &= item->elaborate_sig(des, container);
+	    }
+      }
+      return flag;
+}
+
 bool PGenerate::elaborate_sig_(Design*des, NetScope*scope) const
 {
 	// Scan the declared PWires to elaborate the obvious signals
@@ -486,6 +515,13 @@ bool PGenerate::elaborate_sig_(Design*des, NetScope*scope) const
 	    (*cur) ->elaborate_sig(des, scope);
      }

+      typedef list<PProcess*>::const_iterator proc_it_t;
+      for (proc_it_t cur = behaviors.begin()
+		 ; cur != behaviors.end() ;  cur ++ ) {
+	    (*cur) -> statement() -> elaborate_sig(des, scope);
+      }
+
+
      return true;
 }

@@ -523,6 +559,9 @@ void PFunction::elaborate_sig(Design*des, NetScope*scope) const
 	  case PTF_REG:
 	  case PTF_REG_S:
 	    if (return_type_.range) {
+		  probe_expr_width(des, scope, (*return_type_.range)[0]);
+		  probe_expr_width(des, scope, (*return_type_.range)[1]);
+
 		  NetExpr*me = elab_and_eval(des, scope,
 					     (*return_type_.range)[0], -1);
 		  assert(me);
@@ -816,6 +855,7 @@ NetNet* PWire::elaborate_sig(Design*des, NetScope*scope) const
            bool bad_lsb = false, bad_msb = false;
 	    /* If they exist get the port definition MSB and LSB */
 	    if (port_set_ && port_msb_ != 0) {
+		  probe_expr_width(des, scope, port_msb_);
 		  NetExpr*texpr = elab_and_eval(des, scope, port_msb_, -1);

 		  if (! eval_as_long(pmsb, texpr)) {
@@ -830,6 +870,7 @@ NetNet* PWire::elaborate_sig(Design*des, NetScope*scope) const

 		  delete texpr;

+		  probe_expr_width(des, scope, port_lsb_);
 		  texpr = elab_and_eval(des, scope, port_lsb_, -1);

 		  if (! eval_as_long(plsb, texpr)) {
@@ -852,6 +893,7 @@ NetNet* PWire::elaborate_sig(Design*des, NetScope*scope) const

 	    /* If they exist get the net/etc. definition MSB and LSB */
 	    if (net_set_ && net_msb_ != 0 && !bad_msb && !bad_lsb) {
+		  probe_expr_width(des, scope, net_msb_);
 		  NetExpr*texpr = elab_and_eval(des, scope, net_msb_, -1);

 		  if (! eval_as_long(nmsb, texpr)) {
@@ -866,6 +908,7 @@ NetNet* PWire::elaborate_sig(Design*des, NetScope*scope) const

 		  delete texpr;

+		  probe_expr_width(des, scope, net_lsb_);
 		  texpr = elab_and_eval(des, scope, net_lsb_, -1);

 		  if (! eval_as_long(nlsb, texpr)) {
@@ -957,6 +1000,9 @@ NetNet* PWire::elaborate_sig(Design*des, NetScope*scope) const
      if (lidx_ || ridx_) {
 	    assert(lidx_ && ridx_);

+	    probe_expr_width(des, scope, lidx_);
+	    probe_expr_width(des, scope, ridx_);
+
 	    NetExpr*lexp = elab_and_eval(des, scope, lidx_, -1);
 	    NetExpr*rexp = elab_and_eval(des, scope, ridx_, -1);

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1998-2008 Stephen Williams (steve@icarus.com)
+ * Copyright (c) 1998-2009 Stephen Williams (steve@icarus.com)
 *
 *    This source code is free software; you can redistribute it
 *    and/or modify it in source code form under the terms of the GNU
@@ -119,10 +119,10 @@ void PGAssign::elaborate(Design*des, NetScope*scope) const
 		       << " expression is to small for l-value width "
 		       << lval->vector_width() << "." << endl;
 	    }
-	    rval_expr = pad_to_width(rval_expr, lval->vector_width());
+	    rval_expr = pad_to_width(rval_expr, lval->vector_width(), *this);
      }

-      NetNet*rval = rval_expr->synthesize(des, scope);
+      NetNet*rval = rval_expr->synthesize(des, scope, rval_expr);

      if (rval == 0) {
 	    cerr << get_fileline() << ": internal error: "
@@ -165,9 +165,10 @@ void PGAssign::elaborate(Design*des, NetScope*scope) const
 	   of the l-value. */
      if (lval->vector_width() > rval->vector_width()) {
 	    if (rval->get_signed())
-		  rval = pad_to_width_signed(des, rval, lval->vector_width());
+		  rval = pad_to_width_signed(des, rval, lval->vector_width(),
+		                             *this);
 	    else
-		  rval = pad_to_width(des, rval, lval->vector_width());
+		  rval = pad_to_width(des, rval, lval->vector_width(), *this);
      }

 	/* If, on the other hand, the r-value insists on being
@@ -284,7 +285,8 @@ unsigned PGBuiltin::calculate_output_count_(void) const
      switch (type()) {
 	  case BUF:
 	  case NOT:
-	    output_count = pin_count() - 1;
+	    if (pin_count() > 2) output_count = pin_count() - 1;
+	    else output_count = 1;
 	    break;
 	  case PULLDOWN:
 	  case PULLUP:
@@ -318,8 +320,14 @@ NetNode* PGBuiltin::create_gate_for_output_(Design*des, NetScope*scope,
 	    break;

 	  case BUF:
-	    gate = new NetLogic(scope, gate_name, 2,
-				NetLogic::BUF, instance_width);
+	    if (pin_count() < 2) {
+		  cerr << get_fileline() << ": error: the BUF "
+			"primitive must have an input." << endl;
+		  des->errors += 1;
+	    } else {
+		  gate = new NetLogic(scope, gate_name, 2,
+		                      NetLogic::BUF, instance_width);
+	    }
 	    break;

 	  case BUFIF0:
@@ -389,8 +397,14 @@ NetNode* PGBuiltin::create_gate_for_output_(Design*des, NetScope*scope,
 	    break;

 	  case NOT:
-	    gate = new NetLogic(scope, gate_name, 2,
-				NetLogic::NOT, instance_width);
+	    if (pin_count() < 2) {
+		  cerr << get_fileline() << ": error: the NOT "
+			"primitive must have an input." << endl;
+		  des->errors += 1;
+	    } else {
+		  gate = new NetLogic(scope, gate_name, 2,
+		                      NetLogic::NOT, instance_width);
+	    }
 	    break;

 	  case NOTIF0:
@@ -699,7 +713,7 @@ void PGBuiltin::elaborate(Design*des, NetScope*scope) const

      for (unsigned idx = 0 ;  idx < pin_count() ;  idx += 1) {

-	    const PExpr*ex = pin(idx);
+	    PExpr*ex = pin(idx);
 	    if (ex == 0) {
 		  cerr << get_fileline() << ": error: Logic gate port "
 		          "expressions are not optional." << endl;
@@ -712,9 +726,12 @@ void PGBuiltin::elaborate(Design*des, NetScope*scope) const

 	    } else {
 		  unsigned use_width = array_count * instance_width;
+		  ivl_variable_type_t tmp_type = IVL_VT_NO_TYPE;
+		  bool flag = false;
+		  ex->test_width(des, scope, 0, use_width, tmp_type, flag);
 		  NetExpr*tmp = elab_and_eval(des, scope, ex,
 					      use_width, use_width);
-		  sig = tmp->synthesize(des, scope);
+		  sig = tmp->synthesize(des, scope, tmp);
 		  delete tmp;
 	    }

@@ -861,7 +878,7 @@ NetNet*PGModule::resize_net_to_port_(Design*des, NetScope*scope,
      NetNet*tmp = new NetNet(scope, scope->local_symbol(),
 			      NetNet::WIRE, port_wid);
      tmp->local_flag(true);
-      tmp->set_line(*sig);
+      tmp->set_line(*this);

 	// Handle the special case of a bi-directional part
 	// select. Create a NetTran(VP) instead of a uni-directional
@@ -903,9 +920,9 @@ NetNet*PGModule::resize_net_to_port_(Design*des, NetScope*scope,
 	    } else {
 		  NetNet*osig;
 		  if (as_signed) {
-			osig = pad_to_width_signed(des, tmp, swidth);
+			osig = pad_to_width_signed(des, tmp, swidth, *this);
 		  } else {
-			osig = pad_to_width(des, tmp, swidth);
+			osig = pad_to_width(des, tmp, swidth, *this);
 		  }
 		  connect(osig->pin(0), sig->pin(0));
 	    }
@@ -915,9 +932,9 @@ NetNet*PGModule::resize_net_to_port_(Design*des, NetScope*scope,
 	    if (pwidth > swidth) {
 		  delete tmp;
 		  if (as_signed) {
-			tmp = pad_to_width_signed(des, sig, pwidth);
+			tmp = pad_to_width_signed(des, sig, pwidth, *this);
 		  } else {
-			tmp = pad_to_width(des, sig, pwidth);
+			tmp = pad_to_width(des, sig, pwidth, *this);
 		  }
 	    } else {
 		  NetPartSelect*node = new NetPartSelect(sig, 0, pwidth,
@@ -1170,10 +1187,14 @@ void PGModule::elaborate_mod_(Design*des, Module*rmod, NetScope*scope) const
 		       width. We use that, then, to decide how to hook
 		       it up.

-v		       NOTE that this also handles the case that the
+		       NOTE that this also handles the case that the
 		       port is actually empty on the inside. We assume
 		       in that case that the port is input. */

+		  ivl_variable_type_t tmp_type = IVL_VT_NO_TYPE;
+		  bool flag = false;
+		  pins[idx]->test_width(des, scope, 0, desired_vector_width,
+					tmp_type, flag);
 		  NetExpr*tmp_expr = elab_and_eval(des, scope, pins[idx],
 						   desired_vector_width,
 						   desired_vector_width);
@@ -1183,7 +1204,7 @@ v		       NOTE that this also handles the case that the
 			     << "too complicated for elaboration." << endl;
 			continue;
 		  }
-		  sig = tmp_expr->synthesize(des, scope);
+		  sig = tmp_expr->synthesize(des, scope, tmp_expr);
 		  if (sig == 0) {
 			cerr << pins[idx]->get_fileline()
 			     << ": internal error: Port expression "
@@ -1192,7 +1213,7 @@ v		       NOTE that this also handles the case that the
 		  }

 		  delete tmp_expr;
-		  sig->set_line(*this);
+		  if (!sig->get_lineno()) sig->set_line(*this);

 		  if (need_bufz_for_input_port(prts)) {
 			NetBUFZ*tmp = new NetBUFZ(scope, scope->local_symbol(),
@@ -1653,7 +1674,7 @@ void PGModule::elaborate_udp_(Design*des, PUdp*udp, NetScope*scope) const
 			"for elaboration:" << pins[idx] << endl;
 		  continue;
 	    }
-	    NetNet*sig = expr_tmp->synthesize(des, scope);
+	    NetNet*sig = expr_tmp->synthesize(des, scope, expr_tmp);
 	    ivl_assert(*this, sig);
 	    sig->set_line(*this);

@@ -1789,6 +1810,7 @@ NetExpr* PAssign_::elaborate_rval_(Design*des, NetScope*scope,
 */
 static NetExpr*elaborate_delay_expr(PExpr*expr, Design*des, NetScope*scope)
 {
+      probe_expr_width(des, scope, expr);
      NetExpr*dex = elab_and_eval(des, scope, expr, -1);

 	/* If the delay expression is a real constant or vector
@@ -1890,7 +1912,7 @@ NetProc* PAssign::elaborate(Design*des, NetScope*scope) const
 	    unsigned wid = count_lval_width(lv);

 	    rv->set_width(wid);
-	    rv = pad_to_width(rv, wid);
+	    rv = pad_to_width(rv, wid, *this);

 	    if (wid > rv->expr_width()) {
 		  cerr << get_fileline() << ": error: Unable to match "
@@ -1999,7 +2021,7 @@ NetProc* PAssign::elaborate(Design*des, NetScope*scope) const
 	    unsigned wid = count_lval_width(lv);
 	    if (wid > rv->expr_width()) {
 		  rv->set_width(wid);
-		  rv = pad_to_width(rv, wid);
+		  rv = pad_to_width(rv, wid, *this);
 	    }
 	    ivl_assert(*this, rv->expr_width() >= wid);
      }
@@ -2053,7 +2075,7 @@ NetProc* PAssignNB::elaborate(Design*des, NetScope*scope) const
      } else {
 	    unsigned wid = count_lval_width(lv);
 	    rv->set_width(wid);
-	    rv = pad_to_width(rv, wid);
+	    rv = pad_to_width(rv, wid, *this);
      }

      NetExpr*delay = 0;
@@ -2206,6 +2228,7 @@ NetProc* PCase::elaborate(Design*des, NetScope*scope) const
 {
      assert(scope);

+      probe_expr_width(des, scope, expr_);
      NetExpr*expr = elab_and_eval(des, scope, expr_, -1);
      if (expr == 0) {
 	    cerr << get_fileline() << ": error: Unable to elaborate this case"
@@ -2258,6 +2281,7 @@ NetProc* PCase::elaborate(Design*des, NetScope*scope) const
 		  NetExpr*gu = 0;
 		  NetProc*st = 0;
 		  assert(cur->expr[e]);
+		  probe_expr_width(des, scope, cur->expr[e]);
 		  gu = elab_and_eval(des, scope, cur->expr[e], -1);

 		  if (cur->stat)
@@ -2279,17 +2303,8 @@ NetProc* PCondit::elaborate(Design*des, NetScope*scope) const
 	    cerr << get_fileline() << ": debug: Elaborate condition statement"
 		 << " with conditional: " << *expr_ << endl;

-      // Run a test-width on the condition so that its types are
-      // worked out for elaboration later on.
-      ivl_variable_type_t rtype = IVL_VT_NO_TYPE;
-      bool rflag = false;
-      unsigned expr_wid = expr_->test_width(des, scope, 0, 0, rtype, rflag);
-      if (debug_elaborate)
-	   cerr << get_fileline() << ": debug: Test width of condition expression"
-	        << " returns wid=" << expr_wid << ", type=" << rtype
-		<< ", flag=" << rflag << endl;
-
 	// Elaborate and try to evaluate the conditional expression.
+      probe_expr_width(des, scope, expr_);
      NetExpr*expr = elab_and_eval(des, scope, expr_, -1);
      if (expr == 0) {
 	    cerr << get_fileline() << ": error: Unable to elaborate"
@@ -2389,6 +2404,12 @@ NetProc* PCallTask::elaborate_sys(Design*des, NetScope*scope) const
 {
      assert(scope);

+      if (path_.size() > 1) {
+	    cerr << get_fileline() << ": error: Hierarchical system task names"
+		 << " make no sense: " << path_ << endl;
+	    des->errors += 1;
+      }
+
      unsigned parm_count = nparms();

 	/* Catch the special case that the system task has no
@@ -2427,6 +2448,20 @@ NetProc* PCallTask::elaborate_sys(Design*des, NetScope*scope) const
 	    }
      }

+	// Special case: Specify blocks are turned off, and this is an
+	// $sdf_annotate system task. There will be nothing for $sdf
+	// to annotate, and the user is intending to turn the behavior
+	// off anyhow, so replace the system task invocation with a no-op.
+      if (gn_specify_blocks_flag == false
+	 && peek_tail_name(path_) == "$sdf_annotate") {
+
+	    cerr << get_fileline() << ": warning: Omitting $sdf_annotate() "
+	         << "since specify blocks are being omitted." << endl;
+	    NetBlock*noop = new NetBlock(NetBlock::SEQU, scope);
+	    noop->set_line(*this);
+	    return noop;
+      }
+
      NetSTask*cur = new NetSTask(peek_tail_name(path_), eparms);
      cur->set_line(*this);
      return cur;
@@ -2543,10 +2578,15 @@ NetProc* PCallTask::elaborate_usr(Design*des, NetScope*scope) const

 	    NetAssign_*lv = new NetAssign_(port);
 	    unsigned wid = count_lval_width(lv);
+	    ivl_variable_type_t lv_type = lv->expr_type();
+
+	    NetExpr*rv = elaborate_rval_expr(des, scope, lv_type, wid, parms_[idx]);
+	    if (wid > rv->expr_width()) {
+		  rv->set_width(wid);
+		  rv = pad_to_width(rv, wid, *this);
+	    }
+	    ivl_assert(*this, rv->expr_width() >= wid);

-	    NetExpr*rv = elab_and_eval(des, scope, parms_[idx], wid);
-	    rv->set_width(wid);
-	    rv = pad_to_width(rv, wid);
 	    NetAssign*pr = new NetAssign(lv, rv);
 	    block->append(pr);
      }
@@ -2599,7 +2639,7 @@ NetProc* PCallTask::elaborate_usr(Design*des, NetScope*scope) const
 		  continue;

 	    NetESignal*sig = new NetESignal(port);
-	    NetExpr*rv = pad_to_width(sig, count_lval_width(lv));
+	    NetExpr*rv = pad_to_width(sig, count_lval_width(lv), *this);

 	      /* Generate the assignment statement. */
 	    NetAssign*ass = new NetAssign(lv, rv);
@@ -2649,13 +2689,14 @@ NetCAssign* PCAssign::elaborate(Design*des, NetScope*scope) const
 	    return 0;

      unsigned lwid = count_lval_width(lval);
+      ivl_variable_type_t ltype = lval->expr_type();

-      NetExpr*rexp = elab_and_eval(des, scope, expr_, lwid);
+      NetExpr*rexp = elaborate_rval_expr(des, scope, ltype, lwid, expr_);
      if (rexp == 0)
 	    return 0;

      rexp->set_width(lwid);
-      rexp = pad_to_width(rexp, lwid);
+      rexp = pad_to_width(rexp, lwid, *this);

      dev = new NetCAssign(lval, rexp);

@@ -2720,7 +2761,7 @@ NetProc* PDelayStatement::elaborate(Design*des, NetScope*scope) const
 		  return new NetPDelay(tmp->value().as_ulong64(),
 				       statement_->elaborate(des, scope));
 	    else
-		  return new NetPDelay(tmp->value().as_ulong(), 0);
+		  return new NetPDelay(tmp->value().as_ulong64(), 0);

 	    delete dex;

@@ -2953,6 +2994,7 @@ NetProc* PEventStatement::elaborate_st(Design*des, NetScope*scope,

 	    bool save_flag = error_implicit;
 	    error_implicit = true;
+	    probe_expr_width(des, scope, expr_[idx]->expr());
 	    NetExpr*tmp = elab_and_eval(des, scope, expr_[idx]->expr(), 0);
 	    if (tmp == 0) {
 		  expr_[idx]->dump(cerr);
@@ -2962,7 +3004,7 @@ NetProc* PEventStatement::elaborate_st(Design*des, NetScope*scope,
 		  continue;
 	    }

-	    NetNet*expr = tmp->synthesize(des, scope);
+	    NetNet*expr = tmp->synthesize(des, scope, tmp);
 	    expr->set_line(*this);
 	    if (expr == 0) {
 		  expr_[idx]->dump(cerr);
@@ -3053,10 +3095,12 @@ NetProc* PEventStatement::elaborate_wait(Design*des, NetScope*scope,
 	    return 0;
      }

-      const PExpr *pe = expr_[0]->expr();
+      PExpr *pe = expr_[0]->expr();

 	/* Elaborate wait expression. Don't eval yet, we will do that
 	   shortly, after we apply a reduction or. */
+
+      probe_expr_width(des, scope, pe);
      NetExpr*expr = pe->elaborate_expr(des, scope, -1, false);
      if (expr == 0) {
 	    cerr << get_fileline() << ": error: Unable to elaborate"
@@ -3247,13 +3291,14 @@ NetForce* PForce::elaborate(Design*des, NetScope*scope) const
 	    return 0;

      unsigned lwid = count_lval_width(lval);
+      ivl_variable_type_t ltype = lval->expr_type();

-      NetExpr*rexp = elab_and_eval(des, scope, expr_, lwid);
+      NetExpr*rexp = elaborate_rval_expr(des, scope, ltype, lwid, expr_);
      if (rexp == 0)
 	    return 0;

      rexp->set_width(lwid, true);
-      rexp = pad_to_width(rexp, lwid);
+      rexp = pad_to_width(rexp, lwid, *this);

      dev = new NetForce(lval, rexp);

@@ -3318,7 +3363,7 @@ NetProc* PForStatement::elaborate(Design*des, NetScope*scope) const
 	   properly. Then use it to build the assignment statement. */
      etmp = elab_and_eval(des, scope, expr1_, use_width);
      etmp->set_width(use_width);
-      etmp = pad_to_width(etmp, use_width);
+      etmp = pad_to_width(etmp, use_width, *this);

      if (debug_elaborate) {
 	    cerr << get_fileline() << ": debug: FOR initial assign: "
@@ -3331,7 +3376,7 @@ NetProc* PForStatement::elaborate(Design*des, NetScope*scope) const
      if (etmp->expr_type() != IVL_VT_REAL) {
 	    unsigned wid = count_lval_width(lv);
 	    etmp->set_width(wid);
-	    etmp = pad_to_width(etmp, wid);
+	    etmp = pad_to_width(etmp, wid, *this);
 	    assert(etmp->expr_width() >= wid);
      }

@@ -3378,6 +3423,7 @@ NetProc* PForStatement::elaborate(Design*des, NetScope*scope) const
 	/* Elaborate the condition expression. Try to evaluate it too,
 	   in case it is a constant. This is an interesting case
 	   worthy of a warning. */
+      probe_expr_width(des, scope, cond_);
      NetExpr*ce = elab_and_eval(des, scope, cond_, -1);
      if (ce == 0) {
 	    delete top;
@@ -3590,8 +3636,9 @@ NetProc* PTrigger::elaborate(Design*des, NetScope*scope) const
 */
 NetProc* PWhile::elaborate(Design*des, NetScope*scope) const
 {
-      NetWhile*loop = new NetWhile(elab_and_eval(des, scope, cond_, -1),
-				   statement_->elaborate(des, scope));
+      probe_expr_width(des, scope, cond_);
+      NetExpr*tmp = elab_and_eval(des, scope, cond_, -1);
+      NetWhile*loop = new NetWhile(tmp, statement_->elaborate(des, scope));
      return loop;
 }

@@ -3682,6 +3729,7 @@ void PSpecPath::elaborate(Design*des, NetScope*scope) const
 	   them for the timescale/precision of the scope. */
      for (unsigned idx = 0 ;  idx < ndelays ;  idx += 1) {
 	    PExpr*exp = delays[idx];
+	    probe_expr_width(des, scope, exp);
 	    NetExpr*cur = elab_and_eval(des, scope, exp, 0);

 	    if (NetEConst*cur_con = dynamic_cast<NetEConst*> (cur)) {
@@ -3719,13 +3767,14 @@ void PSpecPath::elaborate(Design*des, NetScope*scope) const
      NetNet*condit_sig = 0;
      if (conditional && condition) {

+	    probe_expr_width(des, scope, condition);
 	    NetExpr*tmp = elab_and_eval(des, scope, condition, -1);
 	    ivl_assert(*condition, tmp);

 	      // FIXME: Look for constant expressions here?

 	      // Get a net form.
-	    condit_sig = tmp->synthesize(des, scope);
+	    condit_sig = tmp->synthesize(des, scope, tmp);
 	    ivl_assert(*condition, condit_sig);
      }

@@ -3961,6 +4010,9 @@ bool Module::elaborate(Design*des, NetScope*scope) const

 bool PGenerate::elaborate(Design*des, NetScope*container) const
 {
+      if (direct_nested_)
+	    return elaborate_direct_(des, container);
+
      bool flag = true;

 	// Handle the special case that this is a CASE scheme. In this
@@ -3977,7 +4029,7 @@ bool PGenerate::elaborate(Design*des, NetScope*container) const
 	    for (generate_it_t cur = generate_schemes.begin()
 		       ; cur != generate_schemes.end() ; cur ++) {
 		  PGenerate*item = *cur;
-		  if (! item->scope_list_.empty()) {
+		  if (item->direct_nested_ || !item->scope_list_.empty()) {
 			flag &= item->elaborate(des, container);
 		  }
 	    }
@@ -4015,6 +4067,30 @@ bool PGenerate::elaborate(Design*des, NetScope*container) const
      return flag;
 }

+bool PGenerate::elaborate_direct_(Design*des, NetScope*container) const
+{
+      if (debug_elaborate)
+	    cerr << get_fileline() << ": debug: "
+		 << "Direct nesting elaborate in scope "
+		 << scope_path(container) << "." << endl;
+
+	// Elaborate for a direct nested generated scheme knows
+	// that there are only sub_schemes to be elaborated.  There
+	// should be exactly 1 active generate scheme, search for it
+	// using this loop.
+      bool flag = true;
+      typedef list<PGenerate*>::const_iterator generate_it_t;
+      for (generate_it_t cur = generate_schemes.begin()
+		 ; cur != generate_schemes.end() ; cur ++) {
+	    PGenerate*item = *cur;
+	    if (item->direct_nested_ || !item->scope_list_.empty()) {
+		    // Found the item, and it is direct nested.
+		  flag &= item->elaborate(des, container);
+	    }
+      }
+      return flag;
+}
+
 bool PGenerate::elaborate_(Design*des, NetScope*scope) const
 {
      elaborate_functions(des, scope, funcs);
@@ -28,21 +28,31 @@

 NetProc* AContrib::elaborate(Design*des, NetScope*scope) const
 {
+      probe_expr_width(des, scope, lval_);
+      probe_expr_width(des, scope, rval_);
      NetExpr*lval = elab_and_eval(des, scope, lval_, -1);
      NetExpr*rval = elab_and_eval(des, scope, rval_, -1);

-      NetContribution*st = new NetContribution(lval, rval);
+      NetEAccess*lacc = dynamic_cast<NetEAccess*> (lval);
+      if (lacc == 0) {
+	    cerr << get_fileline() << ": error: The l-value of a contribution"
+		 << " statement must be a branch probe access function." << endl;
+	    des->errors += 1;
+	    return 0;
+      }
+
+      NetContribution*st = new NetContribution(lacc, rval);
      st->set_line(*this);
      return st;
 }

 bool AProcess::elaborate(Design*des, NetScope*scope) const
 {
-      NetProc*statement = statement_->elaborate(des, scope);
-      if (statement == 0)
+      NetProc*estatement = statement_->elaborate(des, scope);
+      if (estatement == 0)
 	    return false;

-      NetAnalogTop*top = new NetAnalogTop(scope, type_, statement);
+      NetAnalogTop*top = new NetAnalogTop(scope, type_, estatement);

 	// Evaluate the attributes for this process, if there
 	// are any. These attributes are to be attached to the
@@ -192,9 +192,7 @@ bool NetProcTop::emit(struct target_t*tgt) const

 bool NetAnalogTop::emit(struct target_t*tgt) const
 {
-      cerr << get_fileline() << ": sorry: "
-	   << "I don't know how to emit for analog processes." << endl;
-      return false;
+      return tgt->process(this);
 }

 bool NetProc::emit_proc(struct target_t*tgt) const
@@ -241,6 +239,11 @@ bool NetCondit::emit_proc(struct target_t*tgt) const
      return tgt->proc_condit(this);
 }

+bool NetContribution::emit_proc(struct target_t*tgt) const
+{
+      return tgt->proc_contribution(this);
+}
+
 bool NetDeassign::emit_proc(struct target_t*tgt) const
 {
      return tgt->proc_deassign(this);
@@ -452,6 +455,11 @@ int Design::emit(struct target_t*tgt) const
      }


+      bool branches_rc = true;
+      for (NetBranch*cur = branches_ ; cur ; cur = cur->next_) {
+	    branches_rc = tgt->branch(cur) && branches_rc;
+      }
+
 	// emit task and function definitions
      bool tasks_rc = true;
      for (list<NetScope*>::const_iterator scope = root_scopes_.begin();
@@ -474,6 +482,8 @@ int Design::emit(struct target_t*tgt) const
 	    return -2;
      if (proc_rc == false)
 	  return -3;
+      if (branches_rc == false)
+	    return -4;

      return rc;
 }
@@ -16,9 +16,6 @@
 *    along with this program; if not, write to the Free Software
 *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
 */
-#ifdef HAVE_CVS_IDENT
-#ident "$Id: eval_attrib.cc,v 1.9 2007/06/04 19:14:06 steve Exp $"
-#endif

 # include  "config.h"
 # include  "util.h"
@@ -76,38 +73,3 @@ attrib_list_t* evaluate_attributes(const map<perm_string,PExpr*>&att,
      return table;
 }

-/*
- * $Log: eval_attrib.cc,v $
- * Revision 1.9  2007/06/04 19:14:06  steve
- *  Build errors in picky GCC compilers.
- *
- * Revision 1.8  2005/11/27 17:01:57  steve
- *  Fix for stubborn compiler.
- *
- * Revision 1.7  2004/02/20 18:53:35  steve
- *  Addtrbute keys are perm_strings.
- *
- * Revision 1.6  2003/01/27 05:09:17  steve
- *  Spelling fixes.
- *
- * Revision 1.5  2002/08/12 01:34:59  steve
- *  conditional ident string using autoconfig.
- *
- * Revision 1.4  2002/08/10 21:59:39  steve
- *  The default attribute value is 1.
- *
- * Revision 1.3  2002/06/06 18:57:18  steve
- *  Use standard name for iostream.
- *
- * Revision 1.2  2002/06/03 03:55:14  steve
- *  compile warnings.
- *
- * Revision 1.1  2002/05/23 03:08:51  steve
- *  Add language support for Verilog-2001 attribute
- *  syntax. Hook this support into existing $attribute
- *  handling, and add number and void value types.
- *
- *  Add to the ivl_target API new functions for access
- *  of complex attributes attached to gates.
- *
- */
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1999-2008 Stephen Williams (steve@icarus.com)
+ * Copyright (c) 1999-2009 Stephen Williams (steve@icarus.com)
 *
 *    This source code is free software; you can redistribute it
 *    and/or modify it in source code form under the terms of the GNU
@@ -129,7 +129,14 @@ NetExpr* NetEBAdd::eval_tree(int prune_to_width)
      lc = se? dynamic_cast<NetEConst*>(se->right_) : 0;

      if (lc != 0 && rc != 0) {
-	    assert(se != 0);
+	    ivl_assert(*this, se != 0);
+
+	    if (debug_eval_tree) {
+		  cerr << get_fileline() << ": debug: "
+		       << "Partially evalutate " << *this
+		       << " using (a+2)-1 --> (a+1) transform." << endl;
+	    }
+
 	    verinum lval = lc->value();
 	    verinum rval = rc->value();

@@ -811,6 +818,32 @@ NetEConst* NetEBComp::eval_tree(int prune_to_width)
      }
 }

+NetExpr* NetEBDiv::eval_tree_real_()
+{
+      verireal lval;
+      verireal rval;
+
+      bool flag = get_real_arguments_(lval, rval);
+      if (! flag) return 0;
+
+      NetECReal*res = 0;
+      switch (op_) {
+	  case '/':
+	    res = new NetECReal(lval / rval);
+	    break;
+
+	  case '%':
+	      // Since this could/may be called early we don't want to
+	      // leak functionality.
+	    if (!gn_icarus_misc_flag) return 0;
+	    res = new NetECReal(lval % rval);
+	    break;
+      }
+      ivl_assert(*this, res);
+      res->set_line(*this);
+      return res;
+}
+
 /*
 * The NetEBDiv operator includes the / and % operators. First evaluate
 * the sub-expressions, then perform the required operation.
@@ -820,77 +853,31 @@ NetExpr* NetEBDiv::eval_tree(int prune_to_width)
      eval_expr(left_);
      eval_expr(right_);

-      if (expr_type() == IVL_VT_REAL) {
-	    NetECReal*lc = dynamic_cast<NetECReal*>(left_);
-	    if (lc == 0) return 0;
+      if (expr_type() == IVL_VT_REAL) return eval_tree_real_();
+      
+      assert(expr_type() == IVL_VT_LOGIC);

-	    verireal lval = lc->value();
+      NetEConst*lc = dynamic_cast<NetEConst*>(left_);
+      NetEConst*rc = dynamic_cast<NetEConst*>(right_);
+      if (lc == 0 || rc == 0) return 0;

-	    if (NetECReal*rcr = dynamic_cast<NetECReal*>(right_)) {
-		  NetECReal*tmp = 0;
-		  verireal rval = rcr->value();
+	// Make sure the expression is evaluated at the
+	// expression width.
+      verinum lval = pad_to_width(lc->value(), expr_width());
+      verinum rval = pad_to_width(rc->value(), expr_width());

-		  switch (op_) {
-		      case '/':
-			tmp = new NetECReal(lval / rval);
-			break;
-
-		      case '%':
-			tmp = new NetECReal(lval % rval);
-		  }
-
-		  assert(tmp);
-		  tmp->set_line(*this);
-		  return tmp;
-
-	    } else if (NetEConst*rc = dynamic_cast<NetEConst*>(right_)) {
-
-		  NetECReal*tmp = 0;
-		  verinum rval = rc->value();
-
-		  switch (op_) {
-		      case '/':
-			tmp = new NetECReal(lval / rval);
-			break;
-
-		      case '%':
-			tmp = new NetECReal(lval % rval);
-		  }
-
-		  assert(tmp);
-		  tmp->set_line(*this);
-		  return tmp;
-
-	    }
-
-
-      } else {
-	    assert(expr_type() == IVL_VT_LOGIC);
-	    NetEConst*lc = dynamic_cast<NetEConst*>(left_);
-	    if (lc == 0) return 0;
-	    NetEConst*rc = dynamic_cast<NetEConst*>(right_);
-	    if (rc == 0) return 0;
-
-	      // Make sure the expression is evaluated at the
-	      // expression width.
-	    verinum lval = pad_to_width(lc->value(), expr_width());
-	    verinum rval = pad_to_width(rc->value(), expr_width());
-
-	    NetExpr*tmp = 0;
-	    switch (op_) {
-		case '/':
-		  tmp = new NetEConst(lval / rval);
-		  break;
-		case '%':
-		  tmp = new NetEConst(lval % rval);
-		  break;
-	    }
-	    ivl_assert(*this, tmp);
-	    tmp->set_line(*this);
-	    return tmp;
+      NetExpr*tmp = 0;
+      switch (op_) {
+	  case '/':
+	    tmp = new NetEConst(lval / rval);
+	    break;
+	  case '%':
+	    tmp = new NetEConst(lval % rval);
+	    break;
      }
-
-      return 0;
+      ivl_assert(*this, tmp);
+      tmp->set_line(*this);
+      return tmp;
 }

 NetEConst* NetEBLogic::eval_tree(int prune_to_width)
@@ -969,7 +956,6 @@ NetExpr* NetEBMult::eval_tree_real_()
      bool flag = get_real_arguments_(lval, rval);
      if (! flag) return 0;

-
      NetECReal*res = new NetECReal(lval * rval);
      res->set_line(*this);
      return res;
@@ -980,8 +966,7 @@ NetExpr* NetEBMult::eval_tree(int prune_to_width)
      eval_expr(left_);
      eval_expr(right_);

-      if (expr_type() == IVL_VT_REAL)
-	    return eval_tree_real_();
+      if (expr_type() == IVL_VT_REAL) return eval_tree_real_();

      assert(expr_type() == IVL_VT_LOGIC);

@@ -1477,7 +1462,9 @@ NetExpr* NetETernary::eval_tree(int prune_to_width)
 		       << "constant condition value: ";
 		  print_ternary_cond(cond_);
 		  cerr << get_fileline() << ":      : Blending real cases "
-		       << "to get " << val << endl;
+		       << "true=" << tv.as_double()
+		       << ", false=" << fv.as_double()
+		       << ", to get " << val << endl;
 	    }

 	    NetECReal*rc = new NetECReal(val);
@@ -1604,6 +1591,7 @@ NetEConst* NetEUReduce::eval_tree(int prune_to_width)

      verinum val = rval->value();
      verinum::V res;
+      bool invert = false;

      switch (op_) {

@@ -1632,6 +1620,8 @@ NetEConst* NetEUReduce::eval_tree(int prune_to_width)
 		break;
 	  }

+	  case 'A':
+		invert = true;
 	  case '&': {
 		res = verinum::V1;
 		for (unsigned idx = 0 ;  idx < val.len() ;  idx += 1)
@@ -1639,6 +1629,8 @@ NetEConst* NetEUReduce::eval_tree(int prune_to_width)
 		break;
 	  }

+	  case 'N':
+		invert = true;
 	  case '|': {
 		res = verinum::V0;
 		for (unsigned idx = 0 ;  idx < val.len() ;  idx += 1)
@@ -1646,6 +1638,8 @@ NetEConst* NetEUReduce::eval_tree(int prune_to_width)
 		break;
 	  }

+	  case 'X':
+		invert = true;
 	  case '^': {
 		  /* Reduction XOR. */
 		unsigned ones = 0, unknown = 0;
@@ -1661,17 +1655,17 @@ NetEConst* NetEUReduce::eval_tree(int prune_to_width)
 			    break;
 		      }

-		if (unknown)
-		      return new NetEConst(verinum(verinum::Vx,1,true));
-		if (ones%2)
-		      return new NetEConst(verinum(verinum::V1,1,true));
-		return new NetEConst(verinum(verinum::V0,1,true));
+		if (unknown) res = verinum::Vx;
+		else if (ones%2) res = verinum::V1;
+		else res = verinum::V0;
+		break;
 	  }

 	  default:
 	    return 0;
      }

+      if (invert) res = ~res;
      return new NetEConst(verinum(res, 1));
 }

@@ -1,3 +0,0 @@
-,*
-hello_vpi.vpi
-show_vcd.vcd
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1999-2008 Stephen Williams (steve@icarus.com)
+ * Copyright (c) 1999-2009 Stephen Williams (steve@icarus.com)
 *
 *    This source code is free software; you can redistribute it
 *    and/or modify it in source code form under the terms of the GNU
@@ -31,13 +31,13 @@ static NetNet* convert_to_real_const(Design*des, NetScope*scope, NetEConst*expr)
 {
      verireal vrl(expr->value().as_double());
      NetECReal rlval(vrl);
-      NetNet* sig = rlval.synthesize(des, scope);
+      NetNet* sig = rlval.synthesize(des, scope, 0);

      return sig;
 }

  /* Note that lsig, rsig and real_args are references. */
-static bool process_binary_args(Design*des, NetScope*scope,
+static bool process_binary_args(Design*des, NetScope*scope, NetExpr*root,
 				NetExpr*left, NetExpr*right,
 				NetNet*&lsig, NetNet*&rsig, bool&real_args,
 				NetExpr*obj)
@@ -49,27 +49,27 @@ static bool process_binary_args(Design*des, NetScope*scope,
 	      /* Convert the arguments to real. Handle the special
 	         cases of constants, which can be converted more directly. */
 	    if (left->expr_type() == IVL_VT_REAL) {
-		  lsig = left->synthesize(des, scope);
+		  lsig = left->synthesize(des, scope, root);
 	    } else if (NetEConst*tmpc = dynamic_cast<NetEConst*> (left)) {
 		  lsig = convert_to_real_const(des, scope, tmpc);
 	    } else {
-		  NetNet*tmp = left->synthesize(des, scope);
+		  NetNet*tmp = left->synthesize(des, scope, root);
 		  lsig = cast_to_real(des, scope, tmp);
 	    }

 	    if (right->expr_type() == IVL_VT_REAL) {
-		  rsig = right->synthesize(des, scope);
+		  rsig = right->synthesize(des, scope, root);
 	    } else if (NetEConst*tmpc = dynamic_cast<NetEConst*> (right)) {
 		  rsig = convert_to_real_const(des, scope, tmpc);
 	    } else {
-		  NetNet*tmp = right->synthesize(des, scope);
+		  NetNet*tmp = right->synthesize(des, scope, root);
 		  rsig = cast_to_real(des, scope, tmp);
 	    }

      } else {
            real_args = false;
-	    lsig = left->synthesize(des, scope);
-	    rsig = right->synthesize(des, scope);
+	    lsig = left->synthesize(des, scope, root);
+	    rsig = right->synthesize(des, scope, root);

      }

@@ -77,7 +77,7 @@ static bool process_binary_args(Design*des, NetScope*scope,
      else return false;
 }

-NetNet* NetExpr::synthesize(Design*des, NetScope*scope)
+NetNet* NetExpr::synthesize(Design*des, NetScope*scope, NetExpr*root)
 {
      cerr << get_fileline() << ": internal error: cannot synthesize expression: "
 	   << *this << endl;
@@ -88,13 +88,13 @@ NetNet* NetExpr::synthesize(Design*des, NetScope*scope)
 /*
 * Make an LPM_ADD_SUB device from addition operators.
 */
-NetNet* NetEBAdd::synthesize(Design*des, NetScope*scope)
+NetNet* NetEBAdd::synthesize(Design*des, NetScope*scope, NetExpr*root)
 {
      ivl_assert(*this, (op()=='+') || (op()=='-'));

      NetNet *lsig=0, *rsig=0;
      bool real_args=false;
-      if (process_binary_args(des, scope, left_, right_, lsig, rsig,
+      if (process_binary_args(des, scope, root, left_, right_, lsig, rsig,
                              real_args, this)) {
 	    return 0;
      }
@@ -111,8 +111,8 @@ NetNet* NetEBAdd::synthesize(Design*des, NetScope*scope)
 		  rsig = cast_to_real(des, scope, rsig);

      } else {
-	    lsig = pad_to_width(des, lsig, expr_width());
-	    rsig = pad_to_width(des, rsig, expr_width());
+	    lsig = pad_to_width(des, lsig, expr_width(), *this);
+	    rsig = pad_to_width(des, rsig, expr_width(), *this);

 	    assert(lsig->vector_width() == rsig->vector_width());
 	    width=lsig->vector_width();
@@ -148,10 +148,10 @@ NetNet* NetEBAdd::synthesize(Design*des, NetScope*scope)
 * signals, then just connect a single gate to each bit of the vector
 * of the expression.
 */
-NetNet* NetEBBits::synthesize(Design*des, NetScope*scope)
+NetNet* NetEBBits::synthesize(Design*des, NetScope*scope, NetExpr*root)
 {
-      NetNet*lsig = left_->synthesize(des, scope);
-      NetNet*rsig = right_->synthesize(des, scope);
+      NetNet*lsig = left_->synthesize(des, scope, root);
+      NetNet*rsig = right_->synthesize(des, scope, root);

      if (lsig == 0 || rsig == 0) return 0;

@@ -167,8 +167,8 @@ NetNet* NetEBBits::synthesize(Design*des, NetScope*scope)
      unsigned width = expr_width();
      if (rsig->vector_width() > width) width = rsig->vector_width();

-      lsig = pad_to_width(des, lsig, width);
-      rsig = pad_to_width(des, rsig, width);
+      lsig = pad_to_width(des, lsig, width, *this);
+      rsig = pad_to_width(des, rsig, width, *this);

      assert(lsig->vector_width() == rsig->vector_width());
      NetNet*osig = new NetNet(scope, scope->local_symbol(),
@@ -212,13 +212,13 @@ NetNet* NetEBBits::synthesize(Design*des, NetScope*scope)
      return osig;
 }

-NetNet* NetEBComp::synthesize(Design*des, NetScope*scope)
+NetNet* NetEBComp::synthesize(Design*des, NetScope*scope, NetExpr*root)
 {

      NetNet *lsig=0, *rsig=0;
      unsigned width;
      bool real_args=false;
-      if (process_binary_args(des, scope, left_, right_, lsig, rsig,
+      if (process_binary_args(des, scope, root, left_, right_, lsig, rsig,
                              real_args, this)) {
 	    return 0;
      }
@@ -230,13 +230,13 @@ NetNet* NetEBComp::synthesize(Design*des, NetScope*scope)
 	    if (rsig->vector_width() > width) width = rsig->vector_width();

 	    if (lsig->get_signed())
-		  lsig = pad_to_width_signed(des, lsig, width);
+		  lsig = pad_to_width_signed(des, lsig, width, *this);
 	    else
-		  lsig = pad_to_width(des, lsig, width);
+		  lsig = pad_to_width(des, lsig, width, *this);
 	    if (rsig->get_signed())
-		  rsig = pad_to_width_signed(des, rsig, width);
+		  rsig = pad_to_width_signed(des, rsig, width, *this);
 	    else
-		  rsig = pad_to_width(des, rsig, width);
+		  rsig = pad_to_width(des, rsig, width, *this);
      }

      NetNet*osig = new NetNet(scope, scope->local_symbol(),
@@ -362,12 +362,12 @@ NetNet* NetEBComp::synthesize(Design*des, NetScope*scope)
      return osig;
 }

-NetNet* NetEBPow::synthesize(Design*des, NetScope*scope)
+NetNet* NetEBPow::synthesize(Design*des, NetScope*scope, NetExpr*root)
 {
      NetNet *lsig=0, *rsig=0;
      unsigned width;
      bool real_args=false;
-      if (process_binary_args(des, scope, left_, right_, lsig, rsig,
+      if (process_binary_args(des, scope, root, left_, right_, lsig, rsig,
                              real_args, this)) {
 	    return 0;
      }
@@ -397,12 +397,12 @@ NetNet* NetEBPow::synthesize(Design*des, NetScope*scope)
      return osig;
 }

-NetNet* NetEBMult::synthesize(Design*des, NetScope*scope)
+NetNet* NetEBMult::synthesize(Design*des, NetScope*scope, NetExpr*root)
 {
      NetNet *lsig=0, *rsig=0;
      unsigned width;
      bool real_args=false;
-      if (process_binary_args(des, scope, left_, right_, lsig, rsig,
+      if (process_binary_args(des, scope, root, left_, right_, lsig, rsig,
                              real_args, this)) {
 	    return 0;
      }
@@ -433,12 +433,12 @@ NetNet* NetEBMult::synthesize(Design*des, NetScope*scope)
      return osig;
 }

-NetNet* NetEBDiv::synthesize(Design*des, NetScope*scope)
+NetNet* NetEBDiv::synthesize(Design*des, NetScope*scope, NetExpr*root)
 {
      NetNet *lsig=0, *rsig=0;
      unsigned width;
      bool real_args=false;
-      if (process_binary_args(des, scope, left_, right_, lsig, rsig,
+      if (process_binary_args(des, scope, root, left_, right_, lsig, rsig,
                              real_args, this)) {
 	    return 0;
      }
@@ -507,10 +507,10 @@ NetNet* NetEBDiv::synthesize(Design*des, NetScope*scope)
      return osig;
 }

-NetNet* NetEBLogic::synthesize(Design*des, NetScope*scope)
+NetNet* NetEBLogic::synthesize(Design*des, NetScope*scope, NetExpr*root)
 {
-      NetNet*lsig = left_->synthesize(des, scope);
-      NetNet*rsig = right_->synthesize(des, scope);
+      NetNet*lsig = left_->synthesize(des, scope, root);
+      NetNet*rsig = right_->synthesize(des, scope, root);

      if (lsig == 0 || rsig == 0) return 0;

@@ -584,11 +584,11 @@ NetNet* NetEBLogic::synthesize(Design*des, NetScope*scope)
      return osig;
 }

-NetNet* NetEBShift::synthesize(Design*des, NetScope*scope)
+NetNet* NetEBShift::synthesize(Design*des, NetScope*scope, NetExpr*root)
 {
      eval_expr(right_);

-      NetNet*lsig = left_->synthesize(des, scope);
+      NetNet*lsig = left_->synthesize(des, scope, root);

      if (lsig == 0) return 0;

@@ -690,7 +690,7 @@ NetNet* NetEBShift::synthesize(Design*des, NetScope*scope)
 	    return osig;
      }

-      NetNet*rsig = right_->synthesize(des, scope);
+      NetNet*rsig = right_->synthesize(des, scope, root);

      if (rsig == 0) return 0;

@@ -716,13 +716,13 @@ NetNet* NetEBShift::synthesize(Design*des, NetScope*scope)
      return osig;
 }

-NetNet* NetEConcat::synthesize(Design*des, NetScope*scope)
+NetNet* NetEConcat::synthesize(Design*des, NetScope*scope, NetExpr*root)
 {
 	/* First, synthesize the operands. */
      NetNet**tmp = new NetNet*[parms_.count()];
      bool flag = true;
      for (unsigned idx = 0 ;  idx < parms_.count() ;  idx += 1) {
-	    tmp[idx] = parms_[idx]->synthesize(des, scope);
+	    tmp[idx] = parms_[idx]->synthesize(des, scope, root);
 	    if (tmp[idx] == 0)
 		  flag = false;
      }
@@ -745,6 +745,7 @@ NetNet* NetEConcat::synthesize(Design*des, NetScope*scope)
      des->add_node(concat);
      connect(concat->pin(0), osig->pin(0));

+      unsigned count_input_width = 0;
      unsigned cur_pin = 1;
      for (unsigned rpt = 0; rpt < repeat(); rpt += 1) {
 	    for (unsigned idx = 0 ;  idx < parms_.count() ;  idx += 1) {
@@ -752,14 +753,23 @@ NetNet* NetEConcat::synthesize(Design*des, NetScope*scope)
 		  ivl_assert(*this, tmp[concat_item]);
 		  connect(concat->pin(cur_pin), tmp[concat_item]->pin(0));
 		  cur_pin += 1;
+		  count_input_width += tmp[concat_item]->vector_width();
 	    }
      }

+      if (count_input_width != osig->vector_width()) {
+	    cerr << get_fileline() << ": internal error: "
+		 << "NetEConcat input width = " << count_input_width
+		 << ", expecting " << osig->vector_width()
+		 << " (repeat=" << repeat() << ")" << endl;
+	    des->errors += 1;
+      }
+
      delete[]tmp;
      return osig;
 }

-NetNet* NetEConst::synthesize(Design*des, NetScope*scope)
+NetNet* NetEConst::synthesize(Design*des, NetScope*scope, NetExpr*)
 {
      perm_string path = scope->local_symbol();
      unsigned width=expr_width();
@@ -768,17 +778,20 @@ NetNet* NetEConst::synthesize(Design*des, NetScope*scope)
      osig->local_flag(true);
      osig->data_type(expr_type());
      osig->set_signed(has_sign());
-      NetConst*con = new NetConst(scope, scope->local_symbol(), value());
-      connect(osig->pin(0), con->pin(0));
+      osig->set_line(*this);

+      NetConst*con = new NetConst(scope, scope->local_symbol(), value());
      des->add_node(con);
+      con->set_line(*this);
+
+      connect(osig->pin(0), con->pin(0));
      return osig;
 }

 /*
 * Create a NetLiteral object to represent real valued constants.
 */
-NetNet* NetECReal::synthesize(Design*des, NetScope*scope)
+NetNet* NetECReal::synthesize(Design*des, NetScope*scope, NetExpr*)
 {
      perm_string path = scope->local_symbol();

@@ -800,9 +813,9 @@ NetNet* NetECReal::synthesize(Design*des, NetScope*scope)
 * The bitwise unary logic operator (there is only one) is turned
 * into discrete gates just as easily as the binary ones above.
 */
-NetNet* NetEUBits::synthesize(Design*des, NetScope*scope)
+NetNet* NetEUBits::synthesize(Design*des, NetScope*scope, NetExpr*root)
 {
-      NetNet*isig = expr_->synthesize(des, scope);
+      NetNet*isig = expr_->synthesize(des, scope, root);

      if (isig == 0) return 0;

@@ -839,19 +852,19 @@ NetNet* NetEUBits::synthesize(Design*des, NetScope*scope)
      return osig;
 }

-NetNet* NetEUnary::synthesize(Design*des, NetScope*scope)
+NetNet* NetEUnary::synthesize(Design*des, NetScope*scope, NetExpr*root)
 {
      if (op_ == '+')
-	    return expr_->synthesize(des, scope);
+	    return expr_->synthesize(des, scope, root);

      if (op_ == '-') {
-	    NetNet*sig = expr_->synthesize(des, scope);
+	    NetNet*sig = expr_->synthesize(des, scope, root);
 	    sig = sub_net_from(des, scope, 0, sig);
 	    return sig;
      }

      if (op_ == 'm') {
-	    NetNet*sub = expr_->synthesize(des, scope);
+	    NetNet*sub = expr_->synthesize(des, scope, root);
 	    if (expr_->has_sign() == false)
 		  return sub;

@@ -873,12 +886,12 @@ NetNet* NetEUnary::synthesize(Design*des, NetScope*scope)
      cerr << get_fileline() << ": iternal error: "
 	   << "NetEUnary::synthesize cannot handle op_=" << op_ << endl;
      des->errors += 1;
-      return expr_->synthesize(des, scope);
+      return expr_->synthesize(des, scope, root);
 }

-NetNet* NetEUReduce::synthesize(Design*des, NetScope*scope)
+NetNet* NetEUReduce::synthesize(Design*des, NetScope*scope, NetExpr*root)
 {
-      NetNet*isig = expr_->synthesize(des, scope);
+      NetNet*isig = expr_->synthesize(des, scope, root);

      if (isig == 0) return 0;

@@ -948,10 +961,10 @@ NetNet* NetEUReduce::synthesize(Design*des, NetScope*scope)
 * - Expression elaboration already converted the offset expression into
 * canonical form, so we don't have to worry about that here.
 */
-NetNet* NetESelect::synthesize(Design *des, NetScope*scope)
+NetNet* NetESelect::synthesize(Design *des, NetScope*scope, NetExpr*root)
 {

-      NetNet*sub = expr_->synthesize(des, scope);
+      NetNet*sub = expr_->synthesize(des, scope, root);

      if (sub == 0) return 0;

@@ -961,31 +974,49 @@ NetNet* NetESelect::synthesize(Design *des, NetScope*scope)
 	// it is constant. In this case we can generate fixed part selects.
      if (NetEConst*base_const = dynamic_cast<NetEConst*>(base_)) {
 	    verinum base_tmp = base_const->value();
-	    ivl_assert(*this, base_tmp.is_defined());
+	    unsigned select_width = expr_width();
+
+	      // Return 'bx for a constant undefined selections.
+	    if (!base_tmp.is_defined()) {
+		  NetNet*result = make_const_x(des, scope, select_width);
+		  result->set_line(*this);
+		  return result;
+	    }

 	    long base_val = base_tmp.as_long();
-	    unsigned select_width = expr_width();

 	      // Any below X bits?
 	    NetNet*below = 0;
 	    if (base_val < 0) {
 		  unsigned below_width = abs(base_val);
 		  base_val = 0;
-		  ivl_assert(*this, below_width < select_width);
-		  select_width -= below_width;
+		  if (below_width > select_width) {
+			below_width = select_width;
+			select_width = 0;
+		  } else {
+			select_width -= below_width;
+		  }

 		  below = make_const_x(des, scope, below_width);
 		  below->set_line(*this);
+		    // All the selected bits are below the signal.
+		  if (select_width == 0) return below;
 	    }

 	      // Any above bits?
 	    NetNet*above = 0;
 	    if ((unsigned)base_val+select_width > sub->vector_width()) {
-		  select_width = sub->vector_width() - base_val;
+		  if (base_val > (long)sub->vector_width()) {
+			select_width = 0;
+		  } else {
+			select_width = sub->vector_width() - base_val;
+		  }
 		  unsigned above_width = expr_width() - select_width;

 		  above = make_const_x(des, scope, above_width);
 		  above->set_line(*this);
+		    // All the selected bits are above the signal.
+		  if (select_width == 0) return above;
 	    }

 	      // Make the make part select.
@@ -1034,7 +1065,7 @@ NetNet* NetESelect::synthesize(Design *des, NetScope*scope)
 	// actual part/bit select. Generate a NetPartSelect object to
 	// do the work, and replace "sub" with the selected output.
      if (base_ != 0) {
-	    off = base_->synthesize(des, scope);
+	    off = base_->synthesize(des, scope, root);

 	    NetPartSelect*sel = new NetPartSelect(sub, off, expr_width());
 	    sel->set_line(*this);
@@ -1115,11 +1146,11 @@ NetNet* NetESelect::synthesize(Design *des, NetScope*scope)
 * expressions to the B and A inputs. This way, when the select input
 * is one, the B input, which is the true expression, is selected.
 */
-NetNet* NetETernary::synthesize(Design *des, NetScope*scope)
+NetNet* NetETernary::synthesize(Design *des, NetScope*scope, NetExpr*root)
 {
-      NetNet*csig = cond_->synthesize(des, scope),
-            *tsig = true_val_->synthesize(des, scope),
-            *fsig = false_val_->synthesize(des, scope);
+      NetNet*csig = cond_->synthesize(des, scope, root),
+            *tsig = true_val_->synthesize(des, scope, root),
+            *fsig = false_val_->synthesize(des, scope, root);

      if (csig == 0 || tsig == 0 || fsig == 0) return 0;

@@ -1153,12 +1184,21 @@ NetNet* NetETernary::synthesize(Design *des, NetScope*scope)
      osig->data_type(expr_type());
      osig->local_flag(true);

-	/* Make sure both value operands are the right width. */
-      tsig = crop_to_width(des, pad_to_width(des, tsig, width), width);
-      fsig = crop_to_width(des, pad_to_width(des, fsig, width), width);
+	/* Make sure the types match. */
+      if (expr_type() == IVL_VT_REAL) {
+	    tsig = cast_to_real(des, scope, tsig);
+	    fsig = cast_to_real(des, scope, fsig);
+
+      }
+
+	/* Make sure both value operands are the right width. */
+      if (type_is_vectorable(expr_type())) {
+	    tsig = crop_to_width(des, pad_to_width(des, tsig, width, *this), width);
+	    fsig = crop_to_width(des, pad_to_width(des, fsig, width, *this), width);
+	    ivl_assert(*this, width == tsig->vector_width());
+	    ivl_assert(*this, width == fsig->vector_width());
+      }

-      assert(width == tsig->vector_width());
-      assert(width == fsig->vector_width());

      perm_string oname = csig->scope()->local_symbol();
      NetMux *mux = new NetMux(csig->scope(), oname, width,
@@ -1178,7 +1218,7 @@ NetNet* NetETernary::synthesize(Design *des, NetScope*scope)
 * a bit more work needs to be done. Return a temporary that represents
 * the selected word.
 */
-NetNet* NetESignal::synthesize(Design*des, NetScope*scope)
+NetNet* NetESignal::synthesize(Design*des, NetScope*scope, NetExpr*root)
 {
      if (word_ == 0)
 	    return net_;
@@ -1205,7 +1245,7 @@ NetNet* NetESignal::synthesize(Design*des, NetScope*scope)
 	    mux->set_line(*this);
 	    des->add_node(mux);

-	    NetNet*index_net = word_->synthesize(des, scope);
+	    NetNet*index_net = word_->synthesize(des, scope, root);
 	    connect(mux->pin_Address(), index_net->pin(0));

 	    connect(tmp->pin(0), mux->pin_Result());
@@ -1213,7 +1253,35 @@ NetNet* NetESignal::synthesize(Design*des, NetScope*scope)
      return tmp;
 }

-NetNet* NetESFunc::synthesize(Design*des, NetScope*scope)
+static NetEvWait* make_func_trigger(Design*des, NetScope*scope, NetExpr*root)
+{
+      NetEvWait*trigger = 0;
+
+      NexusSet*nset = root->nex_input(false);
+      if (nset && (nset->count() > 0)) {
+            NetEvent*ev = new NetEvent(scope->local_symbol());
+            ev->set_line(*root);
+
+            NetEvProbe*pr = new NetEvProbe(scope, scope->local_symbol(),
+                                           ev, NetEvProbe::ANYEDGE,
+                                           nset->count());
+            for (unsigned idx = 0 ;  idx < nset->count() ;  idx += 1)
+                  connect(nset[0][idx], pr->pin(idx));
+
+            des->add_node(pr);
+
+            scope->add_event(ev);
+
+            trigger = new NetEvWait(0);
+            trigger->set_line(*root);
+            trigger->add_event(ev);
+      }
+      delete nset;
+
+      return trigger;
+}  
+
+NetNet* NetESFunc::synthesize(Design*des, NetScope*scope, NetExpr*root)
 {

      const struct sfunc_return_type*def = lookup_sys_func(name_);
@@ -1233,8 +1301,13 @@ NetNet* NetESFunc::synthesize(Design*des, NetScope*scope)
 		 << name_ << " returns " << def->type << endl;
      }

+      NetEvWait*trigger = 0;
+      if (nparms_ == 0) {
+            trigger = make_func_trigger(des, scope, root);
+      }
+
      NetSysFunc*net = new NetSysFunc(scope, scope->local_symbol(),
-				      def, 1+nparms_);
+				      def, 1+nparms_, trigger);
      net->set_line(*this);
      des->add_node(net);

@@ -1249,7 +1322,7 @@ NetNet* NetESFunc::synthesize(Design*des, NetScope*scope)

      unsigned errors = 0;
      for (unsigned idx = 0 ;  idx < nparms_ ;  idx += 1) {
-	    NetNet*tmp = parms_[idx]->synthesize(des, scope);
+	    NetNet*tmp = parms_[idx]->synthesize(des, scope, root);
 	    if (tmp == 0) {
 		  cerr << get_fileline() << ": error: Unable to elaborate "
 		       << "argument " << idx << " of call to " << name_ <<
@@ -1267,14 +1340,14 @@ NetNet* NetESFunc::synthesize(Design*des, NetScope*scope)
      return osig;
 }

-NetNet* NetEUFunc::synthesize(Design*des, NetScope*scope)
+NetNet* NetEUFunc::synthesize(Design*des, NetScope*scope, NetExpr*root)
 {
      svector<NetNet*> eparms (parms_.count());

        /* Synthesize the arguments. */
      bool errors = false;
      for (unsigned idx = 0; idx < eparms.count(); idx += 1) {
-	    NetNet*tmp = parms_[idx]->synthesize(des, scope);
+	    NetNet*tmp = parms_[idx]->synthesize(des, scope, root);
 	    if (tmp == 0) {
 		  cerr << get_fileline() << ": error: Unable to synthesize "
 		          "port " << idx << " of call to "
@@ -1287,7 +1360,17 @@ NetNet* NetEUFunc::synthesize(Design*des, NetScope*scope)
      }
      if (errors) return 0;

-      NetUserFunc*net = new NetUserFunc(scope_, scope_->local_symbol(), func_);
+      NetEvWait*trigger = 0;
+      if (gn_strict_ca_eval_flag) {
+              /* Ideally we would only do this for functions that have hidden
+                 dependencies or side effects. Once constant functions are
+                 implemented, we may be able to reuse some code to achieve
+                 this. */
+            trigger = make_func_trigger(des, scope, root);
+      }
+
+      NetUserFunc*net = new NetUserFunc(scope_, scope_->local_symbol(), func_,
+                                        trigger);
      net->set_line(*this);
      des->add_node(net);

@@ -1302,7 +1385,7 @@ NetNet* NetEUFunc::synthesize(Design*des, NetScope*scope)
      NetFuncDef*def = func_->func_def();
      for (unsigned idx = 0; idx < eparms.count(); idx += 1) {
 	    NetNet*tmp = pad_to_width(des, eparms[idx],
-	                              def->port(idx)->vector_width());
+	                              def->port(idx)->vector_width(), *this);
 	    connect(net->pin(idx+1), tmp->pin(0));
      }

@@ -1,4 +1,4 @@
-.TH iverilog-vpi 1 "$Date: 2004/10/04 01:10:53 $" Version "$Date: 2004/10/04 01:10:53 $"
+.TH iverilog-vpi 1 "November 19th, 2008" "" "Version 0.9.devel"
 .SH NAME
 iverilog-vpi - Compile front end for VPI modules

@@ -129,7 +129,7 @@ iverilog(1), vvp(1),

 .SH COPYRIGHT
 .nf
-Copyright \(co  2002 Stephen Williams
+Copyright \(co  2002-2008 Stephen Williams

 This document can be freely redistributed according to the terms of the
 GNU General Public License version 2.0
@@ -17,17 +17,18 @@
 #    59 Temple Place - Suite 330
 #    Boston, MA 02111-1307, USA
 #
-#ident "$Id: iverilog-vpi.sh,v 1.17 2007/02/06 05:07:31 steve Exp $"

 # These are the variables used for compiling files
 CC=@IVCC@
 CXX=@IVCXX@
 CFLAGS="@PIC@ @IVCFLAGS@ -I@INCLUDEDIR@"

+SUFFIX=@SUFFIX@
+
 # These are used for linking...
 LD=$CC
 LDFLAGS="@SHARED@ -L@LIBDIR@"
-LDLIBS="-lveriuser -lvpi"
+LDLIBS="-lveriuser$SUFFIX -lvpi$SUFFIX"

 CCSRC=
 CXSRC=
@@ -101,7 +102,7 @@ do
 	 ;;

    --install-dir)
-	 echo "@LIBDIR@/ivl"
+	 echo "@LIBDIR@/ivl$SUFFIX"
 	 exit
 	 ;;
    esac
@@ -1,7 +1,12 @@
 EXPORTS

+ivl_branch_island
+ivl_branch_terminal
+
 ivl_design_const
 ivl_design_consts
+ivl_design_discipline
+ivl_design_disciplines
 ivl_design_flag
 ivl_design_process
 ivl_design_root
@@ -16,7 +21,9 @@ ivl_const_type
 ivl_const_width

 ivl_discipline_domain
+ivl_discipline_flow
 ivl_discipline_name
+ivl_discipline_potential

 ivl_event_any
 ivl_event_basename
@@ -30,12 +37,15 @@ ivl_event_scope

 ivl_expr_type
 ivl_expr_bits
+ivl_expr_branch
 ivl_expr_def
+ivl_expr_delay_val
 ivl_expr_dvalue
 ivl_expr_event
 ivl_expr_file
 ivl_expr_lineno
 ivl_expr_name
+ivl_expr_nature
 ivl_expr_opcode
 ivl_expr_oper1
 ivl_expr_oper2
@@ -99,6 +109,7 @@ ivl_lpm_sset_value
 ivl_lpm_string
 ivl_lpm_sync_clr
 ivl_lpm_sync_set
+ivl_lpm_trigger
 ivl_lpm_type
 ivl_lpm_width

@@ -108,12 +119,15 @@ ivl_lval_part_off
 ivl_lval_sig
 ivl_lval_width

+ivl_nature_name
+
 ivl_nexus_get_private
 ivl_nexus_name
 ivl_nexus_ptrs
 ivl_nexus_ptr
 ivl_nexus_set_private

+ivl_nexus_ptr_branch
 ivl_nexus_ptr_con
 ivl_nexus_ptr_drive0
 ivl_nexus_ptr_drive1
@@ -167,6 +181,7 @@ ivl_scope_time_units
 ivl_scope_type
 ivl_scope_tname

+ivl_signal_array_addr_swapped
 ivl_signal_array_base
 ivl_signal_array_count
 ivl_signal_attr
@@ -194,6 +209,7 @@ ivl_signal_width
 ivl_path_delay
 ivl_path_source

+ivl_process_analog
 ivl_process_attr_cnt
 ivl_process_attr_val
 ivl_process_file
@@ -219,6 +235,7 @@ ivl_stmt_delay_val
 ivl_stmt_events
 ivl_stmt_file
 ivl_stmt_lineno
+ivl_stmt_lexp
 ivl_stmt_lval
 ivl_stmt_lvals
 ivl_stmt_lwidth
@@ -16,9 +16,6 @@
 *    along with this program; if not, write to the Free Software
 *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
 */
-#ifdef HAVE_CVS_IDENT
-#ident "$Id: ivl_assert.h,v 1.1 2007/01/31 04:21:10 steve Exp $"
-#endif

 #ifndef __ivl_assert_h
 #define __ivl_assert_h
@@ -1,7 +1,7 @@
 #ifndef __ivl_target_H
 #define __ivl_target_H
 /*
- * Copyright (c) 2000-2008 Stephen Williams (steve@icarus.com)
+ * Copyright (c) 2000-2009 Stephen Williams (steve@icarus.com)
 *
 *    This source code is free software; you can redistribute it
 *    and/or modify it in source code form under the terms of the GNU
@@ -29,6 +29,9 @@
 #define _END_DECL
 #endif

+#ifndef __GNUC__
+# define __attribute__(x)
+#endif

 _BEGIN_DECL

@@ -60,6 +63,9 @@ _BEGIN_DECL
 *    This object represent an array that can be a memory or a net
 *    array. (They are the same from the perspective of ivl_target.h.)
 *
+ * ivl_branch_t
+ *    this object represents an analog branch.
+ *
 * ivl_design_t
 *    This object represents the entire elaborated design. Various
 *    global properties and methods are available from this.
@@ -149,6 +155,7 @@ _BEGIN_DECL
 * throughout the design.
 */
 typedef struct ivl_array_s    *ivl_array_t;
+typedef struct ivl_branch_s   *ivl_branch_t;
 typedef struct ivl_delaypath_s*ivl_delaypath_t;
 typedef struct ivl_design_s   *ivl_design_t;
 typedef struct ivl_discipline_s*ivl_discipline_t;
@@ -169,7 +176,7 @@ typedef struct ivl_process_s  *ivl_process_t;
 typedef struct ivl_scope_s    *ivl_scope_t;
 typedef struct ivl_signal_s   *ivl_signal_t;
 typedef struct ivl_switch_s   *ivl_switch_t;
-typedef struct ivl_memory_s   *ivl_memory_t; /* DEPRECATED */
+typedef struct ivl_memory_s   *ivl_memory_t; //XXXX __attribute__((deprecated));
 typedef struct ivl_statement_s*ivl_statement_t;

 /*
@@ -204,6 +211,7 @@ typedef enum ivl_expr_type_e {
      IVL_EX_BACCESS= 19,
      IVL_EX_BINARY = 2,
      IVL_EX_CONCAT = 3,
+      IVL_EX_DELAY = 20,
      IVL_EX_EVENT  = 17,
      IVL_EX_MEMORY = 4,
      IVL_EX_NUMBER = 5,
@@ -361,6 +369,7 @@ typedef enum ivl_statement_type_e {
      IVL_ST_CASEZ   = 7,
      IVL_ST_CASSIGN = 8,
      IVL_ST_CONDIT  = 9,
+      IVL_ST_CONTRIB = 27,
      IVL_ST_DEASSIGN = 10,
      IVL_ST_DELAY   = 11,
      IVL_ST_DELAYX  = 12,
@@ -415,6 +424,20 @@ struct ivl_attribute_s {
 };
 typedef const struct ivl_attribute_s*ivl_attribute_t;

+/* BRANCH
+ * Branches are analog constructs, a pair of terminals that is used in
+ * branch access functions. Terminal-1 is the reference node (The
+ * "ground") for the purposes of the access function that accesses it.
+ *
+ * SEMANTIC NOTES
+ * All the branches in an island are connected by terminals or by
+ * expressions. The island is the connection of branches that must be
+ * solved together.
+ */
+  /* extern ivl_scope_t ivl_branch_scope(ivl_branch_t obj); */
+extern ivl_nexus_t ivl_branch_terminal(ivl_branch_t obj, int idx);
+extern ivl_island_t ivl_branch_island(ivl_branch_t obj);
+
 /* DELAYPATH
 * Delaypath objects represent delay paths called out by a specify
 * block in the Verilog source file. The destination signal references
@@ -499,6 +522,9 @@ extern int         ivl_design_time_precision(ivl_design_t des);
 extern unsigned        ivl_design_consts(ivl_design_t des);
 extern ivl_net_const_t ivl_design_const(ivl_design_t, unsigned idx);

+extern unsigned         ivl_design_disciplines(ivl_design_t des);
+extern ivl_discipline_t ivl_design_discipline(ivl_design_t des, unsigned idx);
+
 /* LITERAL CONSTANTS
 * Literal constants are nodes with no input and a single constant
 * output. The form of the output depends on the type of the node.
@@ -572,6 +598,10 @@ extern double      ivl_const_real(ivl_net_const_t net);
 */
 extern const char*ivl_discipline_name(ivl_discipline_t net);
 extern ivl_dis_domain_t ivl_discipline_domain(ivl_discipline_t net);
+extern ivl_nature_t ivl_discipline_potential(ivl_discipline_t net);
+extern ivl_nature_t ivl_discipline_flow(ivl_discipline_t net);
+
+extern const char* ivl_nature_name(ivl_nature_t net);

 /* EVENTS
 *
@@ -716,12 +746,18 @@ extern unsigned ivl_expr_lineno(ivl_expr_t net);

  /* IVL_EX_NUMBER */
 extern const char* ivl_expr_bits(ivl_expr_t net);
+  /* IVL_EX_BACCESS */
+extern ivl_branch_t ivl_expr_branch(ivl_expr_t net);
  /* IVL_EX_UFUNC */
 extern ivl_scope_t ivl_expr_def(ivl_expr_t net);
+  /* IVL_EX_DELAY */
+extern uint64_t ivl_expr_delay_val(ivl_expr_t net);
  /* IVL_EX_REALNUM */
 extern double ivl_expr_dvalue(ivl_expr_t net);
  /* IVL_EX_SIGNAL, IVL_EX_SFUNC, IVL_EX_VARIABLE */
 extern const char* ivl_expr_name(ivl_expr_t net);
+  /* IVL_EX_BACCESS */
+extern ivl_nature_t ivl_expr_nature(ivl_expr_t net);
  /* IVL_EX_BINARY IVL_EX_UNARY */
 extern char        ivl_expr_opcode(ivl_expr_t net);
  /* IVL_EX_BINARY  IVL_EX_UNARY, IVL_EX_MEMORY IVL_EX_TERNARY */
@@ -994,6 +1030,10 @@ extern unsigned ivl_lpm_lineno(ivl_lpm_t net);
 *    often the number of inputs per out, i.e., the number of inputs
 *    per bit for a MUX.
 *
+ * ivl_lpm_trigger
+ *    SFUNC and UFUNC devices may have a trigger that forces the
+ *    function output to be re-evaluated.
+ *
 * SEMANTIC NOTES
 *
 * - Concatenation (IVL_LPM_CONCAT)
@@ -1156,6 +1196,11 @@ extern unsigned ivl_lpm_lineno(ivl_lpm_t net);
 * function (i.e. "$display") that was found in the source code. The
 * compiler does little checking of that name.
 *
+ * The ivl_lpm_trigger function retrieves the trigger event that
+ * indicates when the system function needs to be re-evaluated. If
+ * there is no trigger event, the system function only needs to be
+ * re-evaluated when a change is detected on its input ports.
+ *
 * - User Function Call (IVL_LPM_UFUNC)
 * This device is special as it represents a call to a user defined
 * function (behavioral code) within a netlist. The inputs to the
@@ -1174,6 +1219,11 @@ extern unsigned ivl_lpm_lineno(ivl_lpm_t net);
 * ports. The ivl_lpm_size function returns the number of inputs for
 * the device, and the ivl_lpm_data() function index argument selects
 * the port to retrieve. Each port is sized independently.
+ *
+ * The ivl_lpm_trigger function retrieves the trigger event that
+ * indicates when the user function needs to be re-evaluated. If
+ * there is no trigger event, the user function only needs to be
+ * re-evaluated when a change is detected on its input ports.
 */

 extern const char*    ivl_lpm_name(ivl_lpm_t net); /* (Obsolete) */
@@ -1183,6 +1233,7 @@ extern ivl_scope_t    ivl_lpm_scope(ivl_lpm_t net);
 extern int            ivl_lpm_signed(ivl_lpm_t net);
 extern ivl_lpm_type_t ivl_lpm_type(ivl_lpm_t net);
 extern unsigned       ivl_lpm_width(ivl_lpm_t net);
+extern ivl_event_t    ivl_lpm_trigger(ivl_lpm_t net);

  /* IVL_LPM_FF */
 extern ivl_nexus_t ivl_lpm_async_clr(ivl_lpm_t net);
@@ -1369,7 +1420,7 @@ extern ivl_signal_t ivl_lval_sig(ivl_lval_t net);
 * width. The compiler will insure this is so.
 */

-extern const char*     ivl_nexus_name(ivl_nexus_t net);
+extern const char*     ivl_nexus_name(ivl_nexus_t net) __attribute__((deprecated));
 extern unsigned        ivl_nexus_ptrs(ivl_nexus_t net);
 extern ivl_nexus_ptr_t ivl_nexus_ptr(ivl_nexus_t net, unsigned idx);

@@ -1380,6 +1431,7 @@ extern void* ivl_nexus_get_private(ivl_nexus_t net);
 extern ivl_drive_t  ivl_nexus_ptr_drive0(ivl_nexus_ptr_t net);
 extern ivl_drive_t  ivl_nexus_ptr_drive1(ivl_nexus_ptr_t net);
 extern unsigned     ivl_nexus_ptr_pin(ivl_nexus_ptr_t net);
+extern ivl_branch_t ivl_nexus_ptr_branch(ivl_nexus_ptr_t net);
 extern ivl_net_const_t ivl_nexus_ptr_con(ivl_nexus_ptr_t net);
 extern ivl_net_logic_t ivl_nexus_ptr_log(ivl_nexus_ptr_t net);
 extern ivl_lpm_t    ivl_nexus_ptr_lpm(ivl_nexus_ptr_t net);
@@ -1602,10 +1654,12 @@ extern int          ivl_scope_time_units(ivl_scope_t net);
 *
 * ivl_signal_array_base
 * ivl_signal_array_count
+ * ivl_signal_array_addr_swapped
 *    The signal may be arrayed. If so, the array_count is >1. Each
 *    word of the array has its own nexus. The array_base is the
- *    address is the Verilog source for the canonical zero word. This
- *    may be negative, positive or zero.
+ *    address in the Verilog source for the canonical zero word. This
+ *    may be negative, positive or zero. The array addresses may be
+ *    reversed/swapped.
 *
 *    Note that arraying of the signal into words is distinct from the
 *    vectors. The width of a signal is the width of a WORD.
@@ -1684,6 +1738,7 @@ extern int          ivl_scope_time_units(ivl_scope_t net);
 extern ivl_nexus_t ivl_signal_nex(ivl_signal_t net, unsigned word);
 extern int         ivl_signal_array_base(ivl_signal_t net);
 extern unsigned    ivl_signal_array_count(ivl_signal_t net);
+extern unsigned    ivl_signal_array_addr_swapped(ivl_signal_t net);
 extern unsigned    ivl_signal_dimensions(ivl_signal_t net);
 extern ivl_discipline_t ivl_signal_discipline(ivl_signal_t net);
 extern int         ivl_signal_msb(ivl_signal_t net);
@@ -1716,12 +1771,16 @@ extern ivl_attribute_t ivl_signal_attr_val(ivl_signal_t net, unsigned idx);
 * is translated into a type and a single statement. (The statement
 * may be a compound statement.)
 *
- * The ivl_process_type function gets the type of the process,
- * an "initial" or "always" statement.
+ * ivl_process_type
+ * ivl_process_analog
+ *    The ivl_process_type function returns the type of the process,
+ *    an "initial" or "always" statement. The ivl_process_analog
+ *    returns true if the process is analog.
 *
- * A process is placed in a scope. The statement within the process
- * operates within the scope of the process unless there are calls
- * outside the scope.
+ * ivl_process_scope
+ *    A process is placed in a scope. The statement within the process
+ *    operates within the scope of the process unless there are calls
+ *    outside the scope.
 *
 * The ivl_process_stmt function gets the statement that forms the
 * process. See the statement related functions for how to manipulate
@@ -1731,6 +1790,7 @@ extern ivl_attribute_t ivl_signal_attr_val(ivl_signal_t net, unsigned idx);
 * attr_val methods return those attributes.
 */
 extern ivl_process_type_t ivl_process_type(ivl_process_t net);
+extern int ivl_process_analog(ivl_process_t net);

 extern ivl_scope_t ivl_process_scope(ivl_process_t net);

@@ -1826,6 +1886,12 @@ extern unsigned ivl_stmt_lineno(ivl_statement_t net);
 * that constant value. If the expression is non-constant, the code
 * generator is supposed to know what to do about that, too.
 *
+ * - IVL_ST_CONTRIB
+ * This is an analog contribution statement. The ivl_stmt_lexp
+ * function returns the l-value expression which is guaranteed to be a
+ * branch access expression. The ivl_stmt_rval returns the r-value
+ * expression for the assignment.
+ *
 * - IVL_ST_DELAY, IVL_ST_DELAYX
 * These statement types are delay statements. They are a way to
 * attach a delay to a statement. The ivl_stmt_sub_stmt() function
@@ -1891,6 +1957,8 @@ extern uint64_t ivl_stmt_delay_val(ivl_statement_t net);
  /* IVL_ST_WAIT IVL_ST_TRIGGER */
 extern unsigned    ivl_stmt_nevent(ivl_statement_t net);
 extern ivl_event_t ivl_stmt_events(ivl_statement_t net, unsigned idx);
+  /* IVL_ST_CONTRIB */
+extern ivl_expr_t ivl_stmt_lexp(ivl_statement_t net);
  /* IVL_ST_ASSIGN IVL_ST_ASSIGN_NB IVL_ST_CASSIGN IVL_ST_DEASSIGN
     IVL_ST_FORCE IVL_ST_RELEASE */
 extern ivl_lval_t ivl_stmt_lval(ivl_statement_t net, unsigned idx);
@@ -1905,7 +1973,8 @@ extern const char* ivl_stmt_name(ivl_statement_t net);
 extern ivl_expr_t ivl_stmt_parm(ivl_statement_t net, unsigned idx);
  /* IVL_ST_STASK */
 extern unsigned ivl_stmt_parm_count(ivl_statement_t net);
-  /* IVL_ST_ASSIGN IVL_ST_ASSIGN_NB IVL_ST_CASSIGN IVL_ST_FORCE */
+  /* IVL_ST_ASSIGN IVL_ST_ASSIGN_NB IVL_ST_CASSIGN IVL_ST_CONTRIB
+     IVL_ST_FORCE */
 extern ivl_expr_t ivl_stmt_rval(ivl_statement_t net);
  /* IVL_ST_DELAY, IVL_ST_DELAYX, IVL_ST_FOREVER, IVL_ST_REPEAT
     IVL_ST_WAIT, IVL_ST_WHILE */
@@ -1,5 +1,5 @@
 #ifndef __ivl_target_priv_H
-#define __ivl_target_H
+#define __ivl_target_priv_H
 /*
 * Copyright (c) 2008 Stephen Williams (steve@icarus.com)
 *
@@ -19,26 +19,64 @@
 *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
 */

+# include  "ivl_target.h"
 # include  <inttypes.h>
+# include  <vector>
+# include  <valarray>

 /*
-* This deader has declarations related to the ivl_target.h API that
+* This header has declarations related to the ivl_target.h API that
 * are not to be exported outside of the core via the ivl_target.h
 * interface.
+*
+* (NOTE: A lot of similar definitions exist in the t-dll.h header
+* file. That is a legacy from an earlier time before the
+* ivl_target_priv.h header file was started, and those definitions
+* should gradually be moved over to this header file.)
 */

+/*
+ * This is the root of a design, from the ivl_target point of few. The
+ * ivl_target API uses this as the root for getting at everything else
+ * in the design.
+ */
+struct ivl_design_s {
+
+      int time_precision;
+
+      ivl_process_t threads_;
+
+      ivl_scope_t *roots_;
+      unsigned nroots_;
+
+	// Keep an array of constants objects.
+      std::valarray<ivl_net_const_t> consts;
+
+	// Keep a handy array of all of the disciplines in the design.
+      std::valarray<ivl_discipline_t> disciplines;
+
+      const class Design*self;
+};
+
+/*
+ * A branch is a pair of terminals. The elaborator assures that the
+ * terminals have compatible disciplines.
+ */
+struct ivl_branch_s {
+      ivl_nexus_t pins[2];
+      ivl_island_t island;
+};
+
 /*
 * Information about islands. Connected branches within a net are
 * collected into islands. Branches that are purely ddiscrete do not
 * have disciplines and do not belong to islands.
 */

-class discipline_t;
-
 struct ivl_island_s {
-      discipline_t*discipline;
+      ivl_discipline_t discipline;
 	// user accessible flags. They are initially false, always.
-      vector<bool> flags;
+      std::vector<bool> flags;
 };

 #endif
@@ -1,3 +0,0 @@
-lexor.c
-Makefile
-ivlpp
@@ -18,12 +18,9 @@
 #    59 Temple Place - Suite 330
 #    Boston, MA 02111-1307, USA
 #
-#ident "$Id: Makefile.in,v 1.18 2006/10/30 22:45:37 steve Exp $"
-#
-#
 SHELL = /bin/sh

-VERSION = 0.0
+suffix = @install_suffix@

 prefix = @prefix@
 exec_prefix = @exec_prefix@
@@ -40,17 +37,22 @@ INSTALL = @INSTALL@
 INSTALL_PROGRAM = @INSTALL_PROGRAM@
 INSTALL_DATA = @INSTALL_DATA@

-CPPFLAGS = @ident_support@ -I. -I.. -I$(srcdir)/.. -I$(srcdir) -DVERSION='"$(VERSION)"' @CPPFLAGS@ @DEFS@
+CPPFLAGS = -I. -I.. -I$(srcdir)/.. -I$(srcdir) @CPPFLAGS@ @DEFS@
 CFLAGS = -Wall @CFLAGS@
 LDFLAGS = @LDFLAGS@

 all: ivlpp@EXEEXT@

+check: all
+
 clean:
 	rm -f *.o lexor.c ivlpp@EXEEXT@

 distclean: clean
-	rm -f Makefile
+	rm -f Makefile config.log
+
+Makefile: $(srcdir)/Makefile.in ../config.status
+	../config.status --file=$@

 O = main.o lexor.o

@@ -60,16 +62,16 @@ ivlpp@EXEEXT@: $O
 lexor.c: lexor.lex
 	flex -olexor.c $(srcdir)/lexor.lex

-install: all installdirs $(libdir)/ivl/ivlpp@EXEEXT@
+install: all installdirs $(libdir)/ivl$(suffix)/ivlpp@EXEEXT@

-$(libdir)/ivl/ivlpp@EXEEXT@: ivlpp@EXEEXT@
-	$(INSTALL_PROGRAM) ./ivlpp@EXEEXT@ $(DESTDIR)$(libdir)/ivl/ivlpp@EXEEXT@
+$(libdir)/ivl$(suffix)/ivlpp@EXEEXT@: ivlpp@EXEEXT@
+	$(INSTALL_PROGRAM) ./ivlpp@EXEEXT@ "$(DESTDIR)$(libdir)/ivl$(suffix)/ivlpp@EXEEXT@"

-installdirs: ../mkinstalldirs
-	$(srcdir)/../mkinstalldirs $(DESTDIR)$(libdir)/ivl
+installdirs: $(srcdir)/../mkinstalldirs
+	$(srcdir)/../mkinstalldirs "$(DESTDIR)$(libdir)/ivl$(suffix)"

 uninstall:
-	rm -f $(DESTDIR)$(libdir)/ivl/ivlpp@EXEEXT@
+	rm -f "$(DESTDIR)$(libdir)/ivl$(suffix)/ivlpp@EXEEXT@"

 lexor.o: lexor.c globals.h
-main.o: main.c globals.h
+main.o: main.c globals.h ../version.h
@@ -1,7 +1,7 @@
 #ifndef __globals_H
 #define __globals_H
 /*
- * Copyright (c) 1999-2008 Stephen Williams (steve@icarus.com)
+ * Copyright (c) 1999-2009 Stephen Williams (steve@icarus.com)
 *
 *    This source code is free software; you can redistribute it
 *    and/or modify it in source code form under the terms of the GNU
@@ -34,6 +34,8 @@ extern void dump_precompiled_defines(FILE*out);
 extern char**include_dir;
 extern unsigned include_cnt;

+extern int relative_include;
+
 /* This flag is true if #line directives are to be generated. */
 extern int line_direct_flag;

@@ -1,6 +1,6 @@
 %{
 /*
- * Copyright (c) 1999-2008 Stephen Williams ([email protected])
+ * Copyright (c) 1999-2009 Stephen Williams ([email protected])
 *
 *    This source code is free software; you can redistribute it
 *    and/or modify it in source code form under the terms of the GNU
@@ -1422,8 +1422,7 @@ static void output_init()

 static void include_filename()
 {
-    if(standby)
-    {
+    if(standby) {
        emit_pathline(istack);
        fprintf
        (
@@ -1443,14 +1442,11 @@ static void include_filename()
 static void do_include()
 {
    /* standby is defined by include_filename() */
-    if (standby->path[0] == '/')
-    {
+    if (standby->path[0] == '/') {
        if ((standby->file = fopen(standby->path, "r")))
            goto code_that_switches_buffers;
-    }
-    else
-    {
-        unsigned idx, start = 0;
+    } else {
+        unsigned idx, start = 1;
        char path[4096];
        char *cp;

@@ -1458,25 +1454,18 @@ static void do_include()
        strcpy(path, istack->path);
        cp = strrchr(path, '/');

-        if (cp == 0)
-            start = 1;  /* A base file so already in [1] */
-        else
-        {
+        /* I may need the relative path for a planned warning even when
+         * we are not in relative mode, so for now keep it around. */
+        if (cp != 0) {
            *cp = '\0';
-
-            /* We do not need a strdup here since the path is read before
-             * it is overridden. If the search order is changed add a
-             * strdup here and a free below.
-             */
-            include_dir[0] = path;
+            include_dir[0] = strdup(path);
+            if (relative_include) start = 0;
        }

-        for (idx = start ;  idx < include_cnt ;  idx += 1)
-        {
+        for (idx = start ;  idx < include_cnt ;  idx += 1) {
            sprintf(path, "%s/%s", include_dir[idx], standby->path);

-            if ((standby->file = fopen(path, "r")))
-            {
+            if ((standby->file = fopen(path, "r"))) {
                /* Free the original path before we overwrite it. */
                free(standby->path);
                standby->path = strdup(path);
@@ -1491,6 +1480,7 @@ static void do_include()
                                    code_that_switches_buffers:

    /* Clear the current files path from the search list. */
+    free(include_dir[0]);
    include_dir[0] = 0;

    if(depend_file)
@@ -1816,4 +1806,5 @@ void destroy_lexor()
 #     endif
 #   endif
 # endif
+    free(def_buf);
 }
@@ -1,5 +1,5 @@
 const char COPYRIGHT[] =
-          "Copyright (c) 1999-2008 Stephen Williams ([email protected])";
+          "Copyright (c) 1999-2009 Stephen Williams ([email protected])";
 /*
 *    This source code is free software; you can redistribute it
 *    and/or modify it in source code form under the terms of the GNU
@@ -31,9 +31,9 @@ const char NOTICE[] =
 "  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\n"
 "  GNU General Public License for more details.\n"
 "\n"
-"  You should have received a copy of the GNU General Public License\n"
-"  along with this program; if not, write to the Free Software\n"
-"  Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA\n"
+"  You should have received a copy of the GNU General Public License along\n"
+"  with this program; if not, write to the Free Software Foundation, Inc.,\n"
+"  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.\n"
 ;

 # include  <stdio.h>
@@ -83,6 +83,8 @@ void add_source_file(const char*name)
 char**include_dir = 0;
 unsigned include_cnt = 0;

+int relative_include = 0;
+
 int line_direct_flag = 0;

 unsigned error_count = 0;
@@ -151,6 +153,13 @@ static int flist_read_flags(const char*path)
 			dep_path = strdup(arg);
 		  }

+	    } else if (strcmp(cp,"relative include") == 0) {
+		  if (strcmp(arg, "true") == 0) {
+			relative_include = 1;
+		  } else {
+			relative_include = 0;
+		  }
+
 	    } else {
 		  fprintf(stderr, "%s: Invalid keyword %s\n", path, cp);
 	    }
@@ -289,7 +298,7 @@ int main(int argc, char*argv[])
 	  case 'v':
 	    fprintf(stderr, "Icarus Verilog Preprocessor version "
 		    VERSION " (" VERSION_TAG ")\n\n");
-	    fprintf(stderr, "%s\n", COPYRIGHT);
+	    fprintf(stderr, "%s\n\n", COPYRIGHT);
 	    fputs(NOTICE, stderr);
 	    break;

@@ -354,7 +363,7 @@ int main(int argc, char*argv[])
      }

      if(dep_path) {
-	      depend_file = fopen(dep_path, "w");
+	      depend_file = fopen(dep_path, "a");
 	      if (depend_file == 0) {
 		  perror(dep_path);
 		  exit(1);
@@ -4,7 +4,7 @@

 %{
 /*
- * Copyright (c) 1998-2008 Stephen Williams ([email protected])
+ * Copyright (c) 1998-2009 Stephen Williams ([email protected])
 *
 *    This source code is free software; you can redistribute it
 *    and/or modify it in source code form under the terms of the GNU
@@ -168,12 +168,12 @@ S [afpnumkKMGT]
 <CSTRING>\\\\ { yymore(); /* Catch \\, which is a \ escaping itself */ }
 <CSTRING>\\\" { yymore(); /* Catch \", which is an escaped quote */ }
 <CSTRING>\n   { BEGIN(0);
-                yylval.text = strdup(yytext);
+                yylval.text = strdupnew(yytext);
 		VLerror(yylloc, "Missing close quote of string.");
 		yylloc.first_line += 1;
 		return STRING; }
 <CSTRING>\"   { BEGIN(0);
-                yylval.text = strdup(yytext);
+                yylval.text = strdupnew(yytext);
 		yylval.text[strlen(yytext)-1] = 0;
 		return STRING; }
 <CSTRING>.    { yymore(); }
@@ -17,10 +17,14 @@ access,		GN_KEYWORDS_VAMS_2_3,	K_access
 acos,		GN_KEYWORDS_VAMS_2_3,	K_acos
 acosh,		GN_KEYWORDS_VAMS_2_3,	K_acosh
 always,		GN_KEYWORDS_1364_1995,	K_always
+always_comb,	GN_KEYWORDS_1800_2005,	K_always_comb
+always_ff,		GN_KEYWORDS_1800_2005,	K_always_ff
+always_latch,	GN_KEYWORDS_1800_2005,	K_always_latch
 analog,		GN_KEYWORDS_VAMS_2_3,	K_analog
 and,		GN_KEYWORDS_1364_1995,	K_and
 asin,		GN_KEYWORDS_VAMS_2_3,	K_asin
 asinh,		GN_KEYWORDS_VAMS_2_3,	K_asinh
+assert,		GN_KEYWORDS_1800_2005,	K_assert
 assign,		GN_KEYWORDS_1364_1995,	K_assign
 atan,		GN_KEYWORDS_VAMS_2_3,	K_atan
 atan2,		GN_KEYWORDS_VAMS_2_3,	K_atan2
@@ -18,19 +18,7 @@
 *    along with this program; if not, write to the Free Software
 *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
 */
-#ifdef HAVE_CVS_IDENT
-#ident "$Id: lexor_keyword.h,v 1.2 2002/08/12 01:34:59 steve Exp $"
-#endif

 extern int lexor_keyword_code (const char*str, unsigned len);

-/*
- * $Log: lexor_keyword.h,v $
- * Revision 1.2  2002/08/12 01:34:59  steve
- *  conditional ident string using autoconfig.
- *
- * Revision 1.1  2000/03/12 17:09:41  steve
- *  Support localparam.
- *
- */
 #endif
@@ -1,6 +0,0 @@
-Makefile
-configure
-config.*
-autom4te.cache
-dep
-bin32
@@ -16,11 +16,9 @@
 #    59 Temple Place - Suite 330
 #    Boston, MA 02111-1307, USA
 #
-#ident "$Id: Makefile.in,v 1.36 2007/02/06 05:07:32 steve Exp $"
-#
-#
 SHELL = /bin/sh

+suffix = @install_suffix@

 prefix = @prefix@
 exec_prefix = @exec_prefix@
@@ -37,7 +35,7 @@ INSTALL = @INSTALL@
 INSTALL_PROGRAM = @INSTALL_PROGRAM@
 INSTALL_DATA = @INSTALL_DATA@

-CPPFLAGS = @ident_support@ -I. -I.. -I$(srcdir) -I$(srcdir)/.. @CPPFLAGS@ @DEFS@ @PICFLAG@
+CPPFLAGS = -I. -I.. -I$(srcdir) -I$(srcdir)/.. @CPPFLAGS@ @DEFS@ @PICFLAG@
 CFLAGS = -Wall @CFLAGS@
 LDFLAGS = @LDFLAGS@
 RANLIB = @RANLIB@
@@ -61,8 +59,11 @@ all: dep libveriuser.a $(ALL32)

 check: all

-Makefile: Makefile.in config.status
-	./config.status
+Makefile: $(srcdir)/Makefile.in ../config.status
+	../config.status --file=$@
+
+config.h: $(srcdir)/config.h.in ../config.status
+	../config.status --header=$@

 libveriuser.o: $O
 	$(LD) -r -o $@ $O
@@ -84,17 +85,17 @@ clean:
 	rm -rf *.o dep libveriuser.a libveriuser.o bin32

 distclean: clean
-	rm -f Makefile config.status config.log config.cache config.h
+	rm -f Makefile config.log config.h

-install:: all installdirs $(libdir)/libveriuser.a $(INSTALL32)
+install:: all installdirs $(libdir)/libveriuser$(suffix).a $(INSTALL32)

-$(libdir)/libveriuser.a: ./libveriuser.a
-	$(INSTALL_DATA) ./libveriuser.a $(DESTDIR)$(libdir)/libveriuser.a
+$(libdir)/libveriuser$(suffix).a: ./libveriuser.a
+	$(INSTALL_DATA) ./libveriuser.a "$(DESTDIR)$(libdir)/libveriuser$(suffix).a"

-installdirs: mkinstalldirs
-	$(srcdir)/mkinstalldirs $(DESTDIR)$(includedir) $(DESTDIR)$(libdir)
+installdirs: $(srcdir)/../mkinstalldirs
+	$(srcdir)/../mkinstalldirs "$(DESTDIR)$(libdir)"

 uninstall::
-	rm -f $(DESTDIR)$(libdir)/libveriuser.a
+	rm -f "$(DESTDIR)$(libdir)/libveriuser$(suffix).a"

 -include $(patsubst %.o, dep/%.d, $O)
@@ -18,9 +18,6 @@
 *    along with this program; if not, write to the Free Software
 *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
 */
-#ifdef HAVE_CVS_IDENT
-#ident "$Id: config.h.in,v 1.2 2003/08/26 16:26:02 steve Exp $"
-#endif

 # define SIZEOF_UNSIGNED_LONG_LONG 0
 # define SIZEOF_UNSIGNED_LONG 0
@@ -40,19 +37,4 @@ typedef unsigned long ivl_u64_t;
 # endif
 #endif

-/*
- * $Log: config.h.in,v $
- * Revision 1.2  2003/08/26 16:26:02  steve
- *  ifdef idents correctly.
- *
- * Revision 1.1  2003/06/04 01:56:20  steve
- * 1) Adds configure logic to clean up compiler warnings
- * 2) adds acc_compare_handle, acc_fetch_range, acc_next_scope and
- *    tf_isetrealdelay, acc_handle_scope
- * 3) makes acc_next reentrant
- * 4) adds basic vpiWire type support
- * 5) fills in some acc_object_of_type() and acc_fetch_{full}type()
- * 6) add vpiLeftRange/RigthRange to signals
- *
- */
 #endif
@@ -1,28 +0,0 @@
-AC_INIT(Makefile.in)
-AC_CONFIG_HEADER(config.h)
-
-AC_CANONICAL_HOST
-
-AC_PROG_CC
-AC_PROG_INSTALL
-AC_PROG_RANLIB
-
-AC_EXEEXT
-AX_CPP_IDENT
-
-AC_CHECK_HEADERS(malloc.h)
-
-AC_CHECK_SIZEOF(unsigned long long)
-AC_CHECK_SIZEOF(unsigned long)
-AC_CHECK_SIZEOF(unsigned)
-
-# may modify CPPFLAGS and CFLAGS
-AX_CPP_PRECOMP
-
-# Compiler option for position independent code, needed when making shared objects.
-AX_C_PICFLAG
-
-AC_SUBST(EXEEXT)
-AC_SUBST(EXTRALIBS)
-
-AC_OUTPUT(Makefile)
@@ -1,40 +0,0 @@
-#! /bin/sh
-# mkinstalldirs --- make directory hierarchy
-# Author: Noah Friedman <[email protected]>
-# Created: 1993-05-16
-# Public domain
-
-# $Id: mkinstalldirs,v 1.1 2002/05/19 05:21:00 steve Exp $
-
-errstatus=0
-
-for file
-do
-   set fnord `echo ":$file" | sed -ne 's/^:\//#/;s/^://;s/\// /g;s/^#/\//;p'`
-   shift
-
-   pathcomp=
-   for d
-   do
-     pathcomp="$pathcomp$d"
-     case "$pathcomp" in
-       -* ) pathcomp=./$pathcomp ;;
-     esac
-
-     if test ! -d "$pathcomp"; then
-        echo "mkdir $pathcomp" 1>&2
-
-        mkdir "$pathcomp" || lasterr=$?
-
-        if test ! -d "$pathcomp"; then
-  	  errstatus=$lasterr
-        fi
-     fi
-
-     pathcomp="$pathcomp/"
-   done
-done
-
-exit $errstatus
-
-# mkinstalldirs ends here
@@ -18,9 +18,6 @@
 *    along with this program; if not, write to the Free Software
 *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
 */
-#ifdef HAVE_CVS_IDENT
-#ident "$Id: priv.h,v 1.2 2003/05/18 00:16:35 steve Exp $"
-#endif

 # include  <stdio.h>

@@ -36,21 +33,4 @@ extern char* __acc_newstring(const char*txt);
 */
 FILE* pli_trace;

-/*
- * $Log: priv.h,v $
- * Revision 1.2  2003/05/18 00:16:35  steve
- *  Add PLI_TRACE tracing of PLI1 modules.
- *
- *  Add tf_isetdelay and friends, and add
- *  callback return values for acc_vcl support.
- *
- * Revision 1.1  2003/02/17 06:39:47  steve
- *  Add at least minimal implementations for several
- *  acc_ functions. Add support for standard ACC
- *  string handling.
- *
- *  Add the _pli_types.h header file to carry the
- *  IEEE1364-2001 standard PLI type declarations.
- *
- */
 #endif
@@ -1,6 +1,6 @@
 /* vi:sw=6
- * Copyright (c) 2002 Michael Ruff (mruff at chiaro.com)
- *                    Michael Runyan (mrunyan at chiaro.com)
+ * Copyright (c) 2002-2009 Michael Ruff (mruff at chiaro.com)
+ *                         Michael Runyan (mrunyan at chiaro.com)
 *
 *    This source code is free software; you can redistribute it
 *    and/or modify it in source code form under the terms of the GNU
@@ -17,9 +17,6 @@
 *    along with this program; if not, write to the Free Software
 *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
 */
-#ifdef HAVE_CVS_IDENT
-#ident "$Id: veriusertfs.c,v 1.17 2007/05/08 22:01:26 steve Exp $"
-#endif

 /*
 * Contains the routines required to implement veriusertfs routines
@@ -48,12 +45,34 @@ static PLI_INT32 compiletf(char *);
 static PLI_INT32 calltf(char *);
 static PLI_INT32 callback(p_cb_data);

+/*
+ * Keep a pointer to the user data so that it can be freed when the
+ * simulation is finished.
+ */
+static p_pli_data* udata_store = 0;
+static unsigned udata_count = 0;
+
+static PLI_INT32 sys_end_of_simulation(p_cb_data cb_data)
+{
+      unsigned idx;
+
+      for (idx = 0; idx < udata_count; idx += 1) {
+        free(udata_store[idx]);
+      }
+      free(udata_store);
+      udata_store = 0;
+      udata_count = 0;
+
+      return 0;
+}
+
 /*
 * Register veriusertfs routines/wrappers. Iterate over the tfcell
 * array, registering each function.
 */
 void veriusertfs_register_table(p_tfcell vtable)
 {
+      static int need_EOS_cb = 1;
      const char*path;
      p_tfcell tf;
      s_vpi_systf_data tf_data;
@@ -86,6 +105,21 @@ void veriusertfs_register_table(p_tfcell vtable)
 	    /* squirrel away veriusertfs in persistent user_data */
 	    data = calloc(1, sizeof(s_pli_data));
 	    assert(data != NULL);
+	    udata_count += 1;
+	    udata_store = (p_pli_data*)realloc(udata_store,
+	                  udata_count*sizeof(p_pli_data*));
+	    udata_store[udata_count-1] = data;
+	    if (need_EOS_cb) {
+		  s_cb_data cb_data;
+
+		  cb_data.reason = cbEndOfSimulation;
+		  cb_data.time = 0;
+		  cb_data.cb_rtn = sys_end_of_simulation;
+		  cb_data.user_data = "system";
+		  vpi_register_cb(&cb_data);
+
+		  need_EOS_cb = 0;
+	    }
 	    data->tf = tf;

 	      /* Build a VPI system task/function structure, and point
@@ -392,4 +426,3 @@ PLI_INT32 tf_setrealdelay(double dly)
 {
      return tf_isetrealdelay(dly, tf_getinstance());
 }
-
@@ -16,9 +16,6 @@
 *    along with this program; if not, write to the Free Software
 *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
 */
-#ifdef HAVE_CVS_IDENT
-#ident "$Id: link_const.cc,v 1.18 2007/04/14 03:10:51 steve Exp $"
-#endif

 # include "config.h"

@@ -175,80 +172,3 @@ verinum::V Nexus::driven_value() const
      return val;
 }

-/*
- * $Log: link_const.cc,v $
- * Revision 1.18  2007/04/14 03:10:51  steve
- *  Properly account for tri0 connected to otherwise open mux input.
- *
- * Revision 1.17  2004/10/04 01:10:53  steve
- *  Clean up spurious trailing white space.
- *
- * Revision 1.16  2003/06/21 01:21:43  steve
- *  Harmless fixup of warnings.
- *
- * Revision 1.15  2002/08/12 01:34:59  steve
- *  conditional ident string using autoconfig.
- *
- * Revision 1.14  2002/06/25 01:33:22  steve
- *  Cache calculated driven value.
- *
- * Revision 1.13  2002/06/24 01:49:39  steve
- *  Make link_drive_constant cache its results in
- *  the Nexus, to improve cprop performance.
- *
- * Revision 1.12  2002/06/19 04:18:46  steve
- *  Shuffle link_drivers_constant for speed.
- *
- * Revision 1.11  2001/08/25 23:50:03  steve
- *  Change the NetAssign_ class to refer to the signal
- *  instead of link into the netlist. This is faster
- *  and uses less space. Make the NetAssignNB carry
- *  the delays instead of the NetAssign_ lval objects.
- *
- *  Change the vvp code generator to support multiple
- *  l-values, i.e. concatenations of part selects.
- *
- * Revision 1.10  2001/07/25 03:10:49  steve
- *  Create a config.h.in file to hold all the config
- *  junk, and support gcc 3.0. (Stephan Boettcher)
- *
- * Revision 1.9  2001/07/07 03:01:37  steve
- *  Detect and make available to t-dll the right shift.
- *
- * Revision 1.8  2001/02/16 03:27:07  steve
- *  links to root inputs are not constant.
- *
- * Revision 1.7  2000/11/20 01:41:12  steve
- *  Whoops, return the calculated constant value rom driven_value.
- *
- * Revision 1.6  2000/11/20 00:58:40  steve
- *  Add support for supply nets (PR#17)
- *
- * Revision 1.5  2000/07/14 06:12:57  steve
- *  Move inital value handling from NetNet to Nexus
- *  objects. This allows better propogation of inital
- *  values.
- *
- *  Clean up constant propagation  a bit to account
- *  for regs that are not really values.
- *
- * Revision 1.4  2000/06/25 19:59:42  steve
- *  Redesign Links to include the Nexus class that
- *  carries properties of the connected set of links.
- *
- * Revision 1.3  2000/05/14 17:55:04  steve
- *  Support initialization of FF Q value.
- *
- * Revision 1.2  2000/05/07 04:37:56  steve
- *  Carry strength values from Verilog source to the
- *  pform and netlist for gates.
- *
- *  Change vvm constants to use the driver_t to drive
- *  a constant value. This works better if there are
- *  multiple drivers on a signal.
- *
- * Revision 1.1  2000/04/20 00:28:03  steve
- *  Catch some simple identity compareoptimizations.
- *
- */
-
@@ -16,9 +16,6 @@
 *    along with this program; if not, write to the Free Software
 *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
 */
-#ifdef HAVE_CVS_IDENT
-#ident "$Id: load_module.cc,v 1.13 2005/03/22 15:53:48 steve Exp $"
-#endif

 # include  "config.h"
 # include  "util.h"
@@ -76,6 +73,7 @@ bool load_module(const char*type)

 	    if(depend_file) {
 		  fprintf(depend_file, "%s\n", path);
+		  fflush(depend_file);
 	    }

 	    if (ivlpp_string) {
@@ -193,49 +191,3 @@ int build_library_index(const char*path, bool key_case_sensitive)
      return 0;
 }

-/*
- * $Log: load_module.cc,v $
- * Revision 1.13  2005/03/22 15:53:48  steve
- *  popen must be matched by pclose.
- *
- * Revision 1.12  2003/06/05 04:31:09  steve
- *  INclude missing assert.h in load_module.
- *
- * Revision 1.11  2002/08/12 01:34:59  steve
- *  conditional ident string using autoconfig.
- *
- * Revision 1.10  2002/08/03 22:30:00  steve
- *  Fix suffix parsing of library index.
- *
- * Revision 1.9  2002/07/10 04:34:18  steve
- *  Library dir case insensitivity includes the suffix.
- *
- * Revision 1.8  2002/06/06 18:57:18  steve
- *  Use standard name for iostream.
- *
- * Revision 1.7  2002/05/28 20:40:37  steve
- *  ivl indexes the search path for libraries, and
- *  supports case insensitive module-to-file lookup.
- *
- * Revision 1.6  2002/05/28 00:50:39  steve
- *  Add the ivl -C flag for bulk configuration
- *  from the driver, and use that to run library
- *  modules through the preprocessor.
- *
- * Revision 1.5  2002/04/04 05:26:13  steve
- *  Add dependency generation.
- *
- * Revision 1.4  2001/11/20 23:36:34  steve
- *  Close library files after parsing.
- *
- * Revision 1.3  2001/11/16 05:07:19  steve
- *  Add support for +libext+ in command files.
- *
- * Revision 1.2  2001/10/22 02:05:21  steve
- *  Handle activating tasks in another root.
- *
- * Revision 1.1  2001/10/20 23:02:40  steve
- *  Add automatic module libraries.
- *
- */
-
@@ -1,6 +1,6 @@

 const char COPYRIGHT[] =
-          "Copyright (c) 1998-2008 Stephen Williams ([email protected])";
+          "Copyright (c) 1998-2009 Stephen Williams ([email protected])";

 /*
 *    This source code is free software; you can redistribute it
@@ -33,9 +33,9 @@ const char NOTICE[] =
 "  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the\n"
 "  GNU General Public License for more details.\n"
 "\n"
-"  You should have received a copy of the GNU General Public License\n"
-"  along with this program; if not, write to the Free Software\n"
-"  Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA\n"
+"  You should have received a copy of the GNU General Public License along\n"
+"  with this program; if not, write to the Free Software Foundation, Inc.,\n"
+"  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.\n"
 ;

 # include  <stdio.h>
@@ -89,7 +89,9 @@ bool gn_icarus_misc_flag = true;
 bool gn_cadence_types_flag = true;
 bool gn_specify_blocks_flag = true;
 bool gn_io_range_error_flag = true;
+bool gn_strict_ca_eval_flag = false;
 bool gn_verilog_ams_flag = false;
+bool gn_system_verilog_flag = false;

 map<string,const char*> flags;
 char*vpi_module_list = 0;
@@ -122,9 +124,9 @@ bool error_implicit = false;
 bool debug_scopes = false;
 bool debug_eval_tree = false;
 bool debug_elaborate = false;
+bool debug_elab_pexpr = false;
 bool debug_synth2 = false;
 bool debug_optimizer = false;
-bool debug_automatic = false;

 /*
 * Verbose messages enabled.
@@ -245,7 +247,16 @@ static void process_generation_flag(const char*gen)
      } else if (strcmp(gen,"no-io-range-error") == 0) {
 	    gn_io_range_error_flag = false;

-      } else {
+      } else if (strcmp(gen,"strict-ca-eval") == 0) {
+	    gn_strict_ca_eval_flag = true;
+
+      } else if (strcmp(gen,"no-strict-ca-eval") == 0) {
+	    gn_strict_ca_eval_flag = false;
+
+      } else if (strcmp(gen,"system-verilog") == 0) {
+        gn_system_verilog_flag = true;
+
+	  } else {
      }
 }

@@ -387,14 +398,15 @@ static void read_iconfig_file(const char*ipath)
 		  } else if (strcmp(cp,"elaborate") == 0) {
 			debug_elaborate = true;
 			cerr << "debug: Enable elaborate debug" << endl;
+		  } else if (strcmp(cp,"elab_pexpr") == 0) {
+			debug_elab_pexpr = true;
+			cerr << "debug: Enable elaborate-pexpr debug" << endl;
 		  } else if (strcmp(cp,"synth2") == 0) {
 			debug_synth2 = true;
 			cerr << "debug: Enable synth2 debug" << endl;
 		  } else if (strcmp(cp,"optimizer") == 0) {
 			debug_optimizer = true;
 			cerr << "debug: Enable optimizer debug" << endl;
-		  } else if (strcmp(cp,"automatic") == 0) {
-			debug_automatic = true;
 		  } else {
 		  }

@@ -589,10 +601,10 @@ int main(int argc, char*argv[])
 	    return flag_errors;

      if (version_flag) {
-	    cout << "\n\nIcarus Verilog Parser/Elaborator version "
-		 << VERSION << " (" << VERSION_TAG << ")" << endl;
-	    cout << COPYRIGHT << endl;
-	    cout << endl << NOTICE << endl;
+	    cout << "\nIcarus Verilog Parser/Elaborator version "
+		 << VERSION << " (" << VERSION_TAG << ")" << endl << endl;
+	    cout << COPYRIGHT << endl << endl;
+	    cout << NOTICE << endl;

 	    dll_target_obj.test_version(flags["DLL"]);

@@ -652,6 +664,9 @@ int main(int argc, char*argv[])

      if (gn_cadence_types_flag)
 	    lexor_keyword_mask |= GN_KEYWORDS_ICARUS;
+      
+	  if (gn_system_verilog_flag)
+	    lexor_keyword_mask |= GN_KEYWORDS_1800_2005;

      if (gn_verilog_ams_flag)
 	    lexor_keyword_mask |= GN_KEYWORDS_VAMS_2_3;
@@ -700,7 +715,7 @@ int main(int argc, char*argv[])
      if (pf_path) {
 	    ofstream out (pf_path);
 	    out << "PFORM DUMP NATURES:" << endl;
-	    for (map<perm_string,nature_t*>::iterator cur = natures.begin()
+	    for (map<perm_string,ivl_nature_t>::iterator cur = natures.begin()
 		       ; cur != natures.end() ; cur ++ ) {
 		  pform_dump(out, (*cur).second);
 	    }
@@ -1,40 +1,161 @@
 #! /bin/sh
 # mkinstalldirs --- make directory hierarchy
-# Author: Noah Friedman <[email protected]>
+
+scriptversion=2006-05-11.19
+
+# Original author: Noah Friedman <[email protected]>
 # Created: 1993-05-16
-# Public domain
-
-# $Id: mkinstalldirs,v 1.1 1999/04/25 21:54:33 steve Exp $
+# Public domain.
+#
+# This file is maintained in Automake, please report
+# bugs to <[email protected]> or send patches to
+# <[email protected]>.

+nl='
+'
+IFS=" ""	$nl"
 errstatus=0
+dirmode=
+
+usage="\
+Usage: mkinstalldirs [-h] [--help] [--version] [-m MODE] DIR ...
+
+Create each directory DIR (with mode MODE, if specified), including all
+leading file name components.
+
+Report bugs to <[email protected]>."
+
+# process command line arguments
+while test $# -gt 0 ; do
+  case $1 in
+    -h | --help | --h*)         # -h for help
+      echo "$usage"
+      exit $?
+      ;;
+    -m)                         # -m PERM arg
+      shift
+      test $# -eq 0 && { echo "$usage" 1>&2; exit 1; }
+      dirmode=$1
+      shift
+      ;;
+    --version)
+      echo "$0 $scriptversion"
+      exit $?
+      ;;
+    --)                         # stop option processing
+      shift
+      break
+      ;;
+    -*)                         # unknown option
+      echo "$usage" 1>&2
+      exit 1
+      ;;
+    *)                          # first non-opt arg
+      break
+      ;;
+  esac
+done

 for file
 do
-   set fnord `echo ":$file" | sed -ne 's/^:\//#/;s/^://;s/\// /g;s/^#/\//;p'`
-   shift
+  if test -d "$file"; then
+    shift
+  else
+    break
+  fi
+done

-   pathcomp=
-   for d
-   do
-     pathcomp="$pathcomp$d"
-     case "$pathcomp" in
-       -* ) pathcomp=./$pathcomp ;;
-     esac
+case $# in
+  0) exit 0 ;;
+esac

-     if test ! -d "$pathcomp"; then
-        echo "mkdir $pathcomp" 1>&2
+# Solaris 8's mkdir -p isn't thread-safe.  If you mkdir -p a/b and
+# mkdir -p a/c at the same time, both will detect that a is missing,
+# one will create a, then the other will try to create a and die with
+# a "File exists" error.  This is a problem when calling mkinstalldirs
+# from a parallel make.  We use --version in the probe to restrict
+# ourselves to GNU mkdir, which is thread-safe.
+case $dirmode in
+  '')
+    if mkdir -p --version . >/dev/null 2>&1 && test ! -d ./--version; then
+      echo "mkdir -p -- $*"
+      exec mkdir -p -- "$@"
+    else
+      # On NextStep and OpenStep, the `mkdir' command does not
+      # recognize any option.  It will interpret all options as
+      # directories to create, and then abort because `.' already
+      # exists.
+      test -d ./-p && rmdir ./-p
+      test -d ./--version && rmdir ./--version
+    fi
+    ;;
+  *)
+    if mkdir -m "$dirmode" -p --version . >/dev/null 2>&1 &&
+       test ! -d ./--version; then
+      echo "mkdir -m $dirmode -p -- $*"
+      exec mkdir -m "$dirmode" -p -- "$@"
+    else
+      # Clean up after NextStep and OpenStep mkdir.
+      for d in ./-m ./-p ./--version "./$dirmode";
+      do
+        test -d $d && rmdir $d
+      done
+    fi
+    ;;
+esac

-        mkdir "$pathcomp" || lasterr=$?
+for file
+do
+  case $file in
+    /*) pathcomp=/ ;;
+    *)  pathcomp= ;;
+  esac
+  oIFS=$IFS
+  IFS=/
+  set fnord $file
+  shift
+  IFS=$oIFS

-        if test ! -d "$pathcomp"; then
-  	  errstatus=$lasterr
-        fi
-     fi
+  for d
+  do
+    test "x$d" = x && continue

-     pathcomp="$pathcomp/"
-   done
+    pathcomp=$pathcomp$d
+    case $pathcomp in
+      -*) pathcomp=./$pathcomp ;;
+    esac
+
+    if test ! -d "$pathcomp"; then
+      echo "mkdir $pathcomp"
+
+      mkdir "$pathcomp" || lasterr=$?
+
+      if test ! -d "$pathcomp"; then
+	errstatus=$lasterr
+      else
+	if test ! -z "$dirmode"; then
+	  echo "chmod $dirmode $pathcomp"
+	  lasterr=
+	  chmod "$dirmode" "$pathcomp" || lasterr=$?
+
+	  if test ! -z "$lasterr"; then
+	    errstatus=$lasterr
+	  fi
+	fi
+      fi
+    fi
+
+    pathcomp=$pathcomp/
+  done
 done

 exit $errstatus

-# mkinstalldirs ends here
+# Local Variables:
+# mode: shell-script
+# sh-indentation: 2
+# eval: (add-hook 'write-file-hooks 'time-stamp)
+# time-stamp-start: "scriptversion="
+# time-stamp-format: "%:y-%02m-%02d.%02H"
+# time-stamp-end: "$"
+# End:
@@ -18,9 +18,6 @@
 *    along with this program; if not, write to the Free Software
 *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
 */
-#ifdef HAVE_CVS_IDENT
-#ident "$Id: named.h,v 1.4 2004/02/20 06:22:56 steve Exp $"
-#endif

 # include  "StringHeap.h"

@@ -34,19 +31,4 @@ template <class T> struct named {
      T parm;
 };

-/*
- * $Log: named.h,v $
- * Revision 1.4  2004/02/20 06:22:56  steve
- *  parameter keys are per_strings.
- *
- * Revision 1.3  2002/08/12 01:34:59  steve
- *  conditional ident string using autoconfig.
- *
- * Revision 1.2  2000/02/23 02:56:54  steve
- *  Macintosh compilers do not support ident.
- *
- * Revision 1.1  2000/01/09 05:50:49  steve
- *  Support named parameter override lists.
- *
- */
 #endif
@@ -27,7 +27,7 @@
 # include  "netmisc.h"
 # include  "ivl_assert.h"

-NetContribution::NetContribution(NetExpr*l, NetExpr*r)
+NetContribution::NetContribution(NetEAccess*l, NetExpr*r)
 : lval_(l), rval_(r)
 {
 }
@@ -35,3 +35,13 @@ NetContribution::NetContribution(NetExpr*l, NetExpr*r)
 NetContribution::~NetContribution()
 {
 }
+
+const NetEAccess* NetContribution::lval() const
+{
+      return lval_;
+}
+
+const NetExpr* NetContribution::rval() const
+{
+      return rval_;
+}
@@ -36,8 +36,9 @@
 # include  "ivl_assert.h"

 Design:: Design()
-    : errors(0), nodes_(0), procs_(0), aprocs_(0), lcounter_(0)
+    : errors(0), nodes_(0), procs_(0), aprocs_(0)
 {
+      branches_ = 0;
      procs_idx_ = 0;
      des_precision_ = 0;
      nodes_functor_cur_ = 0;
@@ -48,15 +49,6 @@ Design::~Design()
 {
 }

-string Design::local_symbol(const string&path)
-{
-      ostringstream res;
-      res << path << "." << "_L" << lcounter_;
-      lcounter_ += 1;
-
-      return res.str();
-}
-
 void Design::set_precision(int val)
 {
      if (val < des_precision_)
@@ -598,6 +590,12 @@ void NetScope::evaluate_parameters(Design*des)
      for (param_ref_t cur = parameters.begin()
 		 ; cur != parameters.end() ;  cur ++) {

+	      // Resolve the expression type (signed/unsigned) if the
+	      // expression is present. It is possible to not be
+	      // present if there are earlier errors en elaboration.
+	    if (cur->second.expr)
+		  cur->second.expr->resolve_pexpr_type();
+
 	    switch ((*cur).second.type) {
 		case IVL_VT_BOOL:
 		case IVL_VT_LOGIC:
@@ -758,6 +756,12 @@ void Design::del_node(NetNode*net)
      net->design_ = 0;
 }

+void Design::add_branch(NetBranch*bra)
+{
+      bra->next_ = branches_;
+      branches_ = bra;
+}
+
 void Design::add_process(NetProcTop*pro)
 {
      pro->next_ = procs_;
@@ -16,9 +16,6 @@
 *    along with this program; if not, write to the Free Software
 *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
 */
-#ifdef HAVE_CVS_IDENT
-#ident "$Id: net_event.cc,v 1.27 2007/06/02 03:42:13 steve Exp $"
-#endif

 # include  "config.h"
 # include  "compiler.h"
@@ -452,110 +449,3 @@ NetProc* NetEvWait::statement()
      return statement_;
 }

-/*
- * $Log: net_event.cc,v $
- * Revision 1.27  2007/06/02 03:42:13  steve
- *  Properly evaluate scope path expressions.
- *
- * Revision 1.26  2004/10/04 01:10:54  steve
- *  Clean up spurious trailing white space.
- *
- * Revision 1.25  2004/02/19 06:57:10  steve
- *  Memory and Event names use perm_string.
- *
- * Revision 1.24  2004/02/18 17:11:56  steve
- *  Use perm_strings for named langiage items.
- *
- * Revision 1.23  2003/04/22 04:48:29  steve
- *  Support event names as expressions elements.
- *
- * Revision 1.22  2003/03/06 00:28:41  steve
- *  All NetObj objects have lex_string base names.
- *
- * Revision 1.21  2003/03/01 06:25:30  steve
- *  Add the lex_strings string handler, and put
- *  scope names and system task/function names
- *  into this table. Also, permallocate event
- *  names from the beginning.
- *
- * Revision 1.20  2002/08/12 01:34:59  steve
- *  conditional ident string using autoconfig.
- *
- * Revision 1.19  2002/07/24 16:24:45  steve
- *  Rewrite find_similar_event to support doing
- *  all event matching and replacement in one
- *  shot, saving time in the scans.
- *
- * Revision 1.18  2002/06/30 02:21:31  steve
- *  Add structure for asynchronous logic synthesis.
- *
- * Revision 1.17  2002/02/02 06:13:38  steve
- *  event find_similar should not find self.
- *
- * Revision 1.16  2001/10/28 01:14:53  steve
- *  NetObj constructor finally requires a scope.
- *
- * Revision 1.15  2001/07/25 03:10:49  steve
- *  Create a config.h.in file to hold all the config
- *  junk, and support gcc 3.0. (Stephan Boettcher)
- *
- * Revision 1.14  2001/03/29 02:52:19  steve
- *  Add const probe method to NetEvent.
- *
- * Revision 1.13  2001/03/28 06:07:39  steve
- *  Add the ivl_event_t to ivl_target, and use that to generate
- *  .event statements in vvp way ahead of the thread that uses it.
- *
- * Revision 1.12  2000/12/15 17:45:07  steve
- *  Remove limits from the similar events search.
- *
- * Revision 1.11  2000/10/04 16:30:39  steve
- *  Use char8 instead of string to store name.
- *
- * Revision 1.10  2000/09/19 03:00:36  steve
- *  Typo stepping ot next probe in delete.
- *
- * Revision 1.9  2000/07/29 03:55:38  steve
- *  fix problem coalescing events w/ probes.
- *
- * Revision 1.8  2000/05/31 02:26:49  steve
- *  Globally merge redundant event objects.
- *
- * Revision 1.7  2000/05/27 19:33:23  steve
- *  Merge similar probes within a module.
- *
- * Revision 1.6  2000/04/18 04:50:20  steve
- *  Clean up unneeded NetEvent objects.
- *
- * Revision 1.5  2000/04/16 23:32:18  steve
- *  Synthesis of comparator in expressions.
- *
- *  Connect the NetEvent and related classes
- *  together better.
- *
- * Revision 1.4  2000/04/12 20:02:53  steve
- *  Finally remove the NetNEvent and NetPEvent classes,
- *  Get synthesis working with the NetEvWait class,
- *  and get started supporting multiple events in a
- *  wait in vvm.
- *
- * Revision 1.3  2000/04/12 04:23:58  steve
- *  Named events really should be expressed with PEIdent
- *  objects in the pform,
- *
- *  Handle named events within the mix of net events
- *  and edges. As a unified lot they get caught together.
- *  wait statements are broken into more complex statements
- *  that include a conditional.
- *
- *  Do not generate NetPEvent or NetNEvent objects in
- *  elaboration. NetEvent, NetEvWait and NetEvProbe
- *  take over those functions in the netlist.
- *
- * Revision 1.2  2000/04/10 05:26:06  steve
- *  All events now use the NetEvent class.
- *
- * Revision 1.1  2000/04/04 03:20:15  steve
- *  Simulate named event trigger and waits.
- *
- */
@@ -380,7 +380,8 @@ void NetEConcat::set(unsigned idx, NetExpr*e)

 NetEConcat* NetEConcat::dup_expr() const
 {
-      NetEConcat*dup = new NetEConcat(parms_.count(), repeat_);
+      NetEConcat*dup = new NetEConcat(parms_.count(), 0);
+      dup->set_line(*this);
      for (unsigned idx = 0 ;  idx < parms_.count() ;  idx += 1)
 	    if (parms_[idx]) {
 		  NetExpr*tmp = parms_[idx]->dup_expr();
@@ -389,7 +390,11 @@ NetEConcat* NetEConcat::dup_expr() const
 	    }


+      dup->repeat_ = repeat_? repeat_->dup_expr() : 0;
+      dup->repeat_value_ = repeat_value_;
+      dup->repeat_calculated_ = repeat_calculated_;
      dup->expr_width(expr_width());
+
      return dup;
 }

@@ -489,11 +494,13 @@ NetEParam::NetEParam()
 NetEParam::NetEParam(Design*d, NetScope*s, perm_string n)
    : des_(d), scope_(s), reference_(scope_->find_parameter(n))
 {
+      cast_signed_base_(reference_->second.signed_flag);
 }

 NetEParam::NetEParam(Design*d, NetScope*s, ref_t ref)
    : des_(d), scope_(s), reference_(ref)
 {
+      cast_signed_base_(reference_->second.signed_flag);
 }

 NetEParam::~NetEParam()
@@ -600,7 +607,7 @@ ivl_variable_type_t NetESFunc::expr_type() const
      return type_;
 }

-NetEAccess::NetEAccess(NetBranch*br, nature_t*nat)
+NetEAccess::NetEAccess(NetBranch*br, ivl_nature_t nat)
 : branch_(br), nature_(nat)
 {
 }
@@ -29,9 +29,9 @@
 * which accounts for all the inputs, plus one for the phantom output
 * that is the result.
 */
-NetUserFunc::NetUserFunc(NetScope*s, perm_string n, NetScope*d)
+NetUserFunc::NetUserFunc(NetScope*s, perm_string n, NetScope*d, NetEvWait*trigger)
 : NetNode(s, n, d->func_def()->port_count()+1),
-  def_(d)
+  def_(d), trigger_(trigger)
 {
      pin(0).set_dir(Link::OUTPUT);

@@ -128,11 +128,9 @@ bool PECallFunction::check_call_matches_definition_(Design*des, NetScope*dscope)

 NetSysFunc::NetSysFunc(NetScope*s, perm_string n,
 		       const struct sfunc_return_type*def,
-		       unsigned ports)
-: NetNode(s, n, ports)
+		       unsigned ports, NetEvWait*trigger)
+: NetNode(s, n, ports), def_(def), trigger_(trigger)
 {
-      def_ = def;
-
      pin(0).set_dir(Link::OUTPUT); // Q

      for (unsigned idx = 1 ;  idx < pin_count() ;  idx += 1) {
@@ -161,4 +159,3 @@ unsigned NetSysFunc::vector_width() const
 {
      return def_->wid;
 }
-
@@ -33,11 +33,16 @@
 void connect(Nexus*l, Link&r)
 {
      assert(l);
-      assert(r.nexus_);

      if (l == r.nexus_)
 	    return;

+	// Special case: The "r" link is connected to nothing. The
+	// connect becomes trivially easy.
+      if (r.nexus_ == 0) {
+	    l->relink(&r);
+	    return;
+      }

      Nexus*tmp = r.nexus_;
      while (Link*cur = tmp->list_) {
@@ -56,30 +61,36 @@ void connect(Nexus*l, Link&r)
 void connect(Link&l, Link&r)
 {
      assert(&l != &r);
-      if (r.is_linked() && !l.is_linked())
-	    connect(r.nexus_, l);
-      else
+      if (l.nexus_ != 0) {
 	    connect(l.nexus_, r);
+      } else if (r.nexus_ != 0) {
+	    connect(r.nexus_, l);
+      } else {
+	    Nexus*tmp = new Nexus;
+	    connect(tmp, l);
+	    connect(tmp, r);
+      }
 }

 Link::Link()
 : dir_(PASSIVE), drive0_(STRONG), drive1_(STRONG), init_(verinum::Vx),
  next_(0), nexus_(0)
 {
-      (new Nexus()) -> relink(this);
 }

 Link::~Link()
 {
-      assert(nexus_);
-      Nexus*tmp = nexus_;
-      nexus_->unlink(this);
-      if (tmp->list_ == 0)
-	    delete tmp;
+      if (Nexus*tmp = nexus_) {
+	    nexus_->unlink(this);
+	    if (tmp->list_ == 0)
+		  delete tmp;
+      }
 }

 Nexus* Link::nexus()
 {
+      if (nexus_ == 0)
+	    (new Nexus()) ->relink(this);
      return nexus_;
 }

@@ -158,7 +169,6 @@ void Link::unlink()
 	    return;

      nexus_->unlink(this);
-      (new Nexus()) -> relink(this);
 }

 bool Link::is_equal(const Link&that) const
@@ -168,6 +178,8 @@ bool Link::is_equal(const Link&that) const

 bool Link::is_linked() const
 {
+      if (nexus_ == 0)
+	    return false;
      if (next_)
 	    return true;
      if (nexus_->first_nlink() != this)
@@ -178,6 +190,8 @@ bool Link::is_linked() const

 bool Link::is_linked(const Link&that) const
 {
+      if (nexus_ == 0)
+	    return false;
      return nexus_ == that.nexus_;
 }

@@ -489,6 +503,7 @@ unsigned NexusSet::count() const

 void NexusSet::add(Nexus*that)
 {
+      assert(that);
      if (nitems_ == 0) {
 	    assert(items_ == 0);
 	    items_ = (Nexus**)malloc(sizeof(Nexus*));
@@ -518,6 +533,7 @@ void NexusSet::add(const NexusSet&that)

 void NexusSet::rem(Nexus*that)
 {
+      assert(that);
      if (nitems_ == 0)
 	    return;

@@ -246,7 +246,7 @@ NexusSet* NetBlock::nex_input(bool rem_out)
 	    NexusSet*tmp = cur->nex_input(rem_out);

 	      /* Add the current input set to the accumulated input set. */
-	    result->add(*tmp);
+	    if (tmp != 0) result->add(*tmp);
 	    delete tmp;

 	      /* Add the current outputs to the accumulated output set,
@@ -345,10 +345,11 @@ NexusSet* NetForever::nex_input(bool rem_out)
 *
 * The nex_input set is the input set of the <statement>. Do *not*
 * include the input set of the <expr> because it does not affect the
- * result.
+ * result. The statement can be omitted.
 */
 NexusSet* NetPDelay::nex_input(bool rem_out)
 {
+      if (statement_ == 0) return 0;
      NexusSet*result = statement_->nex_input(rem_out);
      return result;
 }
@@ -16,9 +16,6 @@
 *    along with this program; if not, write to the Free Software
 *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
 */
-#ifdef HAVE_CVS_IDENT
-#ident "$Id: net_proc.cc,v 1.7 2006/08/08 05:11:37 steve Exp $"
-#endif

 # include "config.h"

@@ -173,35 +170,3 @@ const NetExpr* NetRepeat::expr() const
      return expr_;
 }

-
-
-/*
- * $Log: net_proc.cc,v $
- * Revision 1.7  2006/08/08 05:11:37  steve
- *  Handle 64bit delay constants.
- *
- * Revision 1.6  2002/08/12 01:34:59  steve
- *  conditional ident string using autoconfig.
- *
- * Revision 1.5  2002/07/28 23:58:45  steve
- *  Fix NetBlock destructor to delete substatements.
- *
- * Revision 1.4  2002/04/21 04:59:08  steve
- *  Add support for conbinational events by finding
- *  the inputs to expressions and some statements.
- *  Get case and assignment statements working.
- *
- * Revision 1.3  2001/07/25 03:10:49  steve
- *  Create a config.h.in file to hold all the config
- *  junk, and support gcc 3.0. (Stephan Boettcher)
- *
- * Revision 1.2  2000/07/27 05:13:44  steve
- *  Support elaboration of disable statements.
- *
- * Revision 1.1  2000/07/07 04:53:54  steve
- *  Add support for non-constant delays in delay statements,
- *  Support evaluating ! in constant expressions, and
- *  move some code from netlist.cc to net_proc.cc.
- *
- */
-
@@ -78,7 +78,7 @@ unsigned NetTran::part_offset() const
      return off_;
 }

-void join_island(NetObj*obj)
+void join_island(NetPins*obj)
 {
      IslandBranch*branch = dynamic_cast<IslandBranch*> (obj);

@@ -88,7 +88,7 @@ void join_island(NetObj*obj)

 	// If this is a branch, but already given to an island, then
 	// stop.
-      if (branch->island)
+      if (branch->island_)
 	    return;

      list<NetObj*> uncommitted_neighbors;
@@ -110,31 +110,32 @@ void join_island(NetObj*obj)
 		  if (tmp == obj)
 			continue;

-		    // If tmb is not a branch, then skip it.
+		    // If tmp is not a branch, then skip it.
 		  IslandBranch*tmp_branch = dynamic_cast<IslandBranch*> (tmp);
 		  if (tmp_branch == 0)
 			continue;

-		    // If that is an uncommitted branch, then save
+		    // If tmp is an uncommitted branch, then save
 		    // it. When I finally choose an island for self,
 		    // these branches will be scanned so that they join
 		    // this island as well.
-		  if (tmp_branch->island == 0) {
+		  if (tmp_branch->island_ == 0) {
 			uncommitted_neighbors.push_back(tmp);
 			continue;
 		  }

-		  ivl_assert(*obj, branch->island==0 || branch->island==tmp_branch->island);
+		  ivl_assert(*obj, branch->island_==0 || branch->island_==tmp_branch->island_);

 		    // We found an existing island to join. Join it
 		    // now. Keep scanning in order to find more neighbors.
-		  if (branch->island == 0) {
+		  if (branch->island_ == 0) {
 			if (debug_elaborate)
 			      cerr << obj->get_fileline() << ": debug: "
 				   << "Join branch to existing island." << endl;
-			branch->island = tmp_branch->island;
+			branch->island_ = tmp_branch->island_;
+			ivl_assert(*obj, branch->island_->discipline == tmp_branch->island_->discipline);

-		  } else if (branch->island != tmp_branch->island) {
+		  } else if (branch->island_ != tmp_branch->island_) {
 			cerr << obj->get_fileline() << ": internal error: "
 			     << "Oops, Found 2 neighboring islands." << endl;
 			ivl_assert(*obj, 0);
@@ -144,9 +145,9 @@ void join_island(NetObj*obj)

 	// If after all that we did not find an island to join, then
 	// start the island not and join it.
-      if (branch->island == 0) {
-	    branch->island = new ivl_island_s;
-	    branch->island->discipline = 0;
+      if (branch->island_ == 0) {
+	    branch->island_ = new ivl_island_s;
+	    branch->island_->discipline = branch->discipline_;
 	    if (debug_elaborate)
 		  cerr << obj->get_fileline() << ": debug: "
 		       << "Create new island for this branch" << endl;
@@ -17,9 +17,6 @@
 *    along with this program; if not, write to the Free Software
 *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
 */
-#ifdef HAVE_CVS_IDENT
-#ident "$Id: net_udp.cc,v 1.10 2004/10/04 01:10:54 steve Exp $"
-#endif

 # include  "config.h"
 # include  "compiler.h"
@@ -86,40 +83,3 @@ char NetUDP::get_initial() const
  assert(0);
  return 'x';
 }
-
-
-/*
- * $Log: net_udp.cc,v $
- * Revision 1.10  2004/10/04 01:10:54  steve
- *  Clean up spurious trailing white space.
- *
- * Revision 1.9  2004/02/18 17:11:56  steve
- *  Use perm_strings for named langiage items.
- *
- * Revision 1.8  2003/03/06 00:28:42  steve
- *  All NetObj objects have lex_string base names.
- *
- * Revision 1.7  2002/08/12 01:34:59  steve
- *  conditional ident string using autoconfig.
- *
- * Revision 1.6  2001/07/25 03:10:49  steve
- *  Create a config.h.in file to hold all the config
- *  junk, and support gcc 3.0. (Stephan Boettcher)
- *
- * Revision 1.5  2001/04/24 02:23:58  steve
- *  Support for UDP devices in VVP (Stephen Boettcher)
- *
- * Revision 1.4  2001/04/22 23:09:46  steve
- *  More UDP consolidation from Stephan Boettcher.
- *
- * Revision 1.3  2000/12/15 01:24:17  steve
- *  Accept x in outputs of primitive. (PR#84)
- *
- * Revision 1.2  2000/11/04 06:36:24  steve
- *  Apply sequential UDP rework from Stephan Boettcher  (PR#39)
- *
- * Revision 1.1  2000/03/29 04:37:11  steve
- *  New and improved combinational primitives.
- *
- */
-
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1998-2008 Stephen Williams (steve@icarus.com)
+ * Copyright (c) 1998-2009 Stephen Williams (steve@icarus.com)
 *
 *    This source code is free software; you can redistribute it
 *    and/or modify it in source code form under the terms of the GNU
@@ -212,6 +212,19 @@ const Link& NetPins::pin(unsigned idx) const
      return pins_[idx];
 }

+bool NetPins::is_linked(void)
+{
+      bool linked_flag = false;
+      if (pins_ == NULL) return false;
+      for (unsigned u = 0; u < npins_; u++) {
+	    if (pins_[u].is_linked()) {
+		  linked_flag = true;
+		  break;
+	    }
+      }
+      return linked_flag;
+}
+
 NetObj::NetObj(NetScope*s, perm_string n, unsigned np)
 : NetPins(np), scope_(s), name_(n), delay1_(0), delay2_(0), delay3_(0)
 {
@@ -243,7 +256,7 @@ NetNode::~NetNode()
 }

 NetBranch::NetBranch(ivl_discipline_t dis)
-: NetPins(2), discipline_(dis)
+: NetPins(2), IslandBranch(dis)
 {
      pin(0).set_dir(Link::PASSIVE);
      pin(1).set_dir(Link::PASSIVE);
@@ -464,6 +477,16 @@ NetNet::NetNet(NetScope*s, perm_string n, Type t, unsigned npins)
      s->add_signal(this);
 }

+void NetNet::initialize_value_and_dir(verinum::V init_value, Link::DIR dir)
+{
+      if (1) {
+	    for (unsigned idx = 0 ;  idx < pin_count() ;  idx += 1) {
+		  pin(idx).set_dir(dir);
+		  pin(idx).set_init(init_value);
+	    }
+      }
+}
+
 NetNet::NetNet(NetScope*s, perm_string n, Type t,
 	       long ms, long ls)
 : NetObj(s, n, 1), type_(t),
@@ -494,10 +517,7 @@ NetNet::NetNet(NetScope*s, perm_string n, Type t,
 	    break;
      }

-      for (unsigned idx = 0 ;  idx < pin_count() ;  idx += 1) {
-	    pin(idx).set_dir(dir);
-	    pin(idx).set_init(init_value);
-      }
+      initialize_value_and_dir(init_value, dir);

      s->add_signal(this);
 }
@@ -541,10 +561,7 @@ NetNet::NetNet(NetScope*s, perm_string n, Type t,
 	    break;
      }

-      for (unsigned idx = 0 ;  idx < pin_count() ;  idx += 1) {
-	    pin(idx).set_dir(dir);
-	    pin(idx).set_init(init_value);
-      }
+      initialize_value_and_dir(init_value, dir);

      s->add_signal(this);
 }
@@ -699,12 +716,20 @@ unsigned NetNet::array_dimensions() const

 long NetNet::array_first() const
 {
-      if (s0_ < e0_)
+      if (s0_ <= e0_)
 	    return s0_;
      else
 	    return e0_;
 }

+bool NetNet::array_addr_swapped() const
+{
+      if (s0_ <= e0_)
+	     return false;
+      else
+	     return true;
+}
+
 unsigned NetNet::array_count() const
 {
      return calculate_count(s0_, e0_);
@@ -874,8 +899,13 @@ NetScope* NetProcTop::scope()
      return scope_;
 }

-NetAnalogTop::NetAnalogTop(NetScope*scope, ivl_process_type_t t, NetProc*st)
-: type_(t), statement_(st), scope_(scope)
+const NetScope* NetProcTop::scope() const
+{
+      return scope_;
+}
+
+NetAnalogTop::NetAnalogTop(NetScope*scope__, ivl_process_type_t t, NetProc*st)
+: type_(t), statement_(st), scope_(scope__)
 {
      next_ = 0;
 }
@@ -884,7 +914,22 @@ NetAnalogTop::~NetAnalogTop()
 {
 }

-const NetScope* NetProcTop::scope() const
+NetProc* NetAnalogTop::statement()
+{
+      return statement_;
+}
+
+const NetProc* NetAnalogTop::statement() const
+{
+      return statement_;
+}
+
+NetScope* NetAnalogTop::scope()
+{
+      return scope_;
+}
+
+const NetScope* NetAnalogTop::scope() const
 {
      return scope_;
 }
@@ -2134,6 +2179,7 @@ ivl_variable_type_t NetEConst::expr_type() const
 NetEConstParam::NetEConstParam(NetScope*s, perm_string n, const verinum&v)
 : NetEConst(v), scope_(s), name_(n)
 {
+      cast_signed_base_(v.has_sign());
 }

 NetEConstParam::~NetEConstParam()
@@ -2249,11 +2295,16 @@ ivl_variable_type_t NetESignal::expr_type() const
 NetETernary::NetETernary(NetExpr*c, NetExpr*t, NetExpr*f)
 : cond_(c), true_val_(t), false_val_(f)
 {
-	// use widest result
-      if (true_val_->expr_width() > false_val_->expr_width())
-            expr_width(true_val_->expr_width());
-      else
-            expr_width(false_val_->expr_width());
+      if (type_is_vectorable(expr_type())) {
+	      // use widest result
+	    if (true_val_->expr_width() > false_val_->expr_width())
+		  expr_width(true_val_->expr_width());
+	    else
+		  expr_width(false_val_->expr_width());
+      } else {
+	    expr_width(1);
+      }
+
      cast_signed(c->has_sign() && t->has_sign() && f->has_sign());
 }

@@ -1,7 +1,7 @@
 #ifndef __netlist_H
 #define __netlist_H
 /*
- * Copyright (c) 1998-2008 Stephen Williams (steve@icarus.com)
+ * Copyright (c) 1998-2009 Stephen Williams (steve@icarus.com)
 *
 *    This source code is free software; you can redistribute it
 *    and/or modify it in source code form under the terms of the GNU
@@ -32,6 +32,7 @@
 # include  <set>
 # include  <utility>
 # include  "ivl_target.h"
+# include  "ivl_target_priv.h"
 # include  "pform_types.h"
 # include  "config.h"
 # include  "verinum.h"
@@ -55,12 +56,14 @@ class NetEvent;
 class NetNet;
 class NetNode;
 class NetObj;
+class NetPins;
 class NetProc;
 class NetProcTop;
 class NetRelease;
 class NetScope;
 class NetEvProbe;
 class NetExpr;
+class NetEAccess;
 class NetESignal;
 class NetFuncDef;
 class NetRamDq;
@@ -68,118 +71,12 @@ class NetTaskDef;
 class NetEvTrig;
 class NetEvWait;

-class nature_t;
-
 struct target;
 struct functor_t;

 ostream& operator << (ostream&o, ivl_variable_type_t val);

-extern void join_island(NetObj*obj);
-
-class NetPins : public LineInfo {
-
-    public:
-      explicit NetPins(unsigned npins);
-      virtual ~NetPins();
-
-      unsigned pin_count() const { return npins_; }
-
-      Link&pin(unsigned idx);
-      const Link&pin(unsigned idx) const;
-
-      void dump_node_pins(ostream&, unsigned, const char**pin_names =0) const;
-
-    private:
-      Link*pins_;
-      const unsigned npins_;
-};
-
-/* =========
- * A NetObj is anything that has any kind of behavior in the
- * netlist. Nodes can be gates, registers, etc. and are linked
- * together to form a design web.
- *
- * The web of nodes that makes up a circuit is held together by the
- * Link class. There is a link for each pin. All mutually connected
- * pins form a ring of links.
- *
- * A link can be INPUT, OUTPUT or PASSIVE. An input never drives the
- * signal, and PASSIVE never receives the value of the signal. Wires
- * are PASSIVE, for example.
- *
- * A NetObj also has delays specified as rise_time, fall_time and
- * decay_time. The rise and fall time are the times to transition to 1
- * or 0 values. The decay_time is the time needed to decay to a 'bz
- * value, or to decay of the net is a trireg. The exact and precise
- * interpretation of the rise/fall/decay times is typically left to
- * the target to properly interpret.
- */
-class NetObj  : public NetPins, public Attrib {
-
-    public:
-    public:
-	// The name of the object must be a permallocated string. A
-	// lex_strings string, for example.
-      explicit NetObj(NetScope*s, perm_string n, unsigned npins);
-      virtual ~NetObj();
-
-      NetScope* scope();
-      const NetScope* scope() const;
-
-      perm_string name() const { return name_; }
-
-      const NetExpr* rise_time() const { return delay1_; }
-      const NetExpr* fall_time() const { return delay2_; }
-      const NetExpr* decay_time() const { return delay3_; }
-
-      void rise_time(const NetExpr* d) { delay1_ = d; }
-      void fall_time(const NetExpr* d) { delay2_ = d; }
-      void decay_time(const NetExpr* d) { delay3_ = d; }
-
-      void dump_obj_attr(ostream&, unsigned) const;
-
-    private:
-      NetScope*scope_;
-      perm_string name_;
-      const NetExpr* delay1_;
-      const NetExpr* delay2_;
-      const NetExpr* delay3_;
-};
-
-/*
-* Objects that can be island branches are derived from this. (It is
-* possible for an object to be a NetObj and an IslandBranch.) This is
-* used to collect island information about the node.
-*/
-
-class IslandBranch {
-    public:
-      IslandBranch() : island(0) { }
-
-    public:
-      struct ivl_island_s* island;
-};
-
-/*
- * A NetBranch is a construct of Verilog-A that is a branch between
- * two nodes. The branch has exactly 2 pins and a discipline.
- *
- * pin(0) is the source of flow through a branch and the plus side of
- * potential. Pin(1) is the sink of flow and the minus (or ground) of
- * potential.
- */
-class NetBranch  : public NetPins {
-
-    public:
-      explicit NetBranch(ivl_discipline_t dis);
-      explicit NetBranch(ivl_discipline_t dis, perm_string name);
-      ~NetBranch();
-
-    private:
-      ivl_discipline_t discipline_;
-      perm_string name_;
-};
+extern void join_island(NetPins*obj);

 class Link {

@@ -272,6 +169,9 @@ class Link {
      verinum::V init_   : 2;

    private:
+	// The Nexus uses these to maintain a single linked list of
+	// Link objects. If this link is not connected to anything,
+	// then these pointers are nil.
      Link *next_;
      Nexus*nexus_;

@@ -281,6 +181,128 @@ class Link {
 };


+class NetPins : public LineInfo {
+
+    public:
+      explicit NetPins(unsigned npins);
+      virtual ~NetPins();
+
+      unsigned pin_count() const { return npins_; }
+
+      Link&pin(unsigned idx);
+      const Link&pin(unsigned idx) const;
+
+      void dump_node_pins(ostream&, unsigned, const char**pin_names =0) const;
+      bool is_linked();
+
+    private:
+      Link*pins_;
+      const unsigned npins_;
+};
+
+/* =========
+ * A NetObj is anything that has any kind of behavior in the
+ * netlist. Nodes can be gates, registers, etc. and are linked
+ * together to form a design web.
+ *
+ * The web of nodes that makes up a circuit is held together by the
+ * Link class. There is a link for each pin. All mutually connected
+ * pins form a ring of links.
+ *
+ * A link can be INPUT, OUTPUT or PASSIVE. An input never drives the
+ * signal, and PASSIVE never receives the value of the signal. Wires
+ * are PASSIVE, for example.
+ *
+ * A NetObj also has delays specified as rise_time, fall_time and
+ * decay_time. The rise and fall time are the times to transition to 1
+ * or 0 values. The decay_time is the time needed to decay to a 'bz
+ * value, or to decay of the net is a trireg. The exact and precise
+ * interpretation of the rise/fall/decay times is typically left to
+ * the target to properly interpret.
+ */
+class NetObj  : public NetPins, public Attrib {
+
+    public:
+    public:
+	// The name of the object must be a permallocated string. A
+	// lex_strings string, for example.
+      explicit NetObj(NetScope*s, perm_string n, unsigned npins);
+      virtual ~NetObj();
+
+      NetScope* scope();
+      const NetScope* scope() const;
+
+      perm_string name() const { return name_; }
+
+      const NetExpr* rise_time() const { return delay1_; }
+      const NetExpr* fall_time() const { return delay2_; }
+      const NetExpr* decay_time() const { return delay3_; }
+
+      void rise_time(const NetExpr* d) { delay1_ = d; }
+      void fall_time(const NetExpr* d) { delay2_ = d; }
+      void decay_time(const NetExpr* d) { delay3_ = d; }
+
+      void dump_obj_attr(ostream&, unsigned) const;
+
+    private:
+      NetScope*scope_;
+      perm_string name_;
+      const NetExpr* delay1_;
+      const NetExpr* delay2_;
+      const NetExpr* delay3_;
+};
+
+/*
+* Objects that can be island branches are derived from this. (It is
+* possible for an object to be a NetObj and an IslandBranch.) This is
+* used to collect island information about the node.
+*/
+
+class IslandBranch {
+    public:
+      IslandBranch(ivl_discipline_t dis =0) : island_(0), discipline_(dis) { }
+
+      ivl_island_t get_island() const { return island_; }
+
+      friend void join_island(NetPins*);
+
+    private:
+      ivl_island_t island_;
+      ivl_discipline_t discipline_;
+};
+
+/*
+ * A NetBranch is a construct of Verilog-A that is a branch between
+ * two nodes. The branch has exactly 2 pins and a discipline.
+ *
+ * pin(0) is the source of flow through a branch and the plus side of
+ * potential. Pin(1) is the sink of flow and the minus (or ground) of
+ * potential.
+ */
+class NetBranch  : public NetPins, public IslandBranch {
+
+    public:
+      explicit NetBranch(ivl_discipline_t dis);
+      explicit NetBranch(ivl_discipline_t dis, perm_string name);
+      ~NetBranch();
+
+	// If the branch is named, this returns the name.
+      perm_string name() const { return name_; }
+
+      ivl_branch_s* target_obj() const { return &target_obj_; }
+
+      void dump(ostream&, unsigned) const;
+
+    private:
+      perm_string name_;
+
+      mutable ivl_branch_s target_obj_;
+
+	// The design class uses this member to list the branches.
+      friend class Design;
+      NetBranch*next_;
+};
+
 /*
 * The Nexus represents a collection of links that are joined
 * together. Each link has its own properties, this class holds the
@@ -580,6 +602,7 @@ class NetNet  : public NetObj {
 	   indices. (Currently only one array index is supported.) */
      unsigned array_dimensions() const;
      long array_first() const;
+      bool array_addr_swapped() const;

 	// This is the number of array elements.
      unsigned array_count() const;
@@ -613,6 +636,8 @@ class NetNet  : public NetObj {

      virtual void dump_net(ostream&, unsigned) const;

+      void initialize_value_and_dir(verinum::V init_value, Link::DIR dir);
+
    private:
      Type   type_;
      PortType port_type_;
@@ -799,7 +824,7 @@ class NetScope : public Attrib {
 	/* After everything is all set up, the code generators like
 	   access to these things to make up the parameter lists. */
      struct param_expr_t : public LineInfo {
-	    param_expr_t() : type(IVL_VT_NO_TYPE), range(0) { }
+	    param_expr_t() : type(IVL_VT_NO_TYPE), signed_flag(false), msb(0), lsb(0), range(0), expr(0) { }
 	      // Type information
 	    ivl_variable_type_t type;
 	    bool signed_flag;
@@ -855,6 +880,7 @@ class NetScope : public Attrib {
      NetNet::Type default_nettype_;

      NetEvent *events_;
+
      typedef std::map<perm_string,NetNet*>::const_iterator signals_map_iter_t;
      std::map <perm_string,NetNet*> signals_map_;
      perm_string module_name_;
@@ -1420,7 +1446,7 @@ class NetReplicate  : public NetNode {
 class NetUserFunc  : public NetNode {

    public:
-      NetUserFunc(NetScope*s, perm_string n, NetScope*def);
+      NetUserFunc(NetScope*s, perm_string n, NetScope*def, NetEvWait*trigger);
      ~NetUserFunc();

      ivl_variable_type_t data_type(unsigned port) const;
@@ -1428,11 +1454,14 @@ class NetUserFunc  : public NetNode {

      const NetScope* def() const;

+      const NetEvWait* trigger() const { return trigger_; }
+
      virtual void dump_node(ostream&, unsigned ind) const;
      virtual bool emit_node(struct target_t*) const;

    private:
      NetScope*def_;
+      NetEvWait*trigger_;
 };

 /*
@@ -1444,18 +1473,21 @@ class NetSysFunc  : public NetNode {
    public:
      NetSysFunc(NetScope*s, perm_string n,
 		 const struct sfunc_return_type*def,
-		 unsigned ports);
+		 unsigned ports, NetEvWait*trigger);
      ~NetSysFunc();

      ivl_variable_type_t data_type() const;
      unsigned vector_width() const;
      const char* func_name() const;

+      const NetEvWait* trigger() const { return trigger_; }
+
      virtual void dump_node(ostream&, unsigned ind) const;
      virtual bool emit_node(struct target_t*) const;

    private:
      const struct sfunc_return_type*def_;
+      NetEvWait*trigger_;
 };

 class NetTran  : public NetNode, public IslandBranch {
@@ -1543,6 +1575,14 @@ class NetExpr  : public LineInfo {
 	// expressions to check validity.
      virtual bool has_width() const;

+	// Expressions in parameter declarations may have encountered
+	// arguments that are themselves untyped parameters. These
+	// cannot be fully resolved for type when elaborated (they are
+	// elaborated before all parameter overrides are complete) so
+	// this virtual method needs to be called right before
+	// evaluating the expression. This wraps up the evaluation of
+	// the type.
+      virtual void resolve_pexpr_type();

 	// This method evaluates the expression and returns an
 	// equivalent expression that is reduced as far as compile
@@ -1571,12 +1611,14 @@ class NetExpr  : public LineInfo {
 	//
 	//  des, scope:  The context where this work is done
 	//
+        //  root: The root expression of which this expression is a part.
+        //
 	//  rise/fall/decay: Attach these delays to the driver for the
 	//                   expression output.
 	//
 	//  drive0/drive1: Attach these strengths tp the driver for
 	//                 the expression output.
-      virtual NetNet*synthesize(Design*des, NetScope*scope);
+      virtual NetNet*synthesize(Design*des, NetScope*scope, NetExpr*root);


    protected:
@@ -1614,7 +1656,7 @@ class NetEConst  : public NetExpr {
      virtual void dump(ostream&) const;

      virtual NetEConst* dup_expr() const;
-      virtual NetNet*synthesize(Design*, NetScope*scope);
+      virtual NetNet*synthesize(Design*, NetScope*scope, NetExpr*);
      virtual NexusSet* nex_input(bool rem_out = true);

    private:
@@ -1667,7 +1709,7 @@ class NetECReal  : public NetExpr {
      virtual void dump(ostream&) const;

      virtual NetECReal* dup_expr() const;
-      virtual NetNet*synthesize(Design*, NetScope*scope);
+      virtual NetNet*synthesize(Design*, NetScope*scope, NetExpr*);
      virtual NexusSet* nex_input(bool rem_out = true);

    private:
@@ -2442,13 +2484,17 @@ class NetCondit  : public NetProc {
 class NetContribution : public NetProc {

    public:
-      explicit NetContribution(NetExpr*lval, NetExpr*rval);
+      explicit NetContribution(NetEAccess*lval, NetExpr*rval);
      ~NetContribution();

+      const NetEAccess* lval() const;
+      const NetExpr* rval() const;
+
+      virtual bool emit_proc(struct target_t*) const;
      virtual void dump(ostream&, unsigned ind) const;

    private:
-      NetExpr*lval_;
+      NetEAccess*lval_;
      NetExpr*rval_;
 };

@@ -2968,7 +3014,7 @@ class NetEUFunc  : public NetExpr {
      virtual void expr_scan(struct expr_scan_t*) const;
      virtual NetEUFunc*dup_expr() const;
      virtual NexusSet* nex_input(bool rem_out = true);
-      virtual NetNet* synthesize(Design*des, NetScope*scope);
+      virtual NetNet* synthesize(Design*des, NetScope*scope, NetExpr*root);

    private:
      NetScope*scope_;
@@ -2987,9 +3033,12 @@ class NetEUFunc  : public NetExpr {
 class NetEAccess : public NetExpr {

    public:
-      explicit NetEAccess(NetBranch*br, nature_t*nat);
+      explicit NetEAccess(NetBranch*br, ivl_nature_t nat);
      ~NetEAccess();

+      ivl_nature_t get_nature() const { return nature_; }
+      NetBranch*   get_branch() const { return branch_; }
+
      virtual ivl_variable_type_t expr_type() const;
      virtual void dump(ostream&) const;

@@ -2999,7 +3048,7 @@ class NetEAccess : public NetExpr {

    private:
      NetBranch*branch_;
-      nature_t*nature_;
+      ivl_nature_t nature_;
 };

 /*
@@ -3175,6 +3224,7 @@ class NetEBinary  : public NetExpr {
 	// widths.
      virtual bool has_width() const;

+      virtual void resolve_pexpr_type();
      virtual NetEBinary* dup_expr() const;
      virtual NexusSet* nex_input(bool rem_out = true);

@@ -3207,7 +3257,7 @@ class NetEBAdd : public NetEBinary {
      virtual bool set_width(unsigned w, bool last_chance);
      virtual NetEBAdd* dup_expr() const;
      virtual NetExpr* eval_tree(int prune_to_width = -1);
-      virtual NetNet* synthesize(Design*, NetScope*scope);
+      virtual NetNet* synthesize(Design*, NetScope*scope, NetExpr*root);

    private:
      NetECReal* eval_tree_real_();
@@ -3229,7 +3279,10 @@ class NetEBDiv : public NetEBinary {
      virtual bool set_width(unsigned w, bool last_chance);
      virtual NetEBDiv* dup_expr() const;
      virtual NetExpr* eval_tree(int prune_to_width = -1);
-      virtual NetNet* synthesize(Design*, NetScope*scope);
+      virtual NetNet* synthesize(Design*, NetScope*scope, NetExpr*root);
+
+    private:
+      NetExpr* eval_tree_real_();
 };

 /*
@@ -3256,7 +3309,7 @@ class NetEBBits : public NetEBinary {
      virtual NetEBBits* dup_expr() const;
      virtual NetEConst* eval_tree(int prune_to_width = -1);

-      virtual NetNet* synthesize(Design*, NetScope*scope);
+      virtual NetNet* synthesize(Design*, NetScope*scope, NetExpr*root);
 };

 /*
@@ -3287,7 +3340,7 @@ class NetEBComp : public NetEBinary {
      virtual NetEBComp* dup_expr() const;
      virtual NetEConst* eval_tree(int prune_to_width = -1);

-      virtual NetNet* synthesize(Design*, NetScope*scope);
+      virtual NetNet* synthesize(Design*, NetScope*scope, NetExpr*root);

    private:
      NetEConst* must_be_leeq_(NetExpr*le, const verinum&rv, bool eq_flag);
@@ -3319,7 +3372,7 @@ class NetEBLogic : public NetEBinary {
      virtual bool set_width(unsigned w, bool last_chance =false);
      virtual NetEBLogic* dup_expr() const;
      virtual NetEConst* eval_tree(int prune_to_width = -1);
-      virtual NetNet* synthesize(Design*, NetScope*scope);
+      virtual NetNet* synthesize(Design*, NetScope*scope, NetExpr*root);

    private:
 };
@@ -3340,7 +3393,6 @@ class NetEBMinMax : public NetEBinary {
      virtual ivl_variable_type_t expr_type() const;

    private:
-
 };

 /*
@@ -3357,12 +3409,10 @@ class NetEBMult : public NetEBinary {
      virtual bool set_width(unsigned w, bool last_chance);
      virtual NetEBMult* dup_expr() const;
      virtual NetExpr* eval_tree(int prune_to_width = -1);
-      virtual NetNet* synthesize(Design*, NetScope*scope);
+      virtual NetNet* synthesize(Design*, NetScope*scope, NetExpr*root);

    private:
-
      NetExpr* eval_tree_real_();
-
 };

 /*
@@ -3379,12 +3429,10 @@ class NetEBPow : public NetEBinary {
      virtual bool set_width(unsigned w, bool last_chance);
      virtual NetEBPow* dup_expr() const;
      virtual NetExpr* eval_tree(int prune_to_width = -1);
-      virtual NetNet* synthesize(Design*, NetScope*scope);
+      virtual NetNet* synthesize(Design*, NetScope*scope, NetExpr*root);

    private:
-
      NetExpr* eval_tree_real_();
-
 };


@@ -3411,7 +3459,7 @@ class NetEBShift : public NetEBinary {
      virtual NetEBShift* dup_expr() const;
      virtual NetEConst* eval_tree(int prune_to_width = -1);

-      virtual NetNet* synthesize(Design*, NetScope*scope);
+      virtual NetNet* synthesize(Design*, NetScope*scope, NetExpr*root);

    private:
 };
@@ -3445,7 +3493,7 @@ class NetEConcat  : public NetExpr {
      virtual bool set_width(unsigned w, bool last_chance =false);
      virtual NetEConcat* dup_expr() const;
      virtual NetEConst*  eval_tree(int prune_to_width = -1);
-      virtual NetNet*synthesize(Design*, NetScope*scope);
+      virtual NetNet*synthesize(Design*, NetScope*scope, NetExpr*root);
      virtual void expr_scan(struct expr_scan_t*) const;
      virtual void dump(ostream&) const;

@@ -3473,6 +3521,7 @@ class NetEParam  : public NetExpr {
      ~NetEParam();

      virtual NexusSet* nex_input(bool rem_out = true);
+      virtual void resolve_pexpr_type();
      virtual bool set_width(unsigned w, bool last_chance);
      virtual bool has_width() const;
      virtual void expr_scan(struct expr_scan_t*) const;
@@ -3521,7 +3570,7 @@ class NetESelect  : public NetExpr {
      virtual void expr_scan(struct expr_scan_t*) const;
      virtual NetEConst* eval_tree(int prune_to_width = -1);
      virtual NetESelect* dup_expr() const;
-      virtual NetNet*synthesize(Design*des, NetScope*scope);
+      virtual NetNet*synthesize(Design*des, NetScope*scope, NetExpr*root);
      virtual void dump(ostream&) const;

    private:
@@ -3601,7 +3650,7 @@ class NetESFunc  : public NetExpr {

      virtual void expr_scan(struct expr_scan_t*) const;
      virtual NetESFunc*dup_expr() const;
-      virtual NetNet*synthesize(Design*, NetScope*scope);
+      virtual NetNet*synthesize(Design*, NetScope*scope, NetExpr*root);

    private:
      const char* name_;
@@ -3638,7 +3687,7 @@ class NetETernary  : public NetExpr {
      virtual NexusSet* nex_input(bool rem_out = true);
      virtual void expr_scan(struct expr_scan_t*) const;
      virtual void dump(ostream&) const;
-      virtual NetNet*synthesize(Design*, NetScope*scope);
+      virtual NetNet*synthesize(Design*, NetScope*scope, NetExpr*root);

    public:
      static bool test_operand_compat(ivl_variable_type_t tru, ivl_variable_type_t fal);
@@ -3678,7 +3727,7 @@ class NetEUnary  : public NetExpr {

      virtual NetEUnary* dup_expr() const;
      virtual NetExpr* eval_tree(int prune_to_width = -1);
-      virtual NetNet* synthesize(Design*, NetScope*scope);
+      virtual NetNet* synthesize(Design*, NetScope*scope, NetExpr*root);

      virtual ivl_variable_type_t expr_type() const;
      virtual NexusSet* nex_input(bool rem_out = true);
@@ -3699,7 +3748,7 @@ class NetEUBits : public NetEUnary {
      NetEUBits(char op, NetExpr*ex);
      ~NetEUBits();

-      virtual NetNet* synthesize(Design*, NetScope*scope);
+      virtual NetNet* synthesize(Design*, NetScope*scope, NetExpr*root);

      virtual NetEUBits* dup_expr() const;
      virtual NetExpr* eval_tree(int prune_to_width = -1);
@@ -3713,7 +3762,7 @@ class NetEUReduce : public NetEUnary {
      ~NetEUReduce();

      virtual bool set_width(unsigned w, bool last_chance);
-      virtual NetNet* synthesize(Design*, NetScope*scope);
+      virtual NetNet* synthesize(Design*, NetScope*scope, NetExpr*root);
      virtual NetEUReduce* dup_expr() const;
      virtual NetEConst* eval_tree(int prune_to_width = -1);
      virtual ivl_variable_type_t expr_type() const;
@@ -3740,7 +3789,7 @@ class NetESignal  : public NetExpr {
      virtual bool set_width(unsigned, bool last_chance);

      virtual NetESignal* dup_expr() const;
-      NetNet* synthesize(Design*des, NetScope*scope);
+      NetNet* synthesize(Design*des, NetScope*scope, NetExpr*root);
      NexusSet* nex_input(bool rem_out = true);

 	// This is the expression for selecting an array word, if this
@@ -3863,12 +3912,17 @@ class Design {
      void add_node(NetNode*);
      void del_node(NetNode*);

+	// BRANCHES
+      void add_branch(NetBranch*);
+
 	// PROCESSES
      void add_process(NetProcTop*);
      void add_process(NetAnalogTop*);
      void delete_process(NetProcTop*);
      bool check_always_delay() const;

+      NetNet* find_discipline_reference(ivl_discipline_t dis, NetScope*scope);
+
 	// Iterate over the design...
      void dump(ostream&) const;
      void functor(struct functor_t*);
@@ -3879,9 +3933,6 @@ class Design {
 	// detected. It prevents code being emitted.
      unsigned errors;

-    public:
-      string local_symbol(const string&path);
-
    private:
 	// Keep a tree of scopes. The NetScope class handles the wide
 	// tree and per-hop searches for me.
@@ -3893,18 +3944,24 @@ class Design {
      NetNode*nodes_functor_cur_;
      NetNode*nodes_functor_nxt_;

+	// List the branches in the design.
+      NetBranch*branches_;
+
 	// List the processes in the design.
      NetProcTop*procs_;
      NetProcTop*procs_idx_;

+	// List the ANALOG processes in the design.
      NetAnalogTop*aprocs_;

+	// Map of discipline take to NetNet for the reference node.
+      map<perm_string,NetNet*>discipline_references_;
+
+	// Map the design arguments to values.
      map<string,const char*> flags_;

      int des_precision_;

-      unsigned lcounter_;
-
    private: // not implemented
      Design(const Design&);
      Design& operator= (const Design&);
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2001-2008 Stephen Williams (steve@icarus.com)
+ * Copyright (c) 2001-2009 Stephen Williams (steve@icarus.com)
 *
 *    This source code is free software; you can redistribute it
 *    and/or modify it in source code form under the terms of the GNU
@@ -233,6 +233,24 @@ NetNet* make_const_x(Design*des, NetScope*scope, unsigned long wid)

 NetExpr* condition_reduce(NetExpr*expr)
 {
+      if (expr->expr_type() == IVL_VT_REAL) {
+	    if (NetECReal *tmp = dynamic_cast<NetECReal*>(expr)) {
+		  verinum::V res;
+		  if (tmp->value().as_double() == 0.0) res = verinum::V0;
+		  else res = verinum::V1;
+		  verinum vres (res, 1, true);
+		  NetExpr *rtn = new NetEConst(vres);
+		  rtn->set_line(*expr);
+		  delete expr;
+		  return rtn;
+	    }
+
+	    NetExpr *rtn = new NetEBComp('n', expr,
+	                                 new NetECReal(verireal(0.0)));
+	    rtn->set_line(*expr);
+	    return rtn;
+      }
+
      if (expr->expr_width() == 1)
 	    return expr;

@@ -250,6 +268,13 @@ NetExpr* condition_reduce(NetExpr*expr)
      return cmp;
 }

+void probe_expr_width(Design*des, NetScope*scope, PExpr*pe)
+{
+      ivl_variable_type_t expr_type = IVL_VT_NO_TYPE;
+      bool flag = false;
+      pe->test_width(des, scope, 0, 0, expr_type, flag);
+}
+
 NetExpr* elab_and_eval(Design*des, NetScope*scope,
 		       const PExpr*pe, int expr_wid, int prune_width)
 {
@@ -326,6 +351,13 @@ hname_t eval_path_component(Design*des, NetScope*scope,

      const index_component_t&index = comp.index.front();

+      if (index.sel != index_component_t::SEL_BIT) {
+	    cerr << index.msb->get_fileline() << ": error: "
+		 << "Part select is not valid for this kind of object." << endl;
+	    des->errors += 1;
+	    return hname_t(comp.name, 0);
+      }
+
 	// The parser will assure that path components will have only
 	// bit select index expressions. For example, "foo[n]" is OK,
 	// but "foo[n:m]" is not.
@@ -374,12 +406,22 @@ std::list<hname_t> eval_scope_path(Design*des, NetScope*scope,
 /*
 * Human readable version of op. Used in elaboration error messages.
 */
-const char *human_readable_op(const char op)
+const char *human_readable_op(const char op, bool unary)
 {
 	const char *type;
 	switch (op) {
 	    case '~': type = "~";  break;  // Negation

+	    case '+': type = "+";  break;
+	    case '-': type = "-";  break;
+	    case '*': type = "*";  break;
+	    case '/': type = "/";  break;
+
+	    case '<': type = "<";  break;
+	    case '>': type = ">";  break;
+	    case 'L': type = "<="; break;
+	    case 'G': type = ">="; break;
+	      
 	    case '^': type = "^";  break;  // XOR
 	    case 'X': type = "~^"; break;  // XNOR
 	    case '&': type = "&";  break;  // Bitwise AND
@@ -391,13 +433,19 @@ const char *human_readable_op(const char op)
 	    case 'a': type = "&&"; break;  // Logical AND
 	    case 'o': type = "||"; break;  // Logical OR

+	    case 'e': type = "==";  break;
+	    case 'n': type = "!=";  break;
 	    case 'E': type = "==="; break;  // Case equality
-	    case 'N': type = "!=="; break;  // Case inequality
+	    case 'N':
+		if (unary) type = "~|";     // NOR
+		else type = "!==";          // Case inequality
+		break;

 	    case 'l': type = "<<(<)"; break;  // Left shifts
 	    case 'r': type = ">>";    break;  // Logical right shift
 	    case 'R': type = ">>>";   break;  // Arithmetic right shift

+	    case 'p': type = "**"; break; // Power
 	    default:
 	      assert(0);
 	}
@@ -1,7 +1,7 @@
 #ifndef __netmisc_H
 #define __netmisc_H
 /*
- * Copyright (c) 1999-2008 Stephen Williams (steve@icarus.com)
+ * Copyright (c) 1999-2009 Stephen Williams (steve@icarus.com)
 *
 *    This source code is free software; you can redistribute it
 *    and/or modify it in source code form under the terms of the GNU
@@ -63,10 +63,12 @@ inline NetScope* symbol_search(const LineInfo*li,
 * not transforming the expression at all, if it is already wide
 * enough.
 */
-extern NetExpr*pad_to_width(NetExpr*expr, unsigned wid);
-extern NetNet*pad_to_width(Design*des, NetNet*n, unsigned w);
+extern NetExpr*pad_to_width(NetExpr*expr, unsigned wid, const LineInfo&info);
+extern NetNet*pad_to_width(Design*des, NetNet*n, unsigned w,
+                           const LineInfo&info);

-extern NetNet*pad_to_width_signed(Design*des, NetNet*n, unsigned w);
+extern NetNet*pad_to_width_signed(Design*des, NetNet*n, unsigned w,
+                                  const LineInfo&info);

 /*
 * Generate the nodes necessary to cast an expression (a net) to a
@@ -152,6 +154,8 @@ extern NetExpr* elab_and_eval(Design*des, NetScope*scope,
 			      const PExpr*pe, int expr_wid,
 			      int prune_width =-1);

+void probe_expr_width(Design*des, NetScope*scope, PExpr*pe);
+
 /*
 * This function elaborates an expression as if it is for the r-value
 * of an assignment, The data_type_lv and expr_wid_lv are the type and
@@ -162,6 +166,13 @@ extern NetExpr* elab_and_eval(Design*des, NetScope*scope,
 extern NetExpr* elaborate_rval_expr(Design*des, NetScope*scope,
 				    ivl_variable_type_t data_type_lv,
 				    int expr_wid_lv, PExpr*expr);
+
+/*
+ * Used by elaboration to suppress the sign of an operand if the other
+ * is unsigned.
+ */
+extern void suppress_binary_operand_sign_if_needed(NetExpr*lp, NetExpr*rp);
+
 /*
 * This procedure elaborates an expression and if the elaboration is
 * successful the original expression is replaced with the new one.
@@ -199,7 +210,7 @@ extern bool type_is_vectorable(ivl_variable_type_t type);
 /*
 * Return a human readable version of the operator.
 */
-const char *human_readable_op(const char op);
+const char *human_readable_op(const char op, bool unary = false);

 /*
 * Is the expression a constant value and if so what is its logical
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 1999 Stephen Williams (steve@icarus.com)
+ * Copyright (c) 1999-2009 Stephen Williams (steve@icarus.com)
 *
 *    This source code is free software; you can redistribute it
 *    and/or modify it in source code form under the terms of the GNU
@@ -16,9 +16,6 @@
 *    along with this program; if not, write to the Free Software
 *    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
 */
-#ifdef HAVE_CVS_IDENT
-#ident "$Id: nodangle.cc,v 1.21 2004/02/20 18:53:35 steve Exp $"
-#endif

 # include "config.h"

@@ -151,14 +148,7 @@ void nodangle_f::signal(Design*des, NetNet*sig)

 	/* Check to see if the signal is completely unconnected. If
 	   all the bits are unlinked, then delete it. */
-      bool linked_flag = false;
-      for (unsigned idx =  0 ;  idx < sig->pin_count() ;  idx += 1)
-	    if (sig->pin(idx).is_linked()) {
-		  linked_flag = true;
-		  break;
-	    }
-
-      if (! linked_flag) {
+      if (! sig->is_linked()) {
 	    delete sig;
 	    stotal += 1;
 	    return;
@@ -230,86 +220,3 @@ void nodangle(Design*des)
      } while (fun.scontinue || fun.econtinue);

 }
-
-/*
- * $Log: nodangle.cc,v $
- * Revision 1.21  2004/02/20 18:53:35  steve
- *  Addtrbute keys are perm_strings.
- *
- * Revision 1.20  2004/01/15 06:04:19  steve
- *  Remove duplicate NetEvProbe objects in nodangle.
- *
- * Revision 1.19  2003/06/25 04:46:03  steve
- *  Do not elide ports of cells.
- *
- * Revision 1.18  2003/04/22 04:48:30  steve
- *  Support event names as expressions elements.
- *
- * Revision 1.17  2002/08/12 01:35:00  steve
- *  conditional ident string using autoconfig.
- *
- * Revision 1.16  2002/07/24 16:24:45  steve
- *  Rewrite find_similar_event to support doing
- *  all event matching and replacement in one
- *  shot, saving time in the scans.
- *
- * Revision 1.15  2002/05/26 01:39:02  steve
- *  Carry Verilog 2001 attributes with processes,
- *  all the way through to the ivl_target API.
- *
- *  Divide signal reference counts between rval
- *  and lval references.
- *
- * Revision 1.14  2002/02/02 06:13:38  steve
- *  event find_similar should not find self.
- *
- * Revision 1.13  2001/07/27 02:41:55  steve
- *  Fix binding of dangling function ports. do not elide them.
- *
- * Revision 1.12  2001/07/25 03:10:49  steve
- *  Create a config.h.in file to hold all the config
- *  junk, and support gcc 3.0. (Stephan Boettcher)
- *
- * Revision 1.11  2001/02/17 05:14:35  steve
- *  Cannot elide task ports.
- *
- * Revision 1.10  2000/11/19 20:48:53  steve
- *  Killing some signals might make others killable.
- *
- * Revision 1.9  2000/11/18 05:12:45  steve
- *  Delete unreferenced signals no matter what.
- *
- * Revision 1.8  2000/06/25 19:59:42  steve
- *  Redesign Links to include the Nexus class that
- *  carries properties of the connected set of links.
- *
- * Revision 1.7  2000/05/31 02:26:49  steve
- *  Globally merge redundant event objects.
- *
- * Revision 1.6  2000/05/07 04:37:56  steve
- *  Carry strength values from Verilog source to the
- *  pform and netlist for gates.
- *
- *  Change vvm constants to use the driver_t to drive
- *  a constant value. This works better if there are
- *  multiple drivers on a signal.
- *
- * Revision 1.5  2000/04/28 21:00:29  steve
- *  Over agressive signal elimination in constant probadation.
- *
- * Revision 1.4  2000/04/18 04:50:20  steve
- *  Clean up unneeded NetEvent objects.
- *
- * Revision 1.3  2000/02/23 02:56:55  steve
- *  Macintosh compilers do not support ident.
- *
- * Revision 1.2  1999/11/28 23:42:02  steve
- *  NetESignal object no longer need to be NetNode
- *  objects. Let them keep a pointer to NetNet objects.
- *
- * Revision 1.1  1999/11/18 03:52:20  steve
- *  Turn NetTmp objects into normal local NetNet objects,
- *  and add the nodangle functor to clean up the local
- *  symbols generated by elaboration and other steps.
- *
- */
--- a/Show More
+++ b/Show More