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Fix regression of always3.1.8A with VHDL target 

The patch for pr2516774 exposed a bug which caused
always3.1.8A to fail. This patch corrects that.

The test to decide when to use a sensitivity list
rather than an explicit wait statement wasn't tight enough.
This commit is contained in:
Nick Gasson 2009-01-18 21:54:00 +00:00 committed by Stephen Williams
parent 78bc4b5d47
commit ba8688c0d1
1 changed files with 2 additions and 1 deletions
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3
tgt-vhdl/stmt.cc
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@ -719,7 +719,8 @@ static int draw_wait(vhdl_procedural *_proc, stmt_container *container,
// If this container is the top-level statement (i.e. it is the
// first thing inside a process) then we can extract these
// events out into the sensitivity list
bool is_top_level = proc->get_container()->empty();
bool is_top_level = container == proc->get_container()
&& container->empty();
// See if this can be implemented in a more idomatic way before we
// fall back on the generic translation