Fix some more errors when reading from VHDL outputs
I forgot to modify the LPM generating code with the last patch. This *should* now always ensure a signal is readable before code is generated to read from it.
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69e91e4065
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ee5302cf33
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@ -26,18 +26,6 @@
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#include <sstream>
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#include <iostream>
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// Return a variable reference for a nexus that is guaranteed to
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// be readable.
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static vhdl_var_ref *readable_ref(vhdl_scope* scope, ivl_nexus_t nex)
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{
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vhdl_var_ref* ref = nexus_to_var_ref(scope, nex);
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vhdl_decl* decl = scope->get_decl(ref->get_name());
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decl->ensure_readable();
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return ref;
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}
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/*
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* Convert the inputs of a logic gate to a binary expression.
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*/
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@ -32,7 +32,7 @@ static vhdl_expr *part_select_base(vhdl_scope *scope, ivl_lpm_t lpm)
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vhdl_expr *off;
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ivl_nexus_t base = ivl_lpm_data(lpm, 1);
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if (base != NULL)
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off = nexus_to_var_ref(scope, base);
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off = readable_ref(scope, base);
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else
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off = new vhdl_const_int(ivl_lpm_base(lpm));
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@ -49,7 +49,7 @@ static vhdl_expr *concat_lpm_to_expr(vhdl_scope *scope, ivl_lpm_t lpm)
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new vhdl_binop_expr(VHDL_BINOP_CONCAT, result_type);
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for (int i = ivl_lpm_selects(lpm) - 1; i >= 0; i--) {
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vhdl_expr *e = nexus_to_var_ref(scope, ivl_lpm_data(lpm, i));
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vhdl_expr *e = readable_ref(scope, ivl_lpm_data(lpm, i));
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if (NULL == e)
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return NULL;
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@ -67,7 +67,7 @@ static vhdl_expr *binop_lpm_to_expr(vhdl_scope *scope, ivl_lpm_t lpm, vhdl_binop
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vhdl_binop_expr *expr = new vhdl_binop_expr(op, result_type);
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for (int i = 0; i < 2; i++) {
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vhdl_expr *e = nexus_to_var_ref(scope, ivl_lpm_data(lpm, i));
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vhdl_expr *e = readable_ref(scope, ivl_lpm_data(lpm, i));
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if (NULL == e)
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return NULL;
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@ -94,7 +94,7 @@ static vhdl_expr *rel_lpm_to_expr(vhdl_scope *scope, ivl_lpm_t lpm, vhdl_binop_t
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vhdl_binop_expr *expr = new vhdl_binop_expr(op, vhdl_type::boolean());
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for (int i = 0; i < 2; i++) {
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vhdl_expr *e = nexus_to_var_ref(scope, ivl_lpm_data(lpm, i));
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vhdl_expr *e = readable_ref(scope, ivl_lpm_data(lpm, i));
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if (NULL == e)
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return NULL;
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@ -108,7 +108,7 @@ static vhdl_expr *rel_lpm_to_expr(vhdl_scope *scope, ivl_lpm_t lpm, vhdl_binop_t
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static vhdl_expr *part_select_vp_lpm_to_expr(vhdl_scope *scope, ivl_lpm_t lpm)
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{
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vhdl_var_ref *selfrom = nexus_to_var_ref(scope, ivl_lpm_data(lpm, 0));
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vhdl_var_ref *selfrom = readable_ref(scope, ivl_lpm_data(lpm, 0));
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if (NULL == selfrom)
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return NULL;
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@ -125,7 +125,7 @@ static vhdl_expr *part_select_vp_lpm_to_expr(vhdl_scope *scope, ivl_lpm_t lpm)
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static vhdl_expr *part_select_pv_lpm_to_expr(vhdl_scope *scope, ivl_lpm_t lpm)
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{
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return nexus_to_var_ref(scope, ivl_lpm_data(lpm, 0));
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return readable_ref(scope, ivl_lpm_data(lpm, 0));
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}
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static vhdl_expr *ufunc_lpm_to_expr(vhdl_scope *scope, ivl_lpm_t lpm)
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@ -134,7 +134,7 @@ static vhdl_expr *ufunc_lpm_to_expr(vhdl_scope *scope, ivl_lpm_t lpm)
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vhdl_fcall *fcall = new vhdl_fcall(ivl_scope_basename(f_scope), NULL);
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for (unsigned i = 0; i < ivl_lpm_size(lpm); i++) {
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vhdl_var_ref *ref = nexus_to_var_ref(scope, ivl_lpm_data(lpm, i));
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vhdl_var_ref *ref = readable_ref(scope, ivl_lpm_data(lpm, i));
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if (NULL == ref)
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return NULL;
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@ -147,7 +147,7 @@ static vhdl_expr *ufunc_lpm_to_expr(vhdl_scope *scope, ivl_lpm_t lpm)
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static vhdl_expr *reduction_lpm_to_expr(vhdl_scope *scope, ivl_lpm_t lpm,
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support_function_t f, bool invert)
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{
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vhdl_var_ref *ref = nexus_to_var_ref(scope, ivl_lpm_data(lpm, 0));
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vhdl_var_ref *ref = readable_ref(scope, ivl_lpm_data(lpm, 0));
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if (NULL == ref)
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return NULL;
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@ -174,7 +174,7 @@ static vhdl_expr *reduction_lpm_to_expr(vhdl_scope *scope, ivl_lpm_t lpm,
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static vhdl_expr *sign_extend_lpm_to_expr(vhdl_scope *scope, ivl_lpm_t lpm)
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{
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vhdl_expr *ref = nexus_to_var_ref(scope, ivl_lpm_data(lpm, 0));
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vhdl_expr *ref = readable_ref(scope, ivl_lpm_data(lpm, 0));
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if (ref)
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return ref->resize(ivl_lpm_width(lpm));
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else
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@ -194,7 +194,7 @@ static vhdl_expr *array_lpm_to_expr(vhdl_scope *scope, ivl_lpm_t lpm)
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vhdl_type *atype = new vhdl_type(*adecl->get_type());
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vhdl_expr *select = nexus_to_var_ref(scope, ivl_lpm_select(lpm));
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vhdl_expr *select = readable_ref(scope, ivl_lpm_select(lpm));
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if (NULL == select)
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return NULL;
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@ -208,8 +208,8 @@ static vhdl_expr *array_lpm_to_expr(vhdl_scope *scope, ivl_lpm_t lpm)
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static vhdl_expr *shift_lpm_to_expr(vhdl_scope *scope, ivl_lpm_t lpm,
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vhdl_binop_t shift_op)
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{
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vhdl_expr *lhs = nexus_to_var_ref(scope, ivl_lpm_data(lpm, 0));
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vhdl_expr *rhs = nexus_to_var_ref(scope, ivl_lpm_data(lpm, 1));
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vhdl_expr *lhs = readable_ref(scope, ivl_lpm_data(lpm, 0));
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vhdl_expr *rhs = readable_ref(scope, ivl_lpm_data(lpm, 1));
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if (!lhs || !rhs)
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return NULL;
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@ -223,7 +223,7 @@ static vhdl_expr *shift_lpm_to_expr(vhdl_scope *scope, ivl_lpm_t lpm,
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static vhdl_expr *repeat_lpm_to_expr(vhdl_scope *scope, ivl_lpm_t lpm)
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{
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vhdl_expr *in = nexus_to_var_ref(scope, ivl_lpm_data(lpm, 0));
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vhdl_expr *in = readable_ref(scope, ivl_lpm_data(lpm, 0));
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return new vhdl_bit_spec_expr(NULL, in);
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}
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@ -297,10 +297,10 @@ static int draw_mux_lpm(vhdl_arch *arch, ivl_lpm_t lpm)
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vhdl_scope *scope = arch->get_scope();
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vhdl_expr *s0 = nexus_to_var_ref(scope, ivl_lpm_data(lpm, 0));
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vhdl_expr *s1 = nexus_to_var_ref(scope, ivl_lpm_data(lpm, 1));
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vhdl_expr *s0 = readable_ref(scope, ivl_lpm_data(lpm, 0));
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vhdl_expr *s1 = readable_ref(scope, ivl_lpm_data(lpm, 1));
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vhdl_expr *sel = nexus_to_var_ref(scope, ivl_lpm_select(lpm));
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vhdl_expr *sel = readable_ref(scope, ivl_lpm_select(lpm));
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vhdl_expr *b1 = new vhdl_const_bit('1');
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vhdl_expr *t1 =
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new vhdl_binop_expr(sel, VHDL_BINOP_EQ, b1, vhdl_type::boolean());
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@ -352,6 +352,18 @@ vhdl_var_ref *nexus_to_var_ref(vhdl_scope *scope, ivl_nexus_t nexus)
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return ref;
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}
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// Return a variable reference for a nexus that is guaranteed to
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// be readable.
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vhdl_var_ref* readable_ref(vhdl_scope* scope, ivl_nexus_t nex)
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{
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vhdl_var_ref* ref = nexus_to_var_ref(scope, nex);
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vhdl_decl* decl = scope->get_decl(ref->get_name());
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decl->ensure_readable();
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return ref;
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}
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/*
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* Translate all the primitive logic gates into concurrent
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* signal assignments.
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@ -553,7 +565,8 @@ static void map_signal(ivl_signal_t to, vhdl_entity *parent,
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// The solution used here is to create an intermediate signal
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// and connect it to both ports.
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vhdl_decl* from_decl =
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parent->get_arch()->get_scope()->get_decl(ref->get_name());
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parent->get_arch()->get_scope()->get_decl(ref->get_name());
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from_decl->print();
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if (!from_decl->is_readable()
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&& !arch_scope->have_declared(name + "_Readable")) {
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vhdl_decl* tmp_decl =
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@ -406,9 +406,12 @@ void vhdl_port_decl::ensure_readable()
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}
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// A port is readable if it is not `out'.
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// We also make `buffer' ports not readable for these purposes since
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// buffers cannot be directly mapped to outputs without an intermediate
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// signal.
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bool vhdl_port_decl::is_readable() const
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{
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return mode_ != VHDL_PORT_OUT;
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return mode_ != VHDL_PORT_OUT && mode_ != VHDL_PORT_BUFFER;
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}
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void vhdl_var_decl::emit(std::ostream &of, int level) const
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@ -28,6 +28,7 @@ vhdl_expr *translate_time_expr(ivl_expr_t e);
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ivl_design_t get_vhdl_design();
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vhdl_var_ref *nexus_to_var_ref(vhdl_scope *arch_scope, ivl_nexus_t nexus);
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vhdl_var_ref* readable_ref(vhdl_scope* scope, ivl_nexus_t nex);
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int draw_stask_display(vhdl_procedural *proc, stmt_container *container,
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ivl_statement_t stmt, bool newline = true);
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