Seperate islands from tran/switch islands
Tran islands are a kinds of island, so seperate the tran handling from the core island concept. This will allow for creating new kinds of islands. (Think analog.)
This commit is contained in:
Stephen Williams
parent
fc00bd9a5b
commit
d5f1d0e9eb
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@ -81,7 +81,7 @@ concat.o \
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dff.o extend.o npmos.o part.o reduce.o resolv.o sfunc.o stop.o symbols.o \
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ufunc.o codes.o \
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vthread.o schedule.o statistics.o tables.o udp.o vvp_island.o vvp_net.o \
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event.o logic.o delay.o words.o $V
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event.o logic.o delay.o words.o island_tran.o $V
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ifeq (@WIN32@,yes)
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# Under Windows (mingw) I need to make the ivl.exe in two steps.
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@ -1797,3 +1797,13 @@ void compile_param_real(char*label, char*name, char*value,
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free(label);
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free(value);
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}
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void compile_island(char*label, char*type)
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{
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if (strcmp(type,"tran") == 0)
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compile_island_tran(label);
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else
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assert(0);
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free(type);
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}
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@ -461,12 +461,13 @@ extern void compile_island(char*label, char*type);
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extern void compile_island_port(char*label, char*island, char*src);
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extern void compile_island_import(char*label, char*island, char*src);
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extern void compile_island_export(char*label, char*island);
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extern void compile_island_cleanup(void);
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extern void compile_island_tran(char*label);
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extern void compile_island_tranif(int sense, char*island,
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char*ba, char*bb, char*src);
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extern void compile_island_tranvp(char*island, char*ba, char*bb,
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unsigned width, unsigned part, unsigned off);
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extern void compile_island_cleanup(void);
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#endif
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@ -0,0 +1,370 @@
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/*
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* Copyright (c) 2008 Stephen Williams (steve@icarus.com)
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*
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* This source code is free software; you can redistribute it
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* and/or modify it in source code form under the terms of the GNU
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* General Public License as published by the Free Software
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* Foundation; either version 2 of the License, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
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*/
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# include "vvp_island.h"
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# include "compile.h"
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# include "symbols.h"
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# include "schedule.h"
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# include <list>
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using namespace std;
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class vvp_island_tran : public vvp_island {
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public:
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void run_island();
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};
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struct vvp_island_branch_tran : public vvp_island_branch {
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// Behavior. (This stuff should be moved to a derived
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// class. The members here are specific to the tran island
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// class.)
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bool run_test_enabled();
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void run_resolution();
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bool active_high;
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bool enabled_flag;
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vvp_net_t*en;
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int flags;
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unsigned width, part, offset;
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};
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static inline vvp_island_branch_tran* BRANCH_TRAN(vvp_island_branch*tmp)
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{
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vvp_island_branch_tran*res = dynamic_cast<vvp_island_branch_tran*>(tmp);
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assert(res);
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return res;
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}
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void vvp_island_tran::run_island()
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{
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// Test to see if any of the branches are enabled.
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bool runnable = false;
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for (vvp_island_branch*cur = branches_ ; cur ; cur = cur->next_branch) {
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vvp_island_branch_tran*tmp = dynamic_cast<vvp_island_branch_tran*>(cur);
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assert(tmp);
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runnable |= tmp->run_test_enabled();
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}
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if (runnable == false)
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return;
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for (vvp_island_branch*cur = branches_ ; cur ; cur = cur->next_branch) {
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vvp_island_branch_tran*tmp = dynamic_cast<vvp_island_branch_tran*>(cur);
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assert(tmp);
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tmp->run_resolution();
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}
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}
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bool vvp_island_branch_tran::run_test_enabled()
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{
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flags = 0;
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vvp_island_port*ep = en? dynamic_cast<vvp_island_port*> (en->fun) : 0;
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// If there is no ep port (no "enabled" input) then this is a
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// tran branch. Assume it is always enabled.
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if (ep == 0) {
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enabled_flag = true;
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return true;
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}
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enabled_flag = false;
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vvp_bit4_t enable_val = ep->invalue.value(0).value();
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if (active_high==true && enable_val != BIT4_1)
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return false;
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if (active_high==false && enable_val != BIT4_0)
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return false;
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enabled_flag = true;
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return true;
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}
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static void mark_done_flags(list<vvp_branch_ptr_t>&connections)
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{
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for (list<vvp_branch_ptr_t>::iterator idx = connections.begin()
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; idx != connections.end() ; idx ++ ) {
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vvp_island_branch*tmp_ptr = idx->ptr();
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vvp_island_branch_tran*cur = dynamic_cast<vvp_island_branch_tran*>(tmp_ptr);
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unsigned tmp_ab = idx->port();
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cur->flags |= 1 << tmp_ab;
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}
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}
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static void mark_visited_flags(list<vvp_branch_ptr_t>&connections)
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{
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for (list<vvp_branch_ptr_t>::iterator idx = connections.begin()
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; idx != connections.end() ; idx ++ ) {
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vvp_island_branch*tmp_ptr = idx->ptr();
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vvp_island_branch_tran*cur = dynamic_cast<vvp_island_branch_tran*>(tmp_ptr);
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assert(cur);
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unsigned tmp_ab = idx->port();
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cur->flags |= 4 << tmp_ab;
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}
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}
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static void clear_visited_flags(list<vvp_branch_ptr_t>&connections)
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{
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for (list<vvp_branch_ptr_t>::iterator idx = connections.begin()
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; idx != connections.end() ; idx ++ ) {
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vvp_island_branch_tran*tmp_ptr = BRANCH_TRAN(idx->ptr());
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unsigned tmp_ab = idx->port();
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tmp_ptr->flags &= ~(4 << tmp_ab);
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}
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}
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static vvp_vector8_t get_value_from_branch(vvp_branch_ptr_t cur);
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static void resolve_values_from_connections(vvp_vector8_t&val,
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list<vvp_branch_ptr_t>&connections)
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{
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for (list<vvp_branch_ptr_t>::iterator idx = connections.begin()
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; idx != connections.end() ; idx ++ ) {
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vvp_vector8_t tmp = get_value_from_branch(*idx);
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if (val.size() == 0)
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val = tmp;
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else if (tmp.size() != 0)
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val = resolve(val, tmp);
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}
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}
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static vvp_vector8_t get_value_from_branch(vvp_branch_ptr_t cur)
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{
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vvp_island_branch_tran*ptr = BRANCH_TRAN(cur.ptr());
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assert(ptr);
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unsigned ab = cur.port();
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unsigned ab_other = ab^1;
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// If the branch link is disabled, return nil.
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if (ptr->enabled_flag == false)
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return vvp_vector8_t();
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vvp_branch_ptr_t other (ptr, ab_other);
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// If the branch other side is already visited, return nil.
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if (ptr->flags & (4<<ab_other))
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return vvp_vector8_t();
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// Other side net, and port value.
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vvp_net_t*net_other = ab? ptr->a : ptr->b;
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vvp_vector8_t val_other = island_get_value(net_other);
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// recurse
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list<vvp_branch_ptr_t> connections;
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island_collect_node(connections, other);
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mark_visited_flags(connections);
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resolve_values_from_connections(val_other, connections);
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// Remove visited flag
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clear_visited_flags(connections);
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if (val_other.size() == 0)
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return val_other;
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if (ptr->width) {
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if (ab == 0) {
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val_other = part_expand(val_other, ptr->width, ptr->offset);
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} else {
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val_other = val_other.subvalue(ptr->offset, ptr->part);
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}
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}
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return val_other;
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}
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static void push_value_through_branches(const vvp_vector8_t&val,
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list<vvp_branch_ptr_t>&connections)
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{
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for (list<vvp_branch_ptr_t>::iterator idx = connections.begin()
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; idx != connections.end() ; idx ++ ) {
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vvp_island_branch_tran*tmp_ptr = BRANCH_TRAN(idx->ptr());
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unsigned tmp_ab = idx->port();
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unsigned other_ab = tmp_ab^1;
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// If other side already done, skip
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if (tmp_ptr->flags & (1<<other_ab))
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continue;
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// If link is not enabled, skip.
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if (! tmp_ptr->enabled_flag)
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continue;
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vvp_net_t*other_net = other_ab? tmp_ptr->b : tmp_ptr->a;
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if (tmp_ptr->width == 0) {
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// Mark this end as done
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tmp_ptr->flags |= (1 << other_ab);
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island_send_value(other_net, val);
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} if (other_ab == 1) {
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// Mark as done
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tmp_ptr->flags |= (1 << other_ab);
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vvp_vector8_t tmp = val.subvalue(tmp_ptr->offset, tmp_ptr->part);
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island_send_value(other_net, tmp);
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} else {
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// Otherwise, the other side is not fully
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// specified, so we can't take this shortcut.
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}
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}
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}
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void vvp_island_branch_tran::run_resolution()
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{
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// Collect all the branch endpoints that are joined to my A
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// side.
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list<vvp_branch_ptr_t> connections;
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bool processed_a_side = false;
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vvp_vector8_t val;
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if ((flags & 1) == 0) {
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processed_a_side = true;
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vvp_branch_ptr_t a_side(this, 0);
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island_collect_node(connections, a_side);
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// Mark my A side as done. Do this early to prevent recursing
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// back. All the connections that share this port are also
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// done. Make sure their flags are set appropriately.
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mark_done_flags(connections);
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val = island_get_value(a);
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mark_visited_flags(connections); // Mark as visited.
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// Now scan the other sides of all the branches connected to
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// my A side. The get_value_from_branch() will recurse as
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// necessary to depth-first walk the graph.
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resolve_values_from_connections(val, connections);
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// A side is done.
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island_send_value(a, val);
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// Clear the visited flags. This must be done so that other
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// branches can read this input value.
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clear_visited_flags(connections);
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// Try to push the calculated value out through the
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// branches. This is useful for A-side results because
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// there is a high probability that the other side of
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// all the connected branches is fully specified by this
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// result.
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push_value_through_branches(val, connections);
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}
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// If the B side got taken care of by above, then this branch
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// is done. Stop now.
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if (flags & 2)
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return;
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// Repeat the above for the B side.
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connections.clear();
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island_collect_node(connections, vvp_branch_ptr_t(this, 1));
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mark_done_flags(connections);
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if (enabled_flag && processed_a_side) {
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// If this is a connected branch, then we know from the
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// start that we have all the bits needed to complete
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// the B side. Even if the B side is a part select, the
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// simple part select must be correct because the
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// recursive resolve_values_from_connections above must
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// of cycled back to the B side of myself when resolving
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// the connections.
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if (width != 0)
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val = val.subvalue(offset, part);
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} else {
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// If this branch is not enabled, then the B-side must
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// be processed on its own.
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val = island_get_value(b);
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mark_visited_flags(connections);
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resolve_values_from_connections(val, connections);
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clear_visited_flags(connections);
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}
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island_send_value(b, val);
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}
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void compile_island_tran(char*label)
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{
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vvp_island*use_island = new vvp_island_tran;
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compile_island_base(label, use_island);
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}
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void compile_island_tranif(int sense, char*island, char*pa, char*pb, char*pe)
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{
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vvp_island*use_island = compile_find_island(island);
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assert(use_island);
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free(island);
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vvp_island_branch_tran*br = new vvp_island_branch_tran;
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if (sense)
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br->active_high = true;
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else
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br->active_high = false;
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if (pe == 0) {
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br->en = 0;
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} else {
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br->en = use_island->find_port(pe);
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assert(br->en);
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free(pe);
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}
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br->width = 0;
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br->part = 0;
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br->offset = 0;
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use_island->add_branch(br, pa, pb);
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free(pa);
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free(pb);
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}
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void compile_island_tranvp(char*island, char*pa, char*pb,
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unsigned wid, unsigned par, unsigned off)
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{
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vvp_island*use_island = compile_find_island(island);
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assert(use_island);
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free(island);
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vvp_island_branch_tran*br = new vvp_island_branch_tran;
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br->active_high = false;
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br->en = 0;
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br->width = wid;
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br->part = par;
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br->offset = off;
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use_island->add_branch(br, pa, pb);
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free(pa);
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free(pb);
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}
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@ -26,129 +26,8 @@
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# include <assert.h>
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# include <stdlib.h>
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# include <string.h>
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#ifdef HAVE_MALLOC_H
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# include <malloc.h>
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#endif
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/*
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* Islands are mutually connected bidirectional meshes that have a
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* discipline other than the implicit ddiscipline of the rest of the
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* run time.
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*
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* In the vvp input, an island is created with this record:
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*
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* <label> .island ;
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*
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* The <label> is the name given to the island. Records after this
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* build up the contents of the island. Ports are created like this:
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*
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* <label> .port <island>, <src> ;
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* <label> .import <island>, <src> ;
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* <label> .export <island> ;
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*
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* The .port, .import and .export records create I/O, input and output
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* ports. The <label> is the name that branches within the island can
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* use to link to the port, and the <island> is the label for the
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* island. The input and I/O ports have a <src> label that links to the
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* source net from the ddiscrete domain.
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*
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* Branches within the island may only reference labels within the
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* island. This keeps the nets of the ocean of digital away from the
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* branches of analog within the island.
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*/
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class vvp_island_branch;
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class vvp_island_node;
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class vvp_island : private vvp_gen_event_s {
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public:
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vvp_island();
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virtual ~vvp_island();
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// Ports call this method to flag that something happened at
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// the input. The island will use this to create an active
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// event. The run_run() method will then be called by the
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// scheduler to process whatever happened.
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void flag_island();
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// This is the method that is called, eventually, to process
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// whatever happened. The derived island class implements this
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// method to give the island its character.
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virtual void run_island() =0;
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protected:
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// The base class collects a list of all the branches in the
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// island. The derived island class can access this list for
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// scanning the mesh.
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vvp_island_branch*branches_;
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public: /* These methods are used during linking. */
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// Add a port to the island. The key is added to the island
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// ports symbol table.
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void add_port(const char*key, vvp_net_t*net);
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// Add a branch to the island.
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void add_branch(vvp_island_branch*branch, const char*pa, const char*pb);
|
||||
|
||||
vvp_net_t* find_port(const char*key);
|
||||
|
||||
// Call this method when linking is done.
|
||||
void compile_cleanup(void);
|
||||
|
||||
private:
|
||||
void run_run();
|
||||
bool flagged_;
|
||||
|
||||
private:
|
||||
// During link, the vvp_island keeps these symbol tables for
|
||||
// mapping labels local to the island. When linking is done,
|
||||
// the compile_cleanup() method removes these tables.
|
||||
symbol_map_s<vvp_net_t>*ports_;
|
||||
symbol_map_s<vvp_island_branch>*anodes_;
|
||||
symbol_map_s<vvp_island_branch>*bnodes_;
|
||||
};
|
||||
|
||||
/*
|
||||
* An island port is a functor that connects to the ddiscrete
|
||||
* discipline outside the island. (There is also a vvp_net_t object
|
||||
* that refers to this port.) When data comes to the port from outside,
|
||||
* it is collected and saved, and the island is notified. When code
|
||||
* inside the island sends data out of the island, it uses the "out"
|
||||
* pointer from the vvp_net_t that refers to this object.
|
||||
*/
|
||||
|
||||
class vvp_island_port : public vvp_net_fun_t {
|
||||
|
||||
public:
|
||||
explicit vvp_island_port(vvp_island*ip);
|
||||
~vvp_island_port();
|
||||
|
||||
virtual void recv_vec4(vvp_net_ptr_t port, const vvp_vector4_t&bit,
|
||||
vvp_context_t);
|
||||
virtual void recv_vec4_pv(vvp_net_ptr_t port, const vvp_vector4_t&bit,
|
||||
unsigned base, unsigned wid, unsigned vwid,
|
||||
vvp_context_t);
|
||||
virtual void recv_vec8(vvp_net_ptr_t port, const vvp_vector8_t&bit);
|
||||
|
||||
vvp_vector8_t invalue;
|
||||
vvp_vector8_t outvalue;
|
||||
|
||||
private:
|
||||
vvp_island*island_;
|
||||
|
||||
private: // not implemented
|
||||
vvp_island_port(const vvp_island_port&);
|
||||
vvp_island_port& operator = (const vvp_island_port&);
|
||||
};
|
||||
|
||||
static vvp_vector8_t get_value(vvp_net_t*net)
|
||||
{
|
||||
vvp_island_port*fun = dynamic_cast<vvp_island_port*>(net->fun);
|
||||
return fun->invalue;
|
||||
}
|
||||
|
||||
static void send_value(vvp_net_t*net, const vvp_vector8_t&val)
|
||||
void island_send_value(vvp_net_t*net, const vvp_vector8_t&val)
|
||||
{
|
||||
vvp_island_port*fun = dynamic_cast<vvp_island_port*>(net->fun);
|
||||
if (fun->outvalue .eeq(val))
|
||||
|
|
@ -158,39 +37,6 @@ static void send_value(vvp_net_t*net, const vvp_vector8_t&val)
|
|||
vvp_send_vec8(net->out, fun->outvalue);
|
||||
}
|
||||
|
||||
/*
|
||||
* Branches are connected together to form a mesh of branches. Each
|
||||
* endpoint (there are two) connects circularly to other branch
|
||||
* endpoints that are connected together. This list of endpoints forms
|
||||
* a node. Thus it is possible for branches to fully specify the mesh
|
||||
* of the island.
|
||||
*/
|
||||
|
||||
typedef vvp_sub_pointer_t<vvp_island_branch> vvp_branch_ptr_t;
|
||||
|
||||
struct vvp_island_branch {
|
||||
virtual ~vvp_island_branch();
|
||||
// Keep a list of branches in the island.
|
||||
vvp_island_branch*next_branch;
|
||||
// branch mesh connectivity. There is a pointer for each end
|
||||
// that participates in a circular list.
|
||||
vvp_sub_pointer_t<vvp_island_branch> link[2];
|
||||
// Port connections
|
||||
vvp_net_t*a;
|
||||
vvp_net_t*b;
|
||||
|
||||
// Behavior. (This stuff should be moved to a derived
|
||||
// class. The members here are specific to the tran island
|
||||
// class.)
|
||||
bool run_test_enabled();
|
||||
void run_resolution();
|
||||
bool active_high;
|
||||
bool enabled_flag;
|
||||
vvp_net_t*en;
|
||||
int flags;
|
||||
unsigned width, part, offset;
|
||||
};
|
||||
|
||||
/*
|
||||
* Implementations...
|
||||
*/
|
||||
|
|
@ -351,54 +197,6 @@ vvp_island_branch::~vvp_island_branch()
|
|||
{
|
||||
}
|
||||
|
||||
/* **** TRANIF SUPPORT **** */
|
||||
|
||||
class vvp_island_tran : public vvp_island {
|
||||
|
||||
public:
|
||||
void run_island();
|
||||
};
|
||||
|
||||
void vvp_island_tran::run_island()
|
||||
{
|
||||
// Test to see if any of the branches are enabled.
|
||||
bool runnable = false;
|
||||
for (vvp_island_branch*cur = branches_ ; cur ; cur = cur->next_branch) {
|
||||
runnable |= cur->run_test_enabled();
|
||||
}
|
||||
if (runnable == false)
|
||||
return;
|
||||
|
||||
for (vvp_island_branch*cur = branches_ ; cur ; cur = cur->next_branch)
|
||||
cur->run_resolution();
|
||||
}
|
||||
|
||||
bool vvp_island_branch::run_test_enabled()
|
||||
{
|
||||
flags = 0;
|
||||
|
||||
vvp_island_port*ep = en? dynamic_cast<vvp_island_port*> (en->fun) : 0;
|
||||
|
||||
// If there is no ep port (no "enabled" input) then this is a
|
||||
// tran branch. Assume it is always enabled.
|
||||
if (ep == 0) {
|
||||
enabled_flag = true;
|
||||
return true;
|
||||
}
|
||||
|
||||
enabled_flag = false;
|
||||
vvp_bit4_t enable_val = ep->invalue.value(0).value();
|
||||
|
||||
if (active_high==true && enable_val != BIT4_1)
|
||||
return false;
|
||||
|
||||
if (active_high==false && enable_val != BIT4_0)
|
||||
return false;
|
||||
|
||||
enabled_flag = true;
|
||||
return true;
|
||||
}
|
||||
|
||||
static vvp_branch_ptr_t next(vvp_branch_ptr_t cur)
|
||||
{
|
||||
vvp_island_branch*ptr = cur.ptr();
|
||||
|
|
@ -406,221 +204,13 @@ static vvp_branch_ptr_t next(vvp_branch_ptr_t cur)
|
|||
return ptr->link[ab];
|
||||
}
|
||||
|
||||
static void collect_node(list<vvp_branch_ptr_t>&conn, vvp_branch_ptr_t cur)
|
||||
void island_collect_node(list<vvp_branch_ptr_t>&conn, vvp_branch_ptr_t cur)
|
||||
{
|
||||
conn .push_back(cur);
|
||||
for (vvp_branch_ptr_t idx = next(cur) ; idx != cur ; idx = next(idx))
|
||||
conn.push_back(idx);
|
||||
}
|
||||
|
||||
static void mark_done_flags(list<vvp_branch_ptr_t>&connections)
|
||||
{
|
||||
for (list<vvp_branch_ptr_t>::iterator idx = connections.begin()
|
||||
; idx != connections.end() ; idx ++ ) {
|
||||
|
||||
vvp_island_branch*tmp_ptr = idx->ptr();
|
||||
unsigned tmp_ab = idx->port();
|
||||
tmp_ptr->flags |= 1 << tmp_ab;
|
||||
}
|
||||
}
|
||||
|
||||
static void mark_visited_flags(list<vvp_branch_ptr_t>&connections)
|
||||
{
|
||||
for (list<vvp_branch_ptr_t>::iterator idx = connections.begin()
|
||||
; idx != connections.end() ; idx ++ ) {
|
||||
|
||||
vvp_island_branch*tmp_ptr = idx->ptr();
|
||||
unsigned tmp_ab = idx->port();
|
||||
tmp_ptr->flags |= 4 << tmp_ab;
|
||||
}
|
||||
}
|
||||
|
||||
static void clear_visited_flags(list<vvp_branch_ptr_t>&connections)
|
||||
{
|
||||
for (list<vvp_branch_ptr_t>::iterator idx = connections.begin()
|
||||
; idx != connections.end() ; idx ++ ) {
|
||||
|
||||
vvp_island_branch*tmp_ptr = idx->ptr();
|
||||
unsigned tmp_ab = idx->port();
|
||||
tmp_ptr->flags &= ~(4 << tmp_ab);
|
||||
}
|
||||
}
|
||||
|
||||
static vvp_vector8_t get_value_from_branch(vvp_branch_ptr_t cur);
|
||||
|
||||
static void resolve_values_from_connections(vvp_vector8_t&val,
|
||||
list<vvp_branch_ptr_t>&connections)
|
||||
{
|
||||
for (list<vvp_branch_ptr_t>::iterator idx = connections.begin()
|
||||
; idx != connections.end() ; idx ++ ) {
|
||||
vvp_vector8_t tmp = get_value_from_branch(*idx);
|
||||
if (val.size() == 0)
|
||||
val = tmp;
|
||||
else if (tmp.size() != 0)
|
||||
val = resolve(val, tmp);
|
||||
}
|
||||
}
|
||||
|
||||
static vvp_vector8_t get_value_from_branch(vvp_branch_ptr_t cur)
|
||||
{
|
||||
vvp_island_branch*ptr = cur.ptr();
|
||||
unsigned ab = cur.port();
|
||||
unsigned ab_other = ab^1;
|
||||
|
||||
// If the branch link is disabled, return nil.
|
||||
if (ptr->enabled_flag == false)
|
||||
return vvp_vector8_t();
|
||||
|
||||
vvp_branch_ptr_t other (ptr, ab_other);
|
||||
|
||||
// If the branch other side is already visited, return nil.
|
||||
if (ptr->flags & (4<<ab_other))
|
||||
return vvp_vector8_t();
|
||||
|
||||
// Other side net, and port value.
|
||||
vvp_net_t*net_other = ab? ptr->a : ptr->b;
|
||||
vvp_vector8_t val_other = get_value(net_other);
|
||||
|
||||
// recurse
|
||||
list<vvp_branch_ptr_t> connections;
|
||||
collect_node(connections, other);
|
||||
mark_visited_flags(connections);
|
||||
|
||||
resolve_values_from_connections(val_other, connections);
|
||||
|
||||
// Remove visited flag
|
||||
clear_visited_flags(connections);
|
||||
|
||||
if (val_other.size() == 0)
|
||||
return val_other;
|
||||
|
||||
if (ptr->width) {
|
||||
if (ab == 0) {
|
||||
val_other = part_expand(val_other, ptr->width, ptr->offset);
|
||||
|
||||
} else {
|
||||
val_other = val_other.subvalue(ptr->offset, ptr->part);
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
return val_other;
|
||||
}
|
||||
|
||||
static void push_value_through_branches(const vvp_vector8_t&val,
|
||||
list<vvp_branch_ptr_t>&connections)
|
||||
{
|
||||
for (list<vvp_branch_ptr_t>::iterator idx = connections.begin()
|
||||
; idx != connections.end() ; idx ++ ) {
|
||||
|
||||
vvp_island_branch*tmp_ptr = idx->ptr();
|
||||
unsigned tmp_ab = idx->port();
|
||||
unsigned other_ab = tmp_ab^1;
|
||||
|
||||
// If other side already done, skip
|
||||
if (tmp_ptr->flags & (1<<other_ab))
|
||||
continue;
|
||||
|
||||
// If link is not enabled, skip.
|
||||
if (! tmp_ptr->enabled_flag)
|
||||
continue;
|
||||
|
||||
vvp_net_t*other_net = other_ab? tmp_ptr->b : tmp_ptr->a;
|
||||
|
||||
if (tmp_ptr->width == 0) {
|
||||
// Mark this end as done
|
||||
tmp_ptr->flags |= (1 << other_ab);
|
||||
send_value(other_net, val);
|
||||
|
||||
} if (other_ab == 1) {
|
||||
// Mark as done
|
||||
tmp_ptr->flags |= (1 << other_ab);
|
||||
vvp_vector8_t tmp = val.subvalue(tmp_ptr->offset, tmp_ptr->part);
|
||||
send_value(other_net, tmp);
|
||||
} else {
|
||||
// Otherwise, the other side is not fully
|
||||
// specified, so we can't take this shortcut.
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void vvp_island_branch::run_resolution()
|
||||
{
|
||||
// Collect all the branch endpoints that are joined to my A
|
||||
// side.
|
||||
list<vvp_branch_ptr_t> connections;
|
||||
bool processed_a_side = false;
|
||||
vvp_vector8_t val;
|
||||
|
||||
if ((flags & 1) == 0) {
|
||||
processed_a_side = true;
|
||||
vvp_branch_ptr_t a_side(this, 0);
|
||||
collect_node(connections, a_side);
|
||||
|
||||
// Mark my A side as done. Do this early to prevent recursing
|
||||
// back. All the connections that share this port are also
|
||||
// done. Make sure their flags are set appropriately.
|
||||
mark_done_flags(connections);
|
||||
|
||||
val = get_value(a);
|
||||
mark_visited_flags(connections); // Mark as visited.
|
||||
|
||||
|
||||
// Now scan the other sides of all the branches connected to
|
||||
// my A side. The get_value_from_branch() will recurse as
|
||||
// necessary to depth-first walk the graph.
|
||||
resolve_values_from_connections(val, connections);
|
||||
|
||||
// A side is done.
|
||||
send_value(a, val);
|
||||
|
||||
// Clear the visited flags. This must be done so that other
|
||||
// branches can read this input value.
|
||||
clear_visited_flags(connections);
|
||||
|
||||
// Try to push the calculated value out through the
|
||||
// branches. This is useful for A-side results because
|
||||
// there is a high probability that the other side of
|
||||
// all the connected branches is fully specified by this
|
||||
// result.
|
||||
push_value_through_branches(val, connections);
|
||||
}
|
||||
|
||||
// If the B side got taken care of by above, then this branch
|
||||
// is done. Stop now.
|
||||
if (flags & 2)
|
||||
return;
|
||||
|
||||
// Repeat the above for the B side.
|
||||
|
||||
connections.clear();
|
||||
collect_node(connections, vvp_branch_ptr_t(this, 1));
|
||||
mark_done_flags(connections);
|
||||
|
||||
if (enabled_flag && processed_a_side) {
|
||||
// If this is a connected branch, then we know from the
|
||||
// start that we have all the bits needed to complete
|
||||
// the B side. Even if the B side is a part select, the
|
||||
// simple part select must be correct because the
|
||||
// recursive resolve_values_from_connections above must
|
||||
// of cycled back to the B side of myself when resolving
|
||||
// the connections.
|
||||
if (width != 0)
|
||||
val = val.subvalue(offset, part);
|
||||
|
||||
} else {
|
||||
|
||||
// If this branch is not enabled, then the B-side must
|
||||
// be processed on its own.
|
||||
val = get_value(b);
|
||||
mark_visited_flags(connections);
|
||||
resolve_values_from_connections(val, connections);
|
||||
clear_visited_flags(connections);
|
||||
}
|
||||
|
||||
send_value(b, val);
|
||||
}
|
||||
|
||||
/* **** COMPILE/LINK SUPPORT **** */
|
||||
|
||||
/*
|
||||
|
|
@ -632,23 +222,22 @@ void vvp_island_branch::run_resolution()
|
|||
static list<vvp_island*> island_list;
|
||||
static symbol_map_s<vvp_island>* island_table = 0;
|
||||
|
||||
void compile_island(char*label, char*type)
|
||||
void compile_island_base(char*label, vvp_island*use_island)
|
||||
{
|
||||
if (island_table == 0)
|
||||
island_table = new symbol_map_s<vvp_island>;
|
||||
|
||||
vvp_island*use_island = 0;
|
||||
|
||||
if (strcmp(type,"tran") == 0) {
|
||||
use_island = new vvp_island_tran;
|
||||
} else {
|
||||
assert(0);
|
||||
}
|
||||
|
||||
island_table->sym_set_value(label, use_island);
|
||||
island_list.push_back(use_island);
|
||||
free(label);
|
||||
free(type);
|
||||
}
|
||||
|
||||
vvp_island* compile_find_island(const char*island)
|
||||
{
|
||||
assert(island_table);
|
||||
vvp_island*use_island = island_table->sym_get_value(island);
|
||||
assert(use_island);
|
||||
return use_island;
|
||||
}
|
||||
|
||||
void compile_island_port(char*label, char*island, char*src)
|
||||
|
|
@ -701,58 +290,6 @@ void compile_island_import(char*label, char*island, char*src)
|
|||
free(label);
|
||||
}
|
||||
|
||||
void compile_island_tranif(int sense, char*island, char*pa, char*pb, char*pe)
|
||||
{
|
||||
assert(island_table);
|
||||
vvp_island*use_island = island_table->sym_get_value(island);
|
||||
assert(use_island);
|
||||
free(island);
|
||||
|
||||
vvp_island_branch*br = new vvp_island_branch;
|
||||
if (sense)
|
||||
br->active_high = true;
|
||||
else
|
||||
br->active_high = false;
|
||||
|
||||
if (pe == 0) {
|
||||
br->en = 0;
|
||||
} else {
|
||||
br->en = use_island->find_port(pe);
|
||||
assert(br->en);
|
||||
free(pe);
|
||||
}
|
||||
|
||||
br->width = 0;
|
||||
br->part = 0;
|
||||
br->offset = 0;
|
||||
|
||||
use_island->add_branch(br, pa, pb);
|
||||
|
||||
free(pa);
|
||||
free(pb);
|
||||
}
|
||||
|
||||
void compile_island_tranvp(char*island, char*pa, char*pb,
|
||||
unsigned wid, unsigned par, unsigned off)
|
||||
{
|
||||
assert(island_table);
|
||||
vvp_island*use_island = island_table->sym_get_value(island);
|
||||
assert(use_island);
|
||||
free(island);
|
||||
|
||||
vvp_island_branch*br = new vvp_island_branch;
|
||||
br->active_high = false;
|
||||
br->en = 0;
|
||||
br->width = wid;
|
||||
br->part = par;
|
||||
br->offset = off;
|
||||
|
||||
use_island->add_branch(br, pa, pb);
|
||||
|
||||
free(pa);
|
||||
free(pb);
|
||||
}
|
||||
|
||||
void compile_island_cleanup(void)
|
||||
{
|
||||
// Call the per-island cleanup to get rid of local symbol tables.
|
||||
|
|
|
|||
158
vvp/vvp_island.h
158
vvp/vvp_island.h
|
|
@ -21,7 +21,165 @@
|
|||
|
||||
# include "config.h"
|
||||
# include "vvp_net.h"
|
||||
# include "symbols.h"
|
||||
# include "schedule.h"
|
||||
# include <list>
|
||||
# include <assert.h>
|
||||
|
||||
/*
|
||||
* Islands are mutually connected bidirectional meshes that have a
|
||||
* discipline other than the implicit ddiscipline of the rest of the
|
||||
* run time.
|
||||
*
|
||||
* In the vvp input, an island is created with this record:
|
||||
*
|
||||
* <label> .island ;
|
||||
*
|
||||
* The <label> is the name given to the island. Records after this
|
||||
* build up the contents of the island. Ports are created like this:
|
||||
*
|
||||
* <label> .port <island>, <src> ;
|
||||
* <label> .import <island>, <src> ;
|
||||
* <label> .export <island> ;
|
||||
*
|
||||
* The .port, .import and .export records create I/O, input and output
|
||||
* ports. The <label> is the name that branches within the island can
|
||||
* use to link to the port, and the <island> is the label for the
|
||||
* island. The input and I/O ports have a <src> label that links to the
|
||||
* source net from the ddiscrete domain.
|
||||
*
|
||||
* Branches within the island may only reference labels within the
|
||||
* island. This keeps the nets of the ocean of digital away from the
|
||||
* branches of analog within the island.
|
||||
*/
|
||||
|
||||
class vvp_island_branch;
|
||||
class vvp_island_node;
|
||||
|
||||
class vvp_island : private vvp_gen_event_s {
|
||||
|
||||
public:
|
||||
vvp_island();
|
||||
virtual ~vvp_island();
|
||||
|
||||
// Ports call this method to flag that something happened at
|
||||
// the input. The island will use this to create an active
|
||||
// event. The run_run() method will then be called by the
|
||||
// scheduler to process whatever happened.
|
||||
void flag_island();
|
||||
|
||||
// This is the method that is called, eventually, to process
|
||||
// whatever happened. The derived island class implements this
|
||||
// method to give the island its character.
|
||||
virtual void run_island() =0;
|
||||
|
||||
protected:
|
||||
// The base class collects a list of all the branches in the
|
||||
// island. The derived island class can access this list for
|
||||
// scanning the mesh.
|
||||
vvp_island_branch*branches_;
|
||||
|
||||
public: /* These methods are used during linking. */
|
||||
|
||||
// Add a port to the island. The key is added to the island
|
||||
// ports symbol table.
|
||||
void add_port(const char*key, vvp_net_t*net);
|
||||
// Add a branch to the island.
|
||||
void add_branch(vvp_island_branch*branch, const char*pa, const char*pb);
|
||||
|
||||
vvp_net_t* find_port(const char*key);
|
||||
|
||||
// Call this method when linking is done.
|
||||
void compile_cleanup(void);
|
||||
|
||||
private:
|
||||
void run_run();
|
||||
bool flagged_;
|
||||
|
||||
private:
|
||||
// During link, the vvp_island keeps these symbol tables for
|
||||
// mapping labels local to the island. When linking is done,
|
||||
// the compile_cleanup() method removes these tables.
|
||||
symbol_map_s<vvp_net_t>*ports_;
|
||||
symbol_map_s<vvp_island_branch>*anodes_;
|
||||
symbol_map_s<vvp_island_branch>*bnodes_;
|
||||
};
|
||||
|
||||
/*
|
||||
* An island port is a functor that connects to the ddiscrete
|
||||
* discipline outside the island. (There is also a vvp_net_t object
|
||||
* that refers to this port.) When data comes to the port from outside,
|
||||
* it is collected and saved, and the island is notified. When code
|
||||
* inside the island sends data out of the island, it uses the "out"
|
||||
* pointer from the vvp_net_t that refers to this object.
|
||||
*/
|
||||
|
||||
class vvp_island_port : public vvp_net_fun_t {
|
||||
|
||||
public:
|
||||
explicit vvp_island_port(vvp_island*ip);
|
||||
~vvp_island_port();
|
||||
|
||||
virtual void recv_vec4(vvp_net_ptr_t port, const vvp_vector4_t&bit,
|
||||
vvp_context_t);
|
||||
virtual void recv_vec4_pv(vvp_net_ptr_t port, const vvp_vector4_t&bit,
|
||||
unsigned base, unsigned wid, unsigned vwid,
|
||||
vvp_context_t);
|
||||
virtual void recv_vec8(vvp_net_ptr_t port, const vvp_vector8_t&bit);
|
||||
|
||||
vvp_vector8_t invalue;
|
||||
vvp_vector8_t outvalue;
|
||||
|
||||
private:
|
||||
vvp_island*island_;
|
||||
|
||||
private: // not implemented
|
||||
vvp_island_port(const vvp_island_port&);
|
||||
vvp_island_port& operator = (const vvp_island_port&);
|
||||
};
|
||||
|
||||
inline vvp_vector8_t island_get_value(vvp_net_t*net)
|
||||
{
|
||||
vvp_island_port*fun = dynamic_cast<vvp_island_port*>(net->fun);
|
||||
return fun->invalue;
|
||||
}
|
||||
|
||||
extern void island_send_value(vvp_net_t*net, const vvp_vector8_t&val);
|
||||
|
||||
/*
|
||||
* Branches are connected together to form a mesh of branches. Each
|
||||
* endpoint (there are two) connects circularly to other branch
|
||||
* endpoints that are connected together. This list of endpoints forms
|
||||
* a node. Thus it is possible for branches to fully specify the mesh
|
||||
* of the island.
|
||||
*/
|
||||
|
||||
typedef vvp_sub_pointer_t<vvp_island_branch> vvp_branch_ptr_t;
|
||||
|
||||
struct vvp_island_branch {
|
||||
virtual ~vvp_island_branch();
|
||||
// Keep a list of branches in the island.
|
||||
vvp_island_branch*next_branch;
|
||||
// branch mesh connectivity. There is a pointer for each end
|
||||
// that participates in a circular list.
|
||||
vvp_sub_pointer_t<vvp_island_branch> link[2];
|
||||
// Port connections
|
||||
vvp_net_t*a;
|
||||
vvp_net_t*b;
|
||||
};
|
||||
|
||||
/*
|
||||
* This function collections into the conn list all the branch ends
|
||||
* that are connected together with the reference branch endpoint
|
||||
* cur. All these branch ends together form a "node" of the branch
|
||||
* network.
|
||||
*/
|
||||
extern void island_collect_node(std::list<vvp_branch_ptr_t>&conn, vvp_branch_ptr_t cur);
|
||||
|
||||
/*
|
||||
* These functions support compile/linking.
|
||||
*/
|
||||
extern void compile_island_base(char*label, vvp_island*use_island);
|
||||
extern vvp_island* compile_find_island(const char*island_name);
|
||||
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Reference in New Issue