mrg
|
da721a677d
|
Remove EOL whitespace globally
|
2020-11-03 06:29:17 -08:00 |
|
mrg
|
aec5865d71
|
Fix base class error
|
2020-11-02 17:41:14 -08:00 |
|
mrg
|
f9787eb878
|
Use bitcell_base for all bitcells. Fix missing setup_bitcell call
|
2020-11-02 17:00:15 -08:00 |
|
mrg
|
fa89b73ef8
|
PR from mithro + other changable GDS file names
|
2020-11-02 16:00:16 -08:00 |
|
mrg
|
1caecf5a69
|
Undo version and traceback
|
2020-11-02 10:44:49 -08:00 |
|
Tim 'mithro' Ansell
|
bb164d915d
|
Allow overriding the cell size layer name.
|
2020-11-02 10:03:52 -08:00 |
|
Tim 'mithro' Ansell
|
232f754c73
|
Adding traceback printing to tech file import.
|
2020-11-02 09:52:00 -08:00 |
|
Tim 'mithro' Ansell
|
95d77119c7
|
Add caches to GDS related functions in utils.py
* Cache the GDS reader.
* Cache the properties (size / pins / etc) measured from the GDS files.
Signed-off-by: Tim 'mithro' Ansell <[email protected]>
|
2020-11-02 09:52:00 -08:00 |
|
Tim 'mithro' Ansell
|
6514bcb4c1
|
Use default bitcell name if one isn't provided.
Signed-off-by: Tim 'mithro' Ansell <[email protected]>
|
2020-11-02 09:52:00 -08:00 |
|
Tim 'mithro' Ansell
|
5c1250191c
|
Fixup the bitcell.py to make subclassing work.
Read in the GDS properties inside the __init__ method.
Signed-off-by: Tim 'mithro' Ansell <[email protected]>
|
2020-11-02 09:51:54 -08:00 |
|
mrg
|
029f655c1b
|
Merge remote-tracking branch 'private/dev' into dev
|
2020-10-30 16:01:38 -07:00 |
|
mrg
|
bd9bac6635
|
Fixed nominal_corner_only parameter.
|
2020-10-30 15:52:07 -07:00 |
|
mrg
|
da9ed5494c
|
Merge remote-tracking branch 'private/dev' into dev
|
2020-10-29 17:46:33 -07:00 |
|
mrg
|
857f5cb136
|
Fix copy pasta: decoder to predecode
|
2020-10-28 15:46:10 -07:00 |
|
mrg
|
ae0f4fe682
|
Fix spice model bin parameter error
|
2020-10-28 10:39:54 -07:00 |
|
mrg
|
00cb8a28d9
|
Fix supply layer query
|
2020-10-28 10:36:13 -07:00 |
|
mrg
|
f6c5f48b4c
|
Default channel route is true
|
2020-10-28 10:31:05 -07:00 |
|
mrg
|
acfec369d6
|
Add ptx cell properties
|
2020-10-28 09:54:15 -07:00 |
|
mrg
|
25495f3d94
|
getattr for bank parameters
|
2020-10-28 09:21:36 -07:00 |
|
mrg
|
611a4155b9
|
Add initial custom layer properties.
|
2020-10-27 15:11:04 -07:00 |
|
mrg
|
5bff641c0a
|
Multiport constants can't be static
|
2020-10-27 09:28:21 -07:00 |
|
mrg
|
575f504e4b
|
Remove static method call
|
2020-10-27 09:26:40 -07:00 |
|
mrg
|
07ef43eaf8
|
Convert design class data to static
|
2020-10-27 09:23:11 -07:00 |
|
mrg
|
f23fe07893
|
Add custom layers without defaults
|
2020-10-26 16:37:00 -07:00 |
|
mrg
|
dc991cbcab
|
Use pin of pgate to figure out supply layer.
|
2020-10-26 15:54:16 -07:00 |
|
mrg
|
38ba5fc10d
|
Use pin of pgate to figure out supply layer.
|
2020-10-26 15:53:22 -07:00 |
|
mrg
|
b45a7902c0
|
PEP8 cleanup
|
2020-10-26 13:13:38 -07:00 |
|
mrg
|
b20036a867
|
Merge remote-tracking branch 'private/dev' into dev
|
2020-10-25 16:25:21 -07:00 |
|
mrg
|
cae41c63f0
|
Merge branch 'spmodels' into dev
|
2020-10-23 16:23:12 -07:00 |
|
mrg
|
b4ebbdd5df
|
Require either device models or device library. Remove sky130 flag.
|
2020-10-23 14:07:26 -07:00 |
|
mrg
|
f97ae723f0
|
Remove extraneous config files.
|
2020-10-23 13:56:27 -07:00 |
|
mrg
|
cbf9c48504
|
Names in skiptests changed. Reduce grid router verbosity.
|
2020-10-23 09:22:59 -07:00 |
|
mrg
|
dcd29214bc
|
Temp fix to use old device names during Calibre LVS.
|
2020-10-21 17:05:48 -07:00 |
|
mrg
|
3d5c73709b
|
Merge branch 'dev' into spmodels
|
2020-10-19 14:49:07 -07:00 |
|
mrg
|
9c6af8937d
|
Merge remote-tracking branch 'private/dev' into dev
|
2020-10-16 17:00:05 -07:00 |
|
mrg
|
7da3653ce5
|
Only output wmask to lib file in w or rw ports.
|
2020-10-16 16:59:51 -07:00 |
|
mrg
|
5268ec547b
|
Merge remote-tracking branch 'private/dev' into dev
|
2020-10-16 16:51:50 -07:00 |
|
mrg
|
3295a813d6
|
Don't use single slew for nominal corner
|
2020-10-16 16:51:28 -07:00 |
|
mrg
|
db1bcd0774
|
Merge remote-tracking branch 'private/dev' into dev
|
2020-10-16 13:54:43 -07:00 |
|
mrg
|
35c91168f7
|
Add load/slew scale option to config files
|
2020-10-16 13:52:36 -07:00 |
|
mrg
|
804814d18d
|
Add bitlines to dummy modules
|
2020-10-16 13:43:56 -07:00 |
|
mrg
|
20be7caf98
|
Make conditional wl and bl for dummy rows/cols.
|
2020-10-15 13:56:37 -07:00 |
|
mrg
|
af40f3077c
|
Change sky130 device cards to start with X
|
2020-10-15 13:56:10 -07:00 |
|
mrg
|
b4f293b311
|
Merge branch 'dev' into spmodels
|
2020-10-15 09:46:16 -07:00 |
|
mrg
|
6a1f12b62d
|
Refactored to utilize OOP
|
2020-10-13 11:07:31 -07:00 |
|
mrg
|
68d74737f7
|
Different bitcell and array supply pins
|
2020-10-13 07:41:21 -07:00 |
|
mrg
|
555e776712
|
Merge branch 'dev' into spmodels
|
2020-10-13 06:41:26 -07:00 |
|
jcirimel
|
05667d784f
|
move sky130 specific stuff to tech module lib
|
2020-10-13 04:48:10 -07:00 |
|
mrg
|
fcb7f42e48
|
Remove split_wl
|
2020-10-12 17:27:20 -07:00 |
|
mrg
|
ca2ce8b070
|
Default bitcell opt1
|
2020-10-12 17:08:32 -07:00 |
|