mirror of https://github.com/VLSIDA/OpenRAM.git
Remove extraneous config files.
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parent
cbf9c48504
commit
f97ae723f0
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@ -1,19 +0,0 @@
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word_size = 2
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num_words = 16
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tech_name = "scn4m_subm"
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process_corners = ["TT"]
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supply_voltages = [5.0]
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temperatures = [25]
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#netlist_only = True
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route_supplies = True
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check_lvsdrc = True
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output_name = "sram_{0}_{1}_{2}".format(word_size,
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num_words,
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tech_name)
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drc_name = "magic"
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lvs_name = "netgen"
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pex_name = "magic"
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@ -1,19 +0,0 @@
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word_size = 8
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num_words = 128
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tech_name = "scn4m_subm"
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process_corners = ["TT"]
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supply_voltages = [5.0]
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temperatures = [25]
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route_supplies = True
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check_lvsdrc = True
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netlist_only = True
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output_name = "sram_{0}_{1}_{2}".format(word_size,
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num_words,
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tech_name)
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drc_name = "magic"
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lvs_name = "netgen"
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pex_name = "magic"
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@ -1,18 +0,0 @@
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word_size = 16
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num_words = 256
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tech_name = "scn4m_subm"
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process_corners = ["TT"]
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supply_voltages = [5.0]
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temperatures = [25]
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route_supplies = True
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check_lvsdrc = True
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netlist_only = True
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output_name = "sram_{0}_{1}_{2}".format(word_size,
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num_words,
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tech_name)
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drc_name = "magic"
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lvs_name = "netgen"
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pex_name = "magic"
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@ -1,18 +0,0 @@
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word_size = 32
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num_words = 128
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tech_name = "scn4m_subm"
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process_corners = ["TT"]
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supply_voltages = [5.0]
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temperatures = [25]
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route_supplies = True
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check_lvsdrc = True
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netlist_only = True
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output_name = "sram_{0}_{1}_{2}".format(word_size,
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num_words,
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tech_name)
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drc_name = "magic"
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lvs_name = "netgen"
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pex_name = "magic"
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@ -1,19 +0,0 @@
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word_size = 64
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num_words = 128
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tech_name = "scn4m_subm"
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process_corners = ["TT"]
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supply_voltages = [5.0]
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temperatures = [25]
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route_supplies = True
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check_lvsdrc = True
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output_path = "/home/jesse/thesis/outputs/run5"
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output_name = "sram_{0}_{1}_{2}".format(word_size,
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num_words,
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tech_name)
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drc_name = "magic"
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lvs_name = "netgen"
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pex_name = "magic"
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@ -1,31 +0,0 @@
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word_size = 16
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num_words = 16
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num_rw_ports = 1
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num_r_ports = 1
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num_w_ports = 0
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tech_name = "sky130"
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accuracy_requirement = 0.05
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magic_exe = ("magic", "magic")
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nominal_corners_only = False
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process_corners = ["TT"]
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supply_voltages = [5.0]
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temperatures = [25]
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netlist_only = False
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route_supplies = "grid"
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check_lvsdrc = False
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#replica_bitcell_array = "/home/jesse/openram/technology/sky130/modules/replica_bitcell_array.py"
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output_path = "sram_" + str(accuracy_requirement)
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output_name = "sram_{0}_{1}_{2}_{3}".format(word_size,
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num_words,
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tech_name,
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accuracy_requirement
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)
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write_size=8
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