Merge branch 'master' into netgen-1.5

some errors failing to list in the output while also being responsible
for a number of non-errors showing up in the output.  This fix may
substantially clean up netgen output.  Also:  Added text to the
output noting that pin matching may be incorrect with respect to
symmetries if the nets have failed to match.

.github/workflows/main.yml

@@ -0,0 +1,40 @@
+# This is a basic workflow to help you get started with Actions
+
+name: CI
+
+# Controls when the workflow will run
+on:
+  # Triggers the workflow on push or pull request events but only for the master branch
+  push:
+    branches: [ master ]
+  pull_request:
+    branches: [ master ]
+
+  # Allows you to run this workflow manually from the Actions tab
+  workflow_dispatch:
+
+# A workflow run is made up of one or more jobs that can run sequentially or in parallel
+jobs:
+  # This workflow contains a single job called "build"
+  build:
+    # The type of runner that the job will run on
+    runs-on: ubuntu-latest
+
+    # Steps represent a sequence of tasks that will be executed as part of the job
+    steps:
+      # Runs a set of commands using the runners shell
+      #- name: Logging into Dockerhub
+      #  run: docker login -u ${{ secrets.DOCKERHUB_USERNAME }} -p ${{ secrets.DOCKERHUB_PASSWORD }}
+        
+      - name: Pulling the docker image
+        run: docker pull vezzal/vezzal:v1
+        
+      - name: Start the container with the docker image
+        run: docker run -id --name test_netgen vezzal/vezzal:v1 bash | exit
+        
+      - name: Run the testing on the container and send the mail
+        run: docker exec test_netgen /vezzal/test_netgen.sh "[email protected],[email protected]" ${{ secrets.MAILING_KEY }}
+        
+  
+      
+          

.gitignore

@@ -7,8 +7,11 @@ config.log
 scripts/config.log
 config.status
 scripts/config.status
+python/lvs_manager.py
 *.o
 *.so
 *~
 *.log
 UPDATE_ME
+tcltk/netgen.sh
+tcltk/netgen.tcl

README.md

@@ -1,4 +1,8 @@
-NETGEN:  VERSION 1.5
+![Continuous Integration](https://github.com/RTimothyEdwards/netgen/actions/workflows/main.yml/badge.svg)
+
+# NETGEN
+
+### VERSION 1.5
 
 NETGEN is a general-purpose netlist management system.  It can read
 and write several netlist formats, including NTK (Caltech, CMU),
@@ -87,6 +91,49 @@ and IRSIM version 9.7:
 
 Note: For FreeBSD, use 'gmake' instead.
 
+Note: On MacOS (Big Sur) follow the following procedure. If you have installed `xschem` and `magic` already on MacOS then steps (1) and (2) can likely be skipped.
+
+**1) Build Tcl for X11**
+
+We are following the instructions from `xschem` (https://github.com/StefanSchippers/xschem/blob/master/README_MacOS.md). 
+
+* Download `Tcl` from https://prdownloads.sourceforge.net/tcl/tcl8.6.10-src.tar.gz
+
+We are using not `opt` but `opt2` so that this `Tcl` does not interfere with `tcl-tk` from HomeBrew.
+
+```
+./configure --prefix=/usr/local/opt2/tcl-tk  
+make
+make install
+```
+
+**2) Build Tk for X11**
+
+* Download `Tk` from https://prdownloads.sourceforge.net/tcl/tk8.6.10-src.tar.gz
+
+```
+./configure --prefix=/usr/local/opt2/tcl-tk \
+--with-tcl=/usr/local/opt2/tcl-tk/lib --with-x \
+--x-includes=/opt/X11/include --x-libraries=/opt/X11/lib  
+make
+make install
+```
+
+**3) Build netgen**
+
+We need to provide this custom-built `tcl-tk` and suppress compilation errors.
+
+```
+./configure --with-tcl=/usr/local/opt2/tcl-tk/lib \
+--with-tk=/usr/local/opt2/tcl-tk/lib \
+--x-includes=/opt/X11/include \
+--x-libraries=/opt/X11/lib \
+CFLAGS=-Wno-error=implicit-function-declaration
+make
+make install
+```
+
+
 IN CASE OF FAILURE
 -------------------
 Please contact me (tim@opencircuitdesign.com) to report compile-time and

VERSION

@@ -1 +1 @@
-1.5.151
+1.5.280

base/actel.c

@@ -131,7 +131,7 @@ if format = 1, use the actel .pin file format
   struct nlist *tp;
   struct objlist *ob, *ob2;
   char *ptr;
-  char physicalpin[200];
+  char physicalpin[MAX_STR_LEN];
 
   tp = LookupCell(name);
   if (tp == NULL) return;

base/config.h

@@ -176,4 +176,6 @@ extern int open(char *path, int oflag, ...); /* HPUX has it in <sys/fcntl.h> */
 #define FALSE 0
 #endif
 
+#define MAX_STR_LEN 256
+
 #endif /* _CONFIG_H */

base/embed.c

@@ -629,7 +629,7 @@ struct embed *FlattenEmbeddingTree(struct embed *E)
 int LenEmbed(char *prefix, struct nlist *np, struct embed *E, int flatten)
 /* return the number of characters required to print element E */
 {
-  char longstr[200];
+  char longstr[MAX_STR_LEN];
 
   if (E == NULL) return(0);
   if (E->left == NULL && E->right == NULL) {
@@ -668,7 +668,7 @@ void PrintEmb(FILE *outfile, char *prefix, struct nlist *np,
     struct objlist *ob;
     char *instancename;
     struct nlist *np2;
-    char name[200];
+    char name[MAX_STR_LEN];
 
     ob = InstanceNumber(np,E->instancenumber);
     instancename = ob->instance.name;
@@ -706,7 +706,7 @@ void PrintEmbed(FILE *outfile, char *prefix, struct nlist *np,
     struct objlist *ob;
     char *instancename;
     struct nlist *np2;
-    char name[200];
+    char name[MAX_STR_LEN];
 
     ob = InstanceNumber(np,E->instancenumber);
     instancename = ob->instance.name;

base/ext.c

@@ -23,12 +23,15 @@ the Free Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
 #include <stdio.h>
 #include <stdlib.h>	/* for strtod() */
 #include <stdarg.h>
+#include <ctype.h>
 
 #include "netgen.h"
-#include "hash.h"
 #include "objlist.h"
 #include "netfile.h"
 #include "print.h"
+#include "hash.h"
+
+static int invlambda = 100;	/* Used in sim and prm files */
 
 void extCell(char *name, int filenum)
 {
@@ -166,7 +169,7 @@ char *ReadExt(char *fname, int doflat, int *fnum)
   int filenum;
 
   if ((filenum = OpenParseFile(fname, *fnum)) < 0) {
-    char name[100];
+    char name[MAX_STR_LEN];
 
     SetExtension(name, fname, EXT_EXTENSION);
     if ((filenum = OpenParseFile(name, *fnum)) < 0) {
@@ -186,7 +189,7 @@ char *ReadExt(char *fname, int doflat, int *fnum)
   /* Make sure all .ext file reading is case sensitive */
   matchfunc = match;
   matchintfunc = matchfile;
-  hashfunc = hash;
+  hashfunc = hashcase;
 
   if (LookupCellFile(fname, filenum) != NULL) {
     Printf("Error:  Duplicate cell name \"%s\"!\n", fname);
@@ -207,7 +210,7 @@ char *ReadExt(char *fname, int doflat, int *fnum)
     else if (match(nexttok, "style"))  SkipNewLine(NULL);
     else if (match(nexttok, "resistclasses"))  SkipNewLine(NULL);
     else if (match(nexttok, "node")) {
-      char name[200];
+      char name[MAX_STR_LEN];
 
       /* No cell is generated until at least one valid "node" or "use"	*/
       /* has been read in the file.					*/
@@ -222,8 +225,8 @@ char *ReadExt(char *fname, int doflat, int *fnum)
       SkipNewLine(NULL);
     }
     else if (match(nexttok, "equiv")) {
-      char name[200];
-      char name2[200];
+      char name[MAX_STR_LEN];
+      char name2[MAX_STR_LEN];
       SkipTok(NULL);
       GetExtName(name, nexttok);
       if (LookupObject(name,CurrentCell) == NULL) Node(name);
@@ -234,8 +237,8 @@ char *ReadExt(char *fname, int doflat, int *fnum)
       SkipNewLine(NULL);
     }
     else if (match(nexttok, "device")) {
-      char dev_name[100], dev_class[100];
-      char gate[200], drain[200], source[200], subs[200];
+      char dev_name[MAX_STR_LEN], dev_class[MAX_STR_LEN];
+      char gate[MAX_STR_LEN], drain[MAX_STR_LEN], source[MAX_STR_LEN], subs[MAX_STR_LEN];
       char inststr[64];
       SkipTok(NULL);
       strcpy(dev_class, nexttok);
@@ -305,8 +308,8 @@ char *ReadExt(char *fname, int doflat, int *fnum)
       SkipNewLine(NULL);
     }
     else if (match(nexttok, "fet")) {	/* old-style FET record */
-      char fet_class[100];
-      char gate[200], drain[200], source[200], subs[200];
+      char fet_class[MAX_STR_LEN];
+      char gate[MAX_STR_LEN], drain[MAX_STR_LEN], source[MAX_STR_LEN], subs[MAX_STR_LEN];
       char inststr[64];
       SkipTok(NULL);
       strcpy(fet_class, nexttok);
@@ -364,7 +367,7 @@ char *ReadExt(char *fname, int doflat, int *fnum)
 	SkipNewLine(NULL);
       }
       else {
-        char ctop[200], cbot[200], cdummy[200];
+        char ctop[MAX_STR_LEN], cbot[MAX_STR_LEN], cdummy[MAX_STR_LEN];
 	SkipTok(NULL);
         GetExtName(ctop, nexttok);
 	SkipTok(NULL);
@@ -374,8 +377,8 @@ char *ReadExt(char *fname, int doflat, int *fnum)
       }
     }
     else if (match(nexttok, "use")) {
-      char name[200];
-      char instancename[200];
+      char name[MAX_STR_LEN];
+      char instancename[MAX_STR_LEN];
       char *basename;
 
       /* No cell is generated until at least one valid "node" or "use"	*/
@@ -389,7 +392,7 @@ char *ReadExt(char *fname, int doflat, int *fnum)
       SkipTok(NULL);
       GetExtName(name, nexttok);
       if ((basename = strrchr(name,'/')) != NULL) {
-	char tmp[200];
+	char tmp[MAX_STR_LEN];
 	strcpy(tmp, basename+1);
 	strcpy(name, tmp);
       }
@@ -404,8 +407,8 @@ char *ReadExt(char *fname, int doflat, int *fnum)
       SkipNewLine(NULL);
     }
     else if (match(nexttok, "merge")) {
-      char name[200];
-      char name2[200];
+      char name[MAX_STR_LEN];
+      char name2[MAX_STR_LEN];
       SkipTok(NULL);
       GetExtName(name, nexttok);
       SkipTok(NULL);
@@ -449,7 +452,8 @@ void simCell(char *name, int filenum)
   struct nlist *tp, *tp2;
   struct objlist *ob, *ob2;
   char FileName[500], simclass;
-  short i;
+  char writeLine[1024], paramString[128];
+  short i, p, mult;
   double l, w, v;
 
   tp = LookupCellFile(name, filenum);
@@ -477,9 +481,9 @@ void simCell(char *name, int filenum)
   }
 
   /* print out header list */
-  /* distance units are multiplied by 100 (distances are in um) */
+  /* distance units are multiplied by invlambda */
 
-  FlushString("| units: 100    tech: scmos\n");
+  FlushString("| units: %d    tech: scmos\n", 100 * invlambda);
 
   /* now run through cell's contents, print instances */
   for (ob = tp->cell; ob != NULL; ob = ob->next) {
@@ -515,13 +519,17 @@ void simCell(char *name, int filenum)
 	 case CLASS_NPN:
 	    simclass = 'b';
 	    break;	
-	 default:
+	 case CLASS_SUBCKT:
+	 case CLASS_MODULE:
 	    simclass = 'x';
 	    break;	
+	 default:
+	    simclass = '|';
+	    break;	
       }
 
       if (simclass != 'x')
-         FlushString("%c", simclass);
+	 FlushString("%c", simclass);
 
       switch (tp2->class) {
 	 case CLASS_NMOS: case CLASS_NMOS4:
@@ -589,6 +597,115 @@ void simCell(char *name, int filenum)
 	    FlushString(" %g\n", v);   
 	    break;
 
+	 case CLASS_MODULE:
+	    *writeLine = 'x';
+	    *(writeLine + 1) = '\0';
+	    mult = 1;
+
+	    /* Important---Need to look up the cell definition;  if
+	     * the first pin is "drain" then it is a FET, and pins
+	     * get swapped from D-G-S-B to G-S-D-B.  Source and drain
+	     * are treated here as equivalent because the .sim format
+	     * has no concept of an asymmetric source and drain.
+	     */
+	    ob2 = tp2->cell;
+	    if ((*matchfunc)(ob2->next->name, "gate"))
+	    {
+	      strcat(writeLine, " ");
+	      strcat(writeLine, NodeAlias(tp, ob->next));
+	      strcat(writeLine, " ");
+	      strcat(writeLine, NodeAlias(tp, ob));
+	      ob2 = ob->next->next;
+	    }
+	    else
+	      ob2 = ob;
+
+	    while (ob2 != NULL) {
+	      strcat(writeLine, " ");
+	      strcat(writeLine, NodeAlias(tp, ob2));
+	      ob2 = ob2->next;
+	      if ((ob2 == NULL) || (ob2->type <= FIRSTPIN)) break;
+	    }
+
+	    if (ob2 && ob2->type == PROPERTY) {
+	       struct valuelist *vl;
+	       /* Only known parameters are L, W, X, and Y */
+	       for (p = 0;; p++) {
+	          vl = (struct valuelist *)(&(ob2->instance.props[p]));
+		  if (vl->type == PROP_ENDLIST) {
+	             strcat(writeLine, " l=1");   
+		     break;
+		  }
+		  else if ((*matchfunc)(vl->key, "L")) {
+	             v = vl->value.dval;
+	             sprintf(paramString, " l=%d", (int)(0.5 + (v * invlambda)));   
+	             strcat(writeLine, paramString);
+		     break;
+		  }
+	       }
+	       for (p = 0;; p++) {
+	          vl = (struct valuelist *)(&(ob2->instance.props[p]));
+		  if (vl->type == PROP_ENDLIST) {
+	             strcat(writeLine, " w=1");   
+		     break;
+		  }
+		  else if ((*matchfunc)(vl->key, "W")) {
+	             v = vl->value.dval;
+	             sprintf(paramString, " w=%d", (int)(0.5 + (v * invlambda)));   
+	             strcat(writeLine, paramString);
+		     break;
+		  }
+	       }
+	       for (p = 0;; p++) {
+	          vl = (struct valuelist *)(&(ob2->instance.props[p]));
+		  if (vl->type == PROP_ENDLIST) {
+	             strcat(writeLine, " x=0");   
+		     break;
+		  }
+		  else if ((*matchfunc)(vl->key, "X")) {
+	             i = vl->value.ival;
+	             sprintf(paramString, " x=%d", i);
+	             strcat(writeLine, paramString);
+		     break;
+		  }
+	       }
+	       for (p = 0;; p++) {
+	          vl = (struct valuelist *)(&(ob2->instance.props[p]));
+		  if (vl->type == PROP_ENDLIST) {
+	             strcat(writeLine, " y=0");   
+		     break;
+		  }
+		  else if ((*matchfunc)(vl->key, "Y")) {
+	             i = vl->value.ival;
+	             sprintf(paramString, " y=%d", i);
+	             strcat(writeLine, paramString);
+		  }
+	       }
+	       for (p = 0;; p++) {
+	          vl = (struct valuelist *)(&(ob2->instance.props[p]));
+		  if (vl->type == PROP_ENDLIST) {
+		     break;
+		  }
+		  else if ((*matchfunc)(vl->key, "M")) {
+		     if (vl->type == PROP_INTEGER)
+	                mult = vl->value.ival;
+		     else
+	                mult = vl->value.dval;
+		  }
+	       }
+	    }
+	    strcat(writeLine, " ");
+	    strcat(writeLine, tp2->name);   
+	    strcat(writeLine, "\n");   
+
+	    /* Multiple instances (M != 1) are written multiple times.
+	     * NF is ignored in favor of having a single device with
+	     * the total width.
+	     */
+	    for (i = 0; i < mult; i++)
+		FlushString(writeLine);
+	    break;
+
 	 default:
 	    FlushString("| unhandled component %s\n", tp2->name);   
 	    break;
@@ -625,6 +742,181 @@ int StrIsInt(char *s)
     return (1);
 }
 
+/*------------------------------------------------------*/
+/* Read a .prm format file.  This is specifically to	*/
+/* get the "device" lines that indicate how a SPICE	*/
+/* subcircuit model or a .sim "x" record needs to be	*/
+/* translated into a specific component type like a	*/
+/* FET, diode, resistor, etc.				*/
+/*------------------------------------------------------*/
+
+char *ReadPrm(char *fname, int *fnum)
+{
+  int filenum;
+  struct keyvalue *kvlist = NULL;
+  struct nlist *tp;
+
+  if ((filenum = OpenParseFile(fname, *fnum)) < 0) {
+    char name[MAX_STR_LEN];
+
+    SetExtension(name, fname, PRM_EXTENSION);
+    if (OpenParseFile(name, *fnum) < 0) {
+      Printf("Error in prm file read: No file %s\n",name);
+      *fnum = filenum;
+      return NULL;
+    }    
+  }
+
+  /* Make sure all .prm file reading is case INsensitive */
+  /* This is because the only reason to read a PRM file	 */
+  /* is to find all the subcircuit device types	so that	 */
+  /* a SPICE file can be read and a SIM file written.	 */
+
+  matchfunc = matchnocase;
+  matchintfunc = matchfile;
+  hashfunc = hashnocase;
+
+  CellDef(fname, filenum);
+
+  while (!EndParseFile()) {
+    char devicename[MAX_STR_LEN];
+    SkipTok(NULL);
+
+    if (EndParseFile()) break;
+    if (nexttok[0] == ';') continue;		/* Comment line */
+    else if (nexttok[0] == '\0') continue;	/* Blank line */
+    else if (match(nexttok, "lambda")) {
+      SkipTok(NULL);
+      invlambda = (int)(0.5 + (1.0 / atof(nexttok)));
+      SkipNewLine(NULL); /* skip any attributes */
+    }
+    else if (match(nexttok, "device")) {
+      SkipTok(NULL);
+      if (match(nexttok, "nfet")) {
+	 SkipTok(NULL);
+	 strcpy(devicename, nexttok);
+	 /* Create 4-terminal nfet subcircuit device record */
+	 if (LookupCellFile(devicename, filenum) == NULL) {
+	     CellDef(devicename, filenum);
+	     Port("drain");
+	     Port("gate");
+	     Port("source");
+	     Port("bulk");
+	     PropertyDouble(devicename, filenum, "l", 0.01, 0.0);
+	     PropertyDouble(devicename, filenum, "w", 0.01, 0.0);
+	     PropertyInteger(devicename, filenum, "nf", 0, 1);
+	     PropertyInteger(devicename, filenum, "m", 0, 1);
+	     SetClass(CLASS_MODULE);
+	     EndCell();
+	     ReopenCellDef(fname, filenum);
+	 }
+         LinkProperties(devicename, kvlist);
+         SkipNewLine(NULL); /* skip any attributes */
+      }
+      else if (match(nexttok, "pfet")) {
+	 SkipTok(NULL);
+	 strcpy(devicename, nexttok);
+	 /* Create 4-terminal pfet subcircuit device record */
+	 if (LookupCellFile(devicename, filenum) == NULL) {
+	     CellDef(devicename, filenum);
+	     Port("drain");
+	     Port("gate");
+	     Port("source");
+	     Port("well");
+	     PropertyDouble(devicename, filenum, "l", 0.01, 0.0);
+	     PropertyDouble(devicename, filenum, "w", 0.01, 0.0);
+	     PropertyInteger(devicename, filenum, "nf", 0, 1);
+	     PropertyInteger(devicename, filenum, "m", 0, 1);
+	     SetClass(CLASS_MODULE);
+	     EndCell();
+	     ReopenCellDef(fname, filenum);
+	 }
+         LinkProperties(devicename, kvlist);
+         SkipNewLine(NULL); /* skip various attributes */
+      }
+      else if (match(nexttok, "resistor")) {
+	 SkipTok(NULL);
+	 strcpy(devicename, nexttok);
+	 /* Resistor device has additional record for the value */
+	 /* (Need to do something with this. . . ?) */
+	 SkipTok(NULL);
+	 /* Create resistor subcircuit device record */
+         if (LookupCellFile(devicename, filenum) == NULL) {
+            CellDef(devicename, filenum);
+            Port("end_a");
+            Port("end_b");
+            PropertyDouble(devicename, filenum, "value", 0.01, 0.0);
+	    PropertyDouble(devicename, filenum, "l", 0.01, 0.0);
+	    PropertyDouble(devicename, filenum, "w", 0.01, 0.0);
+	    PropertyInteger(devicename, filenum, "m", 0, 1);
+            SetClass(CLASS_MODULE);
+            EndCell();
+            ReopenCellDef(fname, filenum);
+         }
+	 LinkProperties(devicename, kvlist);
+         SkipNewLine(NULL); /* skip various attributes */
+      }
+      else if (match(nexttok, "capacitor")) {
+	 SkipTok(NULL);
+	 strcpy(devicename, nexttok);
+	 /* Capacitor device has additional record for the value */
+	 /* (Need to do something with this. . . ?) */
+	 SkipTok(NULL);
+	 /* Create capacitor subcircuit device record */
+         if (LookupCellFile(devicename, filenum) == NULL) {
+            CellDef(devicename, filenum);
+            Port("top");
+            Port("bottom");
+            PropertyDouble(devicename, filenum, "value", 0.01, 0.0);
+	    PropertyDouble(devicename, filenum, "l", 0.01, 0.0);
+	    PropertyDouble(devicename, filenum, "w", 0.01, 0.0);
+	    PropertyInteger(devicename, filenum, "m", 0, 1);
+            SetClass(CLASS_MODULE);
+            EndCell();
+            ReopenCellDef(fname, filenum);  /* Reopen */
+         }
+	 LinkProperties(devicename, kvlist);
+         SkipNewLine(NULL);
+      }
+      else if (match(nexttok, "diode")) {
+	 SkipTok(NULL);
+	 strcpy(devicename, nexttok);
+	 /* Create diode subcircuit device record */
+         if (LookupCellFile(devicename, filenum) == NULL) {
+            CellDef(devicename, filenum);
+            Port("anode");
+            Port("cathode");
+	    PropertyInteger(devicename, filenum, "m", 0, 1);
+            SetClass(CLASS_MODULE);
+            EndCell();
+            ReopenCellDef(fname, filenum);  /* Reopen */
+         }
+	 LinkProperties(devicename, kvlist);
+         SkipNewLine(NULL);
+      }
+      else {
+	Printf("Unknown device type in .prm: '%s'\n", nexttok);
+        InputParseError(stderr);
+        SkipNewLine(NULL);
+      }
+    }
+    else {
+      /* Could spell out all the keywords used in .prm files    */
+      /* but probably not worth the effort.                     */
+      SkipNewLine(NULL);
+    }
+    DeleteProperties(&kvlist);
+  }
+  EndCell();
+  CloseParseFile();
+
+  tp = LookupCellFile(fname, filenum);
+  if (tp) tp->flags |= CELL_TOP;
+
+  *fnum = filenum;
+  return fname;
+}
+
 /*-------------------------*/
 /* Read a .sim format file */
 /*-------------------------*/
@@ -639,11 +931,11 @@ char *ReadSim(char *fname, int *fnum)
   double simscale = 1.0;
 
   if ((filenum = OpenParseFile(fname, *fnum)) < 0) {
-    char name[100];
+    char name[MAX_STR_LEN];
 
     SetExtension(name, fname, SIM_EXTENSION);
     if (OpenParseFile(name, *fnum) < 0) {
-      Printf("Error in ext file read: No file %s\n",name);
+      Printf("Error in sim file read: No file %s\n",name);
       *fnum = filenum;
       return NULL;
     }    
@@ -652,7 +944,7 @@ char *ReadSim(char *fname, int *fnum)
   /* Make sure all .sim file reading is case sensitive */
   matchfunc = match;
   matchintfunc = matchfile;
-  hashfunc = hash;
+  hashfunc = hashcase;
 
   CellDef(fname, filenum);
 
@@ -669,7 +961,7 @@ char *ReadSim(char *fname, int *fnum)
       SkipNewLine(NULL);
     }
     else if (match(nexttok, "n")) {
-      char gate[200], drain[200], source[200];
+      char gate[MAX_STR_LEN], drain[MAX_STR_LEN], source[MAX_STR_LEN];
       char inststr[25], *instptr = NULL;
 
       SkipTok(NULL);
@@ -713,7 +1005,7 @@ char *ReadSim(char *fname, int *fnum)
       LinkProperties("n", kvlist);
     }
     else if (match(nexttok, "p")) {
-      char gate[200], drain[200], source[200];
+      char gate[MAX_STR_LEN], drain[MAX_STR_LEN], source[MAX_STR_LEN];
       char inststr[25], *instptr = NULL;
       SkipTok(NULL);
       GetExtName(gate, nexttok);
@@ -753,7 +1045,7 @@ char *ReadSim(char *fname, int *fnum)
       LinkProperties("p", kvlist);
     }
     else if (match(nexttok, "e")) {	/* 3-port capacitors (poly/poly2) */
-      char gate[200], drain[200], source[200];
+      char gate[MAX_STR_LEN], drain[MAX_STR_LEN], source[MAX_STR_LEN];
       char inststr[25], *instptr = NULL;
       SkipTok(NULL);
       GetExtName(gate, nexttok);
@@ -787,7 +1079,7 @@ char *ReadSim(char *fname, int *fnum)
       E(fname, instptr, gate, drain, source);
     }
     else if (match(nexttok, "b")) {		/* bipolars added by Tim 7/16/96 */
-      char base[200], emitter[200], collector[200];
+      char base[MAX_STR_LEN], emitter[MAX_STR_LEN], collector[MAX_STR_LEN];
       char inststr[25], *instptr = NULL;
       SkipTok(NULL);
       GetExtName(base, nexttok);
@@ -825,7 +1117,7 @@ char *ReadSim(char *fname, int *fnum)
 	SkipNewLine(NULL);
       }
       else {
-        char ctop[200], cbot[200], cdummy[200];
+        char ctop[MAX_STR_LEN], cbot[MAX_STR_LEN], cdummy[MAX_STR_LEN];
         SkipTok(NULL);
         GetExtName(ctop, nexttok);
         if (LookupObject(ctop, CurrentCell) == NULL)
@@ -846,11 +1138,11 @@ char *ReadSim(char *fname, int *fnum)
     }
     else if (match(nexttok, "r")) {	/* 2-port resistors */
       if (IgnoreRC) {
-	/* ignore all capacitances */
+	/* ignore all resistances */
 	SkipNewLine(NULL);
       }
       else {
-        char rtop[200], rbot[200];
+        char rtop[MAX_STR_LEN], rbot[MAX_STR_LEN];
         SkipTok(NULL);
         GetExtName(rtop, nexttok);
         if (LookupObject(rtop, CurrentCell) == NULL)
@@ -874,7 +1166,7 @@ char *ReadSim(char *fname, int *fnum)
 	SkipNewLine(NULL);
       }
       else {
-        char rtop[200], rbot[200], rdummy[200];
+        char rtop[MAX_STR_LEN], rbot[MAX_STR_LEN], rdummy[MAX_STR_LEN];
 	char inststr[25], *instptr = NULL;
         SkipTok(NULL);
         GetExtName(rdummy, nexttok);
@@ -916,7 +1208,7 @@ char *ReadSim(char *fname, int *fnum)
       SkipNewLine(NULL);
     }
     else if (match(nexttok, "=")) {
-      char node1[200], node2[200];
+      char node1[MAX_STR_LEN], node2[MAX_STR_LEN];
       SkipTok(NULL);
       GetExtName(node1, nexttok);
       SkipTok(NULL);

base/flatten.h

@@ -0,0 +1,8 @@
+#ifndef _FLATTEN_H
+#define _FLATTEN_H
+
+extern int UniquePins(char *name, int filenum);
+extern void flattenCell(char *name, int file);
+extern int HasContents(struct nlist *);
+
+#endif /* _FLATTEN_H */

base/hash.c

@@ -30,8 +30,8 @@ the Free Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
 #endif
 
 #include "netgen.h"
-#include "hash.h"
 #include "objlist.h"
+#include "hash.h"
 
 unsigned long (*hashfunc)(char *, int) = NULL;
 int (*matchfunc)(char *, char *) = NULL;
@@ -148,7 +148,7 @@ unsigned long hashnocase(char *s, int hashsize)
 	return (hashsize == 0) ? hashval : (hashval % hashsize);
 }
 
-unsigned long hash(char *s, int hashsize)
+unsigned long hashcase(char *s, int hashsize)
 {
 	unsigned long hashval;
 	

base/hash.h

@@ -48,7 +48,7 @@ extern void *HashFirst(struct hashdict *dict);
 extern void *HashNext(struct hashdict *dict);
 
 extern unsigned long hashnocase(char *s, int hashsize);
-extern unsigned long hash(char *s, int hashsize);
+extern unsigned long hashcase(char *s, int hashsize);
 
 extern int (*matchfunc)(char *, char *);
 /* matchintfunc() compares based on the name and the first	*/

base/inetcomp.c

@@ -17,6 +17,7 @@ along with this program; see the file copying.  If not, write to
 the Free Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
 
 /* inetcomp.c -- a simple wrapper to the NETCOMP() function */
+#include "config.h"
 
 #include <stdio.h>
 #include "netgen.h"
@@ -33,7 +34,7 @@ void STRCPY(char *dest, char *source)
 
 int main(int argc, char *argv[])
 {
-  char cell1[200], cell2[200];
+  char cell1[MAX_STR_LEN], cell2[MAX_STR_LEN];
 
   Debug = 0;
   if (argc != 1) {

base/netcmp.h

@@ -7,6 +7,7 @@ extern struct nlist *Circuit1;
 extern struct nlist *Circuit2;
 
 extern int ExhaustiveSubdivision;
+extern int ExactTopology;
 
 extern int left_col_end;
 extern int right_col_end;
@@ -26,6 +27,7 @@ extern void PrintCoreStats(void);
 extern void ResetState(void);
 extern void CreateTwoLists(char *name1, int file1, char *name2, int file2,
 		int dolist);
+extern void DescribeContents(char *name1, int file1, char *name2, int file2);
 extern int Iterate(void);
 extern int VerifyMatching(void);
 extern void PrintAutomorphisms(void);
@@ -36,7 +38,8 @@ extern int PermuteSetup(char *model, int filenum, char *pin1, char *pin2);
 extern int PermuteForget(char *model, int filenum, char *pin1, char *pin2);
 extern int EquivalenceElements(char *name1, int file1, char *name2, int file2);
 extern int EquivalenceNodes(char *name1, int file1, char *name2, int file2);
-extern int EquivalenceClasses(char *name1, int file1, char *name2, int file2);
+extern int EquivalenceClasses(char *name1, int file1, char *name2, int file2,
+		int dounique);
 extern int IgnoreClass(char *name, int file, unsigned char type);
 extern int MatchPins(struct nlist *tp1, struct nlist *tp2, int dolist);
 extern int PropertyOptimize(struct objlist *ob, struct nlist *tp, int run,
@@ -46,6 +49,7 @@ extern int  CreateCompareQueue(char *, int, char *, int);
 extern int  GetCompareQueueTop(char **, int *, char **, int *);
 extern int  PeekCompareQueueTop(char **, int *, char **, int *);
 extern void RemoveCompareQueue();
+extern int FlattenUnmatched(struct nlist *, char *, int, int);
 
 extern void PrintIllegalClasses();
 extern void PrintIllegalNodeClasses();
@@ -54,6 +58,15 @@ extern void PrintIllegalElementClasses();
 extern void DumpNetwork(struct objlist *ob, int cidx);
 extern void DumpNetworkAll(char *name, int file);
 
+extern void RegroupDataStructures();
+extern void FormatIllegalElementClasses();
+extern void FormatIllegalNodeClasses();
+extern int ResolveAutomorphsByProperty();
+extern int ResolveAutomorphsByPin();
+extern void SummarizeElementClasses(struct ElementClass *EC);
+extern int remove_group_tags(struct objlist *ob);
+
+
 #ifdef TCL_NETGEN
 extern int EquivalentNode();
 extern int EquivalentElement();

base/netfile.c

@@ -183,7 +183,6 @@ void CloseFile(char *filename)
 		fclose(outfile);
 }
 
-
 /* STUFF TO READ INPUT FILES */
 
 static char *line = NULL;	/* actual line read in */
@@ -207,6 +206,21 @@ struct hashdict *definitions = (struct hashdict *)NULL;
 
 #define WHITESPACE_DELIMITER " \t\n\r"
 
+/*----------------------------------------------------------------------*/
+/* Seek and Tell on infile stream, for use with handling generate	*/
+/* loops in verilog.							*/
+/*----------------------------------------------------------------------*/
+
+void SeekFile(long offset)
+{
+    fseek(infile, offset, SEEK_SET);
+}
+
+long TellFile()
+{
+    return ftell(infile);
+}
+
 /*----------------------------------------------------------------------*/
 /* TrimQuoted() ---							*/
 /* Remove spaces from inside single- or double-quoted strings.		*/
@@ -331,77 +345,87 @@ int GetNextLineNoNewline(char *delimiter)
 	    linetok = (char *)MALLOC(linesize + 1);
 	}
 
-	/* Check for substitutions (verilog only).  Make sure linetok is    */
-	/* large enough to hold the entire line after substitutions.	    */
-
-	if (definitions != NULL) {
-	    char *s, *w, e;
-	    struct property *kl;
-	    int len, dlen, vlen, addin = 0;
-	    unsigned char found = FALSE;
-
-	    for (s = line; *s != '\0'; s++) {
-		if (*s == '`') {
-		    w = s + 1;
-		    while (isalnum(*w) || (*w == '_') || (*w == '$')) w++;
-		    e = *w;
-		    *w = '\0';
-		    kl = (struct property *)HashLookup(s + 1, definitions);
-		    if (kl != NULL) {
-			dlen = strlen(s);
-			if (kl->type == PROP_STRING) {
-			    vlen = strlen(kl->pdefault.string);
-			}
-			else vlen = 12;  /* Leave room for numeric conversion */
-			addin += vlen - dlen + 1;
-			found = TRUE;
-		    }
-		    *w = e;
-		}
-	    }
-	    if (found) {
-		len = strlen(line);
-		if (len + addin > linesize) {
-		    while (len + addin > linesize) linesize += 500;
-		    FREE(linetok);
-		    linetok = (char *)MALLOC(linesize);
-		}
-	    }
-	}
-
-	/* Make definition substitutions (verilog only) */
-
-	if (definitions != NULL) {
+	if (definitions == NULL)
+	    strcpy(linetok, line);
+	else {
 	    char *s, *t, *w, e;
 	    struct property *kl;
+	    int len, dlen, vlen, addin = 0;
+	    int oldlinesize = linesize;
+	    unsigned char found = TRUE;
 
-	    t = linetok;
-	    for (s = line; *s != '\0'; s++) {
-		if (*s == '`') {
-		    w = s + 1;
-		    while (isalnum(*w) || (*w == '_') || (*w == '$')) w++;
-		    e = *w;
-		    *w = '\0';
-		    kl = (struct property *)HashLookup(s + 1, definitions);
-		    if (kl != NULL) {
-			if (kl->type == PROP_STRING)
-			    strcpy(t, kl->pdefault.string);
-			else if (kl->type == PROP_INTEGER)
-			    sprintf(t, "%d", kl->pdefault.ival);
-			else if (kl->type == PROP_DOUBLE)
-			    sprintf(t, "%g", kl->pdefault.dval);
-			t += strlen(t);
-			s = w - 1;
+	    /* Check for substitutions (verilog only).  Make sure linetok is	*/
+	    /* large enough to hold the entire line after substitutions.	*/
+
+	    while (found) {	/* Do this recursively, for nested definitions */
+	       found = FALSE;
+
+	       for (s = line; *s != '\0'; s++) {
+		    if (*s == '`') {
+		        w = s + 1;
+		        while (isalnum(*w) || (*w == '_') || (*w == '$')) w++;
+		        e = *w;
+		        *w = '\0';
+		        kl = (struct property *)HashLookup(s + 1, definitions);
+		        if (kl != NULL) {
+			    dlen = strlen(s);
+			    if (kl->type == PROP_STRING) {
+			        vlen = strlen(kl->pdefault.string);
+			    }
+			    else vlen = 12;  /* Leave room for numeric conversion */
+			    addin += vlen - dlen + 1;
+			    found = TRUE;
+		        }
+		        *w = e;
+		    }
+	        }
+	        if (found) {
+		    len = strlen(line);
+		    if (len + addin > linesize) {
+		        while (len + addin > linesize) linesize += 500;
+		        FREE(linetok);
+		        linetok = (char *)MALLOC(linesize);
+		    }
+	        }
+
+		/* Make definition substitutions (verilog only) */
+
+	        t = linetok;
+	        for (s = line; *s != '\0'; s++) {
+		    if (*s == '`') {
+		        w = s + 1;
+		        while (isalnum(*w) || (*w == '_') || (*w == '$')) w++;
+		        e = *w;
+		        *w = '\0';
+		        kl = (struct property *)HashLookup(s + 1, definitions);
+		        if (kl != NULL) {
+			    if (kl->type == PROP_STRING)
+			        strcpy(t, kl->pdefault.string);
+			    else if (kl->type == PROP_INTEGER)
+			        sprintf(t, "%d", kl->pdefault.ival);
+			    else if (kl->type == PROP_DOUBLE)
+			        sprintf(t, "%g", kl->pdefault.dval);
+			    t += strlen(t);
+			    s = w - 1;
+		        }
+		        else *t++ = *s;
+		        *w = e;
 		    }
 		    else *t++ = *s;
-		    *w = e;
+	        }
+	        *t = '\0';
+
+		/* Copy substituted linetok back to line and repeat until */
+		/* there are no more substitutions to be made.		  */
+
+		if (oldlinesize != linesize) {
+		    FREE(line);
+	    	    line = (char *)MALLOC(linesize + 501);
+		    oldlinesize = linesize;
 		}
-		else *t++ = *s;
+		strcpy(line, linetok);
 	    }
-	    *t = '\0';
 	}
-	else
-	    strcpy(linetok, line);
 
 	TrimQuoted(linetok);
 	linenum++;
@@ -563,6 +587,12 @@ void SkipTokNoNewline(char *delimiter)
 /*									*/
 /* Modified 3/30/2015 to include the condition where a comment line is	*/
 /* in the middle of a series of continuation lines.			*/
+/*									*/
+/* Modified 1/3/2024 to avoid skipping two lines if a line has only the	*/
+/* comment character '*' followed by a newline.  It seems that '\n' is	*/
+/* being ignored in WHITESPACE_DELIMITER, but it's easier to write the	*/
+/* code to find the exception rather than track down the problem in	*/
+/* GetNextLine().							*/
 /*----------------------------------------------------------------------*/
 
 void SpiceTokNoNewline(void)
@@ -574,8 +604,14 @@ void SpiceTokNoNewline(void)
     while (nexttok == NULL) {
 	contline = getc(infile);
 	if (contline == '*') {
-	   GetNextLine(WHITESPACE_DELIMITER);
-	   SkipNewLine(NULL);
+	   char testline = ' ';
+	   while ((testline == ' ') || (testline == '\t'))
+	      testline = getc(infile);
+           if (testline != '\n') {
+              ungetc(testline, infile);
+	      GetNextLine(WHITESPACE_DELIMITER);
+	      SkipNewLine(NULL);
+	   }
 	   continue;
 	}
 	else if (contline != '+') {
@@ -587,7 +623,8 @@ void SpiceTokNoNewline(void)
 }
 
 /*----------------------------------------------------------------------*/
-/* Skip to the next token, ignoring any C-style comments.		*/
+/* Skip to the next token, ignoring any C-style comments and verilog	*/
+/* "(* ... *)"-style comments.						*/
 /*----------------------------------------------------------------------*/
 
 void SkipTokComments(char *delimiter)
@@ -603,6 +640,11 @@ void SkipTokComments(char *delimiter)
 		SkipTok(delimiter);
 	    if (nexttok) SkipTok(delimiter);
 	}
+	else if (match(nexttok, "(*")) {
+	    while (nexttok && !match(nexttok, "*)"))
+		SkipTok(delimiter);
+	    if (nexttok) SkipTok(delimiter);
+	}
 	else break;
     }
 }
@@ -707,7 +749,7 @@ char *strdtok(char *pstring, char *delim1, char *delim2)
     if (*s == '\\') {
         s++;
         while (*s != '\0') {
-	    if ((*s == ' ') || (*s == '\\')) {
+	    if ((*s == ' ') || ((*s == '\\') && (*(s + 1) == '\0'))) {
 		s++;
 		break;
 	    }
@@ -856,7 +898,7 @@ char *ReadNetlist(char *fname, int *fnum)
   };
   
 #ifdef mips
-  struct filetype formats[7];
+  struct filetype formats[8];
 
   formats[0].extension = NTK_EXTENSION;
   formats[0].proc = ReadNtk;
@@ -864,14 +906,16 @@ char *ReadNetlist(char *fname, int *fnum)
   formats[1].proc = ReadExtHier;
   formats[2].extension = SIM_EXTENSION;
   formats[2].proc = ReadSim;
-  formats[3].extension = SPICE_EXTENSION;
-  formats[3].proc = ReadSpice;
-  formats[4].extension = NETGEN_EXTENSION;
-  formats[4].proc = ReadNetgenFile;
-  formats[5].extension = VERILOG_EXTENSION;
-  formats[5].proc = ReadVerilogFile;
-  formats[6].extension = NULL;
-  formats[6].proc = NULL;
+  formats[3].extension = PRM_EXTENSION;
+  formats[3].proc = ReadPrm;
+  formats[4].extension = SPICE_EXTENSION;
+  formats[4].proc = ReadSpice;
+  formats[5].extension = NETGEN_EXTENSION;
+  formats[5].proc = ReadNetgenFile;
+  formats[6].extension = VERILOG_EXTENSION;
+  formats[6].proc = ReadVerilogFile;
+  formats[7].extension = NULL;
+  formats[7].proc = NULL;
 
 #else  /* not mips (i.e. compiler with reasonable initializers) */
   
@@ -880,6 +924,7 @@ char *ReadNetlist(char *fname, int *fnum)
       {NTK_EXTENSION, ReadNtk},
       {EXT_EXTENSION, ReadExtHier},
       {SIM_EXTENSION, ReadSim},
+      {PRM_EXTENSION, ReadPrm},
       {SPICE_EXTENSION, ReadSpice},
       {SPICE_EXT2, ReadSpice},
       {SPICE_EXT3, ReadSpice},
@@ -896,13 +941,15 @@ char *ReadNetlist(char *fname, int *fnum)
 
   /* make first pass looking for extension */
   for (index = 0; formats[index].extension != NULL; index++) {
-    if (strstr(fname, formats[index].extension) != NULL) {
+    int extlen = strlen(formats[index].extension);
+    int flen = strlen(fname);
+    if (!strcmp(fname + flen - extlen, formats[index].extension)) {
       return (*(formats[index].proc))(fname, fnum);
     }
   }
   /* try appending extensions in sequence, and testing for file existance */
   for (index = 0; formats[index].extension != NULL; index++) {
-    char testname[200];
+    char testname[MAX_STR_LEN];
     strcpy(testname, fname);
     strcat(testname, formats[index].extension);
     if (OpenParseFile(testname, *fnum) >= 0) {
@@ -1007,7 +1054,7 @@ void WriteNetgenFile(char *name, char *filename)
 
 char *ReadNetgenFile (char *fname, int *fnum)
 {
-  char name[100];
+  char name[MAX_STR_LEN];
   char *LastCellRead = NULL;
   int filenum;
 
@@ -1243,7 +1290,7 @@ int READ(void *buf, int bytes)
 
 char *ReadNetgenFile (char *fname, int *fnum)
 {
-  char name[100];
+  char name[MAX_STR_LEN];
   int len, chars;
   char *LastCellRead = NULL;
 

base/netfile.h

@@ -7,6 +7,7 @@
 #define WOMBAT_EXTENSION ".wom"
 #define EXT_EXTENSION ".ext"
 #define SIM_EXTENSION ".sim"
+#define PRM_EXTENSION ".prm"
 #define SPICE_EXTENSION ".spice"
 #define SPICE_EXT2 ".spc"
 #define SPICE_EXT3 ".sp"
@@ -47,5 +48,7 @@ extern void InputParseError(FILE *f);
 extern int OpenParseFile(char *name, int fnum);
 extern int EndParseFile(void);
 extern int CloseParseFile(void);
+extern void SeekFile(long offset);	/* handles verilog 'for' loops */
+extern long TellFile();			/* handles verilog 'for' loops */
 
 #endif /* _NETFILE_H */

base/netgen.h

@@ -39,11 +39,13 @@ extern void SetParallelCombine(int value);
 extern void SetSeriesCombine(int value);
 extern int  PropertyTolerance(char *name, int fnum, char *key, int ival,
 		double dval);
+extern int  PropertyAssociatePin(char *name, int fnum, char *key, char *pin);
 extern int  PropertyMerge(char *name, int fnum, char *key, int merge_type,
 		int merge_mask);
 extern void ResolveProperties(char *name1, int file1, char *name2, int file2);
 extern void CopyProperties(struct objlist *obj_to, struct objlist *obj_from);
-extern int PromoteProperty(struct property *, struct valuelist *);
+extern int PromoteProperty(struct property *, struct valuelist *,
+		struct objlist *, struct nlist *);
 extern int SetPropertyDefault(struct property *, struct valuelist *);
 extern struct objlist *LinkProperties(char *model, struct keyvalue *topptr);
 extern int ReduceExpressions(struct objlist *instprop, struct objlist *parprops,
@@ -65,6 +67,15 @@ extern void AssignCircuits(char *name1, int file1, char *name2, int file2);
 /* flatten.c */
 extern int PrematchLists(char *, int, char *, int);
 
+/* verilog.c */
+struct cellstack {
+	char *cellname;
+	struct cellstack *next;
+};
+
+void ReadVerilogFile(char *fname, int filenum, struct cellstack **CellStackPtr,
+	int blackbox);
+
 /* Define (enumerate) various device classes, largely based on SPICE	*/
 /* model types, mixed with some ext/sim types.				*/
 
@@ -140,6 +151,7 @@ extern int NoOutput;      /* set this to 1 to disable stdout output */
 extern int Composition;	  /* direction of composition */
 extern int UnixWildcards; /* TRUE if *,?,{},[] only; false if full REGEXP */
 extern int GlobalParallelNone;	/* If TRUE, don't parallel combine any cells */
+extern int GlobalParallelOpen;	/* If TRUE, parallel combine cells w/no-connects */
 /* magic internal flag to restrict searches to recently placed cells */
 extern int QuickSearch;
 /* does re"CellDef"ing a cell add to it or overwrite it??? */
@@ -179,6 +191,7 @@ extern char *ReadNtk (char *fname, int *fnum);
 extern char *ReadExtHier(char *fname, int *fnum);
 extern char *ReadExtFlat(char *fname, int *fnum);
 extern char *ReadSim(char *fname, int *fnum);
+extern char *ReadPrm(char *fname, int *fnum);
 extern char *ReadSpice(char *fname, int *fnum);
 extern char *ReadSpiceLib(char *fname, int *fnum);
 extern char *ReadNetgenFile (char *fname, int *fnum);

base/ntk.c

@@ -181,7 +181,7 @@ void Ntk(char *name, char *filename)
 
 char *ReadNtk (char *fname, int *fnum)
 {
-  char	model[100], instancename[100], name[100];
+  char	model[MAX_STR_LEN], instancename[MAX_STR_LEN], name[MAX_STR_LEN];
   struct objlist *ob;
   int CellDefInProgress = 0;
   int filenum;
@@ -218,7 +218,7 @@ char *ReadNtk (char *fname, int *fnum)
       }
     } 
     else if (match(nexttok, "s")) {
-      char last[100];
+      char last[MAX_STR_LEN];
       *last = '\0';
       if (!CellDefInProgress) {
 	/* fake cell declaration for top-level call */

base/objlist.c

@@ -22,6 +22,7 @@ the Free Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
 
 #include <stdio.h>
 #include <ctype.h>
+#include <limits.h>
 #ifdef IBMPC
 #include <alloc.h>
 #endif
@@ -31,13 +32,13 @@ the Free Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
 #endif
 
 #include "netgen.h"
-#include "hash.h"
 #include "objlist.h"
 #include "regexp.h"
 #include "dbug.h"
 #include "print.h"
 #include "netfile.h"
 #include "netcmp.h"
+#include "hash.h"
 
 #ifdef TCL_NETGEN
 extern Tcl_Interp *netgeninterp;
@@ -129,6 +130,7 @@ struct property *NewProperty(void)
 	
 	kl = (struct property *)CALLOC(1,sizeof(struct property));
 	if (kl == NULL) Fprintf(stderr,"NewProperty: Core allocation error\n");
+	kl->pin = (char *)NULL;
 	return (kl);
 }
 
@@ -222,6 +224,13 @@ int matchnocase(char *st1, char *st2)
    char *sp1 = st1;
    char *sp2 = st2;
 
+   /* In case of a property that does not exist in one netlist, matchnocase()
+    * may be passed a null value, so return 0 to indicate a non-match.
+    * *Both* values null will also be treated as a mismatch (debatable
+    * behavior).
+    */
+   if (!sp1 || !sp2) return 0;
+
    while (*sp1 != '\0' && *sp2 != '\0') {
       if (to_lower[*sp1] != to_lower[*sp2]) break;
       sp1++;
@@ -288,8 +297,8 @@ static struct hashdict cell_dict;
 
 void InitCellHashTable(void)
 {
-    hashfunc = hash;
-    matchfunc = match;
+    hashfunc = hashcase;
+    matchfunc = NULL;
     matchintfunc = matchfile;
     InitializeHashTable(&cell_dict, CELLHASHSIZE);
 }
@@ -439,15 +448,32 @@ void RemoveShorted(char *class, int file)
    RecurseCellFileHashTable(removeshorted, file);
 }
 
+/* Remove instances of a deleted class from the database.	*/
+/* NOTE:  This treats deleted classes as not existing, so it	*/
+/* needs to take care of disconnected ports in the same manner	*/
+/* as flattenInstancesOf() in disconnecting the port of a	*/
+/* parent cell if it connected to nothing other than the	*/
+/* deleted instance.						*/
+
 int deleteclass(struct hashlist *p, int file)
 {
    struct nlist *ptr;
-   struct objlist *ob, *lob, *nob;
+   struct objlist *ob, *lob, *nob, *portnode;
+   unsigned char *checknodes;
+   int i;
 
    ptr = (struct nlist *)(p->ptr);
 
    if ((file != -1) && (ptr->file != file)) return 0;
 
+   /* Note:  This could be made faster by enumerating all times each
+    * node is used during the full pass, then subtracting each time
+    * the node is deleted in a child, then disconnecting all nodes
+    * that ended up with a zero count.
+    */
+   checknodes = (unsigned char *)CALLOC(ptr->nodename_cache_maxnodenum + 1,
+		sizeof(unsigned char));
+
    lob = NULL;
    for (ob = ptr->cell; ob != NULL;) {
       nob = ob->next;
@@ -455,6 +481,8 @@ int deleteclass(struct hashlist *p, int file)
 	 if ((*matchfunc)(ob->model.class, OldCell->name)) {
 	    HashDelete(ob->instance.name, &(ptr->instdict));
 	    while (1) {
+	       if (ob->type >= FIRSTPIN)
+		  checknodes[ob->node] = (unsigned char)1;
 	       FreeObjectAndHash(ob, ptr);
 	       ob = nob;
 	       if (ob == NULL) break;
@@ -476,6 +504,25 @@ int deleteclass(struct hashlist *p, int file)
          ob = nob;
       }
    }
+
+   for (i = 0; i <= ptr->nodename_cache_maxnodenum; i++) {
+      if (checknodes[i] != 0) {
+         portnode = NULL;
+         for (ob = ptr->cell; ob != NULL; ob = ob->next) {
+	    if ((ob->type != PORT) && (portnode == NULL))
+	       break;
+	    else if ((ob->type == PORT) && (ob->node == i))
+	       portnode = ob;
+	    else if ((ob->type >= FIRSTPIN) && (ob->node == i))
+	       break;
+         }
+         if ((ob == NULL) && (portnode != NULL)) {
+	    /* Port became disconnected when child was deleted */
+	    portnode->node = -1;
+         }
+      }
+   }
+   FREE(checknodes);
 }
 
 /* Remove all instances of class "class" from the database */
@@ -556,65 +603,65 @@ int freeprop(struct hashlist *p)
 
 void CellDelete(char *name, int fnum)
 {
-  /* delete all the contents of cell 'name', and remove 'name' from
-     the cell hash table.  NOTE:  this procedure does not care or check
-     if 'name' has been instanced anywhere.  It is assumed that if this
-     is the case, the user will (quickly) define a new cell of that name.
-  */
-  struct objlist *ob, *obnext;
-  struct nlist *tp;
+   /* delete all the contents of cell 'name', and remove 'name' from
+      the cell hash table.  NOTE:  this procedure does not care or check
+      if 'name' has been instanced anywhere.  It is assumed that if this
+      is the case, the user will (quickly) define a new cell of that name.
+   */
+   struct objlist *ob, *obnext;
+   struct nlist *tp;
 
-  tp = LookupCellFile(name, fnum);
-  if (tp == NULL) {
-    Printf ("No cell '%s' found.\n", name);
-    return;
-  }
+   tp = LookupCellFile(name, fnum);
+   if (tp == NULL) {
+      Printf ("No cell '%s' found.\n", name);
+      return;
+   }
 
-  HashIntDelete(name, fnum, &cell_dict);
-  /* now make sure that we free all the fields of the nlist struct */
-  if (tp->name != NULL) FREE(tp->name);
-  HashKill(&(tp->objdict));
-  HashKill(&(tp->instdict));
-  RecurseHashTable(&(tp->propdict), freeprop);
-  HashKill(&(tp->propdict));
-  FreeNodeNames(tp);
-  ob = tp->cell;
-  while (ob != NULL) {
-    obnext = ob->next;
-    FreeObject (ob);
-    ob = obnext;
-  }
+   HashIntDelete(name, fnum, &cell_dict);
+   /* now make sure that we free all the fields of the nlist struct */
+   if (tp->name != NULL) FREE(tp->name);
+   HashKill(&(tp->objdict));
+   HashKill(&(tp->instdict));
+   RecurseHashTable(&(tp->propdict), freeprop);
+   HashKill(&(tp->propdict));
+   FreeNodeNames(tp);
+   ob = tp->cell;
+   while (ob != NULL) {
+      obnext = ob->next;
+      FreeObject (ob);
+      ob = obnext;
+   }
 }
 
 static int PrintCellHashTableElement(struct hashlist *p)
 {
-  struct nlist *ptr;
+   struct nlist *ptr;
 
-  ptr = (struct nlist *)(p->ptr);
-  if ((TopFile >= 0) && (ptr->file != TopFile)) return 1;
+   ptr = (struct nlist *)(p->ptr);
+   if ((TopFile >= 0) && (ptr->file != TopFile)) return 1;
 
-  if (ptr->class != CLASS_SUBCKT) {
-    /* only print primitive cells if Debug is enabled */
-    if (Debug == 1)  Printf("Cell: %s (instanced %d times); Primitive\n",
+   if ((ptr->class != CLASS_SUBCKT) && (ptr->class != CLASS_MODULE)) {
+      /* only print primitive cells if Debug is enabled */
+      if (Debug == 1)  Printf("Cell: %s (instanced %d times); Primitive\n",
 		       ptr->name, ptr->number);
-    else if (Debug == 3) {	/* list */
+      else if (Debug == 3) {	/* list */
 #ifdef TCL_NETGEN
-       Tcl_AppendElement(netgeninterp, ptr->name);
+          Tcl_AppendElement(netgeninterp, ptr->name);
 #else
-       Printf("%s ", ptr->name);
+          Printf("%s ", ptr->name);
 #endif
-    }
-  }
-  else if ((Debug == 2) || (Debug == 3)) {	/* list only */
+      }
+   }
+   else if ((Debug == 2) || (Debug == 3)) {	/* list only */
 #ifdef TCL_NETGEN
-     Tcl_AppendElement(netgeninterp, ptr->name);
+      Tcl_AppendElement(netgeninterp, ptr->name);
 #else
-     Printf("%s ", ptr->name);
+      Printf("%s ", ptr->name);
 #endif
-  }
-  else
-    Printf("Cell: %s (instanced %d times)\n",ptr->name,ptr->number);
-  return(1);
+   }
+   else
+      Printf("Cell: %s (instanced %d times)\n", ptr->name, ptr->number);
+   return(1);
 }
 
 /* Print the contents of the cell hash table.	*/
@@ -623,65 +670,65 @@ static int PrintCellHashTableElement(struct hashlist *p)
 
 void PrintCellHashTable(int full, int filenum)
 {
-  int total, bins;
-  int OldDebug;
+   int total, bins;
+   int OldDebug;
 
-  if ((filenum == -1) && (Circuit1 != NULL) && (Circuit2 != NULL)) {
+   if ((filenum == -1) && (Circuit1 != NULL) && (Circuit2 != NULL)) {
       PrintCellHashTable(full, Circuit1->file);
       PrintCellHashTable(full, Circuit2->file);
       return;
-  }
+   }
 
-  TopFile = filenum;
+   TopFile = filenum;
 
-  bins  = RecurseHashTable(&cell_dict, CountHashTableBinsUsed);
-  total = RecurseHashTable(&cell_dict, CountHashTableEntries);
-  if (full < 2)
-     Printf("Hash table: %d of %d bins used; %d cells total (%.2f per bin)\n",
+   bins  = RecurseHashTable(&cell_dict, CountHashTableBinsUsed);
+   total = RecurseHashTable(&cell_dict, CountHashTableEntries);
+   if (full < 2)
+       Printf("Hash table: %d of %d bins used; %d cells total (%.2f per bin)\n",
 		bins, CELLHASHSIZE, total, (bins == 0) ? 0 :
 		(float)((float)total / (float)bins));
 	
-  OldDebug = Debug;
-  Debug = full;
-  RecurseHashTable(&cell_dict, PrintCellHashTableElement);
-  Debug = OldDebug;
+   OldDebug = Debug;
+   Debug = full;
+   RecurseHashTable(&cell_dict, PrintCellHashTableElement);
+   Debug = OldDebug;
 #ifndef TCL_NETGEN
-  if (full >= 2) Printf("\n");
+   if (full >= 2) Printf("\n");
 #endif
 }
 
 struct nlist *FirstCell(void)
 {
-  return((struct nlist *)HashFirst(&cell_dict));
+   return((struct nlist *)HashFirst(&cell_dict));
 }
 
 struct nlist *NextCell(void)
 {
-  return((struct nlist *)HashNext(&cell_dict));
+   return((struct nlist *)HashNext(&cell_dict));
 }
 
 static int ClearDumpedElement(struct hashlist *np)
 {
-	struct nlist *p;
+   struct nlist *p;
 
-	p = (struct nlist *)(np->ptr);
-	p->dumped = 0;
-	return(1);
+   p = (struct nlist *)(np->ptr);
+   p->dumped = 0;
+   return(1);
 }
 
 void ClearDumpedList(void)
 {
-	RecurseHashTable(&cell_dict, ClearDumpedElement);
+   RecurseHashTable(&cell_dict, ClearDumpedElement);
 }
 
 int RecurseCellHashTable(int (*foo)(struct hashlist *np))
 {
-  return RecurseHashTable(&cell_dict, foo);
+   return RecurseHashTable(&cell_dict, foo);
 }
 
 int RecurseCellFileHashTable(int (*foo)(struct hashlist *, int), int value)
 {
-  return RecurseHashTableValue(&cell_dict, foo, value);
+   return RecurseHashTableValue(&cell_dict, foo, value);
 }
 
 /* Yet another version, passing one parameter that is a pointer */
@@ -689,14 +736,14 @@ int RecurseCellFileHashTable(int (*foo)(struct hashlist *, int), int value)
 struct nlist *RecurseCellHashTable2(struct nlist *(*foo)(struct hashlist *,
 	void *), void *pointer)
 {
-  return RecurseHashTablePointer(&cell_dict, foo, pointer);
+   return RecurseHashTablePointer(&cell_dict, foo, pointer);
 }
 
 /************************** WILD-CARD STUFF *******************************/
 		
 char *FixTemplate(char *t)
 {
-	char buffer[200];
+	char buffer[MAX_STR_LEN];
 	char *rstr;
 	int i,j;
 	int InsideBrace;
@@ -975,6 +1022,7 @@ struct objlist *CopyObjList(struct objlist *oldlist, unsigned char doforall)
           newob->model.class = NULL;
        else
           newob->model.class = strsave(tmp->model.class);
+       newob->flags = tmp->flags;
        newob->instance.name = (tmp->instance.name) ?
 		strsave(tmp->instance.name) : NULL;
     }
@@ -1112,13 +1160,17 @@ void FreeObjectAndHash(struct objlist *ob, struct nlist *ptr)
 
 /***************  GENERAL UTILITIES ****************************/
 
-int NumberOfPorts(char *cellname)
+int NumberOfPorts(char *cellname, int file)
 {
   struct nlist *tp;
   struct objlist *ob;
   int ports;
 
-  tp = LookupCell(cellname);
+  if (file == -1)
+    tp = LookupCell(cellname);
+  else
+    tp = LookupCellFile(cellname, file);
+
   if (tp == NULL) return(0);
   ports = 0;
   for (ob = tp->cell; ob != NULL; ob = ob->next)
@@ -1202,7 +1254,7 @@ static char *OldNodeName(struct nlist *tp, int node)
   struct objlist *firstuniqueglobal;
   struct objlist *firstglobal;
   struct objlist *firstpin;
-  static char StrBuffer[100];
+  static char StrBuffer[MAX_STR_LEN];
 
 #if 0
   /* make second pass, looking for ports */

base/objlist.h

@@ -28,6 +28,8 @@
 
 #define PROXY (0)		/* Used in model.port record of ports */
 
+#define NO_CONNECT	1	/* Use in object list to flag an isolated net */
+
 /* Lists of device properties.  Order is defined at the time of	*/
 /* the cell definition; values are sorted at the time instances	*/
 /* are read.							*/
@@ -133,6 +135,7 @@ struct property {
   unsigned char idx;		/* index into valuelist */
   unsigned char type;		/* string, integer, double, value, expression */
   unsigned char merge;		/* how property changes when devices are merged */
+  char *pin;			/* associated pin (or NULL if not associated)	*/
   union {
      char *string;
      double dval;
@@ -162,6 +165,7 @@ struct objlist {
 				/* (string) value of property for properties */
      struct valuelist *props;	/* Property record */
   } instance;
+  unsigned char flags;	/* Used by NODE type to flag isolated net */
   int node;		/* the electrical node number of the port/node/pin */
   struct objlist *next;
 };
@@ -192,9 +196,8 @@ struct Permutation {
     struct Permutation *next;
 };
 
-#define OBJHASHSIZE 997 /* the size of the object and instance hash lists */
+#define OBJHASHSIZE 42073 /* the size of the object and instance hash lists */
                         /* prime numbers are good choices as hash sizes */
-                        /* 101 is a good number for IBMPC */
 
 /* cell definition for hash table */
 /* NOTE: "file" must come first for the hash matching by name and file */
@@ -204,7 +207,7 @@ struct nlist {
   char *name;
   int number;		/* number of instances defined */
   int dumped;		/* instance count, and general-purpose marker */
-  unsigned char flags;
+  unsigned short flags;
   unsigned char class;
   unsigned long classhash;	/* randomized hash value for cell class */
   struct Permutation *permutes;	/* list of permuting pins */
@@ -220,17 +223,18 @@ struct nlist {
 
 /* Defined nlist structure flags */
 
-#define CELL_MATCHED		0x01	/* cell matched to another */
-#define CELL_NOCASE		0x02	/* cell is case-insensitive (e.g., SPICE) */
-#define CELL_TOP		0x04	/* cell is a top-level cell */
-#define CELL_PLACEHOLDER	0x08	/* cell is a placeholder cell */
-#define CELL_PROPSMATCHED	0x10	/* properties matched to matching cell */
-#define CELL_DUPLICATE		0x20	/* cell has a duplicate */
+#define CELL_MATCHED		0x001	/* cell matched to another */
+#define CELL_NOCASE		0x002	/* cell is case-insensitive (e.g., SPICE) */
+#define CELL_TOP		0x004	/* cell is a top-level cell */
+#define CELL_PLACEHOLDER	0x008	/* cell is a placeholder cell */
+#define CELL_PROPSMATCHED	0x010	/* properties matched to matching cell */
+#define CELL_DUPLICATE		0x020	/* cell has a duplicate */
+#define CELL_VERILOG		0x040	/* cell is verilog module */
 
 /* Flags for combination allowances and prohibitions */
 
-#define COMB_SERIES		0x40
-#define COMB_NO_PARALLEL	0x80
+#define COMB_SERIES		0x100
+#define COMB_NO_PARALLEL	0x200
 
 extern struct nlist *CurrentCell;
 extern struct objlist *CurrentTail;
@@ -242,7 +246,7 @@ extern void FreeObjectAndHash(struct objlist *ob, struct nlist *ptr);
 extern void FreePorts(char *cellname);
 extern struct IgnoreList *ClassIgnore;
 
-extern int NumberOfPorts(char *cellname);
+extern int NumberOfPorts(char *cellname, int file);
 extern struct objlist *InstanceNumber(struct nlist *tp, int inst);
 
 extern struct objlist *List(char *list_template);
@@ -310,6 +314,19 @@ extern void GarbageCollect(void);
 extern void InitGarbageCollection(void);
 extern void AddToGarbageList(struct objlist *head);
 
+extern void DeleteProperties(struct keyvalue **topptr);
+extern void AddProperty(struct keyvalue **topptr, char *key, char *value);
+extern void AddScaledProperty(struct keyvalue **topptr, char *key, char *value, double scale);
+extern void DeleteProperties(struct keyvalue **topptr);
+extern struct objlist *LinkProperties(char *model, struct keyvalue *topptr);
+
+extern void ClassDelete(char *class, int file);
+extern void RemoveShorted(char *class, int file);
+extern void CellRehash(char *name, char *newname, int file);
+
+/* defined in netgen.c */
+extern int ConvertStringToInteger(char *string, int *ival);
+
 #ifdef HAVE_MALLINFO
 void PrintMemoryStats(void);
 #endif

base/place.c

@@ -511,8 +511,8 @@ int OpenEmbeddingFile(char *cellname, char *filename)
 /* returns 1 if OK */
 {
   struct nlist *tp;
-  char outfilename[200];
-  char logfilename[200];
+  char outfilename[MAX_STR_LEN];
+  char logfilename[MAX_STR_LEN];
 
   tp = LookupCell(cellname);
   if (tp == NULL) {
@@ -783,7 +783,7 @@ void SetupArray(char *prompt1, char *prompt2, char *prompt3, int *data,
                 void (*proc)(void))
 {
   int i, oldfanout;
-  char name[100];
+  char name[MAX_STR_LEN];
 
   Printf(prompt1);
   for (i = 1; i <= MAX_TREE_DEPTH; i++) 
@@ -792,7 +792,7 @@ void SetupArray(char *prompt1, char *prompt2, char *prompt3, int *data,
 
   oldfanout = 1;
   for (i = 1; i <= MAX_TREE_DEPTH; i++) {
-    char prompt[100];
+    char prompt[MAX_STR_LEN];
     int newfanout;
     sprintf(prompt, prompt2, i);
     promptstring(prompt, name);
@@ -822,7 +822,7 @@ void SetupArrayFromString(char *prompt1, char *prompt3, int *data,
                 void (*proc)(void), char *text)
 {
   int i, oldfanout, newfanout;
-  char string[100];
+  char string[MAX_STR_LEN];
   char *ch;
   char *endch;
 
@@ -929,7 +929,7 @@ void ToggleDebug(void)
 void DescribeCell(char *name, int detail)
 {
   Printf("Cell: %s contains %d instances, %d nodes and %d ports\n", name, 
-	 NumberOfInstances(name),  RenumberNodes(name), NumberOfPorts(name));
+	 NumberOfInstances(name),  RenumberNodes(name), NumberOfPorts(name, -1));
   PrintEmbeddingTree(stdout,name,detail);
 }
 
@@ -962,7 +962,7 @@ void ProtoPrintParameters(void)
 void PROTOCHIP(void)
 /* a simple command interpreter to manage embedding/routing */
 {
-  char name[100];
+  char name[MAX_STR_LEN];
   char ch;
   
   InitializeFanout();
@@ -1136,7 +1136,7 @@ void PROTOCHIP(void)
 
       oldfanout = 1;
       for (i = 1; i <= MAX_TREE_DEPTH; i++) {
-	char prompt[100];
+	char prompt[MAX_STR_LEN];
 	int newfanout;
 	sprintf(prompt,"Fanout for level %d (0 to quit): ",i);
 	promptstring(prompt, name);
@@ -1168,7 +1168,7 @@ void PROTOCHIP(void)
 
       oldfanout = 1;
       for (i = 1; i <= MAX_TREE_DEPTH; i++) {
-	char prompt[100];
+	char prompt[MAX_STR_LEN];
 	int newfanout;
 	sprintf(prompt,"Common nodes for level %d (0 to quit): ",i);
 	promptstring(prompt, name);
@@ -1200,7 +1200,7 @@ void PROTOCHIP(void)
 
       oldfanout = 1;
       for (i = 1; i <= MAX_TREE_DEPTH; i++) {
-	char prompt[100];
+	char prompt[MAX_STR_LEN];
 	int newfanout;
 	sprintf(prompt,"Used leaves for level %d (0 to quit): ",i);
 	promptstring(prompt, name);

base/print.c

@@ -37,7 +37,7 @@ extern int ColumnBase;
 
 struct filestr {
   FILE *f;
-  char buffer[200];
+  char buffer[MAX_STR_LEN];
   int wrap;  /* column to wrap around in, or 0 if no wrap */
 } file_buffers[MAXFILES];
 
@@ -107,7 +107,7 @@ void Fprintf(FILE *f, char *format, ...)
 {
   va_list ap;
   int FileIndex;
-  char tmpstr[200];
+  char tmpstr[MAX_STR_LEN];
   int bufferlongenough;
   int linewrapexceeded;
 
@@ -203,7 +203,7 @@ void Printf(char *format, ...)
 void Printf(char *format, ...)
 {
   va_list ap;
-  char tmpstr[200];
+  char tmpstr[MAX_STR_LEN];
 
   va_start(ap, format);
   vsprintf(tmpstr, format, ap);

base/query.c

@@ -52,7 +52,7 @@ the Free Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
 /*************************************************************************/
 
 static int SuppressPrompts = 0;
-static char InputLine[200];
+static char InputLine[MAX_STR_LEN];
 
 void typeahead(char *str)
 {
@@ -73,7 +73,7 @@ but reads from 'promptstring_infile' if nec. */
 /* If interactive, puts out 'prompt' */
 {
   char *nexttok;
-  char tmpstr[200];
+  char tmpstr[MAX_STR_LEN];
   int echo;
 
   if (promptstring_infile == NULL)
@@ -801,11 +801,18 @@ void DescribeInstance(char *name, int file)
   {
     if (ob->node > nodemax) nodemax = ob->node;
     else if ((ob->node == -1) && (ob->model.port != PROXY)) {
-      if (!(tp->flags & CELL_PLACEHOLDER))
-      {
-	if (disconnectednodes == 0) Fprintf(stderr, "\n");
+
+      /* All black-box modules and placeholders by definition have all	*/
+      /* disconnected pins, so don't report those.			*/
+
+      if ((!(tp->flags & CELL_PLACEHOLDER)) && (tp->class != CLASS_MODULE)) {
+	// if (disconnectednodes == 0) Fprintf(stderr, "\n");
         disconnectednodes++;
-        Fprintf(stderr, "Cell %s disconnected node: %s\n", tp->name, ob->name);
+	/* Don't report on ports marked "port_match_error", which is just confusing. */
+	if (strcmp(ob->name, "port_match_error")) {
+           Fprintf(stderr, "Cell %s (%d) disconnected node: %s\n",
+		    tp->name, tp->file, ob->name);
+	}
       }
     }
   }
@@ -903,7 +910,7 @@ void PrintLeavesInCell(char *cellname, int filenum)
   np->dumped = 1;
 
   if (np->class != CLASS_SUBCKT) {
-    Printf("%s; %d ports; Primitive.\n", cellname, NumberOfPorts(cellname));
+    Printf("%s; %d ports; Primitive.\n", cellname, NumberOfPorts(cellname, filenum));
     return;
   }
 
@@ -916,7 +923,7 @@ void PrintLeavesInCell(char *cellname, int filenum)
       am_a_leaf = 0;
     }
 
-  if (am_a_leaf) Printf("%s; %d ports\n", cellname, NumberOfPorts(cellname));
+  if (am_a_leaf) Printf("%s; %d ports\n", cellname, NumberOfPorts(cellname, filenum));
   return;
 }
 
@@ -952,8 +959,8 @@ void Query(void)
 {
   /* little interactive debugger */
   char reply;
-  char repstr[100];
-  char repstr2[100];
+  char repstr[MAX_STR_LEN];
+  char repstr2[MAX_STR_LEN];
   float StartTime;   /* for elapsed CPU times */
   int Timing;  /* if true, print times of each command */
   int filenum = -1;
@@ -1029,7 +1036,7 @@ void Query(void)
       break;
     case 'v':
       promptstring("Write Verilog: circuit name: ", repstr);
-      VerilogModule(repstr, filenum, "");
+      VerilogTop(repstr, filenum, "");
       break;
     case 'E':
       promptstring("Write ESACAP: circuit name: ", repstr);

base/spice.c

@@ -26,6 +26,7 @@ the Free Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
 #endif
 
 #include <stdlib.h>  /* for calloc(), free(), getenv() */
+#include <ctype.h>  /* for toupper(), isascii() */
 #ifndef IBMPC
 #include <sys/types.h>	/* for getpwnam() tilde expansion */
 #include <pwd.h>
@@ -40,6 +41,9 @@ the Free Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
 #include "objlist.h"
 #include "netfile.h"
 #include "print.h"
+#include "query.h"
+#include "objlist.h"
+#include "netcmp.h"
 
 // Global storage for parameters from .PARAM
 struct hashdict spiceparams;
@@ -473,15 +477,6 @@ void CleanupSubcell() {
       SetClass(CLASS_MODULE);
 }
 
-/*------------------------------------------------------*/
-/* Structure for stacking nested subcircuit definitions */
-/*------------------------------------------------------*/
-
-struct cellstack {
-   char *cellname;
-   struct cellstack *next;
-};
-
 /*------------------------------------------------------*/
 /* Push a subcircuit name onto the stack		*/
 /*------------------------------------------------------*/
@@ -524,13 +519,13 @@ void ReadSpiceFile(char *fname, int filenum, struct cellstack **CellStackPtr,
   int warnings = 0, update = 0, hasports = 0;
   char *eqptr, devtype, in_subckt;
   struct keyvalue *kvlist = NULL;
-  char inst[256], model[256], instname[256];
-  struct nlist *tp;
+  char inst[MAX_STR_LEN], model[MAX_STR_LEN], instname[MAX_STR_LEN];
+  struct nlist *tp, *tpsave;
   struct objlist *parent, *sobj, *nobj, *lobj, *pobj;
 
-  inst[255] = '\0';
-  model[255] = '\0';
-  instname[255] = '\0';
+  inst[MAX_STR_LEN-1] = '\0';
+  model[MAX_STR_LEN-1] = '\0';
+  instname[MAX_STR_LEN-1] = '\0';
   in_subckt = (char)0;
   
   while (!EndParseFile()) {
@@ -561,8 +556,9 @@ void ReadSpiceFile(char *fname, int filenum, struct cellstack **CellStackPtr,
 
       /* Check for existence of the cell.  We may need to rename it. */
 
-      snprintf(model, 99, "%s", nexttok);
+      snprintf(model, MAX_STR_LEN-1, "%s", nexttok);
       tp = LookupCellFile(nexttok, filenum);
+      tpsave = NULL;
 
       /* Check for name conflict with duplicate cell names	*/
       /* This may mean that the cell was used before it was	*/
@@ -601,11 +597,46 @@ void ReadSpiceFile(char *fname, int filenum, struct cellstack **CellStackPtr,
          tp = LookupCellFile(nexttok, filenum);
       }
       else if (tp != NULL) {	/* Make a new definition for an empty cell */
-	 FreePorts(nexttok);
-	 CellDelete(nexttok, filenum);	/* This removes any PLACEHOLDER flag */
-	 CellDef(model, filenum);
-	 tp = LookupCellFile(model, filenum);
-	 update = 1;	/* Will need to update existing instances */
+	 /* Handle issue with SPICE read after verilog, where a placeholder
+	  * was created from the verilog.  (1) If the pin names are "1", "2",
+	  * "3", then this is a SPICE placeholder, and just remove the CellDef
+	  * and re-create it.  Otherwise, create new cell "_PLACEHOLDER_".
+	  * (2) After encountering .ends, run MatchPins between the two cells.
+	  * (3) delete the original cell and rename the new cell.
+	  */
+	 int i = 1;
+	 char pname[10];
+	 for (pobj = tp->cell; pobj && pobj->type == PORT; pobj = pobj->next) {
+	     sprintf(pname, "%d", i);
+	     if (!matchnocase(pobj->name, pname)) break;
+	     i++;
+	 }
+	 if ((pobj == NULL) || (pobj->type != PORT)) {
+	    /* This is a SPICE placeholder created because the cell was instanced
+	     * before it was defined.  However, the pins can be assumed to be in
+	     * the correct order, and pin reordering does not need to be done.
+	     */
+	    FreePorts(nexttok);
+	    CellDelete(nexttok, filenum);	/* This removes any PLACEHOLDER flag */
+	    CellDef(model, filenum);
+	    tp = LookupCellFile(model, filenum);
+	    update = 1;	/* Will need to update existing instances */
+	 }
+	 else {
+	    /* This is (probably) a verilog placeholder created because the
+	     * verilog was read before the (SPICE) definitions.  The verilog
+	     * netlist should have named the pins of the parent cell.  However,
+	     * there is no guarantee the order of pins is correct.  The MatchPins()
+	     * routine from netcmp.c can be used here to match the cell against
+	     * the placeholder, and reorder the pins in all instances to match.
+	     * Note that we cannot just reorder the SPICE pins to match the
+	     * verilog order, because there may be other SPICE netlists which
+	     * instance the cell with the correct SPICE port order.
+	     */
+	     tpsave = tp;
+             CellDef("_PLACEHOLDER_", filenum);
+             tp = LookupCellFile("_PLACEHOLDER_", filenum);
+	 }
       }
       else if (tp == NULL) {	/* Completely new cell, no name conflict */
          CellDef(model, filenum);
@@ -697,6 +728,38 @@ skip_ends:
       if (*CellStackPtr) PopStack(CellStackPtr);
       if (*CellStackPtr) ReopenCellDef((*CellStackPtr)->cellname, filenum);
       SkipNewLine(NULL);
+
+      if (tpsave != NULL) {
+	 struct nlist *tpplace;
+	 char *savename;
+
+	 /* Handle a placeholder from a verilog file that has been replaced
+	  * by a netlist with pins in a different order.  The pins need to
+	  * be matched, corrected in the original cell and all instances,
+	  * and the new cell deleted.
+	  */
+
+	 Printf("Verilog placeholder %s replaced by SPICE definition\n",
+		tpsave->name);
+         tpplace = LookupCellFile("_PLACEHOLDER_", filenum);
+	 /* MatchPins is part of netcmp and normally Circuit2 is the
+	  * circuit being matched, so set Circuit2 to the original
+	  * verilog black-box cell, and MatchPins() will force its
+	  * pins to be rearranged to match the SPICE definition just
+	  * read.
+	  */
+	 Circuit2 = tpsave;
+	 MatchPins(tpplace, tpsave, 0);
+	 savename = strsave(tpsave->name);
+	 /* Now the original verilog black-box cell can be removed */
+	 FreePorts(savename);
+	 CellDelete(savename, filenum);
+	 /* And _PLACEHOLDER_ is renamed to the original name of the cell. */
+	 CellRehash("_PLACEHOLDER_", savename, filenum);
+	 tpsave = NULL;
+	 Circuit2 = NULL;
+	 FREE(savename);
+      }
     }
     else if (matchnocase(nexttok, ".MODEL")) {
       unsigned char class = CLASS_SUBCKT;
@@ -709,7 +772,7 @@ skip_ends:
 
       SpiceTokNoNewline();
       if (nexttok == NULL) continue;	/* Ignore if no model name */
-      snprintf(model, 99, "%s", nexttok);
+      snprintf(model, MAX_STR_LEN-1, "%s", nexttok);
       SpiceTokNoNewline();
       if (nexttok == NULL) goto baddevice;
 
@@ -874,6 +937,17 @@ skip_ends:
       }
     }
 
+    /* Ignore anything in a .CONTROL ... .ENDC block */
+    else if (matchnocase(nexttok, ".CONTROL")) {
+	while (1) {
+	    SpiceSkipNewLine();
+	    SkipTok(NULL);
+	    if (EndParseFile()) break;
+	    if (matchnocase(nexttok, ".ENDC"))
+	       break;
+	}
+    }
+
     // Blackbox (library) mode---parse only subcircuits and models;
     // ignore all components.
 
@@ -882,29 +956,29 @@ skip_ends:
     }
 
     else if (toupper(nexttok[0]) == 'Q') {
-      char emitter[100], base[100], collector[100];
-      emitter[99] = '\0';
-      base[99] = '\0';
-      collector[99] = '\0';
+      char emitter[MAX_STR_LEN], base[MAX_STR_LEN], collector[MAX_STR_LEN];
+      emitter[MAX_STR_LEN-1] = '\0';
+      base[MAX_STR_LEN-1] = '\0';
+      collector[MAX_STR_LEN-1] = '\0';
 
       if (!(*CellStackPtr)) {
 	CellDef(fname, filenum);
 	PushStack(fname, CellStackPtr);
       }
-      strncpy(inst, nexttok + 1, 99); SpiceTokNoNewline(); 
+      strncpy(inst, nexttok + 1, MAX_STR_LEN-1); SpiceTokNoNewline(); 
       if (nexttok == NULL) goto baddevice;
-      strncpy(collector, nexttok, 99); SpiceTokNoNewline();
+      strncpy(collector, nexttok, MAX_STR_LEN-1); SpiceTokNoNewline();
       if (nexttok == NULL) goto baddevice;
-      strncpy(base, nexttok, 99);   SpiceTokNoNewline();
+      strncpy(base, nexttok, MAX_STR_LEN-1);   SpiceTokNoNewline();
       if (nexttok == NULL) goto baddevice;
-      strncpy(emitter, nexttok, 99);  SpiceTokNoNewline();
+      strncpy(emitter, nexttok, MAX_STR_LEN-1);  SpiceTokNoNewline();
       /* make sure all the nodes exist */
       if (LookupObject(collector, CurrentCell) == NULL) Node(collector);
       if (LookupObject(base, CurrentCell) == NULL) Node(base);
       if (LookupObject(emitter, CurrentCell) == NULL) Node(emitter);
 
       /* Read the device model */
-      snprintf(model, 99, "%s", nexttok);
+      snprintf(model, MAX_STR_LEN-1, "%s", nexttok);
 
       while (nexttok != NULL)
       {
@@ -935,30 +1009,30 @@ skip_ends:
 	 goto baddevice;
       }
 
-      snprintf(instname, 255, "%s%s", model, inst);
+      snprintf(instname, MAX_STR_LEN-1, "%s:%s", model, inst);
       Cell(instname, model, collector, base, emitter);
       pobj = LinkProperties(model, kvlist);
       ReduceExpressions(pobj, NULL, CurrentCell, TRUE);
       DeleteProperties(&kvlist);
     }
     else if (toupper(nexttok[0]) == 'M') {
-      char drain[100], gate[100], source[100], bulk[100];
-      drain[99] = '\0';
-      gate[99] = '\0';
-      source[99] = '\0';
-      bulk[99] = '\0';
+      char drain[MAX_STR_LEN], gate[MAX_STR_LEN], source[MAX_STR_LEN], bulk[MAX_STR_LEN];
+      drain[MAX_STR_LEN-1] = '\0';
+      gate[MAX_STR_LEN-1] = '\0';
+      source[MAX_STR_LEN-1] = '\0';
+      bulk[MAX_STR_LEN-1] = '\0';
 
       if (!(*CellStackPtr)) {
 	CellDef(fname, filenum);
 	PushStack(fname, CellStackPtr);
       }
-      strncpy(inst, nexttok + 1, 99); SpiceTokNoNewline(); 
+      strncpy(inst, nexttok + 1, MAX_STR_LEN-1); SpiceTokNoNewline(); 
       if (nexttok == NULL) goto baddevice;
-      strncpy(drain, nexttok, 99);  SpiceTokNoNewline();
+      strncpy(drain, nexttok, MAX_STR_LEN-1);  SpiceTokNoNewline();
       if (nexttok == NULL) goto baddevice;
-      strncpy(gate, nexttok, 99);   SpiceTokNoNewline();
+      strncpy(gate, nexttok, MAX_STR_LEN-1);   SpiceTokNoNewline();
       if (nexttok == NULL) goto baddevice;
-      strncpy(source, nexttok, 99); SpiceTokNoNewline();
+      strncpy(source, nexttok, MAX_STR_LEN-1); SpiceTokNoNewline();
       if (nexttok == NULL) goto baddevice;
       /* make sure all the nodes exist */
       if (LookupObject(drain, CurrentCell) == NULL) Node(drain);
@@ -966,11 +1040,11 @@ skip_ends:
       if (LookupObject(source, CurrentCell) == NULL) Node(source);
 
       /* handle the substrate node */
-      strncpy(bulk, nexttok, 99); SpiceTokNoNewline();
+      strncpy(bulk, nexttok, MAX_STR_LEN-1); SpiceTokNoNewline();
       if (LookupObject(bulk, CurrentCell) == NULL) Node(bulk);
 
       /* Read the device model */
-      snprintf(model, 99, "%s", nexttok);
+      snprintf(model, MAX_STR_LEN-1, "%s", nexttok);
 
       while (nexttok != NULL)
       {
@@ -1008,7 +1082,7 @@ skip_ends:
 	 goto baddevice;
       }
 
-      snprintf(instname, 255, "%s%s", model, inst);
+      snprintf(instname, MAX_STR_LEN-1, "%s:%s", model, inst);
       Cell(instname, model, drain, gate, source, bulk);
       pobj = LinkProperties(model, kvlist);
       ReduceExpressions(pobj, NULL, CurrentCell, TRUE);
@@ -1022,19 +1096,19 @@ skip_ends:
 	 SpiceSkipNewLine();
       }
       else {
-        char ctop[100], cbot[100];
-        ctop[99] = '\0';
-        cbot[99] = '\0';
+        char ctop[MAX_STR_LEN], cbot[MAX_STR_LEN];
+        ctop[MAX_STR_LEN-1] = '\0';
+        cbot[MAX_STR_LEN-1] = '\0';
 
         if (!(*CellStackPtr)) {
 	  CellDef(fname, filenum);
 	  PushStack(fname, CellStackPtr);
         }
-        strncpy(inst, nexttok + 1, 99); SpiceTokNoNewline(); 
+        strncpy(inst, nexttok + 1, MAX_STR_LEN-1); SpiceTokNoNewline(); 
         if (nexttok == NULL) goto baddevice;
-        strncpy(ctop, nexttok, 99); SpiceTokNoNewline();
+        strncpy(ctop, nexttok, MAX_STR_LEN-1); SpiceTokNoNewline();
         if (nexttok == NULL) goto baddevice;
-        strncpy(cbot, nexttok, 99); SpiceTokNoNewline();
+        strncpy(cbot, nexttok, MAX_STR_LEN-1); SpiceTokNoNewline();
 
         /* make sure all the nodes exist */
         if (LookupObject(ctop, CurrentCell) == NULL) Node(ctop);
@@ -1053,7 +1127,7 @@ skip_ends:
 
 	model[0] = '\0';
 	if ((nexttok != NULL) && ((eqptr = strchr(nexttok, '=')) == NULL))
-	   snprintf(model, 99, "%s", nexttok);
+	   snprintf(model, MAX_STR_LEN-1, "%s", nexttok);
 
 	/* Any other device properties? */
         while (nexttok != NULL)
@@ -1066,7 +1140,7 @@ skip_ends:
 	   }
 	   else if (!strncmp(nexttok, "$[", 2)) {
 	      // Support for CDL modeled capacitor format
-	      snprintf(model, 99, "%s", nexttok + 2);
+	      snprintf(model, MAX_STR_LEN-1, "%s", nexttok + 2);
 	      if ((eqptr = strchr(model, ']')) != NULL)
 		 *eqptr = '\0';
 	   }
@@ -1099,7 +1173,7 @@ skip_ends:
 	   usemodel = 1;
 	}
 
-	snprintf(instname, 255, "%s%s", model, inst);
+	snprintf(instname, MAX_STR_LEN-1, "%s:%s", model, inst);
 	if (usemodel)
            Cell(instname, model, ctop, cbot);
 	else
@@ -1116,19 +1190,19 @@ skip_ends:
 	 SpiceSkipNewLine();
       }
       else {
-        char rtop[100], rbot[100];
-	rtop[99] = '\0';
-	rbot[99] = '\0';
+        char rtop[MAX_STR_LEN], rbot[MAX_STR_LEN];
+	rtop[MAX_STR_LEN-1] = '\0';
+	rbot[MAX_STR_LEN-1] = '\0';
 
         if (!(*CellStackPtr)) {
 	  CellDef(fname, filenum);
 	  PushStack(fname, CellStackPtr);
         }
-        strncpy(inst, nexttok + 1, 99); SpiceTokNoNewline(); 
+        strncpy(inst, nexttok + 1, MAX_STR_LEN-1); SpiceTokNoNewline(); 
         if (nexttok == NULL) goto baddevice;
-        strncpy(rtop, nexttok, 99);  SpiceTokNoNewline();
+        strncpy(rtop, nexttok, MAX_STR_LEN-1);  SpiceTokNoNewline();
         if (nexttok == NULL) goto baddevice;
-        strncpy(rbot, nexttok, 99);   SpiceTokNoNewline();
+        strncpy(rbot, nexttok, MAX_STR_LEN-1);   SpiceTokNoNewline();
         /* make sure all the nodes exist */
         if (LookupObject(rtop, CurrentCell) == NULL) Node(rtop);
         if (LookupObject(rbot, CurrentCell) == NULL) Node(rbot);
@@ -1147,7 +1221,7 @@ skip_ends:
 
 	model[0] = '\0';
 	if ((nexttok != NULL) && ((eqptr = strchr(nexttok, '=')) == NULL))
-	   snprintf(model, 99, "%s", nexttok);
+	   snprintf(model, MAX_STR_LEN-1, "%s", nexttok);
 
 	/* Any other device properties? */
         while (nexttok != NULL) {
@@ -1159,7 +1233,7 @@ skip_ends:
 	   }
 	   else if (!strncmp(nexttok, "$[", 2)) {
 	      // Support for CDL modeled resistor format
-	      snprintf(model, 99, "%s", nexttok + 2);
+	      snprintf(model, MAX_STR_LEN-1, "%s", nexttok + 2);
 	      if ((eqptr = strchr(model, ']')) != NULL)
 		 *eqptr = '\0';
 	   }
@@ -1184,7 +1258,7 @@ skip_ends:
            else if (CountPorts(model, filenum) != 2) {
 	      /* Modeled device:  Make sure it has the right number of ports */
 	      Fprintf(stderr, "Device \"%s\" has wrong number of ports for a "
-			"resistor.\n");
+			"resistor.\n", model);
 	      goto baddevice;
            }
 	   usemodel = 1;
@@ -1192,7 +1266,7 @@ skip_ends:
 	else
 	   strcpy(model, "r");		/* Use default resistor model */
 
-	snprintf(instname, 255, "%s%s", model, inst);
+	snprintf(instname, MAX_STR_LEN-1, "%s:%s", model, inst);
 	if (usemodel)
 	   Cell(instname, model, rtop, rbot);
 	else
@@ -1203,25 +1277,25 @@ skip_ends:
       }
     }
     else if (toupper(nexttok[0]) == 'D') {	/* diode */
-      char cathode[100], anode[100];
-      cathode[99] = '\0';
-      anode[99] = '\0';
+      char cathode[MAX_STR_LEN], anode[MAX_STR_LEN];
+      cathode[MAX_STR_LEN-1] = '\0';
+      anode[MAX_STR_LEN-1] = '\0';
 
       if (!(*CellStackPtr)) {
 	CellDef(fname, filenum);
 	PushStack(fname, CellStackPtr);
       }
-      strncpy(inst, nexttok + 1, 99); SpiceTokNoNewline(); 
+      strncpy(inst, nexttok + 1, MAX_STR_LEN-1); SpiceTokNoNewline(); 
       if (nexttok == NULL) goto baddevice;
-      strncpy(anode, nexttok, 99);   SpiceTokNoNewline();
+      strncpy(anode, nexttok, MAX_STR_LEN-1);   SpiceTokNoNewline();
       if (nexttok == NULL) goto baddevice;
-      strncpy(cathode, nexttok, 99); SpiceTokNoNewline();
+      strncpy(cathode, nexttok, MAX_STR_LEN-1); SpiceTokNoNewline();
       /* make sure all the nodes exist */
       if (LookupObject(anode, CurrentCell) == NULL) Node(anode);
       if (LookupObject(cathode, CurrentCell) == NULL) Node(cathode);
 
       /* Read the device model */
-      snprintf(model, 99, "%s", nexttok);
+      snprintf(model, MAX_STR_LEN-1, "%s", nexttok);
 
       while (nexttok != NULL)
       {
@@ -1250,7 +1324,7 @@ skip_ends:
 	 Fprintf(stderr, "Device \"%s\" has wrong number of ports for a diode.\n");
 	 goto baddevice;
       }
-      snprintf(instname, 255, "%s%s", model, inst);
+      snprintf(instname, MAX_STR_LEN-1, "%s:%s", model, inst);
       Cell(instname, model, anode, cathode);
       pobj = LinkProperties(model, kvlist);
       ReduceExpressions(pobj, NULL, CurrentCell, TRUE);
@@ -1263,25 +1337,25 @@ skip_ends:
 	 SpiceSkipNewLine();
       }
       else {
-        char node1[100], node2[100], node3[100], node4[100];
-	node1[99] = '\0';
-	node2[99] = '\0';
-	node3[99] = '\0';
-	node4[99] = '\0';
+        char node1[MAX_STR_LEN], node2[MAX_STR_LEN], node3[MAX_STR_LEN], node4[MAX_STR_LEN];
+	node1[MAX_STR_LEN-1] = '\0';
+	node2[MAX_STR_LEN-1] = '\0';
+	node3[MAX_STR_LEN-1] = '\0';
+	node4[MAX_STR_LEN-1] = '\0';
 
         if (!(*CellStackPtr)) {
 	  CellDef(fname, filenum);
 	  PushStack(fname, CellStackPtr);
         }
-        strncpy(inst, nexttok + 1, 99); SpiceTokNoNewline(); 
+        strncpy(inst, nexttok + 1, MAX_STR_LEN-1); SpiceTokNoNewline(); 
         if (nexttok == NULL) goto baddevice;
-        strncpy(node1, nexttok, 99);  SpiceTokNoNewline();
+        strncpy(node1, nexttok, MAX_STR_LEN-1);  SpiceTokNoNewline();
         if (nexttok == NULL) goto baddevice;
-        strncpy(node2, nexttok, 99);   SpiceTokNoNewline();
+        strncpy(node2, nexttok, MAX_STR_LEN-1);   SpiceTokNoNewline();
         if (nexttok == NULL) goto baddevice;
-        strncpy(node3, nexttok, 99);   SpiceTokNoNewline();
+        strncpy(node3, nexttok, MAX_STR_LEN-1);   SpiceTokNoNewline();
         if (nexttok == NULL) goto baddevice;
-        strncpy(node4, nexttok, 99);   SpiceTokNoNewline();
+        strncpy(node4, nexttok, MAX_STR_LEN-1);   SpiceTokNoNewline();
         /* make sure all the nodes exist */
         if (LookupObject(node1, CurrentCell) == NULL) Node(node1);
         if (LookupObject(node2, CurrentCell) == NULL) Node(node2);
@@ -1293,7 +1367,7 @@ skip_ends:
 
 	model[0] = '\0';
 	if ((nexttok != NULL) && ((eqptr = strchr(nexttok, '=')) == NULL))
-	   snprintf(model, 99, "%s", nexttok);
+	   snprintf(model, MAX_STR_LEN-1, "%s", nexttok);
 
 	/* Any other device properties? */
         while (nexttok != NULL) {
@@ -1329,7 +1403,7 @@ skip_ends:
 	else
 	   strcpy(model, "t");		/* Use default xline model */
 
-	snprintf(instname, 255, "%s%s", model, inst);
+	snprintf(instname, MAX_STR_LEN-1, "%s:%s", model, inst);
 
 	if (usemodel)
 	   Cell(instname, model, node1, node2, node3, node4);
@@ -1342,20 +1416,20 @@ skip_ends:
       }
     }
     else if (toupper(nexttok[0]) == 'L') {	/* inductor */
-      char end_a[100], end_b[100];
+      char end_a[MAX_STR_LEN], end_b[MAX_STR_LEN];
       int usemodel = 0;
-      end_a[99] = '\0';
-      end_b[99] = '\0';
+      end_a[MAX_STR_LEN-1] = '\0';
+      end_b[MAX_STR_LEN-1] = '\0';
 
       if (!(*CellStackPtr)) {
 	CellDef(fname, filenum);
 	PushStack(fname, CellStackPtr);
       }
-      strncpy(inst, nexttok + 1, 99); SpiceTokNoNewline(); 
+      strncpy(inst, nexttok + 1, MAX_STR_LEN-1); SpiceTokNoNewline(); 
       if (nexttok == NULL) goto baddevice;
-      strncpy(end_a, nexttok, 99);   SpiceTokNoNewline();
+      strncpy(end_a, nexttok, MAX_STR_LEN-1);   SpiceTokNoNewline();
       if (nexttok == NULL) goto baddevice;
-      strncpy(end_b, nexttok, 99); SpiceTokNoNewline();
+      strncpy(end_b, nexttok, MAX_STR_LEN-1); SpiceTokNoNewline();
       /* make sure all the nodes exist */
       if (LookupObject(end_a, CurrentCell) == NULL) Node(end_a);
       if (LookupObject(end_b, CurrentCell) == NULL) Node(end_b);
@@ -1374,7 +1448,7 @@ skip_ends:
 
       model[0] = '\0';
       if ((nexttok != NULL) && ((eqptr = strchr(nexttok, '=')) == NULL))
-	  snprintf(model, 99, "%s", nexttok);
+	  snprintf(model, MAX_STR_LEN-1, "%s", nexttok);
 
       /* Any other device properties? */
       while (nexttok != NULL)
@@ -1412,7 +1486,7 @@ skip_ends:
       else
 	 strcpy(model, "l");		/* Use default inductor model */
 
-      snprintf(instname, 255, "%s%s", model, inst);
+      snprintf(instname, MAX_STR_LEN-1, "%s:%s", model, inst);
       if (usemodel)
 	 Cell(instname, model, end_a, end_b);
       else
@@ -1426,25 +1500,38 @@ skip_ends:
     /* black-box subcircuits (class MODULE):  V, I, E	*/
 
     else if (toupper(nexttok[0]) == 'V') {	/* voltage source */
-      char pos[100], neg[100];
-      pos[99] = '\0';
-      neg[99] = '\0';
+      char pos[MAX_STR_LEN], neg[MAX_STR_LEN];
+      pos[MAX_STR_LEN-1] = '\0';
+      neg[MAX_STR_LEN-1] = '\0';
 
       if (!(*CellStackPtr)) {
 	CellDef(fname, filenum);
 	PushStack(fname, CellStackPtr);
       }
-      strncpy(inst, nexttok + 1, 99); SpiceTokNoNewline(); 
+      strncpy(inst, nexttok + 1, MAX_STR_LEN-1); SpiceTokNoNewline(); 
       if (nexttok == NULL) goto baddevice;
-      strncpy(pos, nexttok, 99);   SpiceTokNoNewline();
+      strncpy(pos, nexttok, MAX_STR_LEN-1);   SpiceTokNoNewline();
       if (nexttok == NULL) goto baddevice;
-      strncpy(neg, nexttok, 99); SpiceTokNoNewline();
+      strncpy(neg, nexttok, MAX_STR_LEN-1); SpiceTokNoNewline();
       if (nexttok == NULL) goto baddevice;
       /* make sure all the nodes exist */
       if (LookupObject(pos, CurrentCell) == NULL) Node(pos);
       if (LookupObject(neg, CurrentCell) == NULL) Node(neg);
 
-      /* Any device properties? */
+      /* Get voltage value (if present); save as property "value" */
+
+      if (nexttok != NULL) {
+	 if (matchnocase(nexttok, "DC")) {
+	     SpiceTokNoNewline();
+	 }
+      }
+      if (nexttok != NULL) {
+	 if (StringIsValueOrExpression(nexttok)) {
+	     AddProperty(&kvlist, "value", nexttok);
+	 }
+      }
+
+      /* Any other device properties? */
       while (nexttok != NULL)
       {
 	 SpiceTokNoNewline();
@@ -1472,7 +1559,7 @@ skip_ends:
       else if (CountPorts(model, filenum) != 2) {
 	 /* Modeled device:  Make sure it has the right number of ports */
 	 Fprintf(stderr, "Device \"%s\" has wrong number of ports for a "
-			"voltage source.\n");
+			"voltage source.\n", inst);
 	 goto baddevice;
       }
       Cell(instname, model, pos, neg);
@@ -1481,19 +1568,19 @@ skip_ends:
       DeleteProperties(&kvlist);
     }
     else if (toupper(nexttok[0]) == 'I') {	/* current source */
-      char pos[100], neg[100];
-      pos[99] = '\0';
-      neg[99] = '\0';
+      char pos[MAX_STR_LEN], neg[MAX_STR_LEN];
+      pos[MAX_STR_LEN-1] = '\0';
+      neg[MAX_STR_LEN-1] = '\0';
 
       if (!(*CellStackPtr)) {
 	CellDef(fname, filenum);
 	PushStack(fname, CellStackPtr);
       }
-      strncpy(inst, nexttok + 1, 99); SpiceTokNoNewline(); 
+      strncpy(inst, nexttok + 1, MAX_STR_LEN-1); SpiceTokNoNewline(); 
       if (nexttok == NULL) goto baddevice;
-      strncpy(pos, nexttok, 99);   SpiceTokNoNewline();
+      strncpy(pos, nexttok, MAX_STR_LEN-1);   SpiceTokNoNewline();
       if (nexttok == NULL) goto baddevice;
-      strncpy(neg, nexttok, 99); SpiceTokNoNewline();
+      strncpy(neg, nexttok, MAX_STR_LEN-1); SpiceTokNoNewline();
       /* make sure all the nodes exist */
       if (LookupObject(pos, CurrentCell) == NULL) Node(pos);
       if (LookupObject(neg, CurrentCell) == NULL) Node(neg);
@@ -1535,25 +1622,25 @@ skip_ends:
       DeleteProperties(&kvlist);
     }
     else if (toupper(nexttok[0]) == 'E') {	/* controlled voltage source */
-      char pos[100], neg[100], ctrlp[100], ctrln[100];
-      pos[99] = '\0';
-      neg[99] = '\0';
-      ctrlp[99] = '\0';
-      ctrln[99] = '\0';
+      char pos[MAX_STR_LEN], neg[MAX_STR_LEN], ctrlp[MAX_STR_LEN], ctrln[MAX_STR_LEN];
+      pos[MAX_STR_LEN-1] = '\0';
+      neg[MAX_STR_LEN-1] = '\0';
+      ctrlp[MAX_STR_LEN-1] = '\0';
+      ctrln[MAX_STR_LEN-1] = '\0';
 
       if (!(*CellStackPtr)) {
 	CellDef(fname, filenum);
 	PushStack(fname, CellStackPtr);
       }
-      strncpy(inst, nexttok + 1, 99); SpiceTokNoNewline(); 
+      strncpy(inst, nexttok + 1, MAX_STR_LEN-1); SpiceTokNoNewline(); 
       if (nexttok == NULL) goto baddevice;
-      strncpy(pos, nexttok, 99);   SpiceTokNoNewline();
+      strncpy(pos, nexttok, MAX_STR_LEN-1);   SpiceTokNoNewline();
       if (nexttok == NULL) goto baddevice;
-      strncpy(neg, nexttok, 99); SpiceTokNoNewline();
+      strncpy(neg, nexttok, MAX_STR_LEN-1); SpiceTokNoNewline();
       if (nexttok == NULL) goto baddevice;
-      strncpy(ctrlp, nexttok, 99); SpiceTokNoNewline();
+      strncpy(ctrlp, nexttok, MAX_STR_LEN-1); SpiceTokNoNewline();
       if (nexttok == NULL) goto baddevice;
-      strncpy(ctrln, nexttok, 99); SpiceTokNoNewline();
+      strncpy(ctrln, nexttok, MAX_STR_LEN-1); SpiceTokNoNewline();
 
       /* make sure all the nodes exist */
       if (LookupObject(pos, CurrentCell) == NULL) Node(pos);
@@ -1601,11 +1688,11 @@ skip_ends:
     }
 
     else if (toupper(nexttok[0]) == 'X') {	/* subcircuit instances */
-      char instancename[100], subcktname[100];
+      char instancename[MAX_STR_LEN], subcktname[MAX_STR_LEN];
       int itype, in_props;
 
-      instancename[99] = '\0';
-      subcktname[99] = '\0';
+      instancename[MAX_STR_LEN-1] = '\0';
+      subcktname[MAX_STR_LEN-1] = '\0';
 
       struct portelement {
 	char *name;
@@ -1615,8 +1702,8 @@ skip_ends:
       struct portelement *head, *tail, *scan, *scannext;
       struct objlist *obptr;
 
-      snprintf(instancename, 99, "%s", nexttok + 1);
-      strncpy(instancename, nexttok + 1, 99);
+      snprintf(instancename, MAX_STR_LEN-1, "%s", nexttok + 1);
+      strncpy(instancename, nexttok + 1, MAX_STR_LEN-1);
       if (!(*CellStackPtr)) {
 	CellDef(fname, filenum);
 	PushStack(fname, CellStackPtr);
@@ -1724,14 +1811,14 @@ skip_ends:
       /* names.								  */
 
       if (strncmp(instancename, scan->name, strlen(scan->name))) {
-         snprintf(subcktname, 99, "%s%s", scan->name, instancename);
+         snprintf(subcktname, MAX_STR_LEN-1, "%s:%s", scan->name, instancename);
          strcpy(instancename, subcktname);
       }
       else {
-         snprintf(subcktname, 99, "/%s", instancename);
+         snprintf(subcktname, MAX_STR_LEN-1, "/%s", instancename);
          strcpy(instancename, subcktname);
       }
-      snprintf(subcktname, 99, "%s", scan->name);
+      snprintf(subcktname, MAX_STR_LEN-1, "%s", scan->name);
 
       if (scan == head) {
 	 head = NULL;
@@ -1765,6 +1852,18 @@ skip_ends:
 	 ReopenCellDef((*CellStackPtr)->cellname, filenum);		/* Reopen */
 	 update = 1;
       }
+      else if (tp->flags & CELL_VERILOG) {
+	 if (tp->flags & CELL_PLACEHOLDER) {
+	    /* Flag this as an error.  To do:  Rearrange the verilog instance pins to	*/
+	    /* match the SPICE subcircuit pin order.					*/
+	    Fprintf(stderr, "Error:  SPICE subcircuit %s should be read before verilog "
+			"module using it, or pins may not match!\n", subcktname);
+	 }
+	 else {
+	    Fprintf(stderr, "Error:  SPICE subcircuit %s redefines a verilog module!\n",
+			subcktname);
+	 }
+      }
 
       /* nexttok is now NULL, scan->name points to class */
 
@@ -1900,10 +1999,19 @@ char *ReadSpiceTop(char *fname, int *fnum, int blackbox)
     }
   }
 
-  /* Make sure all SPICE file reading is case insensitive */
-  matchfunc = matchnocase;
-  matchintfunc = matchfilenocase;
-  hashfunc = hashnocase;
+  /* Make sure all SPICE file reading is case insensitive   */
+  /* BUT if a verilog file was read before it, then it will */
+  /* be forced to be case sensitive, caveat end-user.	    */
+
+  if (matchfunc == match) {
+      Printf("Warning:  A case-sensitive file has been read and so the "
+                "SPICE netlist must be treated case-sensitive to match.\n");
+  }
+  else {
+      matchfunc = matchnocase;
+      matchintfunc = matchfilenocase;
+      hashfunc = hashnocase;
+  }
 
   InitializeHashTable(&spiceparams, OBJHASHSIZE);
 
@@ -1958,7 +2066,7 @@ void IncludeSpice(char *fname, int parent, struct cellstack **CellStackPtr,
 		int blackbox)
 {
   int filenum = -1;
-  char name[256];
+  char name[MAX_STR_LEN];
 
   /* If fname does not begin with "/", then assume that it is	*/
   /* in the same relative path as its parent.			*/

base/tech.h

@@ -0,0 +1,8 @@
+#ifndef _TECH_H
+#define _TECH_H
+
+extern int ActelLibPresent(void);
+extern void ActelLib(void);
+extern void VerilogTop(char *name, int fnum, char *filename);
+
+#endif /* _TECH_H */

base/test.c

@@ -34,6 +34,8 @@ the Free Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
 #include "print.h"
 #endif
 
+extern void Finsert(FILE *f);
+
 void test_entry(void) 
 { 
 

base/xilinx.c

@@ -23,6 +23,7 @@ the Free Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
 #include <stdio.h>
 #include <stdarg.h>
 #include <ctype.h>
+#include <time.h>
 
 #ifdef IBMPC
 #include <stdlib.h>  /* for strtol on PC */
@@ -33,6 +34,8 @@ the Free Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
 #include "netfile.h"
 #include "hash.h"
 #include "print.h"
+#include "xilinx.h"
+#include "flatten.h"
 
 #define XILINXHASHSIZE 99
 static long xilinxhashbase = 0xA00;
@@ -132,10 +135,8 @@ char *xilinx_class(model)
 	}
 	return(model);
 }
-void
-Xilinx(cellname, filename)
-	char *cellname;
-	char *filename;
+
+void Xilinx(char *cellname, char *filename)
 {
 	char Path[500];
 	char FileName[500];
@@ -163,8 +164,7 @@ Xilinx(cellname, filename)
 	CloseFile(FileName);
 }
 
-xilinxCell(cell)
-	char *cell;
+int xilinxCell(char *cell)
 {
 	struct nlist *nl;
 	struct objlist *ob;
@@ -252,9 +252,7 @@ struct objlist *xilinx_gate(ob,nl)
 	return(nob);
 }
 
-xilinx_sym(nl,gob)
-	struct nlist *nl;
-	struct objlist *gob;
+void xilinx_sym(struct nlist *nl, struct objlist *gob)
 {
 	struct objlist *ob;
 	char *cp,*rindex();

base/xilinx.h

@@ -0,0 +1,10 @@
+#ifndef _XILINX_H
+#define _XILINX_H
+
+extern void xilinx_sym(struct nlist *nl, struct objlist *gob);
+extern void Xilinx(char *cellname, char *filename);
+extern int xilinxCell(char *cell);
+extern int XilinxLibPresent(void);
+extern void XilinxLib(void);
+
+#endif /* _XILINX_H */

base/xnetgen.c

@@ -65,10 +65,10 @@ the Free Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
 
 Widget toplevel = NULL;
 
-char GlobalFileName[100], 
-  GlobalCellName[100], 
-  GlobalOtherName[100],
-  GlobalDataName[100];
+char GlobalFileName[MAX_STR_LEN], 
+  GlobalCellName[MAX_STR_LEN], 
+  GlobalOtherName[MAX_STR_LEN],
+  GlobalDataName[MAX_STR_LEN];
 
 /*********************************************************
  * Menu structure:  attaches label string to a function,
@@ -1708,7 +1708,7 @@ void X_main_loop(int argc, char *argv[])
 
 XmStringCharSet cs = "ISOLatin1";
 
-static char prompt_response[100];
+static char prompt_response[MAX_STR_LEN];
 int prompt_done;
 int calling_editor;  /* which string are we trying to get ? */
 #define FILE_NAME 1

configure

@@ -4,4 +4,6 @@
 # all of its config scripts in a different directory than the configure
 # script itself.
 
-( CFLAGS="-g" ; export CFLAGS ; cd scripts ; ./configure "$@" )
+export CFLAGS="$CFLAGS -g"
+cd scripts
+exec ./configure "$@"

netgen/inetcomp.c

@@ -17,6 +17,7 @@ along with this program; see the file copying.  If not, write to
 the Free Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
 
 /* inetcomp.c -- a simple wrapper to the NETCOMP() function */
+#include "config.h"
 
 #include <stdio.h>
 #include "netgen.h"
@@ -33,7 +34,7 @@ void STRCPY(char *dest, char *source)
 
 int main(int argc, char *argv[])
 {
-  char cell1[200], cell2[200];
+  char cell1[MAX_STR_LEN], cell2[MAX_STR_LEN];
 
   Debug = 0;
   if (argc != 1) {

netgen/netcomp.c

@@ -17,6 +17,7 @@ along with this program; see the file copying.  If not, write to
 the Free Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
 
 /* netcomp.c -- a simple wrapper to provide netlist comparison functionality */
+#include "config.h"
 
 #include <stdio.h>
 #include "netgen.h"
@@ -51,7 +52,7 @@ void STRCPY(char *dest, char *source)
 int main(int argc, char *argv[])
 {
 #ifndef HAVE_GETOPT
-  char cell1[200], cell2[200];
+  char cell1[MAX_STR_LEN], cell2[MAX_STR_LEN];
   int filenum = -1;
 
   Debug = 0;
@@ -67,7 +68,7 @@ int main(int argc, char *argv[])
   STRCPY(cell2, ReadNetlist(argv[2], &filenum));
   if (argc == 5) STRCPY(cell2, argv[4]);  /* if explicit cell name specified */
 #else
-  char cell1[200], cell2[200];
+  char cell1[MAX_STR_LEN], cell2[MAX_STR_LEN];
   int usage = 0;
   int args;
   int c;

netgen/netgen_main.c

@@ -23,6 +23,7 @@ the Free Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
 #include <stdlib.h>  /* for getenv */
 #endif
 #include "netgen.h"
+#include "print.h"
 
 int main(int argc, char **argv)
 {

netgen/ntk2xnf.c

@@ -20,9 +20,11 @@ along with this program; see the file copying.  If not, write to
 the Free Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
 
 /* ntk2xnf.c  -- a simple wrapper to translate .ntk to Xilinx XNF format */
+#include "config.h"
 
 #include <stdio.h>
 #include "netgen.h"
+#include "xilinx.h"
 
 #ifdef HAVE_X11
 /* the following two X procedures are to permit linking
@@ -47,7 +49,7 @@ void STRCPY(char *dest, char *source)
 
 int main(int argc, char *argv[])
 {
-  char cellname[200];
+  char cellname[MAX_STR_LEN];
   int filenum = -1;
 
   Debug = 0;

python/Makefile

@@ -8,6 +8,8 @@ SCRIPTINSTALL = $(DESTDIR)${INSTALL_PYDIR}
 
 include ${NETGENDIR}/defs.mak
 
+CLEANS += lvs_manager.py
+
 main: lvs_manager.py
 
 tcl-main: lvs_manager.py
@@ -27,6 +29,7 @@ lvs_manager.py: lvs_manager.py.in
 $(DESTDIR)${INSTALL_PYDIR}/lvs_manager.py: lvs_manager.py
 	${RM} $@
 	${CP} lvs_manager.py $@
+	chmod a+x $@
 
 $(DESTDIR)${INSTALL_PYDIR}/treeviewsplit.py: treeviewsplit.py
 	${RM} $@

python/lvs_manager.py

@@ -1,819 +0,0 @@
-#!/bin/env python3
-#
-#--------------------------------------------------------
-# LVS Manager GUI.
-#
-# This is a Python tkinter script that handles the
-# process of running LVS and interpreting results.
-#
-#--------------------------------------------------------
-# Written by Tim Edwards
-# efabless, inc.
-# Version 1.  November 30, 2016
-# Version 2.  March 6, 2017.  Reads JSON format output
-# Version 3.  April 25, 2018. Handles layout vs. verilog
-#--------------------------------------------------------
-
-import io
-import os
-import re
-import sys
-import json
-import shutil
-import signal
-import socket
-import select
-import datetime
-import contextlib
-import subprocess
-
-import tkinter
-from tkinter import ttk
-from tkinter import filedialog
-
-import tksimpledialog
-import tooltip
-from consoletext import ConsoleText
-from helpwindow import HelpWindow
-from treeviewsplit import TreeViewSplit
-
-# User preferences file (if it exists)
-prefsfile = '~/.profile/prefs.json'
-
-netgen_script_dir = '/usr/local/lib/netgen/python'
-
-#------------------------------------------------------
-# Simple dialog for confirming quit
-#------------------------------------------------------
-
-class ConfirmDialog(tksimpledialog.Dialog):
-    def body(self, master, warning, seed):
-        if warning:
-            ttk.Label(master, text=warning, wraplength=500).grid(row = 0, columnspan = 2, sticky = 'wns')
-        return self
-
-    def apply(self):
-        return 'okay'
-
-#------------------------------------------------------
-# Main class for this application
-#------------------------------------------------------
-
-class LVSManager(ttk.Frame):
-    """LVS Manager GUI."""
-
-    def __init__(self, parent, *args, **kwargs):
-        ttk.Frame.__init__(self, parent, *args, **kwargs)
-        self.root = parent
-        self.init_gui()
-        parent.protocol("WM_DELETE_WINDOW", self.on_quit)
-
-    def on_quit(self):
-        """Exits program."""
-        if self.msock:
-            self.msock.close()
-        quit()
-
-    def init_gui(self):
-        """Builds GUI."""
-        global prefsfile
-
-        message = []
-        fontsize = 11
-
-        # Read user preferences file, get default font size from it.
-        prefspath = os.path.expanduser(prefsfile)
-        if os.path.exists(prefspath):
-            with open(prefspath, 'r') as f:
-                self.prefs = json.load(f)
-            if 'fontsize' in self.prefs:
-                fontsize = self.prefs['fontsize']
-        else:
-            self.prefs = {}
-
-        s = ttk.Style()
-
-        available_themes = s.theme_names()
-        s.theme_use(available_themes[0])
-
-        s.configure('bg.TFrame', background='gray40')
-        s.configure('italic.TLabel', font=('Helvetica', fontsize, 'italic'))
-        s.configure('title.TLabel', font=('Helvetica', fontsize, 'bold italic'),
-                        foreground = 'brown', anchor = 'center')
-        s.configure('normal.TLabel', font=('Helvetica', fontsize))
-        s.configure('red.TLabel', font=('Helvetica', fontsize), foreground = 'red')
-        s.configure('green.TLabel', font=('Helvetica', fontsize), foreground = 'green3')
-        s.configure('blue.TLabel', font=('Helvetica', fontsize), foreground = 'blue')
-        s.configure('normal.TButton', font=('Helvetica', fontsize),
-                        border = 3, relief = 'raised')
-        s.configure('red.TButton', font=('Helvetica', fontsize), foreground = 'red',
-                        border = 3, relief = 'raised')
-        s.configure('green.TButton', font=('Helvetica', fontsize), foreground = 'green3',
-                        border = 3, relief = 'raised')
-        s.configure('blue.TButton', font=('Helvetica', fontsize), foreground = 'blue',
-                        border = 3, relief = 'raised')
-        s.configure('redtitle.TButton', font=('Helvetica', fontsize, 'bold italic'),
-                        foreground = 'red', border = 3, relief = 'raised')
-        s.configure('bluetitle.TButton', font=('Helvetica', fontsize, 'bold italic'),
-                        foreground = 'blue', border = 3, relief = 'raised')
-
-        # These values to be overridden from arguments
-        self.rootpath = None
-        self.project = None
-        self.logfile = None
-        self.msock = None
-        self.help = None
-
-        # Create the help window
-        if os.path.exists(netgen_script_dir + '/netgen_help.txt'):
-            self.help = HelpWindow(self, fontsize = fontsize)
-            with io.StringIO() as buf, contextlib.redirect_stdout(buf):
-                self.help.add_pages_from_file('lvs_help.txt')
-                message = buf.getvalue()
-
-            # Set the help display to the first page
-            self.help.page(0)
-
-        # Variables used by option menus and other stuff
-        self.project = "(no selection)"
-        self.layout = "(default)"
-        self.schematic = "(default)"
-        self.tech = "(none)"
-        self.lvs_setup = ''
-        self.lvsdata = {}
-
-        # Root window title
-        self.root.title('LVS Manager')
-        self.root.option_add('*tearOff', 'FALSE')
-        self.pack(side = 'top', fill = 'both', expand = 'true')
-
-        pane = tkinter.PanedWindow(self, orient = 'vertical', sashrelief='groove', sashwidth=6)
-        pane.pack(side = 'top', fill = 'both', expand = 'true')
-        self.toppane = ttk.Frame(pane)
-        self.botpane = ttk.Frame(pane)
-
-        # Get username
-        if 'username' in self.prefs:
-            username = self.prefs['username']
-        else:
-            username = os.environ['USER']
-
-        # Label with the user
-        self.toppane.title_frame = ttk.Frame(self.toppane)
-        self.toppane.title_frame.pack(side = 'top', fill = 'x')
-
-        self.toppane.title_frame.title = ttk.Label(self.toppane.title_frame, text='User:', style = 'red.TLabel')
-        self.toppane.title_frame.user = ttk.Label(self.toppane.title_frame, text=username, style = 'blue.TLabel')
-
-        self.toppane.title_frame.title.grid(column=0, row=0, ipadx = 5)
-        self.toppane.title_frame.user.grid(column=1, row=0, ipadx = 5)
-
-        self.toppane.title2_frame = ttk.Frame(self.toppane)
-        self.toppane.title2_frame.pack(side = 'top', fill = 'x')
-        self.toppane.title2_frame.project_label = ttk.Label(self.toppane.title2_frame, text="Project:",
-                style = 'title.TLabel')
-        self.toppane.title2_frame.project_label.grid(column=0, row=0, ipadx = 5)
-
-        # New project select button
-        self.toppane.title2_frame.project_select = ttk.Button(self.toppane.title2_frame,
-                text=self.project, style='normal.TButton', command=self.choose_project)
-        self.toppane.title2_frame.project_select.grid(column=1, row=0, ipadx = 5)
-
-        tooltip.ToolTip(self.toppane.title2_frame.project_select,
-                        text = "Select new project")
-
-        # Show path to project
-        self.toppane.title2_frame.path_label = ttk.Label(self.toppane.title2_frame, text=self.project,
-                style = 'normal.TLabel')
-        self.toppane.title2_frame.path_label.grid(column=2, row=0, ipadx = 5, padx = 10)
-
-        # Show top-level layout cellname with select button.  Initial cell name is the top-level cell.
-        self.toppane.title2_frame.tech_label = ttk.Label(self.toppane.title2_frame, text="Technology setup:",
-                style = 'title.TLabel')
-
-        self.toppane.title2_frame.tech_label.grid(column=3, row=0, ipadx = 5)
-        self.toppane.title2_frame.tech_select = ttk.Button(self.toppane.title2_frame,
-                text=self.tech, style='normal.TButton', command=self.choose_tech)
-        self.toppane.title2_frame.tech_select.grid(column=4, row=0, ipadx = 3, padx = 3)
-
-        self.toppane.title2_frame.layout_label = ttk.Label(self.toppane.title2_frame, text="Layout:",
-                style = 'title.TLabel')
-        self.toppane.title2_frame.layout_label.grid(column=0, row=1, ipadx = 5)
-        self.toppane.title2_frame.layout_select = ttk.Button(self.toppane.title2_frame,
-                text=self.layout, style='normal.TButton', command=self.choose_layout)
-        self.toppane.title2_frame.layout_select.grid(column=1, row=1, ipadx = 3, padx = 3)
-
-        # Show top-level schematic cellname with select button.  Initial cell name is the top-level cell.
-        self.toppane.title2_frame.schem_label = ttk.Label(self.toppane.title2_frame, text="Schematic:",
-                style = 'title.TLabel')
-        self.toppane.title2_frame.schem_label.grid(column=3, row=1, ipadx = 5)
-        self.toppane.title2_frame.schem_select = ttk.Button(self.toppane.title2_frame,
-                text=self.schematic, style='normal.TButton', command=self.choose_netlist)
-        self.toppane.title2_frame.schem_select.grid(column=4, row=1, ipadx = 3, padx = 3)
-
-        tooltip.ToolTip(self.toppane.title2_frame.project_select,
-                        text = "Select new project")
-        tooltip.ToolTip(self.toppane.title2_frame.layout_select,
-                        text = "Select a layout subcirucit to compare")
-        tooltip.ToolTip(self.toppane.title2_frame.schem_select,
-                        text = "Select a schematic subcirucit to compare")
-
-        #---------------------------------------------
-        ttk.Separator(self.toppane, orient='horizontal').pack(side = 'top', fill = 'x')
-        #---------------------------------------------
-
-        # Create listbox of Circuit1 vs. Circuit2 results
-        height = 10
-        self.toppane.lvsreport = TreeViewSplit(self.toppane, fontsize = fontsize)
-        self.toppane.lvsreport.populate("Layout:", [], "Schematic:", [],
-			[["Run", True, self.run_lvs],
-			# ["Find", True, self.findrecord]
-			], height = height)
-        self.toppane.lvsreport.set_title("Line")
-        self.toppane.lvsreport.pack(side = 'top', fill = 'both', expand = 'true')
-
-        tooltip.ToolTip(self.toppane.lvsreport.get_button(0), text="Run LVS")
-
-        #---------------------------------------------
-        # ttk.Separator(self, orient='horizontal').grid(column=0, row=3, sticky='ew')
-        #---------------------------------------------
-
-        # Add a text window below the project name to capture output.  Redirect
-        # print statements to it.
-
-        self.botpane.console = ttk.Frame(self.botpane)
-        self.botpane.console.pack(side = 'top', fill = 'both', expand = 'true')
-
-        self.text_box = ConsoleText(self.botpane.console, wrap='word', height = 4)
-        self.text_box.pack(side='left', fill='both', expand='true')
-        console_scrollbar = ttk.Scrollbar(self.botpane.console)
-        console_scrollbar.pack(side='right', fill='y')
-        # attach console to scrollbar
-        self.text_box.config(yscrollcommand = console_scrollbar.set)
-        console_scrollbar.config(command = self.text_box.yview)
-
-        # Add button bar at the bottom of the window
-        self.botpane.bbar = ttk.Frame(self.botpane)
-        self.botpane.bbar.pack(side = 'top', fill = 'x')
-
-        # Define the "quit" button and action
-        self.botpane.bbar.quit_button = ttk.Button(self.botpane.bbar, text='Quit', command=self.on_quit,
-                style = 'normal.TButton')
-        self.botpane.bbar.quit_button.grid(column=0, row=0, padx = 5)
-
-        # Define help button
-        if self.help:
-            self.botpane.bbar.help_button = ttk.Button(self.botpane.bbar, text='Help',
-		command=self.help.open, style = 'normal.TButton')
-            self.botpane.bbar.help_button.grid(column = 2, row = 0, padx = 5)
-            tooltip.ToolTip(self.botpane.bbar.help_button, text = "Show help window")
-
-        # Add the panes once the internal geometry is known.
-        pane.add(self.toppane)
-        pane.add(self.botpane)
-        pane.paneconfig(self.toppane, stretch='first')
-
-        # Redirect stdout and stderr to the console as the last thing to do. . .
-        # Otherwise errors in the GUI get sucked into the void.
-
-        self.stdout = sys.stdout
-        self.stderr = sys.stderr
-        sys.stdout = ConsoleText.StdoutRedirector(self.text_box)
-        sys.stderr = ConsoleText.StderrRedirector(self.text_box)
-
-        if message:
-            print(message)
-
-    def logprint(self, message, doflush=False):
-        if self.logfile:
-            self.logfile.buffer.write(message.encode('utf-8'))
-            self.logfile.buffer.write('\n'.encode('utf-8'))
-            if doflush:
-                self.logfile.flush()
-
-    def printout(self, output):
-        # Generate output
-        if not output:
-            return
-
-        outlines = output.splitlines()
-        for line in outlines:
-            try:
-                print(line)
-            except TypeError:
-                line = line.decode('utf-8')
-                pritn(line)
-
-    def printwarn(self, output):
-        # Check output for warning or error
-        if not output:
-            return 0
-
-        warnrex = re.compile('.*warning', re.IGNORECASE)
-        errrex = re.compile('.*error', re.IGNORECASE)
-
-        errors = 0
-        outlines = output.splitlines()
-        for line in outlines:
-            try:
-                wmatch = warnrex.match(line)
-            except TypeError:
-                line = line.decode('utf-8')
-                wmatch = warnrex.match(line)
-            ematch = errrex.match(line)
-            if ematch:
-                errors += 1
-            if ematch or wmatch:
-                print(line)
-        return errors
-
-    def choose_tech(self):
-        try:
-            project_path = self.rootpath
-            initdirname = self.rootpath + '/tech',
-        except:
-            print('Must choose a project first.')
-            return
-        techname = filedialog.askopenfilename(multiple=False,
-			initialdir = initdirname,
-			filetypes = (("Tcl script", "*.tcl"),("All Files","*.*")),
-			title = "Choose a netgen technology setup script.")
-        if techname != '':
-            print("Selected technology setup script " + techname)
-            techbase = os.path.split(techname)[1]
-            self.tech = os.path.splitext(techbase)[0]
-            self.lvs_setup = techname
-            self.toppane.title2_frame.layout_select.config(text = self.tech)
-
-    def choose_layout(self):
-        try:
-            project_path = self.rootpath
-            initdirname = self.rootpath + '/layout',
-        except:
-            print('Must choose a project first.')
-            return
-        cellname = filedialog.askopenfilename(multiple=False,
-			initialdir = initdirname,
-			filetypes = (("Magic layout", "*.mag"),("All Files","*.*")),
-			title = "Choose a layout cell to compare.")
-        if cellname != '':
-            print("Selected compare cell " + cellname)
-            cellbase = os.path.split(cellname)[1]
-            self.layout = os.path.splitext(cellbase)[0]
-            self.toppane.title2_frame.layout_select.config(text = self.layout)
-
-    def choose_netlist(self):
-        try:
-            project_path = self.rootpath
-            initdirname = self.rootpath + '/netlist/' + self.project + '.spi'
-        except:
-            print('Must choose a project first.')
-            return
-        cellname = filedialog.askopenfilename(multiple=False,
-			initialdir = initdirname,
-			filetypes = (("Spice netlist", "*.spi"),("Verilog netlist", "*.v")),
-			title = "Choose a netlist to compare.")
-        if cellname != '':
-            print("Selected compare cell " + cellname)
-            cellbase = os.path.split(cellname)[1]
-            self.schematic = os.path.splitext(cellbase)[0]
-            self.toppane.title2_frame.schem_select.config(text = self.schematic)
-            fileext = os.path.splitext(cellbase)[1]
-            if fileext == '.v':
-                self.toppane.title2_frame.schem_label.config(text = 'Verilog netlist:')
-            elif fileext == '.sp' or fileext == '.spi' or fileext == '.spice' or fileext == '.spc' or fileext == '.ckt':
-                self.toppane.title2_frame.schem_label.config(text = 'SPICE netlist:')
-            elif fileext == '.cdl':
-                self.toppane.title2_frame.schem_label.config(text = 'CDL netlist:')
-            else:
-                self.toppane.title2_frame.schem_label.config(text = 'Unknown netlist:')
-
-    def choose_project(self):
-        project = filedialog.askdirectory(initialdir = os.getcwd(),
-			title = "Find a project.")
-        if project != '':
-            print("Selected project " + str(project))
-            result = self.set_project(project)
-
-    def set_project(self, rootpath, project_name=None):
-
-        # Check if rootpath is valid.  For LVS, there should be subdirectories
-        # "layout/" and "netlist/" or "verilog/".
-
-        haslay = os.path.isdir(rootpath + '/layout')
-        hasvlog = os.path.isdir(rootpath + '/verilog')
-        hasnet = os.path.isdir(rootpath + '/netlist')
-        if not haslay or not (hasvlog or hasnet):
-            if not haslay:
-                print("Project path has no layout (/layout) subdirectory.")
-            if not (hasvlog or hasnet):
-                print("Project path has no verilog (/verilog), or netlist (/netlist) subdirectory.")
-            # Continue anyway;  assume that netlists will be selected manually
-
-        if self.logfile:
-            self.logfile.close()
-            self.logfile = None
-
-        if not project_name:
-            project = os.path.split(rootpath)[1]
-        else:
-            project = project_name
-
-        if self.project != project:
-
-            self.rootpath = rootpath
-            self.project = project
-
-            # Clear out old project data
-            self.toppane.lvsreport.repopulate([], [])
-
-            # Close any open logfile.
-            if self.logfile:
-                self.logfile.close()
-                self.logfile = None
-
-            # Put new log file called 'lvs.log' in the mag/ subdirectory
-            self.logfile = open(rootpath + '/layout/lvs.log', 'w')
-            # Print some initial information to the logfile.
-            self.logprint('Starting new log file ' + datetime.datetime.now().strftime('%c'),
-				doflush=True)
-
-            # Update project button
-            self.toppane.title2_frame.project_select.config(text = self.project)
-            self.toppane.title2_frame.path_label.config(text = self.rootpath)
-            # Cell name is the same as project name initially
-            self.layout = self.project
-            self.schematic = self.project
-            self.toppane.title2_frame.layout_select.config(text = self.layout)
-            self.toppane.title2_frame.schem_select.config(text = self.schematic)
-
-            # Update schematic button
-            if os.path.isfile(rootpath + '/verilog/' + self.schematic + '.v'):
-                self.toppane.title2_frame.schem_label.config(text = 'Verilog netlist:')
-            else:
-                self.toppane.title2_frame.schem_label.config(text = 'Schematic netlist:')
-
-            # If there is a comparison file that post-dates both netlists, load it.
-            self.check_lvs()
-        return True
-
-    def check_layout_out_of_date(self, spipath, layoutpath):
-        # Check if a netlist (spipath) is out-of-date relative to the layouts
-        # (layoutpath).  Need to read the netlist and check all of the subcells.
-        need_capture = False
-        if not os.path.isfile(spipath):
-            return True
-        if os.path.isfile(layoutpath):
-            spi_statbuf = os.stat(spipath)
-            lay_statbuf = os.stat(layoutpath)
-            if spi_statbuf.st_mtime < lay_statbuf.st_mtime:
-                # netlist exists but is out-of-date
-                need_capture = True
-            else:
-                # only found that the top-level-layout is older than the
-                # netlist.  Now need to read the netlist, find all subcircuits,
-                # and check those dates, too.
-                layoutdir = os.path.split(layoutpath)[0]
-                subrex = re.compile('^[^\*]*[ \t]*.subckt[ \t]+([^ \t]+).*$', re.IGNORECASE)
-                with open(spipath, 'r') as ifile:
-                    duttext = ifile.read()
- 
-                dutlines = duttext.replace('\n+', ' ').splitlines()
-                for line in dutlines:
-                    lmatch = subrex.match(line)
-                    if lmatch:
-                        subname = lmatch.group(1)
-                        sublayout = layoutdir + '/' + subname + '.mag'
-                        # subcircuits that cannot be found in the current directory are
-                        # assumed to be library components and therefore never out-of-date.
-                        if os.path.exists(sublayout):
-                            sub_statbuf = os.stat(sublayout)
-                            if spi_statbuf.st_mtime < lay_statbuf.st_mtime:
-                                # netlist exists but is out-of-date
-                                need_capture = True
-                                break
-        return need_capture
-
-    def check_schematic_out_of_date(self, spipath, schempath):
-        # Check if a netlist (spipath) is out-of-date relative to the schematics
-        # (schempath).  Need to read the netlist and check all of the subcells.
-        need_capture = False
-        if not os.path.isfile(spipath):
-            return True
-        if os.path.isfile(schempath):
-            spi_statbuf = os.stat(spipath)
-            sch_statbuf = os.stat(schempath)
-            if spi_statbuf.st_mtime < sch_statbuf.st_mtime:
-                # netlist exists but is out-of-date
-                need_capture = True
-            else:
-                # only found that the top-level-schematic is older than the
-                # netlist.  Now need to read the netlist, find all subcircuits,
-                # and check those dates, too.
-                schemdir = os.path.split(schempath)[0]
-                subrex = re.compile('^[^\*]*[ \t]*.subckt[ \t]+([^ \t]+).*$', re.IGNORECASE)
-                with open(spipath, 'r') as ifile:
-                    duttext = ifile.read()
- 
-                dutlines = duttext.replace('\n+', ' ').splitlines()
-                for line in dutlines:
-                    lmatch = subrex.match(line)
-                    if lmatch:
-                        subname = lmatch.group(1)
-                        # NOTE: Electric uses library:cell internally to track libraries,
-                        # and maps the ":" to "__" in the netlist.  Not entirely certain that
-                        # the double-underscore uniquely identifies the library:cell. . .
-                        librex = re.compile('(.*)__(.*)', re.IGNORECASE)
-                        lmatch = librex.match(subname)
-                        if lmatch:
-                            elecpath = os.path.split(os.path.split(schempath)[0])[0]
-                            libname = lmatch.group(1)
-                            subschem = elecpath + '/' + libname + '.delib/' + lmatch.group(2) + '.sch'
-                        else:
-                            libname = {}
-                            subschem = schemdir + '/' + subname + '.sch'
-                        # subcircuits that cannot be found in the current directory are
-                        # assumed to be library components and therefore never out-of-date.
-                        if os.path.exists(subschem):
-                            sub_statbuf = os.stat(subschem)
-                            if spi_statbuf.st_mtime < sub_statbuf.st_mtime:
-                                # netlist exists but is out-of-date
-                                need_capture = True
-                                break
-                        # mapping of characters to what's allowed in SPICE makes finding
-                        # the associated schematic file a bit difficult.  Requires wild-card
-                        # searching.
-                        elif libname:
-                            restr = lmatch.group(2) + '.sch'
-                            restr = restr.replace('.', '\.')
-                            restr = restr.replace('_', '.')
-                            schrex = re.compile(restr, re.IGNORECASE)
-                            libpath = elecpath + '/' + libname + '.delib'
-                            if os.path.exists(libpath):
-                                liblist = os.listdir(libpath)
-                                for file in liblist:
-                                    lmatch = schrex.match(file)
-                                    if lmatch:
-                                        subschem = libpath + '/' + file
-                                        sub_statbuf = os.stat(subschem)
-                                        if spi_statbuf.st_mtime < sch_statbuf.st_mtime:
-                                            # netlist exists but is out-of-date
-                                            need_capture = True
-                                        break
-        return need_capture
-
-    def check_lvs(self):
-        # If both netlists exist, and comp.json is more recent than both, then
-        # load LVS results from comp.json
-        project_path = self.rootpath
-        project_name = self.project
-        layout_path = project_path + '/layout/' + project_name + '.spc'
-        net_path = project_path + '/netlist/' + project_name + '.spi'
-        comp_path = project_path + '/layout/comp.json'
-
-        if os.path.exists(layout_path) and os.path.exists(net_path) and os.path.exists(comp_path):
-            magtime = os.stat(layout_path).st_mtime
-            schemtime = os.stat(net_path).st_mtime
-            comptime = os.stat(comp_path).st_mtime
-            if comptime > magtime and comptime > schemtime:
-                print("Loading LVS results from file.")
-                self.generate(comp_path)
-
-    def generate_layout_netlist(self, layout_path, layout_src, project_path):
-        # Does layout netlist exist and is it current?
-        if self.check_layout_out_of_date(layout_path, layout_src):
-            print('Generating layout netlist.')
-            self.update_idletasks()
-            mproc = subprocess.Popen(['magic', '-dnull', '-noconsole',
-			self.layout], stdin = subprocess.PIPE, stdout = subprocess.PIPE,
-			stderr = subprocess.PIPE, cwd = project_path + '/layout',
-			universal_newlines = True)
-            mproc.stdin.write("select top cell\n")
-            mproc.stdin.write("expand\n")
-            mproc.stdin.write("extract all\n")
-            mproc.stdin.write("ext2spice hierarchy on\n")
-            mproc.stdin.write("ext2spice format ngspice\n")
-            mproc.stdin.write("ext2spice scale off\n")
-            mproc.stdin.write("ext2spice renumber off\n")
-            mproc.stdin.write("ext2spice subcircuit top auto\n")
-            mproc.stdin.write("ext2spice cthresh infinite\n")
-            mproc.stdin.write("ext2spice rthresh infinite\n")
-            mproc.stdin.write("ext2spice blackbox on\n")
-            mproc.stdin.write("ext2spice -o " + self.layout + ".spi\n")
-            mproc.stdin.write("quit -noprompt\n")
-            magicout = mproc.communicate()[0]
-            self.printwarn(magicout)
-            if mproc.returncode != 0:
-                print('Failure to generate new layout netlist.')
-                return False
-
-            # Move .spi netlist to project_dir/netlist/lvs/
-            shutil.move(project_path + '/layout/' + self.layout + '.spi', layout_path)
-            # Remove extraction files
-            for file in os.listdir(project_path + '/layout'):
-                if os.path.splitext(file)[1] == '.ext':
-                    os.remove(project_path + '/layout/' + file)
-        else:
-            print('Layout netlist is up-to-date, not regenerating.')
-        return True
-
-    def run_lvs(self, value):
-        # "value" is ignored (?)
-
-        # Check if netlists exist and are current;  otherwise create them.
-        # Then run LVS.
-
-        project_path = self.rootpath
-        project_name = self.project
-        comp_path = project_path + '/layout/comp.json'
-        has_vlog = False
-        vlog_path = project_path + '/verilog/' + project_name + '.v'
-
-        layout_path = project_path + '/netlist/lvs/' + self.layout + '.spi'
-        net_path = project_path + '/netlist/schem/' + self.schematic + '.spi'
-        layout_src = project_path + '/layout/' + self.layout + '.mag'
-
-        # Does the setup file exist (this is optional)?
-        if self.lvs_setup != '' and not os.path.isfile('setup.tcl'):
-            print('No technology setup file selected.')
-
-        # Does schematic netlist exist?
-        if not os.path.isfile(vlog_path) and not os.path.isfile(net_path):
-            print('Error:  No schematic netlist or verilog netlist.')
-            return
-
-        # Does LVS netlist subdirectory exist?
-        if not os.path.exists(project_path + '/netlist/lvs'):
-            os.makedirs(project_path + '/netlist/lvs')
-
-        # Does layout netlist exist and is it current?
-        if not self.generate_layout_netlist(layout_path, layout_src, project_path):
-            return False
-
-        # Final check
-        if not os.path.isfile(layout_path):
-            print('Error:  No netlist generated from magic.')
-            return
-
-        else:
-            # Read in netlist and convert commas from [X,Y] arrays to vertical bars
-            # as something that can be converted back as necessary.  ngspice treats
-            # commas as special characters for some reason.
-            with open(layout_path) as ifile:
-                spitext = ifile.read()
-
-            # spilines = spitext.replace(',', '|')
-            # with open(layout_path, 'w') as ofile:
-            #     ofile.write(spilines)
-
-        # Check the netlist to see if the cell to match is a subcircuit.  If
-        # not, then assume it is the top level.
-
-        is_subckt = False
-        subrex = re.compile('^[^\*]*[ \t]*.subckt[ \t]+([^ \t]+).*$', re.IGNORECASE)
-        dutlines = spitext.replace('\n+', ' ').splitlines()
-        for line in dutlines:
-            lmatch = subrex.match(line)
-            if lmatch:
-                subname = lmatch.group(1)
-                if subname == self.layout:
-                    is_subckt = True
-                    break
-
-        if is_subckt:
-            layout_arg = layout_path + ' ' + self.layout
-            layout_text = '"' + layout_arg + '"'
-        else:
-            layout_arg = layout_path
-            layout_text = layout_arg
-
-        if has_vlog:
-            schem_arg = vlog_path + ' ' + self.schematic
-        else:
-            schem_arg = net_path + ' ' + self.schematic
-        schem_text = '"' + schem_arg + '"'
-
-        # Remove any previous comparison output file
-        comp_out_path = os.path.splitext(comp_path)[0] + '.out'
-        if os.path.exists(comp_out_path):
-            os.remove(comp_out_path)
-
-        # Run netgen as subprocess
-        print('Running: netgen -batch lvs ' + layout_text + 
-		' ' + schem_text + ' ' + self.lvs_setup + ' ' + comp_out_path +
-		' -json -blackbox')
-        # Note: Because arguments to subprocess are list items, the {filename cell}
-        # pair does *not* have to be quoted or braced.  Doing so causes a parse
-        # error.
-        self.lvsproc = subprocess.Popen(['netgen', '-batch', 'lvs',
-		layout_arg, schem_arg,
-		self.lvs_setup, comp_out_path, '-json', '-blackbox'],
-		cwd=project_path + '/layout',
-		stdout=subprocess.PIPE, stderr=subprocess.PIPE, bufsize=0)
-        # This is largely unnecessary as netgen usually runs to completion very quickly.
-        self.watchclock(comp_path)
-
-    def watchclock(self, filename):
-        if self.lvsproc == None:
-            return
-
-        lvs_status = self.lvsproc.poll()
-        sresult = select.select([self.lvsproc.stdout, self.lvsproc.stderr], [], [], 0)[0]
-        if self.lvsproc.stdout in sresult:
-            outstring = self.lvsproc.stdout.readline().decode().strip()
-            self.logprint(outstring, doflush=True)
-            print(outstring)
-        elif self.lvsproc.stderr in sresult:
-            errstring = self.lvsproc.stderr.readline().decode().strip()
-            self.logprint(errstring, doflush = True)
-            print(errstring, file=sys.stderr)
-
-        if lvs_status != None:
-            print("netgen LVS exited with status " + str(lvs_status))
-            self.lvsproc = None
-            if lvs_status != 0:
-                print('Errors encountered in LVS.')
-                self.logprint('Errors in LVS, lvs status = ' + str(lvs_status), doflush=True)
-            # Done;  now read comp.json and fill the treeview listbox.
-            self.generate(filename)
-        else:
-            self.after(500, lambda: self.watchclock(filename))
-
-    # Generate display from "comp.out" file (json file now preferred)
-
-    def generate_orig(self, lvspath):
-        lefttext = []
-        righttext = []
-        print("Reading LVS output file " + lvspath)
-        if os.path.exists(lvspath):
-            with open(lvspath, 'r') as ifile:
-                lvslines = ifile.read().splitlines()
-            for line in lvslines:
-                if '|' in line:
-                    # parts = line.split('|')
-                    # lefttext.append(parts[0])
-                    # righttext.append(parts[1])
-                    lefttext.append(line[0:42].strip())
-                    righttext.append(line[44:].strip())
-                else:
-                    lefttext.append(line)
-                    righttext.append('')
-            # Populate treeview with text
-            self.toppane.lvsreport.repopulate(lefttext, righttext)
- 
-        else:
-            print("Error:  No output file generated from LVS.")
-
-    # Generate output from LVS report JSON file comp.json
-
-    def generate(self, lvspath):
-        lefttext = []
-        righttext = []
-        print("Reading LVS output file " + lvspath)
-        if os.path.exists(lvspath):
-            with open(lvspath, 'r') as ifile:
-                self.lvsdata = json.load(ifile)
-
-            # Populate treeview with text
-            self.toppane.lvsreport.json_repopulate(self.lvsdata)
- 
-        else:
-            print("Error:  No output file generated from LVS.")
-
-    def findrecord(self, value):
-        print("Unimplemented function")
-
-    def findrecord_test(self, value):
-        # Check if socket is defined;  if not, attempt to open one
-        if not self.msock:
-            try:
-                self.msock = socket.socket(socket.AF_INET, socket.SOCK_STREAM)
-            except:
-                 print("No response from layout tool.")
-
-            if self.msock:
-                self.msock.connect(("0.0.0.0", 12946))
-                self.msock.setblocking(False)
-        if self.msock:
-            # Pull name of net or device from 'value'
-            # This is a test:
-            self.msock.sendall(b'box 0 0 100 100\r\n')
-
-if __name__ == '__main__':
-    options = []
-    arguments = []
-    for item in sys.argv[1:]:
-        if item.find('-', 0) == 0:
-            options.append(item)
-        else:
-            arguments.append(item)
-
-    root = tkinter.Tk()
-    app = LVSManager(root)
-    if arguments:
-        if len(arguments) >= 2:
-            app.set_project(arguments[0], project_name=arguments[1])
-        else:
-            app.set_project(arguments[0])
-
-    root.mainloop()

python/lvs_manager.py.in

@@ -343,7 +343,7 @@ class LVSManager(ttk.Frame):
             techbase = os.path.split(techname)[1]
             self.tech = os.path.splitext(techbase)[0]
             self.lvs_setup = techname
-            self.toppane.title2_frame.layout_select.config(text = self.tech)
+            self.toppane.title2_frame.tech_select.config(text = self.tech)
 
     def choose_layout(self):
         try:
@@ -358,30 +358,37 @@ class LVSManager(ttk.Frame):
 			title = "Choose a layout cell to compare.")
         if cellname != '':
             print("Selected compare cell " + cellname)
+            self.layout = cellname
             cellbase = os.path.split(cellname)[1]
-            self.layout = os.path.splitext(cellbase)[0]
-            self.toppane.title2_frame.layout_select.config(text = self.layout)
+            layoutname = os.path.splitext(cellbase)[0]
+            self.toppane.title2_frame.layout_select.config(text = layoutname)
+            fileext = os.path.splitext(cellbase)[1]
+            if fileext == '.mag':
+                self.toppane.title2_frame.layout_label.config(text = 'Layout:')
+            else:
+                self.toppane.title2_frame.layout_label.config(text = 'Layout netlist:')
 
     def choose_netlist(self):
         try:
             project_path = self.rootpath
-            initdirname = self.rootpath + '/netlist/' + self.project + '.spi'
+            initdirname = self.rootpath + '/netlist/' + self.project + '.spice'
         except:
             print('Must choose a project first.')
             return
         cellname = filedialog.askopenfilename(multiple=False,
 			initialdir = initdirname,
-			filetypes = (("Spice netlist", "*.spi"),("Verilog netlist", "*.v")),
+			filetypes = (("Spice netlist", "*.spice"),("Verilog netlist", "*.v"),("All Files","*.*")),
 			title = "Choose a netlist to compare.")
         if cellname != '':
             print("Selected compare cell " + cellname)
+            self.schematic = cellname
             cellbase = os.path.split(cellname)[1]
-            self.schematic = os.path.splitext(cellbase)[0]
-            self.toppane.title2_frame.schem_select.config(text = self.schematic)
+            schematic_name = os.path.splitext(cellbase)[0]
+            self.toppane.title2_frame.schem_select.config(text = schematic_name)
             fileext = os.path.splitext(cellbase)[1]
             if fileext == '.v':
                 self.toppane.title2_frame.schem_label.config(text = 'Verilog netlist:')
-            elif fileext == '.sp' or fileext == '.spi' or fileext == '.spice' or fileext == '.spc' or fileext == '.ckt':
+            elif fileext == '.sp' or fileext == '.spice' or fileext == '.spi' or fileext == '.spc' or fileext == '.ckt':
                 self.toppane.title2_frame.schem_label.config(text = 'SPICE netlist:')
             elif fileext == '.cdl':
                 self.toppane.title2_frame.schem_label.config(text = 'CDL netlist:')
@@ -433,7 +440,10 @@ class LVSManager(ttk.Frame):
                 self.logfile = None
 
             # Put new log file called 'lvs.log' in the mag/ subdirectory
-            self.logfile = open(rootpath + '/layout/lvs.log', 'w')
+            if os.path.exists(rootpath + '/layout'):
+                self.logfile = open(rootpath + '/layout/lvs.log', 'w')
+            else:
+                self.logfile = open(rootpath + '/lvs.log', 'w')
             # Print some initial information to the logfile.
             self.logprint('Starting new log file ' + datetime.datetime.now().strftime('%c'),
 				doflush=True)
@@ -444,15 +454,23 @@ class LVSManager(ttk.Frame):
             # Cell name is the same as project name initially
             self.layout = self.project
             self.schematic = self.project
-            self.toppane.title2_frame.layout_select.config(text = self.layout)
-            self.toppane.title2_frame.schem_select.config(text = self.schematic)
+            layname = os.path.splitext(os.path.split(self.layout)[1])[0]
+            self.toppane.title2_frame.layout_select.config(text = layname)
+            schemname = os.path.splitext(os.path.split(self.schematic)[1])[0]
+            self.toppane.title2_frame.schem_select.config(text = schemname)
 
             # Update schematic button
-            if os.path.isfile(rootpath + '/verilog/' + self.schematic + '.v'):
+            if os.path.splitext(self.schematic)[1] == '.v':
                 self.toppane.title2_frame.schem_label.config(text = 'Verilog netlist:')
             else:
                 self.toppane.title2_frame.schem_label.config(text = 'Schematic netlist:')
 
+            # Update layout button
+            if os.path.splitext(self.layout)[1] == '.mag':
+                self.toppane.title2_frame.schem_label.config(text = 'Layout:')
+            else:
+                self.toppane.title2_frame.schem_label.config(text = 'Layout netlist:')
+
             # If there is a comparison file that post-dates both netlists, load it.
             self.check_lvs()
         return True
@@ -567,8 +585,8 @@ class LVSManager(ttk.Frame):
         # load LVS results from comp.json
         project_path = self.rootpath
         project_name = self.project
-        layout_path = project_path + '/layout/' + project_name + '.spc'
-        net_path = project_path + '/netlist/' + project_name + '.spi'
+        layout_path = project_path + '/layout/' + project_name + '.spice'
+        net_path = project_path + '/netlist/' + project_name + '.spice'
         comp_path = project_path + '/layout/comp.json'
 
         if os.path.exists(layout_path) and os.path.exists(net_path) and os.path.exists(comp_path):
@@ -599,7 +617,7 @@ class LVSManager(ttk.Frame):
             mproc.stdin.write("ext2spice cthresh infinite\n")
             mproc.stdin.write("ext2spice rthresh infinite\n")
             mproc.stdin.write("ext2spice blackbox on\n")
-            mproc.stdin.write("ext2spice -o " + self.layout + ".spi\n")
+            mproc.stdin.write("ext2spice -o " + self.layout + ".spice\n")
             mproc.stdin.write("quit -noprompt\n")
             magicout = mproc.communicate()[0]
             self.printwarn(magicout)
@@ -607,8 +625,8 @@ class LVSManager(ttk.Frame):
                 print('Failure to generate new layout netlist.')
                 return False
 
-            # Move .spi netlist to project_dir/netlist/lvs/
-            shutil.move(project_path + '/layout/' + self.layout + '.spi', layout_path)
+            # Move .spice netlist to project_dir/netlist/lvs/
+            shutil.move(project_path + '/layout/' + self.layout + '.spice', layout_path)
             # Remove extraction files
             for file in os.listdir(project_path + '/layout'):
                 if os.path.splitext(file)[1] == '.ext':
@@ -625,17 +643,37 @@ class LVSManager(ttk.Frame):
 
         project_path = self.rootpath
         project_name = self.project
-        comp_path = project_path + '/layout/comp.json'
+
+        # Diagnostic:
+        print('project_name is ' + project_name)
+        print('project_path is ' + project_path)
+        print('self.layout is ' + self.layout)
+        print('self.schematic is ' + self.schematic)
+        print('self.lvs_setup is ' + self.lvs_setup)
+
         has_vlog = False
         vlog_path = project_path + '/verilog/' + project_name + '.v'
 
-        layout_path = project_path + '/netlist/lvs/' + self.layout + '.spi'
-        net_path = project_path + '/netlist/schem/' + self.schematic + '.spi'
-        layout_src = project_path + '/layout/' + self.layout + '.mag'
+        if os.path.isfile(self.layout):
+            layout_path = self.layout
+            layout_src = None
+        else:
+            layout_path = project_path + '/netlist/lvs/' + self.layout + '.spice'
+            layout_src = project_path + '/layout/' + self.layout + '.mag'
+
+        comp_dir = os.path.split(layout_path)[0]
+        comp_path = comp_dir + '/comp.json'
+
+        if os.path.isfile(self.schematic):
+            net_path = self.schematic
+        else:
+            net_path = project_path + '/netlist/schem/' + self.schematic + '.spice'
 
         # Does the setup file exist (this is optional)?
-        if self.lvs_setup != '' and not os.path.isfile('setup.tcl'):
+        if self.lvs_setup == '' and not os.path.isfile('setup.tcl'):
             print('No technology setup file selected.')
+        elif not os.path.isfile(self.lvs_setup):
+            print("Can't find technology setup file " + self.lvs_setup)
 
         # Does schematic netlist exist?
         if not os.path.isfile(vlog_path) and not os.path.isfile(net_path):
@@ -643,14 +681,16 @@ class LVSManager(ttk.Frame):
             return
 
         # Does LVS netlist subdirectory exist?
-        if not os.path.exists(project_path + '/netlist/lvs'):
-            os.makedirs(project_path + '/netlist/lvs')
+        if os.path.exists(project_path + '/netlist'):
+            if not os.path.exists(project_path + '/netlist/lvs'):
+                os.makedirs(project_path + '/netlist/lvs')
 
         # Does layout netlist exist and is it current?
-        if not self.generate_layout_netlist(layout_path, layout_src, project_path):
-            return False
+        if layout_src:
+            if not self.generate_layout_netlist(layout_path, layout_src, project_path):
+                return False
 
-        # Final check
+        # Final checks
         if not os.path.isfile(layout_path):
             print('Error:  No netlist generated from magic.')
             return
@@ -662,26 +702,27 @@ class LVSManager(ttk.Frame):
             with open(layout_path) as ifile:
                 spitext = ifile.read()
 
-            # spilines = spitext.replace(',', '|')
-            # with open(layout_path, 'w') as ofile:
-            #     ofile.write(spilines)
-
         # Check the netlist to see if the cell to match is a subcircuit.  If
         # not, then assume it is the top level.
 
+        layoutcell = os.path.splitext(os.path.split(self.layout)[1])[0]
         is_subckt = False
+        subname = None
         subrex = re.compile('^[^\*]*[ \t]*.subckt[ \t]+([^ \t]+).*$', re.IGNORECASE)
         dutlines = spitext.replace('\n+', ' ').splitlines()
         for line in dutlines:
             lmatch = subrex.match(line)
             if lmatch:
                 subname = lmatch.group(1)
-                if subname == self.layout:
+                if subname == layoutcell:
                     is_subckt = True
                     break
 
         if is_subckt:
-            layout_arg = layout_path + ' ' + self.layout
+            layout_arg = self.layout + ' ' + layoutcell
+            layout_text = '"' + layout_arg + '"'
+        elif subname:
+            layout_arg = self.layout + ' ' + subname
             layout_text = '"' + layout_arg + '"'
         else:
             layout_arg = layout_path
@@ -690,8 +731,39 @@ class LVSManager(ttk.Frame):
         if has_vlog:
             schem_arg = vlog_path + ' ' + self.schematic
         else:
-            schem_arg = net_path + ' ' + self.schematic
-        schem_text = '"' + schem_arg + '"'
+            # Final checks
+            if not os.path.isfile(net_path):
+                print('Error:  No netlist from schematic.')
+                return
+
+            with open(net_path) as ifile:
+                spitext = ifile.read()
+
+            # Check the netlist to see if the cell to match is a subcircuit.  If
+            # not, then assume it is the top level.
+
+            schemcell = os.path.splitext(os.path.split(self.schematic)[1])[0]
+            subname = None
+            is_subckt = False
+            subrex = re.compile('^[^\*]*[ \t]*.subckt[ \t]+([^ \t]+).*$', re.IGNORECASE)
+            dutlines = spitext.replace('\n+', ' ').splitlines()
+            for line in dutlines:
+                lmatch = subrex.match(line)
+                if lmatch:
+                    subname = lmatch.group(1)
+                    if subname == schemcell:
+                        is_subckt = True
+                        break
+
+            if is_subckt:
+                schem_arg = self.schematic + ' ' + schemcell
+                schem_text = '"' + schem_arg + '"'
+            elif subname:
+                schem_arg = self.schematic + ' ' + subname
+                schem_text = '"' + schem_arg + '"'
+            else:
+                schem_arg = net_path
+                schem_text = schem_arg
 
         # Remove any previous comparison output file
         comp_out_path = os.path.splitext(comp_path)[0] + '.out'
@@ -708,7 +780,7 @@ class LVSManager(ttk.Frame):
         self.lvsproc = subprocess.Popen(['netgen', '-batch', 'lvs',
 		layout_arg, schem_arg,
 		self.lvs_setup, comp_out_path, '-json', '-blackbox'],
-		cwd=project_path + '/layout',
+		cwd=comp_dir,
 		stdout=subprocess.PIPE, stderr=subprocess.PIPE, bufsize=0)
         # This is largely unnecessary as netgen usually runs to completion very quickly.
         self.watchclock(comp_path)

scripts/configure

@@ -668,7 +668,6 @@ XMKMF
 HAVE_PYTHON3
 EGREP
 GREP
-M4
 RANLIB
 INSTALL_DATA
 INSTALL_SCRIPT
@@ -712,6 +711,7 @@ infodir
 docdir
 oldincludedir
 includedir
+runstatedir
 localstatedir
 sharedstatedir
 sysconfdir
@@ -794,6 +794,7 @@ datadir='${datarootdir}'
 sysconfdir='${prefix}/etc'
 sharedstatedir='${prefix}/com'
 localstatedir='${prefix}/var'
+runstatedir='${localstatedir}/run'
 includedir='${prefix}/include'
 oldincludedir='/usr/include'
 docdir='${datarootdir}/doc/${PACKAGE_TARNAME}'
@@ -1046,6 +1047,15 @@ do
   | -silent | --silent | --silen | --sile | --sil)
     silent=yes ;;
 
+  -runstatedir | --runstatedir | --runstatedi | --runstated \
+  | --runstate | --runstat | --runsta | --runst | --runs \
+  | --run | --ru | --r)
+    ac_prev=runstatedir ;;
+  -runstatedir=* | --runstatedir=* | --runstatedi=* | --runstated=* \
+  | --runstate=* | --runstat=* | --runsta=* | --runst=* | --runs=* \
+  | --run=* | --ru=* | --r=*)
+    runstatedir=$ac_optarg ;;
+
   -sbindir | --sbindir | --sbindi | --sbind | --sbin | --sbi | --sb)
     ac_prev=sbindir ;;
   -sbindir=* | --sbindir=* | --sbindi=* | --sbind=* | --sbin=* \
@@ -1183,7 +1193,7 @@ fi
 for ac_var in	exec_prefix prefix bindir sbindir libexecdir datarootdir \
 		datadir sysconfdir sharedstatedir localstatedir includedir \
 		oldincludedir docdir infodir htmldir dvidir pdfdir psdir \
-		libdir localedir mandir
+		libdir localedir mandir runstatedir
 do
   eval ac_val=\$$ac_var
   # Remove trailing slashes.
@@ -1336,6 +1346,7 @@ Fine tuning of the installation directories:
   --sysconfdir=DIR        read-only single-machine data [PREFIX/etc]
   --sharedstatedir=DIR    modifiable architecture-independent data [PREFIX/com]
   --localstatedir=DIR     modifiable single-machine data [PREFIX/var]
+  --runstatedir=DIR       modifiable per-process data [LOCALSTATEDIR/run]
   --libdir=DIR            object code libraries [EPREFIX/lib]
   --includedir=DIR        C header files [PREFIX/include]
   --oldincludedir=DIR     C header files for non-gcc [/usr/include]
@@ -3690,56 +3701,6 @@ else
 fi
 
 
-for ac_prog in gm4 gnum4 m4
-do
-  # Extract the first word of "$ac_prog", so it can be a program name with args.
-set dummy $ac_prog; ac_word=$2
-{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
-$as_echo_n "checking for $ac_word... " >&6; }
-if ${ac_cv_path_M4+:} false; then :
-  $as_echo_n "(cached) " >&6
-else
-  case $M4 in
-  [\\/]* | ?:[\\/]*)
-  ac_cv_path_M4="$M4" # Let the user override the test with a path.
-  ;;
-  *)
-  as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
-for as_dir in $PATH
-do
-  IFS=$as_save_IFS
-  test -z "$as_dir" && as_dir=.
-    for ac_exec_ext in '' $ac_executable_extensions; do
-  if as_fn_executable_p "$as_dir/$ac_word$ac_exec_ext"; then
-    ac_cv_path_M4="$as_dir/$ac_word$ac_exec_ext"
-    $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
-    break 2
-  fi
-done
-  done
-IFS=$as_save_IFS
-
-  ;;
-esac
-fi
-M4=$ac_cv_path_M4
-if test -n "$M4"; then
-  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $M4" >&5
-$as_echo "$M4" >&6; }
-else
-  { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
-$as_echo "no" >&6; }
-fi
-
-
-  test -n "$M4" && break
-done
-test -n "$M4" || M4="no"
-
-if test x$M4 = xno; then
-  as_fn_error $? "M4 is required" "$LINENO" 5
-fi
-
 
 if test "$CPP" = "$CC -E" ; then
    CPP="$CPP -x c"
@@ -6065,7 +6026,6 @@ fi
 
 
 if test $usingTcl ; then
-  usingX11=1
   cadinstall="$cadinstall tcltk"
   modules="$modules tcltk"
   programs="$programs tcltk"
@@ -6075,7 +6035,11 @@ if test $usingTcl ; then
 
   extra_libs="$extra_libs \${NETGENDIR}/tcltk/libtcltk.o"
   extra_defs="$extra_defs -DTCL_DIR=\\\"\${TCLDIR}\\\""
-  stub_defs="$stub_defs -DUSE_TCL_STUBS -DUSE_TK_STUBS"
+  if test $usingX11 ; then
+    stub_defs="$stub_defs -DUSE_TCL_STUBS"
+  else
+    stub_defs="$stub_defs -DUSE_TCL_STUBS -DUSE_TK_STUBS"
+  fi
 else
   programs="$programs netgen"
   unused="$unused tcltk"
@@ -6160,6 +6124,7 @@ if test $usingTcl ; then
 # Tk libraries and header files
 #
 # -----------------------------------------------------------------------
+if test $usingX11 ; then
   if test "${TK_INC_DIR}" != "/usr/include" ; then
     INC_SPECS="${INC_SPECS} -I${TK_INC_DIR}"
   fi
@@ -6176,6 +6141,7 @@ if test $usingTcl ; then
       loader_run_path="${TK_LIB_DIR}:${loader_run_path}"
     fi
   fi
+fi
 
 # -----------------------------------------------------------------------
 #
@@ -6285,7 +6251,7 @@ if test $usingTcl ; then
 
     *darwin*)
       SHDLIB_EXT=".dylib"
-      LDDL_FLAGS="-dynamiclib -flat_namespace -undefined suppress -noprebind"
+      LDDL_FLAGS="-dynamiclib -undefined dynamic_lookup"
       LDFLAGS="${LDFLAGS} ${LIB_SPECS}"
       CFLAGS="${CFLAGS} ${X_CFLAGS} ${INC_SPECS} -I/sw/include -fno-common"
       ;;

scripts/configure.in

@@ -26,12 +26,6 @@ AC_ISC_POSIX
 AC_PROG_INSTALL
 AC_PROG_RANLIB
 
-dnl GNU M4 is preferred due to some of the option switches.
-AC_PATH_PROGS([M4], [gm4 gnum4 m4], [no])
-if test x$M4 = xno; then
-  AC_MSG_ERROR([M4 is required])
-fi
-
 dnl check size of pointer for correct behavior on 64-bit systems
 dnl If the C preprocessor is GCC, we need to force the flag to
 dnl assert that input files are of type C, or else the preprocessing
@@ -807,7 +801,6 @@ dnl "make" instead of requiring "make tcl"
 dnl ----------------------------------------------------------------
 
 if test $usingTcl ; then
-  usingX11=1
   cadinstall="$cadinstall tcltk"
   modules="$modules tcltk"
   programs="$programs tcltk"
@@ -816,7 +809,11 @@ if test $usingTcl ; then
   AC_DEFINE(TCL_NETGEN)
   extra_libs="$extra_libs \${NETGENDIR}/tcltk/libtcltk.o"
   extra_defs="$extra_defs -DTCL_DIR=\\\"\${TCLDIR}\\\""
-  stub_defs="$stub_defs -DUSE_TCL_STUBS -DUSE_TK_STUBS"
+  if test $usingX11 ; then
+    stub_defs="$stub_defs -DUSE_TCL_STUBS"
+  else
+    stub_defs="$stub_defs -DUSE_TCL_STUBS -DUSE_TK_STUBS"
+  fi
 else
   programs="$programs netgen"
   unused="$unused tcltk"
@@ -903,6 +900,7 @@ if test $usingTcl ; then
 # Tk libraries and header files
 #
 # -----------------------------------------------------------------------
+if test $usingX11 ; then
   if test "${TK_INC_DIR}" != "/usr/include" ; then
     INC_SPECS="${INC_SPECS} -I${TK_INC_DIR}"
   fi
@@ -919,6 +917,7 @@ if test $usingTcl ; then
       loader_run_path="${TK_LIB_DIR}:${loader_run_path}"
     fi
   fi
+fi
 
 # -----------------------------------------------------------------------
 #
@@ -1028,7 +1027,7 @@ if test $usingTcl ; then
 
     *darwin*)
       SHDLIB_EXT=".dylib"
-      LDDL_FLAGS="-dynamiclib -flat_namespace -undefined suppress -noprebind"
+      LDDL_FLAGS="-dynamiclib -undefined dynamic_lookup"
       LDFLAGS="${LDFLAGS} ${LIB_SPECS}"
       CFLAGS="${CFLAGS} ${X_CFLAGS} ${INC_SPECS} -I/sw/include -fno-common"
       ;;

tcltk/netgen.tcl.in

@@ -62,16 +62,18 @@ proc netgen::convert_to_json {filename lvs_final} {
 	          puts $fjson "      \["
 		  set cktval [lindex $value 0]
 		  foreach pin [lrange $cktval 0 end-1] {
-		     puts $fjson "        \"$pin\","
+		     set pinstr [string map {"\\" "\\\\"} $pin]
+		     puts $fjson "        \"$pinstr\","
 		  }
-		  set pin [lindex $cktval end]
+		  set pin [string map {"\\" "\\\\"} [lindex $cktval end]]
 		  puts $fjson "        \"$pin\""
 	          puts $fjson "      \], \["
 		  set cktval [lindex $value 1]
 		  foreach pin [lrange $cktval 0 end-1] {
-		     puts $fjson "        \"$pin\","
+		     set pinstr [string map {"\\" "\\\\"} $pin]
+		     puts $fjson "        \"$pinstr\","
 		  }
-		  set pin [lindex $cktval end]
+		  set pin [string map {"\\" "\\\\"} [lindex $cktval end]]
 		  puts $fjson "        \"$pin\""
 	          puts $fjson "      \]"
 		  if {$kidx == $nkeys} {
@@ -352,7 +354,7 @@ proc netgen::convert_to_json {filename lvs_final} {
    close $fjson
 }
 
-#----------------------------------------------------------------
+#-----------------------------------------------------------------------
 # Define the "lvs" command as a way of calling the netgen options
 # for standard compare, essentially the same as the old "netcomp"
 # standalone program.
@@ -361,14 +363,20 @@ proc netgen::convert_to_json {filename lvs_final} {
 # although if the cells have not been read in yet, then the
 # original syntax of filename or {filename cellname} is required.
 #
-# "args" is passed to verify and may therefore contain only the
-# value "-list" or nothing.  If "-list", then output is returned
-# as a nested list.
-#----------------------------------------------------------------
+# "args" may be "-list", "-json", or "-blackbox".
+#    "-list" returns output as a nested list.
+#    "-json" creates a .json-format output file in addition to stdout.
+#    "-blackbox" treats empty cells as black-box entries.
+#    "-noflatten={list}" is a list of cells not to flatten if mismatched.
+#    i.e., the cells are expected to match and any mismatch cannot be
+#    expected to be resolved by flattening the contents of the mismatched
+#    cells.
+#-----------------------------------------------------------------------
 
 proc netgen::lvs { name1 name2 {setupfile setup.tcl} {logfile comp.out} args} {
    set dolist 0
    set dojson 0
+   set noflat {}
    foreach arg $args {
       if {$arg == "-list"} {
 	 puts stdout "Generating list result"
@@ -382,6 +390,30 @@ proc netgen::lvs { name1 name2 {setupfile setup.tcl} {logfile comp.out} args} {
       } elseif {$arg == "-blackbox"} {
 	 puts stdout "Treating empty subcircuits as black-box cells"
 	 netgen::model blackbox on
+      } elseif {[string first "-noflatten=" $arg] == 0} {
+	 set value [string range $arg 11 end]
+	 # If argument is a filename then read the list of cells from it;
+	 # otherwise, argument is the list of files itself in quotes or
+	 # braces.
+	 if {[file exists $value]} {
+	    if {![catch {open $value r} fnf]} {
+	       while {[gets $fnf line] >= 0} {
+		  if {[lindex $line 0] != "#"} {
+		     foreach cell $line {
+		    	lappend noflat $cell
+		     }
+		  }
+	       }
+	       close $fnf
+	    } else {
+	       puts stderr "Cannot open file $value for reading cell list."
+	    }
+	 } else {
+	    set noflat [string trim $value \"\{\}]
+	 }
+	 if {[llength $noflat] > 0} {
+	    puts stdout "Will not flatten these subcells: $noflat"
+	 }
       }
    }
 
@@ -447,8 +479,12 @@ proc netgen::lvs { name1 name2 {setupfile setup.tcl} {logfile comp.out} args} {
 
    netgen::compare assign "$fnum1 $cell1" "$fnum2 $cell2"
 
-   if {[file exists $setupfile]} {
-      puts stdout "Reading setup file $setupfile"
+   if {$setupfile == ""} {
+      puts stdout "\nNo setup file specified.  Using trivial default setup.\n"
+      netgen::permute default	;# transistors and resistors
+      netgen::property default
+   } elseif {[file exists $setupfile]} {
+      puts stdout "\nReading setup file $setupfile\n"
       # Instead of sourcing the setup file, run each line so we can
       # catch individual errors and not let them halt the LVS process
       set perrors 0
@@ -476,8 +512,10 @@ proc netgen::lvs { name1 name2 {setupfile setup.tcl} {logfile comp.out} args} {
 	 puts stdout "Warning:  There were errors reading the setup file"
       }
    } elseif {[string first nosetup $setupfile] < 0} {
-      netgen::permute default	;# transistors and resistors
-      netgen::property default
+      puts stderr "\nError:  Setup file $setupfile does not exist.\n"
+      return
+   } else {
+      puts stderr "\nNo setup file specified.  Continuing without a setup.\n"
    }
 
    if {[string first nolog $logfile] < 0} {
@@ -501,13 +539,25 @@ proc netgen::lvs { name1 name2 {setupfile setup.tcl} {logfile comp.out} args} {
       return
    }
    set properr {}
+   set matcherr {}
+   set childMismatch 0		;# 1 indicates black-box child subcircuit mismatch
    while {$endval != {}} {
       if {$dolist == 1} {
          netgen::run -list converge
       } else {
          netgen::run converge
       }
-      netgen::log echo on
+      set pinMismatch 0		;# indicates pin mismatch in top cell
+      set doCheckFlatten 0
+      set doFlatten 0
+      if {[netgen::print queue] == {}} {
+	 set doEquatePins 1 	;# run equate pins on top cell
+      } else {
+	 set doEquatePins 0	;# don't run equate pins unless unique match
+      }
+      set forceMatch 0		;# for pin matching
+      netgen::log echo off
+
       if {[verify equivalent]} {
 	 # Resolve automorphisms by pin and property
 	 if {$dolist == 1} {
@@ -516,48 +566,105 @@ proc netgen::lvs { name1 name2 {setupfile setup.tcl} {logfile comp.out} args} {
             netgen::run resolve
 	 }
 	 set uresult [verify unique]
+	 # uresult:  -3 : unique with property error
+	 #	     -2 : equivalent with port errors
+	 #	     -1 : black box
+	 #	      0 : equivalent but not unique
+	 #	      1 : unique
          if {$uresult == 0} {
+	    netgen::log echo on
 	    netgen::log put "   Networks match locally but not globally.\n"
 	    netgen::log put "   Probably connections are swapped.\n"
 	    netgen::log put "   Check the end of logfile ${logfile} for implicated nodes.\n"
+	    netgen::log echo off
 	    if {$dolist == 1} {
 	       verify -list nodes
 	    } else {
 	       verify nodes
 	    }
-
-	    # Flatten the non-matching subcircuit (but not the top-level cells)
-            if {[netgen::print queue] != {}} {
-	       netgen::log put "  Flattening non-matched subcircuits $endval"
-	       netgen::flatten class "[lindex $endval 0] $fnum1"
-	       netgen::flatten class "[lindex $endval 1] $fnum2"
-	    }
+	    set doCheckFlatten 1
 	 } else {
-	    # Match pins
-            netgen::log echo off
-	    if {$dolist == 1} {
-		set result [equate -list pins "$fnum1 [lindex $endval 0]" \
-				"$fnum2 [lindex $endval 1]"]
-	    } else {
-		set result [equate pins "$fnum1 [lindex $endval 0]" \
-				"$fnum2 [lindex $endval 1]"]
-	    }
-	    if {$result != 0} {
-		equate classes "$fnum1 [lindex $endval 0]" \
-			 "$fnum2 [lindex $endval 1]"
-	    }
-            netgen::log echo on
+	    # Equate pins for black boxes, unique matches (possibly with property
+	    # errors), and unique with port errors
+	    set doEquatePins 1
+	 }
+	 if {$uresult == -1} {		;# black box
+	    set forceMatch 1
+	 } elseif {$uresult == -3} {	;# property error
+	    lappend properr [lindex $endval 0]
+	 } elseif {$uresult == -2} {	;# unmatched pins
+	    set doCheckFlatten 1
 	 }
-	 if {$uresult == 2} {lappend properr [lindex $endval 0]}
       } else {
-	 # Flatten the non-matching subcircuit (but not the top-level cells)
-         if {[netgen::print queue] != {}} {
-	    netgen::log put "  Flattening non-matched subcircuits $endval"
-	    netgen::flatten class "[lindex $endval 0] $fnum1"
-	    netgen::flatten class "[lindex $endval 1] $fnum2"
+	 # not equivalent
+	 netgen::log echo on
+	 # netgen::log put "  DEBUG: not equivalent $endval\n"
+	 netgen::log echo off
+	 set doCheckFlatten 1
+      }
+      if {$doCheckFlatten} {
+	 # Flatten the non-matching subcircuit (but not the top-level cell,
+	 # or cells explicitly prohibited from flattening)
+	 if {[netgen::print queue] != {}} {
+	    if {([lsearch $noflat [lindex $endval 0]] == -1) &&
+			([lsearch $noflat [lindex $endval 1]] == -1)} {
+	       set doFlatten 1
+	    } else {	
+	       netgen::log echo on
+	       netgen::log put "  Continuing with black-boxed subcircuits $endval\n"
+	       netgen::log echo off
+	       lappend matcherr [lindex $endval 0]"($fnum1)"
+	       lappend matcherr [lindex $endval 1]"($fnum2)"
+	       netgen::flatten prohibit "[lindex $endval 0] $fnum1"
+	       netgen::flatten prohibit "[lindex $endval 1] $fnum2"
+	       set doEquatePins 1
+	       set childMismatch 1
+	       set forceMatch 1
+	    }
 	 }
       }
-      netgen::log echo off
+      if {$doEquatePins} {
+	 # Match pins
+	 if {$dolist == 1} {
+	    if {$forceMatch} {
+	       set result [equate -list -force pins "$fnum1 [lindex $endval 0]" \
+				"$fnum2 [lindex $endval 1]"]
+	    } else {
+	       set result [equate -list pins "$fnum1 [lindex $endval 0]" \
+				"$fnum2 [lindex $endval 1]"]
+	    }
+	 } else {
+	    if {$forceMatch} {
+	       set result [equate -force pins "$fnum1 [lindex $endval 0]" \
+				"$fnum2 [lindex $endval 1]"]
+	    } else {
+	       set result [equate pins "$fnum1 [lindex $endval 0]" \
+				"$fnum2 [lindex $endval 1]"]
+	    }
+	 }
+	 if {$result >= 0} {
+	    equate classes "$fnum1 [lindex $endval 0]" \
+		        "$fnum2 [lindex $endval 1]"
+	 }
+	 # Do not set pinMismatch for black boxes
+	 if {$result < 0} {
+	    if {$result == -1 && [netgen::print queue] != {} && $forceMatch != 1} {
+               # flatten pin mismatch, but not empty cells (-2) or top cell or
+	       # cells prohibited from flattening.
+	       set doFlatten 1
+	    }
+	 } elseif {[netgen::print queue] == {} && $result == 0} {
+	    set pinMismatch 1
+	 }
+      }
+      if {$doFlatten} {
+	 netgen::log echo on
+	 netgen::log put "  Flattening non-matched subcircuits $endval\n"
+	 netgen::log echo off
+	 netgen::flatten class "[lindex $endval 0] $fnum1"
+	 netgen::flatten class "[lindex $endval 1] $fnum2"
+      }
+
       if {$dolist == 1} {
          catch {lappend lvs_final $lvs_out}
          set lvs_out {}
@@ -566,12 +673,23 @@ proc netgen::lvs { name1 name2 {setupfile setup.tcl} {logfile comp.out} args} {
          set endval [netgen::compare hierarchical]
       }
    }
-   netgen::log echo off
-   puts stdout "Result: " nonewline
    netgen::log echo on
-   verify only
+   netgen::log put "\nFinal result: "
+   if {$pinMismatch || $childMismatch} {
+      if {$childMismatch} {
+	 netgen::log put "Subcell(s) failed matching.\n"
+      }
+      if {$pinMismatch} {
+	 netgen::log put "Top level cell failed pin matching.\n"
+      }
+   } else {
+      verify only
+   }
    if {$properr != {}} {
-      netgen::log put "The following cells had property errors: $properr\n"
+      netgen::log put "\nThe following cells had property errors:\n " [regsub -all { } $properr "\n "] "\n"
+   }
+   if {$matcherr != {}} {
+      netgen::log put "\nThe following subcells failed to match:\n " [regsub -all { } $matcherr "\n "] "\n"
    }
    if {$dolog} {
       netgen::log end
@@ -623,6 +741,19 @@ set auto_noexec 1       ;# don't EVER call UNIX commands w/o "shell" in front
 # Cross-Application section
 #----------------------------------------------------------------------
 
+# For use with open_pdks, set PDK_ROOT from the environment.  If no
+# such environment variable exists, check some common locations.
+
+if {[catch {set PDK_ROOT $::env(PDK_ROOT)}]} {
+    if {[file isdir /usr/local/share/pdk] == 1} {
+	set PDK_ROOT /usr/local/share/pdk
+    } elseif {[file isdir /usr/share/pdk] == 1} {
+	set PDK_ROOT /usr/share/pdk
+    } elseif {[file isdir /foss/pdk] == 1} {
+	set PDK_ROOT /foss/pdk
+    }
+}
+
 # Setup IRSIM assuming that the Tcl version is installed.
 # We do not need to rename procedure irsim to NULL because it is
 # redefined in a script, which simply overwrites the original.

tcltk/tclnetgen.c

@@ -32,6 +32,9 @@ the Free Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
 #include "print.h"
 #include "query.h"	/* for ElementNodes() */
 #include "hash.h"
+#include "xilinx.h"
+#include "tech.h"
+#include "flatten.h"
 
 #ifndef TRUE
 #define TRUE 1
@@ -94,6 +97,7 @@ int _netcmp_ignore(ClientData, Tcl_Interp *, int, Tcl_Obj *CONST objv[]);
 int _netcmp_permute(ClientData, Tcl_Interp *, int, Tcl_Obj *CONST objv[]);
 int _netcmp_property(ClientData, Tcl_Interp *, int, Tcl_Obj *CONST objv[]);
 int _netcmp_exhaustive(ClientData, Tcl_Interp *, int, Tcl_Obj *CONST objv[]);
+int _netcmp_symmetry(ClientData, Tcl_Interp *, int, Tcl_Obj *CONST objv[]);
 int _netcmp_restart(ClientData, Tcl_Interp *, int, Tcl_Obj *CONST objv[]);
 int _netcmp_global(ClientData, Tcl_Interp *, int, Tcl_Obj *CONST objv[]);
 int _netcmp_convert(ClientData, Tcl_Interp *, int, Tcl_Obj *CONST objv[]);
@@ -244,6 +248,8 @@ Command netcmp_cmds[] = {
 	{"exhaustive",		_netcmp_exhaustive,
 		"\n   "
 		"toggle exhaustive subdivision"},
+	{"symmetry",		_netcmp_symmetry,
+		"(deprecated)"},
 	{"restart",		_netcmp_restart,
 		"\n   "
 		"start over (reset data structures)"},
@@ -701,11 +707,11 @@ _netgen_readnet(ClientData clientData,
     Tcl_Interp *interp, int objc, Tcl_Obj *CONST objv[])
 {
    char *formats[] = {
-      "automatic", "ext", "extflat", "sim", "ntk", "spice",
+      "automatic", "ext", "extflat", "sim", "prm", "ntk", "spice",
       "verilog", "netgen", "actel", "xilinx", NULL
    };
    enum FormatIdx {
-      AUTO_IDX, EXT_IDX, EXTFLAT_IDX, SIM_IDX, NTK_IDX,
+      AUTO_IDX, EXT_IDX, EXTFLAT_IDX, SIM_IDX, PRM_IDX, NTK_IDX,
       SPICE_IDX, VERILOG_IDX, NETGEN_IDX, ACTEL_IDX, XILINX_IDX
    };
    struct nlist *tc;
@@ -801,6 +807,9 @@ _netgen_readnet(ClientData clientData,
          case SIM_IDX:
             retstr = ReadSim(savstr, &filenum);
             break;
+         case PRM_IDX:
+            retstr = ReadPrm(savstr, &filenum);
+            break;
          case NTK_IDX:
             retstr = ReadNtk(savstr, &filenum);
             break;
@@ -973,7 +982,7 @@ _netgen_writenet(ClientData clientData,
          SpiceCell(repstr, filenum, "");
          break;
       case VERILOG_IDX:
-         VerilogModule(repstr, filenum, "");
+         VerilogTop(repstr, filenum, "");
          break;
       case WOMBAT_IDX:
          Wombat(repstr,NULL);
@@ -1050,6 +1059,12 @@ _netgen_flatten(ClientData clientData,
             FlattenInstancesOf(repstr, filenum);
 	 }
       }
+      else if (!strcmp(argv, "prohibit") || !strcmp(argv, "deny")) {
+	 tp = GetTopCell(filenum);
+	 Printf("Will not flatten instances of %s in file %s\n", repstr, tp->name);
+	 /* Mark cell as placeholder so it will not be flattened */
+	 tp->flags |= CELL_PLACEHOLDER;
+      }
       else {
 	 Tcl_WrongNumArgs(interp, 1, objv, "class valid_cellname");
 	 return TCL_ERROR;
@@ -1532,23 +1547,24 @@ int
 _netgen_model(ClientData clientData,
     Tcl_Interp *interp, int objc, Tcl_Obj *CONST objv[])
 {
-   struct nlist *tp;
+   struct nlist *tp, *tp2;
    char *model, *retclass;
    unsigned char class;
    int fnum = -1;
-   int result, index, nports;
+   int result, index, nports, nports2;
 
    char *modelclasses[] = {
       "undefined", "nmos", "pmos", "pnp", "npn",
       "resistor", "capacitor", "diode",
       "inductor", "module", "blackbox", "xline",
-      "moscap", "mosfet", "bjt", "subcircuit", NULL
+      "moscap", "mosfet", "bjt", "subcircuit", "copy",
+      NULL
    };
    enum OptionIdx {
       UNDEF_IDX,  NMOS_IDX, PMOS_IDX, PNP_IDX, NPN_IDX,
       RES_IDX, CAP_IDX, DIODE_IDX, INDUCT_IDX,
       MODULE_IDX, BLACKBOX_IDX, XLINE_IDX, MOSCAP_IDX,
-      MOSFET_IDX, BJT_IDX, SUBCKT_IDX
+      MOSFET_IDX, BJT_IDX, SUBCKT_IDX, COPY_IDX
    };
 
    if (objc != 3 && objc != 2) {
@@ -1579,8 +1595,7 @@ _netgen_model(ClientData clientData,
       return result;
 
    if (objc == 3) {
-      model = Tcl_GetString(objv[2]);
-      nports = NumberOfPorts(model);
+      nports = NumberOfPorts(tp->name, fnum);
 
       if (Tcl_GetIndexFromObj(interp, objv[2], (CONST84 char **)modelclasses,
 		"class", 0, &index) != TCL_OK) {
@@ -1644,6 +1659,40 @@ _netgen_model(ClientData clientData,
 	    break;
 	 case SUBCKT_IDX:
 	    class = CLASS_SUBCKT;
+	    break;
+	 case COPY_IDX:
+	    /* "copy" is not a class, but indicates that the cell,  */
+	    /* if undefined or a module, should have its class	    */
+	    /* taken from the other circuit, if that circuit has a  */
+	    /* cell of the same name.				    */
+	    if (Circuit1 == NULL || Circuit2 == NULL) {
+		Tcl_SetResult(interp, "Circuits have not been queued for comparison.",
+			NULL);
+		return TCL_ERROR;
+	    }
+	    if (tp == Circuit1) {
+		tp2 = LookupCellFile(tp->name, Circuit2->file);
+		nports2 = NumberOfPorts(tp2->name, Circuit2->file);
+	    }
+	    else if (tp == Circuit2) {
+		tp2 = LookupCellFile(tp->name, Circuit1->file);
+		nports2 = NumberOfPorts(tp2->name, Circuit1->file);
+	    }
+	    else {
+		Tcl_SetResult(interp, "The referenced netlist is not being compared.",
+			NULL);
+		return TCL_ERROR;
+	    }
+	    /* Should a non-matching number of ports be considered a fatal error? */
+	    // if (nports2 != nports) {
+	    //	Tcl_SetResult(interp, "The number of ports for this cell does not "
+	    //		"match between netlists.", NULL);
+	    //	return TCL_ERROR;
+	    // }
+
+	    class = tp2->class;
+	    /* To do (maybe): Rename tp ports to match tp2? */
+
 	    break;
       }
       tp->class = class;
@@ -1890,9 +1939,17 @@ _netgen_log(ClientData clientData,
    switch(index) {
       case START_IDX:
 	 LoggingFile = fopen(LogFileName, "w");
+	 if (!LoggingFile) {
+	    Tcl_SetResult(interp, "Could not open log file.", NULL);
+	    return TCL_ERROR;
+	 }
 	 break;
       case RESUME_IDX:
 	 LoggingFile = fopen(LogFileName, "a");
+	 if (!LoggingFile) {
+	    Tcl_SetResult(interp, "Could not open log file.", NULL);
+	    return TCL_ERROR;
+	 }
 	 break;
       case END_IDX:
 	 fclose(LoggingFile);
@@ -1901,6 +1958,10 @@ _netgen_log(ClientData clientData,
       case RESET_IDX:
 	 fclose(LoggingFile);
 	 LoggingFile = fopen(LogFileName, "w");
+	 if (!LoggingFile) {
+	    Tcl_SetResult(interp, "Could not open log file.", NULL);
+	    return TCL_ERROR;
+	 }
 	 break;
       case SUSPEND_IDX:
 	 fclose(LoggingFile);
@@ -2028,6 +2089,7 @@ _netcmp_format(ClientData clientData,
 	Tcl_WrongNumArgs(interp, 1, objv, "[col1_width [col2_width]]");
 	return TCL_ERROR;
     }
+    return TCL_OK;
 }
 
 /*------------------------------------------------------*/
@@ -2053,8 +2115,9 @@ _netcmp_compare(ClientData clientData,
    int dohierarchy = FALSE;
    int assignonly = FALSE;
    int argstart = 1, qresult, llen, result;
+   int hascontents1, hascontents2;
    struct Correspond *nextcomp;
-   struct nlist *tp;
+   struct nlist *tp1 = NULL, *tp2 = NULL;
    Tcl_Obj *flist = NULL;
 
    if (objc > 1) {
@@ -2097,24 +2160,24 @@ _netcmp_compare(ClientData clientData,
       }
       else if ((objc - argstart) == 2) {
 
-	 result = CommonParseCell(interp, objv[argstart], &tp, &fnum1);
+	 result = CommonParseCell(interp, objv[argstart], &tp1, &fnum1);
          if (result != TCL_OK) return TCL_ERROR;
 	 else if (fnum1 == -1) {
 	    Tcl_SetResult(interp, "Cannot use wildcard with compare command.\n",
 			NULL);
 	    return TCL_ERROR;
 	 }
-         name1 = tp->name;
+         name1 = tp1->name;
 	 argstart++;
 
-	 result = CommonParseCell(interp, objv[argstart], &tp, &fnum2);
+	 result = CommonParseCell(interp, objv[argstart], &tp2, &fnum2);
          if (result != TCL_OK) return TCL_ERROR;
 	 else if (fnum2 == -1) {
 	    Tcl_SetResult(interp, "Cannot use wildcard with compare command.\n",
 			NULL);
 	    return TCL_ERROR;
 	 }
-         name2 = tp->name;
+         name2 = tp2->name;
 
          if (dohierarchy) {
 	    RemoveCompareQueue();
@@ -2153,11 +2216,40 @@ _netcmp_compare(ClientData clientData,
       ConvertGlobals(name2, fnum2);
    }
 
-   CreateTwoLists(name1, fnum1, name2, fnum2, dolist);
-   while (PrematchLists(name1, fnum1, name2, fnum2) > 0) {
-      Fprintf(stdout, "Making another compare attempt.\n");
-      CreateTwoLists(name1, fnum1, name2, fnum2, dolist);
+   tp1 = LookupCellFile(name1, fnum1);
+   tp2 = LookupCellFile(name2, fnum2);
+
+   hascontents1 = HasContents(tp1);
+   hascontents2 = HasContents(tp2);
+
+   if (hascontents1 && !hascontents2 && (tp2->flags & CELL_PLACEHOLDER)) {
+       Fprintf(stdout, "\nCircuit 2 cell %s is a black box; will not flatten "
+                        "Circuit 1\n", name2);
    }
+   else if (hascontents2 && !hascontents1 && (tp1->flags & CELL_PLACEHOLDER)) {
+       Fprintf(stdout, "\nCircuit 1 cell %s is a black box; will not flatten "
+                        "Circuit 2\n", name1);
+   }
+   else if (!hascontents1 && !hascontents2 && (tp1->flags & CELL_PLACEHOLDER)
+		&& (tp2->flags & CELL_PLACEHOLDER)) {
+       /* Two empty subcircuits, don't flatten anything */
+       Fprintf(stdout, "\nCircuit 1 cell %s and Circuit 2 cell %s are black"
+			" boxes.\n", name1, name2);
+   }
+   else {
+       FlattenUnmatched(tp1, name1, 1, 0);
+       FlattenUnmatched(tp2, name2, 1, 0);
+       DescribeContents(name1, fnum1, name2, fnum2);
+
+       while (PrematchLists(name1, fnum1, name2, fnum2) > 0) {
+          Fprintf(stdout, "Making another compare attempt.\n");
+          Printf("Flattened mismatched instances and attempting compare again.\n");
+          FlattenUnmatched(tp1, name1, 1, 0);
+          FlattenUnmatched(tp2, name2, 1, 0);
+          DescribeContents(name1, fnum1, name2, fnum2);
+       }
+   }
+   CreateTwoLists(name1, fnum1, name2, fnum2, dolist);
 
    // Return the names of the two cells being compared, if doing "compare
    // hierarchical".  If "-list" was specified, then append the output
@@ -2390,6 +2482,8 @@ _netcmp_run(ClientData clientData,
 	 else {
 	    enable_interrupt();
 	    while (!Iterate() && !InterruptPending);
+	    ExhaustiveSubdivision = 1;
+	    while (!Iterate() && !InterruptPending);
 	    if (dolist) {
 	       result = _netcmp_verify(clientData, interp, 2, objv - 1);
 	    }
@@ -2408,38 +2502,40 @@ _netcmp_run(ClientData clientData,
 	 else {
 	    enable_interrupt();
 	    while (!Iterate() && !InterruptPending);
+	    ExhaustiveSubdivision = 1;
+	    while (!Iterate() && !InterruptPending);
 	    automorphisms = VerifyMatching();
-	    if (automorphisms == -1)
-	       Fprintf(stdout, "Netlists do not match.\n");
-	    else if (automorphisms == 0)
-	       Fprintf(stdout, "Netlists match uniquely.\n");
-	    else {
+	    if (automorphisms > 0) {
 	       // First try to resolve automorphisms uniquely using
 	       // property matching
 	       automorphisms = ResolveAutomorphsByProperty();
-	       if (automorphisms == 0)
-	          Fprintf(stdout, "Netlists match uniquely.\n");
-	       else {
-
+	       if (automorphisms > 0) {
 	          // Next, attempt to resolve automorphisms uniquely by
 	          // using the pin names
 		  automorphisms = ResolveAutomorphsByPin();
 	       }
-
-	       if (automorphisms == 0)
-	          Fprintf(stdout, "Netlists match uniquely.\n");
-	       else
+	       if (automorphisms > 0) {
 	          // Anything left is truly indistinguishable
-	          Fprintf(stdout, "Netlists match with %d symmetr%s.\n",
-				automorphisms, (automorphisms == 1) ? "y" : "ies");
-
-	       while ((automorphisms = ResolveAutomorphisms()) > 0);
-	       if (automorphisms == -1) Fprintf(stdout, "Netlists do not match.\n");
-		  else Fprintf(stdout, "Circuits match correctly.\n");
+		  while (ResolveAutomorphisms() > 0);
+	       }
 	    }
-	    if (PropertyErrorDetected) {
-	       Fprintf(stdout, "There were property errors.\n");
-	       PrintPropertyResults(dolist);
+
+	    if (automorphisms == -1)
+	       Fprintf(stdout, "Netlists do not match.\n");
+	    else if (automorphisms == -2)
+	       Fprintf(stdout, "Netlists match uniquely with port errors.\n");
+	    else {
+	       if (automorphisms == 0)
+	          Fprintf(stdout, "Netlists match uniquely");
+	       else
+	          Fprintf(stdout, "Netlists match with %d symmetr%s",
+				automorphisms, (automorphisms == 1) ? "y" : "ies");
+	       if (PropertyErrorDetected) {
+	          Fprintf(stdout, " with property errors.\n");
+	          PrintPropertyResults(dolist);
+	       }
+	       else
+		  Fprintf(stdout, ".\n");
 	    }
 	    disable_interrupt();
          }
@@ -2457,8 +2553,14 @@ _netcmp_run(ClientData clientData,
 /*		 all, or no option.			*/
 /* Formerly: v						*/
 /* Results:						*/
-/*	For only, equivalent, unique:  Return 1 if 	*/
-/*	verified, zero if not.				*/
+/*	For only, equivalent, unique:  Return 		*/
+/*	 1: verified					*/
+/*	 0: not verified				*/
+/*	-1: no elements or nodes			*/
+/*	-3: verified with property error		*/
+/*   equiv option					*/
+/*	-2: pin mismatch				*/
+/*							*/
 /* Side Effects:					*/
 /*	For options elements, nodes, and all without	*/
 /*	option -list:  Write output to log file.	*/
@@ -2549,8 +2651,18 @@ _netcmp_verify(ClientData clientData,
 	 disable_interrupt();
 	 if (index == EQUIV_IDX || index == UNIQUE_IDX)
 	     Tcl_SetObjResult(interp, Tcl_NewBooleanObj(0));
-	 else
+	 else {
 	     Fprintf(stdout, "Netlists do not match.\n");
+	     Fprintf(stdout, "Port matching may fail to disambiguate symmetries.\n");
+	 }
+      }
+      else if (automorphisms == -2) {
+	 if (index == EQUIV_IDX)
+	    Tcl_SetObjResult(interp, Tcl_NewBooleanObj(1));
+	 else if (index == UNIQUE_IDX)
+	    Tcl_SetObjResult(interp, Tcl_NewIntObj(-2));
+	 else if (index > 0)
+	    Fprintf(stdout, "Circuits match uniquely with port errors.\n");
       }
       else {
 	 if (automorphisms) {
@@ -2558,7 +2670,7 @@ _netcmp_verify(ClientData clientData,
 	        Tcl_SetObjResult(interp, Tcl_NewIntObj((int)automorphisms));
 	    else if (index == UNIQUE_IDX)
 	        Tcl_SetObjResult(interp, Tcl_NewBooleanObj(0));
-	    else
+	    else if (index > 0)
 	        Printf("Circuits match with %d symmetr%s.\n",
 			automorphisms, (automorphisms == 1) ? "y" : "ies");
 	 }
@@ -2567,11 +2679,13 @@ _netcmp_verify(ClientData clientData,
 		if (PropertyErrorDetected == 0)
 	           Tcl_SetObjResult(interp, Tcl_NewBooleanObj(1));
 	        else
-	           Tcl_SetObjResult(interp, Tcl_NewIntObj(2));
+	           Tcl_SetObjResult(interp, Tcl_NewIntObj(-3));
 	    }
-	    else {
+	    else if (index > 0) {
 	        Fprintf(stdout, "Circuits match uniquely.\n");
-		if (PropertyErrorDetected != 0)
+		if (PropertyErrorDetected == 0)
+		   Fprintf(stdout, ".\n");
+		else
 		   Fprintf(stdout, "Property errors were found.\n");
 	    }
 	 }
@@ -2789,11 +2903,13 @@ _netcmp_equate(ClientData clientData,
    char *name1 = NULL, *name2 = NULL, *optstart;
    struct nlist *tp1, *tp2, *SaveC1, *SaveC2;
    struct objlist *ob1, *ob2;
+   struct ElementClass *saveEclass = NULL;
+   struct NodeClass *saveNclass = NULL;
    int file1, file2;
-   int i, l1, l2, ltest, lent, dolist = 0;
+   int i, l1, l2, ltest, lent, dolist = 0, doforce = 0, dounique = 0;
    Tcl_Obj *tobj1, *tobj2, *tobj3;
 
-   if (objc > 1) {
+   while (objc > 1) {
       optstart = Tcl_GetString(objv[1]);
       if (*optstart == '-') optstart++;
       if (!strcmp(optstart, "list")) {
@@ -2801,6 +2917,18 @@ _netcmp_equate(ClientData clientData,
 	 objv++;
 	 objc--;
       }
+      else if (!strcmp(optstart, "force")) {
+	 doforce = 1;
+	 objv++;
+	 objc--;
+      }
+      else if (!strcmp(optstart, "unique")) {
+	 dounique = 1;
+	 objv++;
+	 objc--;
+      }
+      else
+	 break;
    }
 
    if ((objc != 2) && (objc != 4) && (objc != 6)) {
@@ -2958,6 +3086,12 @@ _netcmp_equate(ClientData clientData,
 	 break;
 
       case PINS_IDX:
+	 if ((ElementClasses != NULL) && (doforce == TRUE)) {
+	    saveEclass = ElementClasses;
+	    saveNclass = NodeClasses;
+	    ElementClasses = NULL;
+	    NodeClasses = NULL;
+	 }
 	 if ((ElementClasses == NULL) && (auto_blackbox == FALSE)) {
 	    if (CurrentCell == NULL) {
 		Fprintf(stderr, "Equate elements:  no current cell.\n");
@@ -2968,18 +3102,22 @@ _netcmp_equate(ClientData clientData,
 			(tp2->flags & CELL_PLACEHOLDER)) {
 		if (tp1->flags & CELL_PLACEHOLDER) {
 		    Fprintf(stdout, "Warning: Equate pins:  cell %s "
-			"has no definition, treated as a black box.\n", name1);
+			"is a placeholder, treated as a black box.\n", name1);
 		}
 		if (tp2->flags & CELL_PLACEHOLDER) {
 		    Fprintf(stdout, "Warning: Equate pins:  cell %s "
-			"has no definition, treated as a black box.\n", name2);
+			"is a placeholder, treated as a black box.\n", name2);
 		}
 		// If a cell in either circuit is marked as a black box, then
 		// the cells in both circuits should be marked as a black box.
 		tp1->flags |= CELL_PLACEHOLDER;
 		tp2->flags |= CELL_PLACEHOLDER;
 	    }
-	    else {
+	    else if (doforce != TRUE) {
+		/* When doforce is TRUE, ElementClass has been set to NULL
+		 * even though circuits contain elements, so this message
+		 * is not correct.
+		 */
 		Fprintf(stdout, "Equate pins:  cell %s and/or %s "
 			"has no elements.\n", name1, name2);
 		/* This is not necessarily an error, so go ahead and match pins. */
@@ -3011,6 +3149,13 @@ _netcmp_equate(ClientData clientData,
 	 else if (result > 0) {
 	    Fprintf(stdout, "Cell pin lists are equivalent.\n");
 	 }
+	 else if (result == -1) {
+	    Fprintf(stdout, "Cell pin lists for %s and %s do not match.\n",
+			name1, name2);
+	 }
+	 else if (result == -2) {
+	    Fprintf(stdout, "Attempt to match empty cell to non-empty cell.\n");
+	 }
 	 else {
 	    Fprintf(stdout, "Cell pin lists for %s and %s altered to match.\n",
 			name1, name2);
@@ -3020,6 +3165,12 @@ _netcmp_equate(ClientData clientData,
 	    /* Recover temporarily set global variables (see above) */
 	    Circuit1 = SaveC1;
 	    Circuit2 = SaveC2;
+
+	    /* Recover ElementClasses if forcing pins on mismatched circuits */
+	    if (doforce == TRUE) {
+	       ElementClasses = saveEclass;
+	       NodeClasses = saveNclass;
+	    }
 	 }
 	 break;
 
@@ -3200,19 +3351,9 @@ _netcmp_equate(ClientData clientData,
 		    return TCL_ERROR;
 		}
 	    }
-
-	    /* Now that all pins are assigned by name, reorder	*/
-	    /* the pin lists of the 2nd cell to match the	*/
-	    /* order of the 1st.				*/
-
-	    /* Reorder the pin lists of instances of the 2nd	*/
-	    /* cell to match the order of the 1st.		*/
-
-	    // pindata.cell2 = tp2;
-	    // RecurseCellHashTable2(pinorder, (void *)(&pindata));
 	 }
 
-	 if (EquivalenceClasses(tp1->name, file1, tp2->name, file2)) {
+	 if (EquivalenceClasses(tp1->name, file1, tp2->name, file2, dounique)) {
 	    Fprintf(stdout, "Device classes %s and %s are equivalent.\n",
 			tp1->name, tp2->name);
 	    Tcl_SetObjResult(interp, Tcl_NewBooleanObj(1));
@@ -3235,6 +3376,8 @@ _netcmp_equate(ClientData clientData,
 /*	add	  --- add new property			*/
 /*	remove	  --- delete existing property		*/
 /*	tolerance --- set property tolerance		*/
+/*	associate --- associate property with a pin	*/
+/*	topology  --- set exact/relaxed matching	*/
 /*	merge	  --- (deprecated)			*/
 /* or							*/
 /*	netgen::property default			*/
@@ -3273,19 +3416,19 @@ _netcmp_property(ClientData clientData,
 
     char *options[] = {
 	"add", "create", "remove", "delete", "tolerance", "merge", "serial",
-	"series", "parallel", NULL
+	"series", "parallel", "associate", "topology", NULL
     };
     enum OptionIdx {
 	ADD_IDX, CREATE_IDX, REMOVE_IDX, DELETE_IDX, TOLERANCE_IDX, MERGE_IDX,
-	SERIAL_IDX, SERIES_IDX, PARALLEL_IDX
+	SERIAL_IDX, SERIES_IDX, PARALLEL_IDX, ASSOCIATE_IDX, TOPOLOGY_IDX
     };
     int result, index, idx2;
 
     char *suboptions[] = {
-	"integer", "double", "value", "string", NULL
+	"integer", "double", "value", "string", "expression", NULL
     };
     enum SubOptionIdx {
-	INTEGER_IDX, DOUBLE_IDX, VALUE_IDX, STRING_IDX
+	INTEGER_IDX, DOUBLE_IDX, VALUE_IDX, STRING_IDX, EXPRESSION_IDX
     };
 
     /* Note: "merge" has been deprecated, but kept for backwards compatibility.	*/
@@ -3322,6 +3465,10 @@ _netcmp_property(ClientData clientData,
 	return TCL_ERROR;
     }
 
+    char *topo[] = {
+	"strict", "relaxed", NULL
+    };
+
     /* Check for special command "property default" */
     if ((objc == 2) && (!strcmp(Tcl_GetString(objv[1]), "default"))) {
 
@@ -3379,9 +3526,15 @@ _netcmp_property(ClientData clientData,
 	    GlobalParallelNone = FALSE;
 	    SetParallelCombine(TRUE);
 	}
+	else if (!strcmp(Tcl_GetString(objv[2]), "connected")) {
+	    GlobalParallelOpen = FALSE;
+	}
+	else if (!strcmp(Tcl_GetString(objv[2]), "open")) {
+	    GlobalParallelOpen = TRUE;
+	}
 	else {
-	    Tcl_SetResult(interp, "Bad option, should be property parallel none|all",
-			NULL);
+	    Tcl_SetResult(interp, "Bad option, should be property parallel "
+			"none|all|connected", NULL);
 	    return TCL_ERROR;
 	}
 	return TCL_OK;
@@ -3401,6 +3554,36 @@ _netcmp_property(ClientData clientData,
 	}
 	return TCL_OK;
     }
+    else if ((objc > 1) && (!strcmp(Tcl_GetString(objv[1]), "topology"))) {
+	if (objc == 2) {
+	    if (ExactTopology)
+		Tcl_SetResult(interp, "Strict topology property matching.",
+			NULL);
+	    else
+		Tcl_SetResult(interp, "Relaxed topology property matching.",
+			NULL);
+	}
+	else if (objc == 3) {
+	    if (Tcl_GetIndexFromObj(interp, objv[2],
+			(CONST84 char **)topo,
+			"topology", 0, &idx2) == TCL_OK) {
+		if (idx2 == 0)
+		    ExactTopology = TRUE;
+		else if (idx2 == 1)
+		    ExactTopology = FALSE;
+		else {
+		    Tcl_SetResult(interp, "Topology matching type must be "
+				"'strict' or 'relaxed'.", NULL);
+	    	    return TCL_ERROR;
+		}
+	    }
+	}
+	else {
+	    Tcl_WrongNumArgs(interp, 1, objv, "strict|relaxed");
+	    return TCL_ERROR;
+	}
+	return TCL_OK;
+    }
 
     result = CommonParseCell(interp, objv[1], &tp, &fnum);
     if (result != TCL_OK) return result;
@@ -3668,6 +3851,11 @@ _netcmp_property(ClientData clientData,
 			 		PropertyString(tp->name, fnum,
 						Tcl_GetString(tobj1), ival, NULL);
 					break;
+				case EXPRESSION_IDX:
+			 		PropertyString(tp->name, fnum,
+						Tcl_GetString(tobj1), 0,
+						Tcl_GetString(tobj3));
+					break;
 			    }
 			    break;
 		    }
@@ -3689,6 +3877,29 @@ _netcmp_property(ClientData clientData,
 		}
 		break;
 
+	    case ASSOCIATE_IDX:
+		if (objc == 3) {
+		    Tcl_WrongNumArgs(interp, 1, objv, "{property_key pin_name} ...");
+		    return TCL_ERROR;
+		}
+		for (i = 3; i < objc; i++) {
+		    // Each value must be a duplet
+		    result = Tcl_ListObjLength(interp, objv[i], &llen);
+		    if ((result != TCL_OK) || (llen != 2)) {
+			Tcl_SetResult(interp, "Not a {key pin} pair list.",
+					NULL);
+		    }
+		    else {
+			result = Tcl_ListObjIndex(interp, objv[i], 0, &tobj1);
+			if (result != TCL_OK) return result;
+			result = Tcl_ListObjIndex(interp, objv[i], 1, &tobj2);
+			if (result != TCL_OK) return result;
+			PropertyAssociatePin(tp->name, fnum, Tcl_GetString(tobj1),
+					Tcl_GetString(tobj2));
+		    }
+		}
+		break;
+
 	    case TOLERANCE_IDX:
 		if (objc == 3) {
 		    Tcl_WrongNumArgs(interp, 1, objv, "{property_key tolerance} ...");
@@ -3788,6 +3999,7 @@ _netcmp_property(ClientData clientData,
 		    }
 		}
 		break;
+
 	}
     }
     return TCL_OK;
@@ -3937,6 +4149,23 @@ _netcmp_permute(ClientData clientData,
    return TCL_OK;
 }
 
+/*------------------------------------------------------*/
+/* Function name: _netcmp_symmetry			*/
+/* Syntax: netgen::symmetry [fast|full]			*/
+/* Formerly: x						*/
+/* Results:						*/
+/* Side Effects:					*/
+/* Notes:  Deprecated, retained for compatibility.	*/
+/*------------------------------------------------------*/
+
+int
+_netcmp_symmetry(ClientData clientData,
+    Tcl_Interp *interp, int objc, Tcl_Obj *CONST objv[])
+{
+   Printf("Symmetry breaking method has been deprecated.\n");
+   return TCL_OK;
+}
+
 /*------------------------------------------------------*/
 /* Function name: _netcmp_exhaustive			*/
 /* Syntax: netgen::exhaustive [on|off]			*/
@@ -3958,7 +4187,7 @@ _netcmp_exhaustive(ClientData clientData,
    int result, index;
 
    if (objc == 1)
-      index = YES_IDX;
+      index = -1;
    else {
       if (Tcl_GetIndexFromObj(interp, objv[1], (CONST84 char **)yesno,
 		"option", 0, &index) != TCL_OK)