Yesterday's commit surfaced two errors in series; this fixes the

second one of them, which is a failure to change CurrentTail when
an extra (implicit) pin was added to the last component in the
current cell, resulting in the failure of Node() to add the new
no-connect node, which instead overwrites the pin just created.

VERSION

@@ -1 +1 @@
-1.5.226
+1.5.227

base/verilog.c

@@ -2228,11 +2228,13 @@ nextinst:
 			   obptr->next = nobj;
       			   HashPtrInstall(nobj->name, nobj, &(CurrentCell->objdict));
 
+			   /* Ensure that CurrentTail is correct */
+			   if (obptr == CurrentTail) CurrentTail = nobj;
+
 	           	   if (LookupObject(scan->net, CurrentCell) == NULL)
 			      Node(scan->net);
 	           	   join(scan->net, nobj->name);
 	             	   scan->flags |= PORT_FOUND;
-			   obptr = nobj;
 
 			   /* Now any previous instance of the same cell must	*/
 			   /* insert the same additional pin as a no-connect.	*/
@@ -2270,6 +2272,7 @@ nextinst:
 				 }
 			      }
 			   }
+			   obptr = obptr->next;
 		        }
 		        else {
 		           Fprintf(stderr, "Error:  Instance %s has pin %s which is "