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One correction to the last commit, to ensure that subcircuits 

which are MOSFETs are output into the .sim file in correct
G-D-S-B order.
This commit is contained in:
Tim Edwards 2023-10-26 20:50:43 -04:00
parent eabb898578
commit 25a0e12428
1 changed files with 21 additions and 3 deletions
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24
base/ext.c
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@ -607,7 +607,25 @@ void simCell(char *name, int filenum)
*writeLine = 'x';
*(writeLine + 1) = '\0';
mult = 1;
ob2 = ob;
/* Important---Need to look up the cell definition; if
* the first pin is "drain" then it is a FET, and pins
* get swapped from D-G-S-B to G-S-D-B. Source and drain
* are treated here as equivalent because the .sim format
* has no concept of an asymmetric source and drain.
*/
ob2 = tp2->cell;
if ((*matchfunc)(ob2->next->name, "gate"))
{
strcat(writeLine, " ");
strcat(writeLine, NodeAlias(tp, ob->next));
strcat(writeLine, " ");
strcat(writeLine, NodeAlias(tp, ob));
ob2 = ob->next->next;
}
else
ob2 = ob;
while (ob2 != NULL) {
strcat(writeLine, " ");
strcat(writeLine, NodeAlias(tp, ob2));
@ -786,9 +804,9 @@ char *ReadPrm(char *fname, int *fnum)
/* Create 4-terminal nfet subcircuit device record */
if (LookupCellFile(devicename, filenum) == NULL) {
CellDef(devicename, filenum);
Port("drain");
Port("gate");
Port("source");
Port("drain");
Port("bulk");
PropertyDouble(devicename, filenum, "l", 0.01, 0.0);
PropertyDouble(devicename, filenum, "w", 0.01, 0.0);
@ -807,9 +825,9 @@ char *ReadPrm(char *fname, int *fnum)
/* Create 4-terminal pfet subcircuit device record */
if (LookupCellFile(devicename, filenum) == NULL) {
CellDef(devicename, filenum);
Port("drain");
Port("gate");
Port("source");
Port("drain");
Port("well");
PropertyDouble(devicename, filenum, "l", 0.01, 0.0);
PropertyDouble(devicename, filenum, "w", 0.01, 0.0);