Made a correction to the flattening code, removed a duplicate
print statement, and clarified the messages about non-matching circuits at the end, all of them suggestions made by Mitch Bailey (see issue #34 on github).
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@ -567,7 +567,8 @@ proc netgen::lvs { name1 name2 {setupfile setup.tcl} {logfile comp.out} args} {
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netgen::flatten class "[lindex $endval 1] $fnum2"
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} else {
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netgen::log put " Continuing with black-boxed subcircuits $endval\n"
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lappend matcherr [lindex $endval 0]
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lappend matcherr [lindex $endval 0]"(1)"
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lappend matcherr [lindex $endval 1]"(2)"
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# Match pins
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netgen::log echo off
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if {$dolist == 1} {
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@ -609,16 +610,15 @@ proc netgen::lvs { name1 name2 {setupfile setup.tcl} {logfile comp.out} args} {
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} else {
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# Flatten the non-matching subcircuit (but not the top-level cells)
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if {[netgen::print queue] != {}} {
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if {([lsearch $noflat [lindex $endval 1]] == -1) &&
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if {([lsearch $noflat [lindex $endval 0]] == -1) &&
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([lsearch $noflat [lindex $endval 1]] == -1)} {
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netgen::log put " Flattening non-matched subcircuits $endval\n"
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netgen::flatten class "[lindex $endval 0] $fnum1"
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netgen::flatten class "[lindex $endval 1] $fnum2"
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} else {
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netgen::log put " Continuing with black-boxed subcircuits $endval\n"
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lappend matcherr [lindex $endval 0]
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netgen::log put " Continuing with black-boxed subcircuits $endval\n"
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lappend matcherr [lindex $endval 0]
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lappend matcherr [lindex $endval 0]"(1)"
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lappend matcherr [lindex $endval 1]"(2)"
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# Match pins
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netgen::log echo off
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if {$dolist == 1} {
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