Cary R
068f33b35a
Remove memory leak when multi-bit module path delays fail
2026-01-21 20:50:32 -08:00
Cary R
6651df6f2c
Update the vlog95 python tests to pass more options
2026-01-08 01:36:30 -08:00
Cary R
918976651a
Fixes for vlog95 generation and gold file updates
2026-01-06 23:02:55 -08:00
Cary R
e5943047da
Add preliminary support for Python vlog95 testing
2025-12-30 19:44:06 -08:00
Cary R
1c6f0e768a
Update vvp_reg.py to support strict, force-sv and with-valgrind
2025-11-22 13:31:27 -08:00
Martin Whitaker
1fdeb7b982
Add regression tests for $fmonitor tasks.
...
Also add a test for multiple $monitor task calls and $monitoron and
$monitoroff.
2025-10-05 12:37:30 +01:00
Cary R
b979441de2
Improve error messages when bad code is passed to the parser
2025-07-21 14:46:56 -07:00
Cary R
c7d37bcc21
Error when trying to elaborate a field of a simple variable
2025-07-16 23:37:14 -07:00
Cary R
eceb48e5d6
Add better error messages for output port elaboration issues
2025-07-16 22:37:49 -07:00
Cary R
30f1de9062
Elaborate input port default value expressions in the correct scope
2025-07-09 09:19:42 -07:00
Martin Whitaker
fd7029a299
Add regression tests for issue #1258 .
2025-07-05 22:52:52 +01:00
Cary R
f82c6c7b3a
Add missing gold and fix VHDL inout test
2025-07-01 00:04:09 -07:00
Cary R
a2ffbc307a
Validate the generate "loop" expressions
2025-06-21 16:58:30 -07:00
Martin Whitaker
b7f9be9370
Add regression test for issue #1242 .
2025-05-11 11:39:29 +01:00
Martin Whitaker
8cd7bb3584
Update gold files to match typo fix in previous commit.
2025-01-01 11:22:00 +00:00
Martin Whitaker
f3abd94e9b
Add regression test for issue #1184 .
...
This checks the temporary fix of outputing a suitable "sorry" message.
2024-12-31 17:15:19 +00:00
Martin Whitaker
0119f0d1e8
Add regression test for vvp quiet flag.
2024-12-31 15:05:38 +00:00
Cary R
03835c9d50
Report each line that has a var decl in an unnamed block
2024-12-28 20:51:30 -08:00
Cary R
788a94b310
Nested generate regions are illegal
2024-12-28 18:46:37 -08:00
Cary R
8edf14ae68
Check for primitive port mismatches and other error cleanup
2024-12-08 22:21:51 -08:00
Martin Whitaker
62727e8b2e
Add regression tests for packed/unpacked array parameter declarations.
...
These are currently unsupported, so should result in a compiler error.
2024-11-15 21:10:51 +00:00
Cary R
7a4e17661a
Fix gold file for br_gh1178a (repeat concatenation)
2024-11-09 17:22:40 -08:00
Cary R
00fcd58fab
A repeat concatenation cannot be used as a net l-value
2024-11-09 17:21:44 -08:00
Martin Whitaker
488fbfc412
Add regression tests for checking for-loops are fully specified in SV 2009-.
2024-07-13 11:37:23 +01:00
Martin Whitaker
5cbdff202e
Add regression tests for checking constant function call scopes.
2024-06-30 11:52:54 +01:00
Martin Whitaker
ef7f0a8f38
Add regression tests for early signal elaboration.
2024-04-06 10:19:00 +01:00
Martin Whitaker
f08ff895af
Add informational messages that point to declaration after use.
2024-02-25 16:12:31 +00:00
Martin Whitaker
d043c1fa44
Add regression tests for declare before use.
2024-02-20 08:46:28 +00:00
Martin Whitaker
2299fc1b2b
Add regression tests for mixed procedural/continuous assignments.
2024-02-03 22:24:22 +00:00
Martin Whitaker
53b8220b9f
Add extra regression tests for multiple drivers on uwires.
2024-02-03 22:23:45 +00:00
Martin Whitaker
cd2d4e9287
Improve error messages when multiple drivers are detected.
...
Distinguish between nets declared as uwires and variables.
2024-02-03 17:13:53 +00:00
Martin Whitaker
39753da458
Add regression test for disabling binary NAND and NOR operators.
2024-01-28 22:47:46 +00:00
Martin Whitaker
81d7abaf88
Add regression tests for checking wire data types (issue 1087).
2024-01-28 15:53:47 +00:00
Stephen Williams
71b9c551df
Move tests pr2509349a/b to the new test format.
...
This removes the regress-msys2.list file, fixes the output from the
pr2509349a.v test to not be different on different systems, and
documents the $readmempath task.
2024-01-21 15:49:09 -08:00
Lars-Peter Clausen
26d5cca784
ivtest: Remove outdated pr1963962 SystemVerilog mode gold file
...
Starting with commit 96df251c95 ("Suppress unnecessary VCD/LXT/LXT2
warnings about packages.") there is no longer a warning printed that the
unit scope can't be printed if it is empty.
Remove the special SystemVerilog mode gold file for the pr1963962 test that
expects this warning.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2024-01-13 19:07:44 -08:00
Martin Whitaker
7b99cd25ca
Add regression tests for suppressed VCD/LXT/LXT2 warnings (issue #710 )
2024-01-07 20:34:45 +00:00
Martin Whitaker
fa2dfe690c
Add regression test for synthesisable for loop check (issue #687 )
2024-01-07 13:23:36 +00:00
Cary R
b4b8006460
vpiFullname of a package should have a "::" after the name
2023-12-28 18:53:11 -08:00
Stephen Williams
56c5bf1da1
ivtest: Remove regress v11, v12, and v13
...
These tests lists are no longer needed.
2023-12-17 20:13:00 -08:00
Stephen Williams
c6df820ff9
Merge pull request #1043 from steveicarus/steveicarus/remove-regress-vams
...
vams: Remove the regress-vams test
2023-12-10 20:40:34 -08:00
Stephen Williams
3c65f5d750
vams: Remove the regress-vams test
...
Use the more sophisticated python based tests to run these tests, and
remove the verilog-vams list.
2023-12-10 20:06:46 -08:00
Stephen Williams
0be07afab3
ivtest: Remove the regress-v10 test list
...
This list is not needed with the new scheme. This means that some gold
files that are v10 specific are removed, as well as the list itself.
2023-12-10 19:05:12 -08:00
Cary R
987b7d1dc0
fread() support integral variables not just registers
2023-12-09 14:30:25 -08:00
Stephen Williams
bed166915f
ivtest: reformat some regression tests
...
This empties out the revress-ivl2.list
This includes the tests:
* always4A
* always4B
* br_gh383a
* br_gh383b
* br_gh383c
* br_gh383d
* ca_time_real
* delayed_sfunc
* localparam_type
* parameter_type
* pr1701890
* pr1864110a
* pr1864110b
2023-11-17 15:00:25 -08:00
mole99
023c5f2754
Add testcase with input and output vectors
2023-09-04 09:20:19 +02:00
Cary R
7e62a1b848
Update the gold file for br1005
2023-09-03 21:46:15 -07:00
mole99
665295ba00
Also enable -gspecify for interconnect tests
2023-08-30 15:13:18 +02:00
mole99
306e4cfa6b
Add three tests to exercise interconnection delays in designs
2023-08-23 12:56:11 +02:00
mole99
7beadb92f8
Framework of the INTERCONNECT implementation
2023-08-23 12:56:10 +02:00
Cary R
3aafa1333b
Update $ferror() and $fgets() to support SV strings
2023-07-19 00:30:50 -07:00