Also enable -gspecify for interconnect tests
This commit is contained in:
parent
11c944f5e9
commit
665295ba00
|
|
@ -1,9 +1,6 @@
|
|||
SDF ERROR: ivltests/sdf_interconnect1.sdf:32: Unable to match ModPath in -> out in top.my_design_inst.buffer0
|
||||
SDF ERROR: ivltests/sdf_interconnect1.sdf:42: Unable to match ModPath in -> out in top.my_design_inst.buffer1
|
||||
SDF ERROR: ivltests/sdf_interconnect1.sdf:52: Unable to match ModPath in -> out in top.my_design_inst.buffer2
|
||||
time=0 a=x b=x
|
||||
time=5000 a=0 b=x
|
||||
time=5080 a=0 b=0
|
||||
time=5680 a=0 b=0
|
||||
time=15000 a=1 b=0
|
||||
time=15080 a=1 b=1
|
||||
time=15680 a=1 b=1
|
||||
ivltests/sdf_interconnect1.v:59: $finish called at 25000 (1ps)
|
||||
|
|
|
|||
|
|
@ -1,9 +1,6 @@
|
|||
SDF ERROR: ivltests/sdf_interconnect2.sdf:31: Unable to match ModPath in -> out in top.my_design_inst.buffer0
|
||||
SDF ERROR: ivltests/sdf_interconnect2.sdf:41: Unable to match ModPath in -> out in top.my_design_inst.buffer1
|
||||
SDF ERROR: ivltests/sdf_interconnect2.sdf:51: Unable to match ModPath in -> out in top.my_design_inst.buffer2
|
||||
time=0 a=x b=x
|
||||
time=5000 a=0 b=x
|
||||
time=5010 a=0 b=0
|
||||
time=5110 a=0 b=0
|
||||
time=15000 a=1 b=0
|
||||
time=15030 a=1 b=1
|
||||
time=15330 a=1 b=1
|
||||
ivltests/sdf_interconnect2.v:61: $finish called at 25000 (1ps)
|
||||
|
|
|
|||
|
|
@ -1,24 +1,20 @@
|
|||
SDF ERROR: ivltests/sdf_interconnect3.sdf:41: Unable to match ModPath in -> out in top.my_design_inst.buffer0
|
||||
SDF ERROR: ivltests/sdf_interconnect3.sdf:51: Unable to match ModPath in -> out in top.my_design_inst.buffer1
|
||||
SDF ERROR: ivltests/sdf_interconnect3.sdf:61: Unable to match ModPath in -> out in top.my_design_inst.buffer2
|
||||
SDF ERROR: ivltests/sdf_interconnect3.sdf:71: Unable to match ModPath in -> out in top.my_design_inst.buffer3
|
||||
time=0 a=x b=x c=x d=x
|
||||
time=10000 a=0 b=0 c=0 d=x
|
||||
time=10060 a=0 b=0 c=0 d=0
|
||||
time=10560 a=0 b=0 c=0 d=0
|
||||
time=20000 a=1 b=0 c=0 d=0
|
||||
time=20060 a=1 b=0 c=0 d=1
|
||||
time=20560 a=1 b=0 c=0 d=1
|
||||
time=30000 a=0 b=1 c=0 d=1
|
||||
time=30050 a=0 b=1 c=0 d=0
|
||||
time=30450 a=0 b=1 c=0 d=0
|
||||
time=40000 a=1 b=1 c=0 d=0
|
||||
time=40060 a=1 b=1 c=0 d=1
|
||||
time=40560 a=1 b=1 c=0 d=1
|
||||
time=50000 a=0 b=0 c=1 d=1
|
||||
time=50040 a=0 b=0 c=1 d=0
|
||||
time=50050 a=0 b=0 c=1 d=1
|
||||
time=50060 a=0 b=0 c=1 d=0
|
||||
time=50340 a=0 b=0 c=1 d=0
|
||||
time=50450 a=0 b=0 c=1 d=1
|
||||
time=50560 a=0 b=0 c=1 d=0
|
||||
time=60000 a=1 b=0 c=1 d=0
|
||||
time=60060 a=1 b=0 c=1 d=1
|
||||
time=60560 a=1 b=0 c=1 d=1
|
||||
time=70000 a=0 b=1 c=1 d=1
|
||||
time=70050 a=0 b=1 c=1 d=0
|
||||
time=70450 a=0 b=1 c=1 d=0
|
||||
time=80000 a=1 b=1 c=1 d=0
|
||||
time=80060 a=1 b=1 c=1 d=1
|
||||
time=80560 a=1 b=1 c=1 d=1
|
||||
ivltests/sdf_interconnect3.v:132: $finish called at 90000 (1ps)
|
||||
|
|
|
|||
|
|
@ -38,7 +38,7 @@
|
|||
(INSTANCE buffer0)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH in out (0.1:0.2:0.3) (0.1:0.2:0.3))
|
||||
(IOPATH in out (0.0:0.1:0.0) (0.0:0.1:0.0))
|
||||
)
|
||||
)
|
||||
)
|
||||
|
|
@ -48,7 +48,7 @@
|
|||
(INSTANCE buffer1)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH in out (0.1:0.2:0.3) (0.1:0.2:0.3))
|
||||
(IOPATH in out (0.0:0.1:0.0) (0.0:0.1:0.0))
|
||||
)
|
||||
)
|
||||
)
|
||||
|
|
@ -58,7 +58,7 @@
|
|||
(INSTANCE buffer2)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH in out (0.1:0.2:0.3) (0.1:0.2:0.3))
|
||||
(IOPATH in out (0.0:0.1:0.0) (0.0:0.1:0.0))
|
||||
)
|
||||
)
|
||||
)
|
||||
|
|
@ -68,7 +68,51 @@
|
|||
(INSTANCE buffer3)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH in out (0.1:0.2:0.3) (0.1:0.2:0.3))
|
||||
(IOPATH in out (0.0:0.1:0.0) (0.0:0.1:0.0))
|
||||
)
|
||||
)
|
||||
)
|
||||
|
||||
(CELL
|
||||
(CELLTYPE "my_xor")
|
||||
(INSTANCE my_xor0)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH a out (0.0:0.1:0.0) (0.0:0.1:0.0))
|
||||
(IOPATH b out (0.0:0.1:0.0) (0.0:0.1:0.0))
|
||||
)
|
||||
)
|
||||
)
|
||||
|
||||
(CELL
|
||||
(CELLTYPE "my_xor")
|
||||
(INSTANCE my_xor1)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH a out (0.0:0.1:0.0) (0.0:0.1:0.0))
|
||||
(IOPATH b out (0.0:0.1:0.0) (0.0:0.1:0.0))
|
||||
)
|
||||
)
|
||||
)
|
||||
|
||||
(CELL
|
||||
(CELLTYPE "my_xor")
|
||||
(INSTANCE my_xor2)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH a out (0.0:0.1:0.0) (0.0:0.1:0.0))
|
||||
(IOPATH b out (0.0:0.1:0.0) (0.0:0.1:0.0))
|
||||
)
|
||||
)
|
||||
)
|
||||
|
||||
(CELL
|
||||
(CELLTYPE "my_xor")
|
||||
(INSTANCE my_xor3)
|
||||
(DELAY
|
||||
(ABSOLUTE
|
||||
(IOPATH a out (0.0:0.1:0.0) (0.0:0.1:0.0))
|
||||
(IOPATH b out (0.0:0.1:0.0) (0.0:0.1:0.0))
|
||||
)
|
||||
)
|
||||
)
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
{
|
||||
"type" : "normal",
|
||||
"source" : "sdf_interconnect1.v",
|
||||
"iverilog-args" : [ "-Ttyp", "-ginterconnect" ],
|
||||
"iverilog-args" : [ "-Ttyp", "-ginterconnect", "-gspecify" ],
|
||||
"gold" : "sdf_interconnect1"
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
{
|
||||
"type" : "normal",
|
||||
"source" : "sdf_interconnect2.v",
|
||||
"iverilog-args" : [ "-Ttyp", "-ginterconnect" ],
|
||||
"iverilog-args" : [ "-Ttyp", "-ginterconnect", "-gspecify" ],
|
||||
"gold" : "sdf_interconnect2"
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
{
|
||||
"type" : "normal",
|
||||
"source" : "sdf_interconnect3.v",
|
||||
"iverilog-args" : [ "-Ttyp", "-ginterconnect" ],
|
||||
"iverilog-args" : [ "-Ttyp", "-ginterconnect", "-gspecify" ],
|
||||
"gold" : "sdf_interconnect3"
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue