stefan schippers
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19757ddd8a
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add menu properties -> Edit header/License text, to allow inserting header or license metadata into the sch/sym file.
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2023-01-02 03:04:35 +01:00 |
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stefan schippers
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383dc03696
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doc updates (dev info)
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2022-12-21 23:07:30 +01:00 |
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stefan schippers
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745a8f25eb
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revert comp symbol attrs
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2022-12-20 01:04:15 +01:00 |
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stefan schippers
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9fa05afad9
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fix a bug when loading multiple AC sim datasets (wrong nvars calculation, has to be doubled due to Im/Re complex components)
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2022-12-20 01:01:58 +01:00 |
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stefan schippers
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2cb58c5c5c
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added generators/ dir, removed redundant variable in load_schematic()
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2022-12-19 23:05:09 +01:00 |
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stefan schippers
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1a76f89464
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added xschem_library/generators directory for future schematic/symbol generator scripts. Handle empty XSCHEM_LIBRARY_PATH (use [pwd]).
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2022-12-18 13:03:38 +01:00 |
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stefan schippers
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b23988ccdf
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added commented lines for antialiasing; JL:cairo_set_line_width should only be called with has_x as xctx->cairo_ctx and xctx->cairo_save_ctx is NULL when run with -x; JL:XCopyArea must be called to draw correctly with Cairo on Windows
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2022-12-02 16:43:01 +01:00 |
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stefan schippers
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609033e7ca
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fix regression (not allowing to change text size)
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2022-11-23 16:57:21 +01:00 |
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Stefan Schippers
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e7851d01db
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"xschem set format <fmt_attribute>" will change netlisting format attribute instead of default "format" (or verilog_format or vhdl_format), however fallback to default netlisting rule attribute if not defined in symbol. add tcl function "from_eng <n>" to convert spice formatted numbers to floating point
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2022-11-23 16:16:38 +01:00 |
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Stefan Frederik
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6cd9d76f90
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initial implementation of fetch schematics from web
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2022-11-15 01:17:33 +01:00 |
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Stefan Frederik
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3d49ca63c9
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avoid tcleval() of strings returned by translate2(), show currents of resistors and diodes when annotating.
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2022-11-04 13:35:06 +01:00 |
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Stefan Frederik
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b98d836be3
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devices/simulator_commands.sym: avoid recursive @param substitution in spice commands
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2022-11-03 11:00:15 +01:00 |
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Stefan Frederik
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b36cd99e01
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update simulator_commands.sym (missing close parenthesis at end, not causing any problem though)
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2022-11-02 23:11:23 +01:00 |
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Stefan Frederik
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98d59cd8e9
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better handle xyce nodes in ngspice:: functions
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2022-11-02 11:17:22 +01:00 |
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Stefan Frederik
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666b0ebd5b
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show @path in title.sym
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2022-11-01 13:26:22 +01:00 |
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Stefan Frederik
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b1f011f933
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clean up testing @path in symbols
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2022-11-01 13:17:51 +01:00 |
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Stefan Frederik
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b0a88325e7
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"@path" will be expanded in symbols with the hierarchy path, so a fully qualified instance name is obtained with @path@name
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2022-11-01 12:54:43 +01:00 |
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Stefan Frederik
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4f1d84054f
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update test schematic (better screen redraw if moving while simulating)
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2022-10-27 10:09:19 +02:00 |
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Stefan Frederik
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4c43e77818
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eliminated hide=true attribute for backannotation current/voltage texts (will be hidden anyway if no sim data is loaded)
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2022-10-24 17:28:39 +02:00 |
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Stefan Frederik
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18044abb3e
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iopin.sym micro edit
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2022-10-24 17:06:54 +02:00 |
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Stefan Frederik
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b3832bbe56
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doc updates (tutorial_use_existing_subckt.html)
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2022-10-22 22:52:55 +02:00 |
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Stefan Frederik
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bbf8d68681
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example update for op backannotation
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2022-10-22 11:05:30 +02:00 |
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Stefan Frederik
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8575859c63
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doc updates (2) (op backannotation)
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2022-10-22 11:03:40 +02:00 |
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Stefan Frederik
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edf33192a2
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doc updates (op backannotation)
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2022-10-22 10:39:44 +02:00 |
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Stefan Frederik
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a451179d05
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test schematics update
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2022-10-21 11:28:17 +02:00 |
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Stefan Frederik
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e34211368f
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translate2() fix recursive param substitution
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2022-10-20 23:31:02 +02:00 |
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Stefan Frederik
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bc33261f90
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better parsing xxx='<expr>' or xxx={expr} patterns in flatten.awk. Doc upcates, test circuit updates.
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2022-10-20 20:25:49 +02:00 |
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Stefan Frederik
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77e4909ca4
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example solar_panel.sch update
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2022-10-19 23:59:11 +02:00 |
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Stefan Frederik
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b8732f2321
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ipin,iopin,opin reshaped to better show connection hotspot
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2022-10-19 10:37:43 +02:00 |
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Stefan Frederik
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dad83010f0
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perf. improvements in plot_raw_custom_data() / ravg_store()
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2022-10-17 15:17:47 +02:00 |
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Stefan Frederik
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ea359b8c92
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added poweramp_lcc
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2022-10-17 13:35:01 +02:00 |
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Stefan Frederik
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aa6b8f0123
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Doc updates (sim_pinnumber), example circuits update
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2022-10-17 12:45:48 +02:00 |
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Stefan Frederik
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b0359d880a
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use sim_pinnumber for port ordering in simulation netlists and leave pinnumber for package pin position. These two collide, for example in spice port ordering vs (transistor problem) device package pinnumbers. Dont load graphs in lcc symbols
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2022-10-17 12:05:54 +02:00 |
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Stefan Frederik
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fc576f69ac
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sort symbol pins if key pinnumber is present on all of them
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2022-10-16 16:18:38 +02:00 |
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Stefan Frederik
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91ba5fd1d3
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annotation of voltage and currents in (nested) LCC instances
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2022-10-16 13:08:52 +02:00 |
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Stefan Frederik
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e14c8b9a11
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wire labels: default name set to p1 instead of l1, so it will not clash with typical inductor names
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2022-10-12 16:36:56 +02:00 |
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Stefan Frederik
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a820cc2e3f
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removed (now) duplicated inst_hash_lookup: use int_hash_lookup. Search function does not highlight nets if searching for something that is not "lab"
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2022-10-12 13:14:48 +02:00 |
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Stefan Frederik
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7a1fbb4809
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better check_unique_names() and hash_all_names() implementation (do not skip label instances or instances with no format attr). Button click focuses main drawing window even if autofocus_mainwindow is set to 0, to avoid losing keyboard focus forever if TAB is pressed.
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2022-10-12 11:56:02 +02:00 |
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Stefan Frederik
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7d016eab28
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small netlist syntax fix in token.c (correctly skip VHDL time attributes), tedax backend: avoid printing mapping comments for duplicated pins
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2022-10-12 09:32:37 +02:00 |
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Stefan Frederik
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662c14143d
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update xschemtest, more robust spice flatten.awk netlist flattener, specifically when translating expressions containing electrical nodes and parameters, all these need to be translated/substituted.
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2022-10-12 01:16:23 +02:00 |
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Stefan Frederik
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ce75ca2bbf
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make examples/test_doublepin.sch compile with no errors with ngspice, ghdl and iverilog, this is a test schematic to validate pass-through symbols
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2022-10-11 14:25:58 +02:00 |
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Stefan Frederik
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3f627123b2
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persists highlights on instances: remove highlighted instance from hash if user selects and presses ctrl-k as it is done for nets. Avoid instance highlight to also highlight net with identical name (example instance x1 and net x1). Verilog and Vhdl netlists handle duplicated (pass-through) pins
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2022-10-11 13:12:17 +02:00 |
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Stefan Frederik
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a0be0c31c1
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fix LCC_instances.sch test schematic
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2022-10-10 16:21:58 +02:00 |
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Stefan Frederik
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68bf5e4640
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netlister code rewrite to allow any combination of pass-through symbols
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2022-10-10 14:54:32 +02:00 |
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Stefan Frederik
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6be0fc392b
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refactoring of netlister code
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2022-10-07 23:29:42 +02:00 |
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Stefan Frederik
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945a26c8f6
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handle pass-through symbols chained with wires and no labels attached to wires
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2022-10-06 11:48:22 +02:00 |
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Stefan Frederik
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5fe2f1586b
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refactor str_hash_* and int_hash_* functions
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2022-10-05 01:18:45 +02:00 |
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Stefan Frederik
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1c407e5dd6
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faster implementation of name_pass_through_nets() so almost zero overhead when netlisting big circuits with no pass-thru symbols
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2022-10-04 15:39:45 +02:00 |
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Stefan Frederik
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9c29324c8a
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allow nets with no label pass thru symbols with duplicated pins. named nets will propagate through duplicated pins
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2022-10-04 12:34:09 +02:00 |
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Stefan Frederik
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4bbed85d23
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faster jump table in plot_raw_custom_data(), added simulation->add waveform reload launcher
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2022-10-03 11:15:14 +02:00 |