hadirkhan10
|
042bfcabea
|
added the custom cell definition
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2023-10-31 23:24:21 -07:00 |
|
Hadir Khan
|
b65ebc6160
|
corrected the import statement and removed strap variant attribute which is no longer needed
|
2023-10-31 23:24:21 -07:00 |
|
SWalker
|
1f35855c6d
|
remove old rom test
|
2023-10-31 23:24:21 -07:00 |
|
SWalker
|
9b99e6c124
|
bunch of cleanups to core rom classes
|
2023-10-31 23:24:21 -07:00 |
|
SWalker
|
ddba3b3718
|
move vdd pins around to make routing nice
|
2023-10-31 23:24:21 -07:00 |
|
SWalker
|
5c22e382b5
|
add parameter to make routing horizonal vdd rails easier
|
2023-10-31 23:24:21 -07:00 |
|
SWalker
|
4b3af38727
|
change min rail to contact spacing for long gf180 contact extend
|
2023-10-31 23:24:21 -07:00 |
|
SWalker
|
565e3f6814
|
flatten ptx in extraction and renumber test based on importance
|
2023-10-31 23:24:21 -07:00 |
|
SWalker
|
3271c5e73c
|
fixing drc on rom bank, mostly spacing tweaks
|
2023-10-31 23:24:21 -07:00 |
|
SWalker
|
75f7a5847f
|
fixing contact placement for gf180 in rom
|
2023-10-31 23:24:21 -07:00 |
|
Sage Walker
|
b279791762
|
added control buf test
|
2023-10-31 23:24:21 -07:00 |
|
SWalker
|
a544abebf7
|
fixed contact area issue
|
2023-10-31 23:24:21 -07:00 |
|
SWalker
|
20d0df2947
|
more boundary on the other side
|
2023-10-31 23:24:21 -07:00 |
|
Sage Walker
|
cb8567c66f
|
spacing tweaks for gf180 address control gate
|
2023-10-31 23:24:21 -07:00 |
|
SWalker
|
d940c0e03d
|
little more boundary
|
2023-10-31 23:24:21 -07:00 |
|
SWalker
|
23611f8fac
|
little more nwell
|
2023-10-31 23:24:21 -07:00 |
|
SWalker
|
e3b51360f3
|
extend nwell on nand
|
2023-10-31 23:24:21 -07:00 |
|
SWalker
|
ea703d124f
|
switched input pins on nand
|
2023-10-31 23:24:21 -07:00 |
|
SWalker
|
07fa78e00c
|
boundary shift for implant spacing
|
2023-10-31 23:24:21 -07:00 |
|
SWalker
|
dba75fc57c
|
boundary and alignment of nand
|
2023-10-31 23:24:21 -07:00 |
|
SWalker
|
9ac94d1744
|
even more nand
|
2023-10-31 23:24:21 -07:00 |
|
SWalker
|
0aa9c47f89
|
more nand
|
2023-10-31 23:24:21 -07:00 |
|
SWalker
|
8ac30f4ef5
|
proper gds for nand
|
2023-10-31 23:24:21 -07:00 |
|
SWalker
|
416140d04a
|
nand dup pin
|
2023-10-31 23:24:21 -07:00 |
|
SWalker
|
8c56478df3
|
more nand tweaks
|
2023-10-31 23:24:21 -07:00 |
|
SWalker
|
13459cb6dd
|
boundary box tweaks on dec nand
|
2023-10-31 23:24:21 -07:00 |
|
SWalker
|
88782b0a58
|
rotated nand2_dec
|
2023-10-31 23:24:21 -07:00 |
|
SWalker
|
4bb586c949
|
decoder nand custom cell
|
2023-10-31 23:24:21 -07:00 |
|
Sage Walker
|
d6cb15c82d
|
Switched to GF180D for extra metal layers, Fixed drc parameters so contacts are valid. ptx.py modified to achieve proper layer placement with gf180. ROM array and precharge DRC clean.
|
2023-10-31 23:24:21 -07:00 |
|
Sage Walker
|
0040efb86f
|
workaround for magic drc in gf180
|
2023-10-31 23:24:21 -07:00 |
|
Sage Walker
|
b0a0226e87
|
rom array compatability changes
|
2023-10-31 23:24:21 -07:00 |
|
Sage Walker
|
1255a81487
|
ROM binary file support
|
2023-10-31 23:24:21 -07:00 |
|
Sage Walker
|
c09a981734
|
make pdk uses conda for gf180 with configure options for local pdk sources
|
2023-10-31 23:24:21 -07:00 |
|
Hadir Khan
|
698020301c
|
updates to add the port order overwrite attribute, ignore drc/lvs attribute and pwell as a non-routing layer
|
2023-10-31 23:24:21 -07:00 |
|
Hadir Khan
|
7ce11eba52
|
added pwell as a non-routing layer
|
2023-10-31 23:24:21 -07:00 |
|
hadirkhan10
|
b9fd172e44
|
corrected the pin mapping
|
2023-10-31 23:24:21 -07:00 |
|
hadirkhan10
|
de7a248ff0
|
added the cell property definitions
|
2023-10-31 23:24:21 -07:00 |
|
Hadir Khan
|
81b62ab13b
|
added gf180mcu as the test tech target
|
2023-10-31 23:24:21 -07:00 |
|
Hadir Khan
|
8a5b0b4898
|
updated the open_pdks commit and added the gf180 pdk build target
|
2023-10-31 23:24:21 -07:00 |
|
Jesse Cirimelli-Low
|
a904874978
|
passing gf180 parameterized gate tests
|
2023-10-31 23:24:21 -07:00 |
|
Jesse Cirimelli-Low
|
d18a4f8c7c
|
additional tech commits
|
2023-10-31 23:24:21 -07:00 |
|
Jesse Cirimelli-Low
|
a18d62c430
|
rename gf180 to gf180mcu
|
2023-10-31 23:24:21 -07:00 |
|
mrg
|
06058e1b87
|
Initial files for gf180
|
2023-10-31 23:24:21 -07:00 |
|
vlsida-bot
|
decfd7ff4f
|
Bump version: 1.2.40 -> 1.2.41
v1.2.41
|
2023-11-01 02:31:22 +00:00 |
|
Jesse Cirimelli-Low
|
788d7e5474
|
fix VPB/VNB pins not being found
|
2023-10-31 18:07:35 -07:00 |
|
vlsida-bot
|
3113798b13
|
Bump version: 1.2.39 -> 1.2.40
v1.2.40
|
2023-10-06 02:12:26 +00:00 |
|
Eren Dogan
|
fe379297be
|
Add timestamps to the log file
|
2023-10-05 14:55:05 -07:00 |
|
vlsida-bot
|
6a6ac026db
|
Bump version: 1.2.38 -> 1.2.39
v1.2.39
|
2023-09-28 19:50:40 +00:00 |
|
Sam Crow
|
a5412902c6
|
all control logic tests pass now
|
2023-09-27 16:38:57 -07:00 |
|
vlsida-bot
|
1b13d4369e
|
Bump version: 1.2.37 -> 1.2.38
v1.2.38
|
2023-09-27 23:25:24 +00:00 |
|