mirror of https://github.com/VLSIDA/OpenRAM.git
decoder nand custom cell
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magic
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tech gf180mcuD
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magscale 1 10
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timestamp 1694471735
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<< nwell >>
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rect 0 674 620 1392
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<< nmos >>
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rect 220 210 280 380
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rect 330 210 390 380
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<< pmos >>
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rect 190 764 250 1104
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rect 360 764 420 1104
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<< ndiff >>
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rect 120 318 220 380
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rect 120 272 142 318
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rect 188 272 220 318
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rect 120 210 220 272
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rect 280 210 330 380
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rect 390 318 490 380
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rect 390 272 422 318
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rect 468 272 490 318
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rect 390 210 490 272
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<< pdiff >>
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rect 90 1051 190 1104
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rect 90 817 112 1051
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rect 158 817 190 1051
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rect 90 764 190 817
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rect 250 1051 360 1104
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rect 250 817 282 1051
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rect 328 817 360 1051
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rect 250 764 360 817
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rect 420 1051 520 1104
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rect 420 817 452 1051
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rect 498 817 520 1051
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rect 420 764 520 817
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<< ndiffc >>
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rect 142 272 188 318
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rect 422 272 468 318
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<< pdiffc >>
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rect 112 817 158 1051
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rect 282 817 328 1051
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rect 452 817 498 1051
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<< psubdiff >>
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rect 540 159 620 180
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rect 540 113 557 159
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rect 603 113 620 159
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rect 540 73 620 113
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<< nsubdiff >>
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rect 436 1233 543 1250
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rect 436 1187 473 1233
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rect 519 1187 543 1233
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rect 436 1170 543 1187
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<< psubdiffcont >>
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rect 557 113 603 159
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<< nsubdiffcont >>
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rect 473 1187 519 1233
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<< polysilicon >>
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rect 190 1104 250 1154
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rect 360 1104 420 1154
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rect 190 470 250 764
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rect 360 470 420 764
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rect 190 430 280 470
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rect 220 380 280 430
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rect 330 430 420 470
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rect 330 380 390 430
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rect 220 170 280 210
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rect 180 149 280 170
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rect 180 103 207 149
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rect 253 103 280 149
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rect 180 87 280 103
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rect 330 170 390 210
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rect 330 149 430 170
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rect 330 103 346 149
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rect 392 103 430 149
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rect 330 87 430 103
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<< polycontact >>
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rect 207 103 253 149
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rect 346 103 392 149
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<< metal1 >>
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rect 470 1236 522 1248
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rect 112 1164 330 1210
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rect 112 1051 158 1062
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rect 280 1051 330 1164
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rect 470 1137 522 1184
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rect 158 966 164 978
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rect 158 902 164 914
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rect 112 806 158 817
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rect 280 817 282 1051
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rect 328 817 330 1051
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rect 452 1051 498 1062
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rect 446 966 452 978
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rect 446 902 452 914
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rect 280 450 330 817
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rect 452 806 498 817
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rect 140 400 330 450
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rect 140 318 190 400
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rect 140 272 142 318
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rect 188 272 190 318
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rect 140 210 190 272
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rect 422 324 480 347
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rect 474 272 480 324
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rect 422 240 480 272
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rect 544 162 614 178
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rect 155 149 267 152
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rect 155 103 207 149
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rect 253 103 267 149
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rect 155 100 267 103
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rect 332 149 451 152
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rect 332 103 346 149
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rect 392 103 451 149
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rect 332 100 451 103
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rect 544 110 554 162
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rect 606 110 614 162
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rect 544 79 614 110
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<< via1 >>
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rect 470 1233 522 1236
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rect 470 1187 473 1233
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rect 473 1187 519 1233
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rect 519 1187 522 1233
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rect 470 1184 522 1187
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rect 112 914 158 966
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rect 158 914 164 966
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rect 446 914 452 966
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rect 452 914 498 966
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rect 422 318 474 324
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rect 422 272 468 318
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rect 468 272 474 318
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rect 554 159 606 162
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rect 554 113 557 159
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rect 557 113 603 159
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rect 603 113 606 159
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rect 554 110 606 113
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<< metal2 >>
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rect 468 1236 524 1248
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rect 468 1184 470 1236
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rect 522 1184 524 1236
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rect 468 968 524 1184
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rect 60 966 572 968
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rect 60 914 112 966
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rect 164 914 446 966
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rect 498 914 572 966
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rect 60 912 572 914
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rect 60 324 608 326
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rect 60 272 422 324
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rect 474 272 608 324
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rect 60 270 608 272
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rect 552 162 608 270
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rect 552 110 554 162
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rect 606 110 608 162
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rect 552 88 608 110
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<< labels >>
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rlabel metal1 s 230 126 230 126 4 B
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rlabel metal1 s 369 126 369 126 4 A
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rlabel metal1 s 135 1187 135 1187 4 Y
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rlabel metal2 s 547 940 547 940 4 VDD
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rlabel metal2 s 524 298 524 298 4 GND
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<< properties >>
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string FIXED_BBOX 0 0 620 1392
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<< end >>
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@ -0,0 +1,6 @@
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.subckt gf180mcu_3v3__nand2_1_dec A B Y VDD VSS
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X0 VDD B Y VDD pfet_03p3 w=1.7u l=0.3u
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X1 Y A VDD VDD pfet_03p3 w=1.7u l=0.3u
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X2 a_28_21# A Y VSS nfet_03p3 w=0.85u l=0.3u
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X3 VSS B a_28_21# VSS nfet_03p3 w=0.85u l=0.3u
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.ends
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@ -53,6 +53,8 @@ cell_properties.ptx.model_is_subckt = True
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cell_properties.use_strap = True
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cell_properties.strap_placement = 8 # this means strap cell gets placed after every 8 bitcells
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cell_properties.names["nand2_dec"] = ["gf180mcu_3v3__nand2_1_dec"]
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###################################################
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# Custom layer properties
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###################################################
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