Commit Graph

532 Commits

Author SHA1 Message Date
stefan schippers bfc60add06 tab context menu: Do not use saved file to decide if symbol or schematic. Use netlist_type 2023-10-26 08:29:52 +02:00
stefan schippers 8c10ecb8b7 schematic example updates 2023-10-24 10:29:39 +02:00
stefan schippers 4beb2d08a6 update example schematics 2023-10-24 00:07:36 +02:00
stefan schippers a65cd534b7 update circuit examples 2023-10-23 18:41:13 +02:00
stefan schippers 2aeafac85c if selecting a waweform dataset with `t` key update text floaters that might contain the dataset information. When closing the process list dialog also close the process status sub-dialog. 2023-10-23 16:03:27 +02:00
stefan schippers 8f3fedab1f fix a bug when closing with ctrl-q (ie from callback(), calling proc quit_xschem) and there are multiple windows, some with changed data (switch_tab() was skipped due to xctx->semaphore). Process status dialog window will not be updated if vertical slider is not positioned to bottom 2023-10-22 02:53:03 +02:00
stefan schippers 109cef6c52 detect if program started in background and detach from console 2023-10-21 11:37:59 +02:00
stefan schippers 99f31e4535 periodic update of process status dialog, updated delta_sigma and rom8k examples for allowing batch mode ngspice run 2023-10-21 10:58:02 +02:00
stefan schippers e603a71651 fix typo 2023-10-21 10:07:31 +02:00
stefan schippers 2e4e754a3e add context menu entries for rotate and flip selection, add basic sub-process control in Simulation menu, enabled again Rotate and Flip from Edit menu, fix svg export from CLI (was resetting line width), add cascade menus in Simulation 2023-10-21 09:27:02 +02:00
stefan schippers 52572a6ca4 update cmos_example.sch 2023-10-17 18:16:48 +02:00
stefan schippers d41504011b revert solar_panel.sch changes for full y zoom tests 2023-10-17 16:42:35 +02:00
stefan schippers 025454e79e fix a regression in graph_fullyzoom() if graph contains more than one expression 2023-10-17 16:39:25 +02:00
stefan schippers 306c5d0d15 fix two small memory leaks, doc updates (xschem raw command) Raw.filename renamed to Raw.rawfile 2023-10-17 16:08:27 +02:00
stefan schippers b165720bc8 allow loading more and different analyses from the same raw file. Implied tcleval() in rawfile given in graphdialog, transform multiple saved OP sims into a dc sweep. 2023-10-17 14:00:43 +02:00
stefan schippers 745e3fc5f4 update cmos_example.sch 2023-10-17 00:56:49 +02:00
stefan schippers 8cfd51d8f9 add the ability to load multiple raw files with different analyses in a single schematic ( extra_rawfile() ) 2023-10-17 00:42:31 +02:00
stefan schippers f10555917e optimized usage of interpolate_yval(), add raw->cursor_b_val[] 2023-10-16 09:53:03 +02:00
stefan schippers 53286346e1 doc updates, tcl rawfile variable in place for future per-graph raw file 2023-10-14 23:41:19 +02:00
stefan schippers 63bc486391 update test schematic with new dataset node plotting functions 2023-10-14 00:19:38 +02:00
stefan schippers 617e6b3b8d update live backannotation if "a" and "b" cursors are swapped, syntax node%n is now allowed to plot only dataset "n" of the node. Update html docs and example autozero_comp circuit 2023-10-13 15:51:51 +02:00
stefan schippers 94bccc08d9 do not duplicate empty strings as NULLs in hash tables 2023-10-09 12:49:11 +02:00
stefan schippers 6b00a88f28 fix xschem simulator "mux" operator (M) to handle unknown selector state 2023-10-08 11:45:22 +02:00
stefan schippers 58af2567e6 fix initialization of default value for "xschem get_logic_net" 2023-10-08 11:32:56 +02:00
stefan schippers 9fee9610ab vsource.sym and ammeter.sym: add "savecurrent=1|0|true|false" attribute do decide if a .save I(...) is to be printed in netlist. default is 1 for ammeter.sym and 0 for vsource.sym. Add "deltax deltay rot flip" optional parameters for xschem "copy_objects" command to make copy operation scriptable (lot more efficient than using clipboard) 2023-10-02 12:11:05 +02:00
stefan schippers ee67a23465 revert a change in example schematic pcb_test1.sch so xschemtest will not report a false error 2023-09-20 12:35:26 +02:00
stefan schippers 53207732b9 minor doc/man updates, typo cleanups 2023-09-19 23:59:01 +02:00
stefan schippers 75e99cae91 update tier.tcl generator to handle unresolvable parameters 2023-09-19 01:29:52 +02:00
stefan schippers fd2be4a599 update res.tcl generator to handle unresolvable parameters 2023-09-19 00:08:42 +02:00
stefan schippers bb6caaf501 update tier.tcl generator and testbench 2023-09-16 11:20:40 +02:00
stefan schippers 82f8afbb19 optimize select_dangling_nets() a bit 2023-09-15 11:01:33 +02:00
stefan schippers 19fbba5c60 update docs about parametrized subcircuits, add braces around parameters (some ngspice version require them, some other can live without for simple non expression params), Update text example comp_ngspice.sch 2023-07-13 21:13:56 +02:00
stefan schippers a329c18bfb (propdel) remove unneeded exec flags 2023-07-03 13:12:40 +02:00
stefan schippers f8f7c4f230 updated moude_bindings.tcl with Paul`s new version, updated noconn.sym (do not use *_ignore attributes, put comments in netlist about NC net) 2023-06-30 09:11:04 +02:00
stefan schippers 810b814211 added some comments in code / schematics 2023-06-18 23:44:52 +02:00
stefan schippers c97dfddd4e fix memory leak due to improper use of get_pin_and_attr() 2023-06-17 10:14:55 +02:00
stefan schippers 3c16c4bf20 separated @#pin:attr handling in translate() into *get_pin_attr(), replaced sscanf() with dedicated get_pin_and_attr() so we are able to handle stuff like "@#ADD[7:0]:net_name" 2023-06-16 10:55:22 +02:00
stefan schippers 01806eaa10 fix meaningless pin attributes on tier.tcl 2023-06-15 09:05:15 +02:00
stefan schippers eca52e1f4a added comp_65nm_read.sym example in inst_sch_select/inst_sch_select.sch, symbol with spice_sym_def attribute 2023-06-12 18:22:40 +02:00
stefan schippers 910235749b small updates to solar_panel.sch test schematic 2023-06-12 08:17:42 +02:00
stefan schippers d56e3939d5 updated xschem_library/examples/test_backannotated_subckt.sch; fix a potential segfault in proc fix_symbol 2023-06-08 01:08:05 +02:00
stefan schippers 6f0e4e935f update generators/res.tcl 2023-06-07 10:17:02 +02:00
stefan schippers 4d98cc7b41 moved test_generators under generators/ 2023-06-07 09:51:11 +02:00
stefan schippers 3a42cfa64c added test_generators.sch example 2023-06-07 09:38:11 +02:00
stefan schippers e63818f980 reverted solar_panel.sch (was changed for testing) 2023-06-07 03:44:42 +02:00
stefan schippers 245993f034 added attributes spice_ignore=short, verilog_ignore=short, .... that will transform the instance into a short in the current netlisting mode, shorting all pins to the same net. Works similarly as lvs_ignore=short, but does not need lvs_ignore global setting 2023-06-07 03:41:49 +02:00
stefan schippers 38a28a3acb add lvs_ignore to context saved vars. Refactored some preprocessor macros SPICE_IGNORE_INST --> SPICE_IGNORE) 2023-06-06 23:38:29 +02:00
stefan schippers 394db224d1 added global tcl variable `lvs_ignore` that can be used to enable instance or symbol attributes `lvs_ignore=open` or `lvs_ignore=short` while netlisting, added `test_lvs_ignore.sch` example 2023-06-06 15:22:45 +02:00
stefan schippers ff216e8187 function reset_flags() set flags on symbols and instances; call reset_flags before rebuilding connectivity to update cached values; add short.sym component that can be used to short two nets together (and remove the short using *_ignore=true); instcheck(): do not proces instances that have *_ignore=true set. 2023-06-06 08:42:43 +02:00
stefan schippers 4f387f3bbe disable displaying backannotation data if `b` cursor is hidden or `Simulation->Live annotation with b cursor` is disabled. Use resolved_net() in translate() when displaying @spice_get_voltage so it will work on sub block ports 2023-06-05 12:58:19 +02:00