jsowash
|
a8df5528f9
|
Added 2 mux test for wmask.
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2019-08-21 16:06:36 -07:00 |
Matt Guthaus
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98f526427e
|
Merge branch 'add_wmask' of github.com:VLSIDA/PrivateRAM into add_wmask
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2019-08-21 15:33:03 -07:00 |
Matt Guthaus
|
9ada9a7dfa
|
Fix pitch in channel router to support M3/M4.
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2019-08-21 15:32:49 -07:00 |
jsowash
|
737e873923
|
Changed via direction for via1 in flip flops.
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2019-08-21 14:49:54 -07:00 |
jsowash
|
980760b724
|
Add preferred direction to via1, routed between supply lines in wmask AND array, and only uses m3 for channel route with a write mask.
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2019-08-21 14:02:57 -07:00 |
jsowash
|
4f01eeb3c1
|
Combined changes to the pin locations and vias.
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2019-08-21 12:36:53 -07:00 |
jsowash
|
c2015335b0
|
Fixed merge issues.
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2019-08-21 11:54:22 -07:00 |
jsowash
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4813c01d56
|
Moved dff's up and moved wmask_AND/wdriver pins left/down, respectively.
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2019-08-21 11:50:28 -07:00 |
Matt Guthaus
|
b0821a5a0e
|
Re-add simplified power pins on edges
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2019-08-21 11:42:56 -07:00 |
Matt Guthaus
|
b94af3e3fd
|
Add vias for new channel routes
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2019-08-21 11:33:43 -07:00 |
Matt Guthaus
|
f281510828
|
Merge branch 'add_wmask' of github.com:VLSIDA/PrivateRAM into add_wmask
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2019-08-21 11:20:42 -07:00 |
Matt Guthaus
|
2b7025335c
|
Use pand2 of correct size. Simplify width checking of AND array.
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2019-08-21 11:20:35 -07:00 |
jsowash
|
43d45fba98
|
Moved pwr/gnd pins to the right of the rail.
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2019-08-21 10:44:04 -07:00 |
Matt Guthaus
|
c39b09c736
|
Merge branch 'add_wmask' of github.com:VLSIDA/PrivateRAM into add_wmask
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2019-08-21 10:18:59 -07:00 |
Matt Guthaus
|
54ab9440db
|
Use pdriver instead of pinv in pand gates.
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2019-08-21 10:18:46 -07:00 |
jsowash
|
0cbc4a7acf
|
Moved wmask dff above data dff and changed channel route to m3/m4 for data and m1/m2 for wmask.
|
2019-08-21 10:07:20 -07:00 |
Matt Guthaus
|
53d0544291
|
Minor cleanup and additional assertion checking.
|
2019-08-21 08:50:12 -07:00 |
Matt Guthaus
|
f2568fec80
|
Change permissions on tests to +x. Add single bank wmask test.
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2019-08-21 08:49:46 -07:00 |
jsowash
|
71af70a636
|
Moved pwr/gnd vias and corrected width boundary.
|
2019-08-20 09:14:23 -07:00 |
jsowash
|
316132a33c
|
Sized inverter for number of driven write drivers.
|
2019-08-19 13:31:49 -07:00 |
jsowash
|
c19bada8df
|
Performed clean up and added comments.
|
2019-08-19 08:57:05 -07:00 |
jsowash
|
a28c9fed8b
|
Fixed bug for more than 2 wmasks and changed test to test 4 wmasks.
|
2019-08-16 14:27:44 -07:00 |
jsowash
|
d02ea06ff2
|
Added method to route between the output of wmask AND array and en of write driver.
|
2019-08-16 14:12:41 -07:00 |
jsowash
|
aaa1e3a614
|
Added change to route wmask en between driver and AND gates. Need to apply it to all cases.
|
2019-08-16 10:23:51 -07:00 |
jsowash
|
92e0671e15
|
Removed DRC error with AND array in freepdk45 and moved pin on en_{} pin in port data.
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2019-08-15 12:36:17 -07:00 |
jsowash
|
f0f811bad9
|
Added a condiitonal to only route wmask dff when there's a write size.
|
2019-08-14 12:40:14 -07:00 |
jsowash
|
858fbb062d
|
Placed wmask dff and added connections for wmask pins.
|
2019-08-14 11:45:22 -07:00 |
jsowash
|
0d7170eb95
|
Created wmask AND array en pin to go through to top layer.
|
2019-08-14 09:59:40 -07:00 |
jsowash
|
aa4803f3c4
|
Increased enable pin's width for larger # of column mux ways.
|
2019-08-11 15:25:05 -07:00 |
jsowash
|
2573b5f48b
|
Fixed merge conflict.
|
2019-08-11 14:39:36 -07:00 |
jsowash
|
d259efbcda
|
Connected wdriver_sel between write_mask_and_array and write_driver_array.
|
2019-08-11 14:33:08 -07:00 |
Matt Guthaus
|
e5618b88af
|
Don't add sense amp to write only port. Fix write_and None define.
|
2019-08-11 08:46:36 -07:00 |
Matt Guthaus
|
d56a972d61
|
Update ngspice tests due to new version
|
2019-08-10 17:59:30 -07:00 |
Matt Guthaus
|
c09005dab9
|
Redo logic for detecting bad bitlines
|
2019-08-10 17:32:36 -07:00 |
Matt Guthaus
|
6cf7366c56
|
Gate sen during first half period
|
2019-08-10 16:30:02 -07:00 |
Matt Guthaus
|
8d6a4c74e7
|
Merge branch 'dev' into control_fix
|
2019-08-10 13:07:30 -07:00 |
Matt Guthaus
|
23676c0f37
|
Route bl in SRAM write ports too
|
2019-08-10 12:53:07 -07:00 |
Matt Guthaus
|
34d28a19e6
|
Connect wl_en in all ports to bank.
|
2019-08-10 12:30:23 -07:00 |
Matt Guthaus
|
bac684a82a
|
Fix control logic routing.
|
2019-08-10 08:53:02 -07:00 |
jsowash
|
d5e331d4f3
|
Connected en together in write_mask_and_array.
|
2019-08-09 14:27:53 -07:00 |
Hunter Nichols
|
2573d4e7d0
|
Removed testing code from config file.
|
2019-08-08 19:27:44 -07:00 |
Hunter Nichols
|
1d22d39667
|
Uncommented tests that use model delays. Fixed issue in sense amp cin.
|
2019-08-08 18:26:12 -07:00 |
jsowash
|
49fffcbc92
|
Added way to determine length of en pin with wmask in write_driver_array and shortened en to width of driver.
|
2019-08-08 15:49:23 -07:00 |
Hunter Nichols
|
d273c0eef5
|
Merge branch 'dev' into analytical_cleanup
|
2019-08-08 13:20:27 -07:00 |
jsowash
|
0cfa0ac755
|
Shortened write driver enable pin so that a write mask can be used without a col mux in layout.
|
2019-08-08 12:57:32 -07:00 |
jsowash
|
59e5441aef
|
Added write mask to write driver array
|
2019-08-08 08:46:58 -07:00 |
Hunter Nichols
|
3c44ce2df6
|
Replaced analytical characterization with graph implementation. Removed most analytical delay functions used by old chacterizer.
|
2019-08-08 02:33:51 -07:00 |
Hunter Nichols
|
fc1cba099c
|
Made all cin function relate to farads and all input_load relate to relative units.
|
2019-08-08 01:57:04 -07:00 |
Matt Guthaus
|
d36f14b408
|
New control logic, netlist only working
|
2019-08-07 17:14:33 -07:00 |
Matt Guthaus
|
275891084b
|
Add pand3
|
2019-08-07 16:33:29 -07:00 |