luke
/
OpenRAM
mirror of https://github.com/VLSIDA/OpenRAM.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Add preferred direction to via1, routed between supply lines in wmask AND array, and only uses m3 for channel route with a write mask.

This commit is contained in:
jsowash 2019-08-21 14:02:57 -07:00
parent 4f01eeb3c1
commit 980760b724
2 changed files with 35 additions and 24 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
compiler/modules/write_mask_and_array.py
View File

@ -123,6 +123,7 @@ class write_mask_and_array(design.design):
self.add_via_center(layers=("metal2", "via2", "metal3"),
offset=en_pin.center())
# Route en pin between AND gates
if i < self.num_wmasks-1:
self.add_layout_pin(text="en",
layer="metal3",
@ -137,10 +138,15 @@ class write_mask_and_array(design.design):
width=wmask_out_pin.width(),
height=wmask_out_pin.height())
self.add_power_pin("gnd", vector((supply_pin.lx() - 0.75 *drc('minwidth_metal1'))+i*self.wmask_en_len,
self.add_power_pin("gnd", vector((supply_pin.lx() - 0.75*drc('minwidth_metal1'))+i*self.wmask_en_len,
0))
self.add_power_pin("vdd", vector((supply_pin.lx() - 0.75*drc('minwidth_metal1'))+i*self.wmask_en_len,
self.height))
if i < self.num_wmasks-1:
for n in ["gnd","vdd"]:
pin = self.and2_insts[i].get_pin(n)
next_pin = self.and2_insts[i+1].get_pin(n)
self.add_path("metal1",[pin.center(),next_pin.center()])
def en_width(self, pin):

51
compiler/sram/sram_1bank.py
View File

@ -141,12 +141,12 @@ class sram_1bank(sram_base):
if self.write_size is not None:
# Add the write mask flops below the write mask AND array.
wmask_pos[port] = vector(self.bank.bank_array_ur.x - self.data_dff_insts[port].width,
self.bank.height + max_gap_size + self.dff.height)
self.bank.height + 0.5*max_gap_size + self.dff.height)
self.wmask_dff_insts[port].place(wmask_pos[port], mirror="MX")
# Add the data flops below the write mask flops
data_pos[port] = vector(self.bank.bank_array_ur.x - self.data_dff_insts[port].width,
self.bank.height + 2*max_gap_size + 2*self.dff.height)
self.bank.height + 1.5*max_gap_size + 2*self.dff.height)
self.data_dff_insts[port].place(data_pos[port], mirror="MX")
else:
@ -361,31 +361,36 @@ class sram_1bank(sram_base):
dff_names = ["dout_{}".format(x) for x in range(self.word_size)]
dff_pins = [self.data_dff_insts[port].get_pin(x) for x in dff_names]
for x in dff_names:
pin_offset = self.data_dff_insts[port].get_pin(x).center()
self.add_via_center(layers=("metal1", "via1", "metal2"),
offset=pin_offset)
self.add_via_center(layers=("metal2", "via2", "metal3"),
offset=pin_offset)
self.add_via_center(layers=("metal3", "via3", "metal4"),
offset=pin_offset)
if self.write_size is not None:
for x in dff_names:
pin_offset = self.data_dff_insts[port].get_pin(x).center()
self.add_via_center(layers=("metal1", "via1", "metal2"),
offset=pin_offset)
self.add_via_center(layers=("metal2", "via2", "metal3"),
offset=pin_offset)
self.add_via_center(layers=("metal3", "via3", "metal4"),
offset=pin_offset)
bank_names = ["din{0}_{1}".format(port,x) for x in range(self.word_size)]
bank_pins = [self.bank_inst.get_pin(x) for x in bank_names]
for x in bank_names:
pin_offset = vector(self.bank_inst.get_pin(x).cx(),
self.bank_inst.get_pin(x).by() - 0.75 * drc('minwidth_metal1'))
self.add_via_center(layers=("metal1", "via1", "metal2"),
offset=pin_offset)
self.add_via_center(layers=("metal2", "via2", "metal3"),
offset=pin_offset)
self.add_via_center(layers=("metal3", "via3", "metal4"),
offset=pin_offset)
if self.write_size is not None:
for x in bank_names:
pin_offset = self.bank_inst.get_pin(x).bc()
self.add_via_center(layers=("metal1", "via1", "metal2"),
offset=pin_offset,
directions=("V","V"))
self.add_via_center(layers=("metal2", "via2", "metal3"),
offset=pin_offset)
self.add_via_center(layers=("metal3", "via3", "metal4"),
offset=pin_offset)
route_map = list(zip(bank_pins, dff_pins))
self.create_horizontal_channel_route(netlist=route_map,
offset=offset,
layer_stack=("metal3", "via3", "metal4"))
if self.write_size is not None:
self.create_horizontal_channel_route(netlist=route_map,
offset=offset,
layer_stack=("metal3", "via3", "metal4"))
else:
self.create_horizontal_channel_route(route_map, offset)
def route_wmask_dff(self):
""" Connect the output of the wmask flops to the write mask AND array """