Commit Graph

4502 Commits

Author SHA1 Message Date
Sam Crow eea748ff3e remove test for unsupported config 2023-04-10 11:16:10 -07:00
Sam Crow 670b40642b add no rbl tests to 15 global array tests 2023-04-10 10:38:52 -07:00
Eren Dogan f7a24aafb7 Ignore coverage files 2023-04-10 10:29:21 -07:00
Eren Dogan 7af2badf31 Fix path search in custom module finder 2023-04-10 10:28:15 -07:00
Eren Dogan 095e0baddd Remove CHECKPOINT_OPTS since it is not used 2023-04-07 12:32:29 -07:00
Eren Dogan 86372bbeb7 Add meta path finder for custom modules 2023-04-07 12:27:58 -07:00
Sam Crow dff94a032e fix bug in right rbl dual port replica array test 2023-04-07 11:30:15 -07:00
Sam Crow 5b701d828e remove unused function 2023-04-07 10:32:11 -07:00
Sam Crow 3c7f35d295 add no rbl support to bank module 2023-04-07 10:02:38 -07:00
Sam Crow efbb658784 add no rbl support to port address 2023-04-05 16:04:20 -07:00
Sam Crow ae6d271602 add support for no rbl to port data 2023-04-05 15:33:45 -07:00
Sam Crow d00ba73bc9 add no rbl support to global array 2023-04-05 14:47:15 -07:00
Sage Walker 7ed7ff4e9a fixed bug with tempdir in macros makefile 2023-04-03 17:06:09 -07:00
Sage Walker b2bcbddd01 ROM binary file support 2023-04-03 16:04:12 -07:00
Sam Crow 83b25138d0 apply 14* standard to 15_local tests 2023-04-03 10:11:49 -07:00
Sam Crow 9181f6a218 standardize 14* test structure 2023-04-03 10:08:57 -07:00
sfmth 1f5a03ef0c added openram.ipynb and docs references to it 2023-04-02 09:58:22 +03:30
vlsida-bot 85db2043b2 Bump version: 1.2.7 -> 1.2.8 2023-03-31 06:10:25 +00:00
Jacob Walker 0b056dca54 fixed rom bank test name 2023-03-30 18:44:55 -07:00
Jacob Walker 52791a2719 a space 2023-03-30 11:30:50 -07:00
Jacob Walker c1fb3cab6c 1kb rom DRC clean 2023-03-30 11:30:50 -07:00
Jacob Walker 7805fcb21e more top level routing cleanup 2023-03-30 11:30:50 -07:00
Jacob Walker fef9902c45 rom base passing tests with top level routing 2023-03-30 11:30:50 -07:00
mrg 7c453e80be Simplify ROM test. 2023-03-30 11:30:50 -07:00
mrg af0a6d32fb Remove old skip tests 2023-03-30 11:30:50 -07:00
mrg 2075d244cb Change ROM test permissions to include x 2023-03-30 11:30:50 -07:00
Jacob Walker 4c34a54d32 top level boundary fixes 2023-03-30 11:30:50 -07:00
Jacob Walker 7fe5ed5c41 edge routing 2023-03-30 11:30:50 -07:00
Jacob Walker 09f9c4cc20 some rom bank cleanup 2023-03-30 11:30:50 -07:00
mrg 56e14113aa Change rom_base_bank name and top pin names 2023-03-30 11:30:50 -07:00
mrg d2b5be0130 Add exclude tests for ROMs 2023-03-30 11:30:50 -07:00
mrg fe65a20431 Rename ROM unit tests. 2023-03-30 11:30:50 -07:00
mrg 041c738cb2 Rework macros to run ROM tests too. 2023-03-30 11:30:50 -07:00
Jacob Walker eec0f02bb8 skip test file 2023-03-30 11:30:50 -07:00
Jacob Walker b50ec272da updated top level rom unit tests 2023-03-30 11:30:50 -07:00
Jacob Walker cd2314f008 better name 2023-03-30 11:30:50 -07:00
Jacob Walker 879c14b828 sky130 only 2023-03-30 11:30:50 -07:00
Jacob Walker 577cdcb232 example configs 2023-03-30 11:30:50 -07:00
Jacob Walker 41f0b9a412 rom compiler top level 2023-03-30 11:30:50 -07:00
Jacob Walker 2d5199961d revert changes to pinvbuf 2023-03-30 11:30:50 -07:00
Jacob Walker 382c91f342 precharge array test passing sky130 2023-03-30 11:30:50 -07:00
Jacob Walker 92251fe61e more code cleaning 2023-03-30 11:30:50 -07:00
Jacob Walker 90cf382a43 removed hardcoded DRC rule 2023-03-30 11:30:50 -07:00
Jacob Walker 0cb4459b4b changed ROM test data path 2023-03-30 11:30:50 -07:00
Jacob Walker af0209ec96 passing code style 2023-03-30 11:30:50 -07:00
Jacob Walker 79efff9ca6 code cleanup and updated copyright 2023-03-30 11:30:50 -07:00
Jacob Walker ab955f0da8 removed data files 2023-03-30 11:30:50 -07:00
Jacob Walker bbf2cd2913 Changes for test generation and simulation 2023-03-30 11:30:50 -07:00
Jacob Walker 89c7d50bd1 added row of nmos to end of array for precharge 2023-03-30 11:30:50 -07:00
SWalker f847721500 changes to control logic, invert polarity of precharge 2023-03-30 11:30:50 -07:00