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4,111 Commits 5 Branches 63 Tags
2ba49fd96f329e6690a0e60934d1df12dec1ca1a
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3449 Commits
Author SHA1 Message Date
Eren Dogan 62700e4d2b Fix OPENRAM_HOME path for library 2022-11-04 15:47:38 -07:00
Eren Dogan 557b2e7459 Reorganize library files to include everything 2022-11-04 15:10:44 -07:00
Eren Dogan 740cff985a Inform user when library's tech is used 2022-11-03 22:02:05 -07:00
mrg a213d3b0f6 Merge branch 'dev' into library 2022-11-02 16:20:56 -07:00
mrg b1a88d8c8a Remove variable reference in ifdef 2022-11-02 08:02:22 -07:00
Eren Dogan dacc0acd4d Fix paths while initializing 2022-10-25 13:01:02 -07:00
Eren Dogan 92460d2080 Move the compiler script to the root 2022-10-25 12:22:57 -07:00
Eren Dogan dc9d1e00d8 Add setup files for package 2022-10-25 12:22:18 -07:00
mrg 9b6eb4a120 Fix whitespace 2022-10-20 16:38:23 -07:00
mrg 8fd08916a1 Move is_non_inverting graph code to bitcell_base class to work with pbitcell too. 2022-10-20 15:16:10 -07:00
mrg aeca2c6b88 Allow any definition of KEEP to keep temp files 2022-10-20 14:31:26 -07:00
Jesse Cirimelli-Low 3b02a8846d sky130 rba passing :) 2022-09-12 16:07:00 -07:00
samuelkcrow 004ee3748d add option to keep tmp files when running tests with make 2022-09-08 13:40:48 -07:00
Bugra Onal 57d7a78421 Merge branch 'multibank' into dev 2022-08-30 09:19:19 -07:00
Bugra Onal 1a214a7309 Fixed utest 25 golden 2022-08-30 09:17:51 -07:00
Jesse Cirimelli-Low 11fa0777e8 add flatglob to tech file; sky130 replica col lvs working 2022-08-22 15:30:11 -07:00
Bugra Onal c0c15537d9 Added golden files for freepdk test 25 2022-08-18 11:04:53 -07:00
Bugra Onal 25cc08db80 Further fixes for new verilog naming convention 2022-08-18 11:03:13 -07:00
Bugra Onal a7c6406d0d Changed verilog file naming convention 2022-08-18 10:36:54 -07:00
Bugra Onal 1a23d156c0 remove references to bank_sel 2022-08-18 10:33:46 -07:00
Bugra Onal 242d90f543 Code format fixes 2022-08-13 13:58:53 -07:00
Bugra Onal aefe46394c Merge branch 'dev' into multibank 2022-08-12 21:45:26 -07:00
Bugra Onal b33c2ab96c Fixed test 25 golden files 2022-08-12 21:33:40 -07:00
Bugra Onal 6ba2a9bca7 Make sure num_wmasks is 0 when no wmask is generated 2022-08-10 16:35:39 -07:00
Bugra Onal f743b1f068 Convert to new modules format 2022-08-10 16:34:49 -07:00
Bugra Onal 623c1ac02f Convert unit test 25 to new modules convert 2022-08-10 16:33:50 -07:00
Bugra Onal dc1626879e Characterizer wmask check for write_size 2022-08-10 16:11:19 -07:00
Bugra Onal 2d849aef39 Write size updated in recompute_sizes 2022-08-10 15:36:41 -07:00
Bugra Onal 48fce6485d write_size None initialization fixed 2022-08-04 16:37:21 -07:00
Bugra Onal 2ed107f9ff Fix the total addr_size 2022-08-04 16:36:26 -07:00
Bugra Onal 0ca14a3662 Fix typo on w_en 2022-08-04 16:35:09 -07:00
samuelkcrow 1177df6193 move most of place_instances to base 2022-08-01 10:33:48 -07:00
Bugra Onal 7fe0f647ef fix 2022-07-28 17:00:16 -07:00
Bugra Onal 8f955207d3 Fixed write_size checks for characterizer 2022-07-28 16:47:29 -07:00
Bugra Onal a361d9f7bb Fixed write_size checks for None 2022-07-28 16:45:58 -07:00
Bugra Onal 6efe974d7b Delete sram_base form rebase 2022-07-28 16:02:39 -07:00
Bugra Onal 9771bb7056 Don't generate wmask and if word per line is 1 2022-07-28 15:59:28 -07:00
Bugra Onal 02d8eca640 Fix indentation 2022-07-28 15:07:19 -07:00
Bugra Onal 36e23dc80f Moved template module to new modules folder 2022-07-28 15:05:34 -07:00
Bugra Onal bac40fa630 Removed SRAM directory 2022-07-28 15:04:53 -07:00
Bugra Onal caac39c88b Added 1bank module check to the multibank test 2022-07-28 15:03:41 -07:00
Bugra Onal 3f1a5a2051 Shrunk address register in multibank verilog 2022-07-28 15:03:41 -07:00
Bugra Onal 6b5fe8a096 Changed test name for multibank verilog test 2022-07-28 15:03:41 -07:00
Bugra Onal 8f00e396cd Added unit test for multibank 2022-07-28 15:03:41 -07:00
Bugra Onal d36f74a514 Not mathcing whitespace bug fixed 2022-07-28 15:03:41 -07:00
Bugra Onal 5f45f7db15 Fixed the bad commas with post-process regex 2022-07-28 15:03:41 -07:00
Bugra Onal 9bd3f1b45a None check syntax fix 2022-07-28 15:03:41 -07:00
Bugra Onal a75951b5b1 write_size init in sram_config 2022-07-28 15:03:41 -07:00
Bugra Onal e130ba736c Fixed indent error on write_size init 2022-07-28 15:03:41 -07:00
Bugra Onal 898a1f07f5 Fixed verilog filename double extension 2022-07-28 15:03:41 -07:00