Fix whitespace

2022-10-20 16:38:23 -07:00 · 2022-10-20 16:38:23 -07:00 · 9b6eb4a120
parent 8fd08916a1
commit 9b6eb4a120
2 changed files with 1 additions and 3 deletions
--- a/compiler/drc/custom_cell_properties.py
+++ b/compiler/drc/custom_cell_properties.py
@ -233,7 +233,7 @@ class cell_properties():

        self._row_cap_2port = bitcell(["wl0", "wl1", "gnd"],
                                       ["INPUT", "INPUT", "POWER", "GROUND"])
-        
+
        self._internal = cell([],[])

    @property
--- a/compiler/modules/internal_base.py
+++ b/compiler/modules/internal_base.py
@ -12,5 +12,3 @@ class internal_base(design):

    def __init__(self, name, cell_name=None, prop=None):
        design.__init__(self, name, cell_name, prop)
- 
-