Commit Graph

18367 Commits

Author SHA1 Message Date
Akash Levy 1cc35aa76d
Merge pull request #162 from Silimate/feat/chunk-parallel-sim
[ENG-1969] Resim each instance independently
2026-05-12 01:29:47 -07:00
Akash Levy 43eef210aa
Merge pull request #163 from Silimate/clockgate
[ENG-1992] Activity-based clock gating
2026-05-12 00:42:03 -07:00
Chia-Hsiang Chang 67373542ae fix: add guard to avoid crash on null-pointer dereference 2026-05-12 00:32:45 -07:00
Chia-Hsiang Chang 0dcfe5cd4b chore: add comments and log 2026-05-12 00:21:25 -07:00
Chia-Hsiang Chang eb83c40d24 fix: check the cell is a child node before skipping 2026-05-12 00:07:00 -07:00
Chia-Hsiang Chang 9e6d66d74e chore: log error when no scope found 2026-05-12 00:01:29 -07:00
Stan Lee 7537faa8cd add warning and calculate correct activity 2026-05-11 22:27:33 -07:00
Stan Lee 74dee77d9d rm sigmap 2026-05-11 18:42:57 -07:00
Stan Lee 517a174775
Update passes/techmap/clockgate.cc
Co-authored-by: greptile-apps[bot] <165735046+greptile-apps[bot]@users.noreply.github.com>
2026-05-11 18:41:18 -07:00
Chia-Hsiang Chang a00bb2b80b fix: don't recursively update children 2026-05-11 18:09:06 -07:00
Chia-Hsiang Chang 7b2e63ac5b refactor: style fix 2026-05-11 16:09:02 -07:00
Stan Lee 1be9a8985d bug fixes 2026-05-11 16:01:39 -07:00
Stan Lee 1b89bc7675 activity based clock gating 2026-05-11 10:55:53 -07:00
Chia-Hsiang Chang 57c3e484e3 feat: parallel resim with chunks and bb 2026-05-08 18:54:18 -07:00
Chia-Hsiang Chang a3d81a6d3f refactor 2026-05-06 18:27:57 -07:00
Chia-Hsiang Chang 8a5a7c6fe6 feat: each instance simulates independently 2026-05-06 17:26:42 -07:00
Akash Levy a1d428e89b Small docs fix 2026-05-05 04:25:49 -07:00
Akash Levy b9fa4f85ba Ignore DW in opt_hier/opt_boundary 2026-05-04 12:52:47 -07:00
Akash Levy ebf269bdf0 opt_boundary improvements and add to opt pass as option 2026-05-04 10:51:04 -07:00
Akash Levy 35d89b16e3
Merge pull request #161 from Silimate/opt_boundary
opt_boundary
2026-05-03 15:04:13 -07:00
Akash Levy 4b219f0ef6 Improvements 2026-05-01 22:50:43 -07:00
Akash Levy 7db8f29c04 opt_boundary 2026-05-01 19:57:00 -07:00
Akash Levy cd16928385
Merge pull request #160 from Silimate/reg-rename
[CUS-514] Reg rename fixes
2026-04-30 15:00:27 -07:00
Akash Levy 24374c8d6b
Merge pull request #159 from Silimate/localize_external_package_global_net
Localize external package/global net
2026-04-30 14:59:58 -07:00
Akash Levy e1aade6a1f
Update frontends/verific/verific.cc
Co-authored-by: greptile-apps[bot] <165735046+greptile-apps[bot]@users.noreply.github.com>
2026-04-30 14:15:44 -07:00
Akash Levy 89a8250ae8
Update frontends/verific/verific.cc
Co-authored-by: greptile-apps[bot] <165735046+greptile-apps[bot]@users.noreply.github.com>
2026-04-30 14:15:25 -07:00
Stan Lee 386d3fc308 fix 2026-04-30 12:30:09 -07:00
Stan Lee 9d9ed4bfe3 flatten VCD/RTL scope hierarchy 2026-04-30 12:05:57 -07:00
Akash Levy 4d110a96bf Localize external package/global net 2026-04-30 10:51:03 -07:00
Stan Lee f3c3eceedf bugfix 2026-04-30 10:47:23 -07:00
Stan Lee 6aab520cad simplify 2026-04-30 10:14:42 -07:00
Stan Lee 4600078f55 comments 2026-04-30 10:06:29 -07:00
Stan Lee f6e6b4afef better? 2026-04-29 17:23:58 -07:00
Stan Lee 21a2a1b4f8 splitcells was the issue? 2026-04-29 17:07:50 -07:00
Stan Lee 550d48c417 fix value conversion bug 2026-04-29 15:21:29 -07:00
Stan Lee 448ab2a4e7 undo 2026-04-29 11:30:04 -07:00
Stan Lee 3cd792d4d7 warn only on _reg 2026-04-29 11:24:46 -07:00
Akash Levy 162233a225
Merge pull request #158 from Silimate/frontend-verific
[CUS-515] - Add '-unignore_module' flag
2026-04-28 17:45:00 -07:00
Stan Lee 489fb6ea54 compilation err 2026-04-28 16:22:12 -07:00
Stan Lee 18dc5cc2cc remove pointer 2026-04-28 16:21:23 -07:00
Stan Lee 48329bd36a change to string for consistency 2026-04-28 16:20:00 -07:00
Stan Lee 6f5b52807c whitespace 2026-04-28 16:18:36 -07:00
Stan Lee dd6e440937 rename and clean 2026-04-28 16:16:57 -07:00
Stan Lee e801ea4fdb delete module frontend 2026-04-28 15:12:50 -07:00
Akash Levy b56104ada2
Merge pull request #157 from Silimate/pmux2shiftx 2026-04-25 09:40:04 -07:00
Stan Lee fe4434b105 Merge branch 'main' of github.com:silimate/yosys into pmux2shiftx 2026-04-24 17:19:49 -07:00
Stan Lee 325d9b0c0e edit naming 2026-04-24 17:14:42 -07:00
Akash Levy 65aad25a61 Smallfix for bison 2026-04-22 12:06:10 -07:00
Akash Levy e6f84b3b5b Ensure verilog flex/bison symbols are overridden properly 2026-04-22 10:43:52 -07:00
Akash Levy 099a3c881b
Merge pull request #150 from Silimate/reenable_vhdl
Reenable VHDL
2026-04-22 04:10:29 -07:00