mirror of https://github.com/YosysHQ/yosys.git
bug fixes
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parent
1b89bc7675
commit
1be9a8985d
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@ -187,30 +187,33 @@ static std::pair<std::optional<ClockGateCell>, std::optional<ClockGateCell>>
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return std::make_pair(pos, neg);
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}
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static double return_default_activity(IdString attr) {
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static double get_cell_activity(Cell *cell, IdString pin, IdString attr) {
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const char *name = pin.c_str();
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if (name[0] == '\\') name++; // remove any backslash prefix
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std::string prefix = std::string(name) + "="; // prefix for pin (A=0.5)
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// Full string attribute value from the cell.
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std::string attribute = cell->get_string_attribute(attr);
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std::istringstream iss(attribute);
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for (std::string tok; iss >> tok; )
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if (tok.compare(0, prefix.size(), prefix) == 0)
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return atof(tok.c_str() + prefix.size());
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// Unable to find any corresponding value, return default
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return (attr == ID($DUTY)) ? 1.0 : 0.0;
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}
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// Returns the activity/duty of a bit for a given signal.
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static double get_bit_activity(SigMap &sigmap, SigBit bit, IdString attr) {
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SigBit sigbit = sigmap(bit);
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// Special case for constants
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if (bit == State::S1) return return_default_activity(attr);
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if (bit == State::S0) return 0.0;
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// Special case for undefined wires
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if (!sigbit.wire) return return_default_activity(attr);
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// Get the activity/duty from the wire's string attribute
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std::istringstream iss(sigbit.wire->get_string_attribute(attr));
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std::string tok;
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for (int i = 0; i <= sigbit.offset; i++) {
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if (i == sigbit.offset) return atof(tok.c_str()); // found activity/duty for the bit
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static void update_ff_activity_attr(Cell *cell, IdString attr_key, double new_clk_value) {
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std::string out;
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std::istringstream iss(cell->get_string_attribute(attr_key));
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for (std::string tok; iss >> tok; ) {
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if (tok.compare(0, 3, "EN=") == 0) continue; // remove EN from attribute
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if (tok.compare(0, 4, "CLK=") == 0)
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out += stringf("CLK=%f ", new_clk_value); // Update CLK value
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else
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out += tok + " "; // All other values remain unchanged
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}
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// Case that activity/duty not found
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return return_default_activity(attr);
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cell->set_string_attribute(attr_key, out);
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}
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struct ClockgatePass : public Pass {
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@ -293,6 +296,12 @@ struct ClockgatePass : public Pass {
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int src_count = 0;
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// Total sum of disabled FFs on a clock net
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double en_disabled_sum = 0;
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// Used to set activity/duty attributes of the gated clock net
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bool activity_set = false;
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double gclk_duty = 0.0;
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double gclk_ackt = 0.0;
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// FF on the clock net used to read activity/duty attributes
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Cell* representative_ff = nullptr;
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};
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ClkNetInfo clk_info_from_ff(FfData& ff) {
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@ -411,10 +420,12 @@ struct ClockgatePass : public Pass {
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// Gated clock info
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auto &gclk_info = clk_nets[info];
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gclk_info.net_size++;
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if (!gclk_info.representative_ff)
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gclk_info.representative_ff = cell;
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if (use_disabled_threshold) {
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// Calculate the duty cycle of the enable signal.
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double ce_duty = get_bit_activity(sigmap, info.ce_bit, ID($DUTY));
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double ce_duty = get_cell_activity(cell, ID(EN), ID($DUTY));
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double ce_active_frac = info.pol_ce ? ce_duty : (1.0 - ce_duty);
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// Fraction of time this FF is disabled (CE not asserted).
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@ -453,23 +464,30 @@ struct ClockgatePass : public Pass {
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// If disabled threshold is used, calculate the activity/duty of the gated clock.
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if (use_disabled_threshold) {
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double clk_duty = get_bit_activity(sigmap, clk.clk_bit, ID($DUTY));
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double ce_duty = get_bit_activity(sigmap, clk.ce_bit, ID($DUTY));
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double clk_activity = get_bit_activity(sigmap, clk.clk_bit, ID($ACKT));
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double ce_activity = get_bit_activity(sigmap, clk.ce_bit, ID($ACKT));
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Cell* rep = gclk.representative_ff;
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double clk_duty = get_cell_activity(rep, ID(CLK), ID($DUTY));
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double ce_duty = get_cell_activity(rep, ID(EN), ID($DUTY));
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double clk_activity = get_cell_activity(rep, ID(CLK), ID($ACKT));
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double ce_activity = get_cell_activity(rep, ID(EN), ID($ACKT));
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double ce_active_frac = clk.pol_ce ? ce_duty : (1.0 - ce_duty);
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// Calculate the duty and activity of the gated clock.
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double gclk_duty = clk_duty * ce_duty;
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double gclk_duty = clk_duty * ce_active_frac;
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double gclk_ackt = clk_activity * ce_activity;
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// Set new activity/duty attributes
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gclk.new_net->set_string_attribute(ID($DUTY),
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stringf("%f", gclk_duty));
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gclk.new_net->set_string_attribute(ID($ACKT),
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stringf("%f", gclk_ackt));
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// Set fanout to 1 for the ICG
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// Set cell attributes for the new ICG
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icg->set_string_attribute(ID($FANOUT), "1");
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icg->set_string_attribute(ID($ACKT),
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stringf("CLK=%f EN=%f SE=0.0 GCLK=%f",
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clk_activity, ce_activity, gclk_ackt));
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icg->set_string_attribute(ID($DUTY),
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stringf("CLK=%f EN=%f SE=0.0 GCLK=%f",
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clk_duty, ce_duty, gclk_duty));
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// Set for use in FF annotation
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gclk.gclk_duty = gclk_duty;
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gclk.gclk_ackt = gclk_ackt;
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gclk.activity_set = true;
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}
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gclk.icg_cell = icg;
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@ -530,6 +548,13 @@ struct ClockgatePass : public Pass {
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Cell *new_ff = ff.emit();
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new_ff->set_bool_attribute(ID::is_clock_gated);
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// Update the flop with new activity/duty attributes
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if (it->second.activity_set) {
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auto &g = it->second;
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update_ff_activity_attr(new_ff, ID($DUTY), g.gclk_duty);
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update_ff_activity_attr(new_ff, ID($ACKT), g.gclk_ackt);
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}
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gated_flop_count++;
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}
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ce_ffs.clear();
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