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fix: check the cell is a child node before skipping

This commit is contained in:
Chia-Hsiang Chang 2026-05-12 00:07:00 -07:00
parent 9e6d66d74e
commit eb83c40d24
1 changed files with 3 additions and 3 deletions
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6
passes/sat/sim.cc
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@ -651,8 +651,8 @@ struct SimInstance
// If the cell is a blackbox child of an instance root module, skip it
if (shared->blackbox_children) {
Module *m = module->design->module(cell->type);
if (m)
Module *mod = module->design->module(cell->type);
if (shared->instance_root_modules.count(mod->name))
return;
}
@ -1614,7 +1614,7 @@ struct SimWorker : SimShared
fstHandle id = fst->getHandle(iscope + "." + RTLIL::unescape_id(wire->name));
if (id == 0) {
log_error("Can't find port '%s' on module '%s' in FST.\n",
(iscope + "." + RTLIL::unescape_id(wire->name)).c_str(), RTLIL::unescape_id(m->name).c_str());
(iscope + "." + RTLIL::unescape_id(wire->name)).c_str(), log_id(m));
}
t->fst_inputs[wire] = id;
}