stefan schippers
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a306d97725
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update docs (#pattern#@name tag)
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2025-02-23 12:12:59 +01:00 |
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stefan schippers
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315c5bd600
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added symbol attributes @spice_get_current_<param>, @spice_get_modelparam_<param>, @spice_get_modelvoltage_<param>
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2025-01-16 02:52:52 +01:00 |
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stefan schippers
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9d54269d25
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doc updates (@spice_get_node)
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2025-01-11 01:34:41 +01:00 |
Matthias Schweikardt
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c1f4d7e5f1
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fix typos in html doc
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2024-06-27 15:59:42 +02:00 |
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stefan schippers
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9c750b5044
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add @#pin:spice_get_voltage attribute for pin texts that displays voltage of net attached to pin. remove net_name=... attributes from symbols and instance global attributes since it is no more used. set default value for show_pin_net_names to 1.
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2024-05-02 10:32:12 +02:00 |
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stefan schippers
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215114fce3
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update symbol property syntax docs with new attribute verilog_extra_dir
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2024-02-05 12:08:10 +01:00 |
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stefan schippers
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0597bae9dc
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various improvements for automatic port order detection from included subcircuit via spice_sym_def and @pinlist in format string, documentation updates in tutorial_use_existing_subckt.html
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2024-01-08 14:57:21 +01:00 |
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stefan schippers
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b2965f4c3d
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attribute default_schematic=ignore: if set in a symbol xschem will not descend into the default schematic associated to symbol. Instances MUST specify a schematic attribute
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2023-12-02 13:17:32 +01:00 |
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stefan schippers
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1b7a035220
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fix graph_fullxzoom in case of non monotonical sweep x axis variable
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2023-10-18 16:10:08 +02:00 |
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stefan schippers
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53207732b9
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minor doc/man updates, typo cleanups
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2023-09-19 23:59:01 +02:00 |
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stefan schippers
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41c5ded9a1
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documentation updates about new lvs_ignore attribute and *_ignore=short extension
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2023-06-07 12:05:12 +02:00 |
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stefan schippers
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7ad930e7f0
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istances with *_ignore=true attribute will be drawn greyed out in schematics in the corresponding netlisting mode; command in Properties menu to toggle this attribute on selected instances
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2023-05-10 03:13:13 +02:00 |
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stefan schippers
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081e16d7d9
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doc updates (schematic symbol attribute)
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2022-12-20 12:32:15 +01:00 |
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stefan schippers
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4b05d996e5
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doc updates (lvs_format netlisting attribute)
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2022-11-25 10:52:58 +01:00 |
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stefan schippers
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01df7876d7
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update documentation for verilogprefix attr.
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2022-11-22 18:09:43 +01:00 |
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Stefan Frederik
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74dad2e034
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doc updates (@path and @symname_ext patterns in symbols)
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2022-11-01 23:09:55 +01:00 |
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Stefan Frederik
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aa6b8f0123
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Doc updates (sim_pinnumber), example circuits update
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2022-10-17 12:45:48 +02:00 |
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Stefan Frederik
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e7d8cd409b
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doc updates (pinnumber)
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2022-10-16 23:00:19 +02:00 |
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Stefan Frederik
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06fc742e60
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doc updates about {verilog,vhdl,spice}_sym_def, fix regression (possible crash) in verilog_block_netlist (thanks to Joanne), fix regression (wrong verilog test netlist) in print_verilog_primitive() (thanks to Joanne)
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2022-10-04 00:37:09 +02:00 |
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Stefan Frederik
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d174306880
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added verilog_extra attribute for list of implicit node connections to symbol in verilog netlists. extra attribute still used in verilog as a list of attributes NOT use as component attributes / symbol parameters.
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2022-10-03 01:20:33 +02:00 |
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Stefan Frederik
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b7c7c336dd
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added vhdl_sym_def, spice_sym_def, verilog_sym_def attributes for symbols. If defined and not empty the corresponding netlister will insert the content of the attribute instead of the subcircuit schematic implementation. Typically used to include a definition file. Updated documentation
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2022-09-29 11:59:43 +02:00 |
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Stefan Frederik
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ce4bd4837a
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changed @schname to @schname_ext and added @schname that expands to the schematic name containing the instance, with no extension (no .sch)
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2022-08-10 08:38:49 +02:00 |
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Stefan Frederik
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0e25935254
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added @topschname predefined attribute that expands to the toplevel schematic name (no path) with no .sch extension
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2022-08-10 01:45:07 +02:00 |
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Stefan Frederik
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54fcf126f6
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doc updates (sym attributes)
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2022-01-11 04:17:17 +01:00 |
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Stefan Frederik
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de0afdd843
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refactor image sizes in htmldocs
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2021-10-13 17:33:10 +02:00 |
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Stefan Frederik
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13df66243e
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leave out pdf from svn
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2021-10-13 17:23:05 +02:00 |
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Stefan Frederik
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a16e7e6e5d
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documentation corrections
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2021-10-12 23:13:59 +02:00 |
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Stefan Frederik
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945368db9c
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xschem simulation doc updates
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2021-09-27 16:41:32 +02:00 |
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Stefan Frederik
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8079f626ec
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documentation update about tcleval(...) tcl substitution of attributes by get_tok_value()
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2021-09-20 01:57:04 +02:00 |
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Stefan Frederik
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89f32313c3
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doc updates; only hilight connected instances (when doing a net highlight) if symbol (or instance) has highlight=true attribute set.
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2021-01-03 17:34:08 +01:00 |
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Stefan Frederik
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044892a7b3
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documentation updates
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2021-01-02 22:18:46 +01:00 |
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Stefan Schippers
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91e74fadcb
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"@#n:net_name" attribute (n = pin name or number) in symbols translates to net name attached to pin. "lab_show.sym" component that shows (does not assign) net name. "highlight=true" attribute can be given on instances in addition to symbols
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2020-09-30 00:30:48 +02:00 |
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Stefan Schippers
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9c1a940825
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doc updates (@spiceprefix)
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2020-09-15 23:44:24 +02:00 |
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Stefan Schippers
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f3bedb39a4
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eliminated any differences between SYMBOL and SCHEMATIC files. There is no "current_type" variable any more. Symbols who used to have netlisting rules defined in schvhdlprop have now these attributes in schsymbolprop. Old symbol files with schvhdlprop will be saved with netlisting rules in schsymbolprop.
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2020-09-14 10:27:45 +02:00 |
schippes
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c5f412bdb7
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symbol attribute @symname will display symbol name without extension as it used to be in earlier versions. @symname_ext will print full rootname of symbol. Some doc updates on symbol attributes
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2020-08-12 11:31:42 +02:00 |
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Stefan SChippers
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5e8df730a0
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populating xschem git repo
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2020-08-08 15:47:34 +02:00 |