leave out pdf from svn

This commit is contained in:
Stefan Frederik 2021-10-13 17:23:05 +02:00
parent e816228867
commit 13df66243e
36 changed files with 191 additions and 190 deletions

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@ -26,15 +26,15 @@ p{padding: 15px 30px 10px;}
Load a test schematic (for example <kbd>test.sch</kbd>). Let's consider the
resistor symbol. Use the <kbd>Insert</kbd> key to place the <kbd>devices/res.sym</kbd> symbol.
</p>
<img src="xschem_insert.png">
<img src="xschem_insert.png" width="640">
<p>
Use the file selector dialog to locate <kbd>res.sym</kbd>.
</p>
<img src="building_symbol_01.png">
<img src="building_symbol_01.png" width="640">
<p>
Now select the resistor by left-clicking on it (it will turn to grey color)
</p>
<img src="building_symbol_02.png">
<img src="building_symbol_02.png" width="640">
<p>
After selecting the component (component is an instance of a symbol)
descend into its symbol definition
@ -44,7 +44,7 @@ p{padding: 15px 30px 10px;}
the parent schematic drawing
before loading the resistor symbol. Answer 'yes'.
</p>
<img src="building_symbol_03.png">
<img src="building_symbol_03.png" width="640">
<p>
The image above is the 'symbol definition', you can now select individual graphic elements that
represent the symbol, lines, rectangles and text.

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@ -238,18 +238,18 @@ set replace_key(w) Shift-W
The first thing to do is to drag a selection rectangle with the mouse holding down the
<kbd>Ctrl</kbd> key, cutting wires we need to stretch:
</p>
<img src="commands1.png">
<img src="commands1.png" width="640">
<p>
After selection is done hit the move (<kbd>'m'</kbd>) key. You will be able to move the selected part
of the schematic keeping connected the wires crossing the selection rectangle:
</p>
<img src="commands2.png">
<img src="commands2.png" width="640">
<p>
In our example we needed to move up part of the circuit, the end result is shown in next picture.
Multiple stretch rectangles can be set using the <kbd>Shift</kbd> key in addition to the
<kbd>Ctrl</kbd> key after setting the first stretch area.
</p>
<img src="commands3.png">
<img src="commands3.png" width="640">
<h3>PLACE WIRES SNAPPING TO CLOSEST PIN OT NET ENDPOINT</h3>
<p>
@ -261,12 +261,12 @@ set replace_key(w) Shift-W
while creating wires, lines, and moving, stretching, copying objects, pressing the <kbd>'h'</kbd> or <kbd>'v'</kbd> keys
will constrain the movement to a horizontal or vertical direction, respectively.
</p>
<img src="commands4.png" style="margin-bottom: 0px;" >
<img src="commands4.png" style="margin-bottom: 0px;" width="640">
<p style="padding-top:0px;"> <i>
Constrained horizontal move: regardless of the mouse pointer Y position movement
occurs on the X direction only.
</i></p>
<img src="commands5.png" style="margin-bottom: 0px;">
<img src="commands5.png" style="margin-bottom: 0px;" width="640">
<p style="padding-top:0px;"> <i>
Unconstrained move: objects follow the mouse pointer in X and Y direction.
</i></p>

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@ -26,18 +26,18 @@ p{padding: 15px 30px 10px;}
component properties. Start by opening a test schematic window (you may delete any existing
stuff in it if any).
</p>
<img src="load_schematic.png">
<img src="load_schematic.png" width="640">
<p>
Now start by inserting a component, consider for example <kbd>devices/nmos4.sym</kbd>; press the
<kbd>Insert</kbd> key, navigate to the <kbd>devices</kbd> design library and open the <kbd>nmos4.sym</kbd>
symbol.
</p>
<img src="nmos4_symbol.png">
<img src="nmos4_symbol.png" width="640">
<p>
Now draw some wires on each pin of the nmos; place the mouse pointer on the component pins and
use the <kbd>'w'</kbd> bindkey.
</p>
<img src="nmos4_wires.png">
<img src="nmos4_wires.png" width="640">
<p>
we need now to put labels on wire ends: use the <kbd>Insert</kbd> key and locate the
<kbd>devices/lab_pin.sym</kbd> symbol. After the <kbd>lab_pin</kbd> symbol is placed you can move it
@ -46,13 +46,13 @@ p{padding: 15px 30px 10px;}
placing the first one you may copy the others from it (<kbd>'c'</kbd> bindkey). The end result
should look like this:
</p>
<img src="nmos4_labels.png">
<img src="nmos4_labels.png" width="640">
<p>
This is what an electrical circuit is all about: a network of wires and components. In this
schematic we have 5 components (4 labels and one mos) and 4 nets. It is not mandatory to put a
wire segment between component pins; we could equally well do this:
</p>
<img src="nmos4_labels2.png">
<img src="nmos4_labels2.png" width="640">
<p>
This circuit is absolutely equivalent to the previous one: it will produce the same
device connectivity netlist.<br>
@ -60,22 +60,22 @@ p{padding: 15px 30px 10px;}
component properties. Select the wire label on the nmos source pin and press the <kbd>'q'</kbd>
bindkey:
</p>
<img src="nmos4_editprop.png">
<img src="nmos4_editprop.png" width="640">
<p>
Now, replace the 'xxx' default string in the dialog with a different name (example: SOURCE)
After clicking <kbd>OK</kbd> the source terminal will have the right label.
</p>
<img src="nmos4_editprop2.png">
<img src="nmos4_editprop2.png" width="640">
<p>
repeat the process for the remaining GATE, DRAIN, BODY terminals;
</p>
<img src="nmos4_editprop3.png">
<img src="nmos4_editprop3.png" width="640">
<p>
The following picture shows the <kbd>lab_pin</kbd> component with its properties and
the corresponding symbol definition with its global properties (remember global properties in
the <a href="xschem_properties.html">xschem_properties</a> slide)
</p>
<img src="properties.png" style="height:70%;">
<img src="properties.png" style="height:70%;" width="640">
<p>
when building the netlist XSCHEM will look for wires that touch the red square of the lab_pin
component and name that wires with the component 'lab' property.
@ -85,7 +85,7 @@ p{padding: 15px 30px 10px;}
<p>
We need now to edit the nmos properties. Select it and press the <kbd>'q'</kbd> bindkey
</p>
<img src="nmos_properties.png">
<img src="nmos_properties.png" width="640">
<p>
from the edit properties dialog you see there are 5 attributes with values defined:
</p>
@ -100,7 +100,7 @@ p{padding: 15px 30px 10px;}
We have never defined a value for these properties. These are the default values defined in the
<kbd>template</kbd> attribute in the global <kbd>nmos4.sym</kbd> property string.
</p>
<img src="nmos_properties2.png">
<img src="nmos_properties2.png" width="640">
<p>
We may want to change the dimensions of the transistor; simply change the <kbd>w</kbd> and
<kbd>l</kbd> attribute values.<br>
@ -108,7 +108,7 @@ p{padding: 15px 30px 10px;}
All simulators require that components are unique, it is not permitted to have 2 components
with identical name, so XSCHEM enforces this.
</p>
<img src="nmos_properties3.png">
<img src="nmos_properties3.png" width="640">
<p>
If a name is set that matches an existing component
@ -130,7 +130,7 @@ p{padding: 15px 30px 10px;}
These components are used to name a net or a pin of another component. They do not have any other function
other than giving an explicit name to a net.
</p>
<img src="special1.png">
<img src="special1.png" width="640">
<li><kbd>devices/lab_pin.sym</kbd></li>
<li><kbd>devices/lab_wire.sym</kbd></li>
<li><kbd>devices/launcher.sym</kbd></li>

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@ -24,7 +24,7 @@ p{padding: 15px 30px 10px;}
Component property strings can be set in the usual way with the <kbd>'q'</kbd> on a selected
component instance or by menu <kbd>Properties&nbsp;--&gt;&nbsp;Edit</kbd>
</p>
<img src="component_properties.png">
<img src="component_properties.png" width="640">
<p>
The dialog box allows to change the property string as well as the symbol reference. The property string
is essentially a list of <kbd>attribute=value</kbd> items. As with symbol properties if a <kbd>value</kbd>
@ -110,7 +110,7 @@ name="mchanged_name" model=\"nmos\" w="20u" l="3u" m="10"
commands, the statement will be executed when pressing the <kbd>&lt;shift&gt;H</kbd> key
(or <kbd>&lt;Alt&gt; left mouse button</kbd>) on the selected instance.
<br>The <kbd>tclcommand</kbd> and <kbd>url</kbd> properties are mutually exclusive.</p>
<img src="component_properties3.png">
<img src="component_properties3.png" width="640">
<li><kbd>only_toplevel</kbd></li>
<p>this attribute is valid only on <kbd>netlist_commands</kbd> type symbols and specifies that the
symbol should be netlisted only if it is instantiated in the top-most hierarchy. This is very usefull
@ -118,7 +118,7 @@ name="mchanged_name" model=\"nmos\" w="20u" l="3u" m="10"
and are meaningfull only when simulating the block, but should be skipped if the component
is simulated as part of a bigger system which has its own (at higher hierarchy level)
<kbd>netlist</kbd>component for Spice commands.</p>
<img src="component_properties0.png">
<img src="component_properties0.png" width="640">
<li><kbd>lock</kbd></li>
<p> A <kbd>lock=true</kbd> attribute will make the symbol not editable. the only way to make it editable again is
to right click on it to bring up the edit attributes dialog box and set to false. This is useful for title
@ -150,7 +150,7 @@ name="mchanged_name" model=\"nmos\" w="20u" l="3u" m="10"
This property is applicable only to <kbd>label</kbd> type components: <kbd>ipin.sym</kbd>,
<kbd>iopin.sym</kbd>, <kbd>opin.sym</kbd>, <kbd>lab_pin.sym</kbd>, <kbd>lab_wire.sym</kbd>.
</p>
<img src="component_properties1.png">
<img src="component_properties1.png" width="640">
<li><kbd>verilog_type</kbd></li>
<p>This is the same as sig_type but for verilog netlisting: can be used to declare a <kbd>wire</kbd>
or a <kbd>reg</kbd> or any other datatype supported by the verilog language.
@ -160,7 +160,7 @@ name="mchanged_name" model=\"nmos\" w="20u" l="3u" m="10"
Consider the following examples of placement of <kbd>generic_pin</kbd> components in a
VHDL design:
</p>
<img src="component_properties2.png">
<img src="component_properties2.png" width="640">
<p> As you will see in the <a href="parameters.html">parameters</a> slide, generics (they are just
parameters passed to components) can be passed also via property strings in addition to using
<kbd>generic_pin</kbd> components.</p>

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@ -1,7 +1,8 @@
#### before creating set width of images in html:
sed -i '/<img/s/>/ width="700">/' *.html
sed -i '/<img/s/ width="[0-9]+"//' *.html
sed -i '/<img/s/>/ width="640">/' *.html
cat \
/home/schippes/xschem-repo/trunk/doc/xschem_man/xschem_man.html \
@ -35,4 +36,4 @@ tutorial_gschemtoxschem.html \
| htmldoc --no-toc --left 10mm --webpage -t pdf -f xschem_man.pdf -
#### restore after doing pdf:
sed -i '/<img/s/ width="700"//' *.html
sed -i '/<img/s/ width="[0-9]+"//' *.html

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@ -27,12 +27,12 @@ p{padding: 15px 30px 10px;}
Lets start placing the input and output schematic pins; use the <kbd>Insert</kbd> key and locate the
<kbd>devices/ipin.sym</kbd> symbol. After placing it change its lab attribute to <kbd>'A'</kbd>
</p>
<img src="creating_schematic1.png">
<img src="creating_schematic1.png" width="640">
<p>
Copy another instance of it and set its lab attribute to <kbd>B</kbd>. Next place an output pin
<kbd>devices/opin.sym</kbd> and set its lab to <kbd>Z</kbd>. The result will be as follows:
</p>
<img src="creating_schematic2.png">
<img src="creating_schematic2.png" width="640">
<p>
Now we need to build the actual circuit. Since we plan to do it in CMOS technology we need
nmos and pmos transistors. Place one nmos from <kbd>devices/nmos4.sym</kbd> and one
@ -40,12 +40,12 @@ p{padding: 15px 30px 10px;}
copying (<kbd>'c'</kbd> bindkey) place 4 transistors in the following way (the upper ones are pmos4,
the lower ones nmos4):
</p>
<img src="creating_schematic3.png">
<img src="creating_schematic3.png" width="640">
<p>
now draw wires to connect together the transistor to form a NAND gate; in the picture i have highlighted
2 electrical nodes by selecting one wire segment of each and pressing the <kbd>'k'</kbd> bindkey.
</p>
<img src="creating_schematic4.png">
<img src="creating_schematic4.png" width="640">
<p>
Next we need to place the supply nodes , VCC and VSS. we decide to use global nodes. Global nodes in
SPICE semantics are like global variables in C programs, they are available everywhere, we do not
@ -55,7 +55,7 @@ p{padding: 15px 30px 10px;}
Since the default names are respectively VDD and GND use the edit property bindkey <kbd>'q'</kbd>
to change these to VCC and VSS.
</p>
<img src="creating_schematic5.png">
<img src="creating_schematic5.png" width="640">
<p>
we still need to connect the body terminals of the mos transistors. One possibility is to
hookup the two upper pmos transistor terminals to VCC with wires, and the two bottom nmos
@ -64,13 +64,13 @@ p{padding: 15px 30px 10px;}
use 4 instances of it to name the 4 body terminals. Remember, while moving (select and press
the <kbd>'m'</kbd> key) you can flip/rotate using the <kbd>R</kbd>/<kbd>F</kbd> keys.
</p>
<img src="creating_schematic6.png">
<img src="creating_schematic6.png" width="640">
<p>
Finally we must connect the input and output port connectors, and to complete the gate schematic
we decide to use W=8u for the pmos transistors. Select both the pmos devices and press the
edit proprty <kbd>'q'</kbd> key; modify from 5u (default) to 8u.
</p>
<img src="creating_schematic7.png">
<img src="creating_schematic7.png" width="640">
<p>
Now do a Save as operation, save it for example in <kbd>mylib/nand2.sch</kbd>.<br>
To make the schematic nicer we also add the title component. This component is not netlisted but is
@ -78,7 +78,7 @@ p{padding: 15px 30px 10px;}
component. The NAND gate is completed! (below picture also with grid, normally disabled in pictures
to make image sizes smaller).
</p>
<img src="creating_schematic8.png">
<img src="creating_schematic8.png" width="640">
<p>
Normally a cmos gate like the one used in this example is used as a building block (among many others)
for bigger circuits, therefore we need to enclose the schematic view above in a symbol representation.
@ -88,12 +88,12 @@ p{padding: 15px 30px 10px;}
XSCHEM has the ability to automatically generate a symbol view given the schematic view. Just press
the <kbd>'a'</kbd> bindkey in the drawing area of the nand2 gate.
</p>
<img src="creating_schematic9.png">
<img src="creating_schematic9.png" width="640">
<p>
After pressing 'OK' a <kbd>mylib/nand2.sym</kbd> file is generated. try opening it
(<kbd>File-&gt;Open</kbd>):
</p>
<img src="creating_schematic10.png">
<img src="creating_schematic10.png" width="640">
<p>
As you can see a symbolic view of the gate has been automatically created using the information
in the schematic view (specifically, the input/output pins). Now, this graphic is not really
@ -104,7 +104,7 @@ p{padding: 15px 30px 10px;}
segments you may need to reduce the snap factor (menu <kbd>View-&gt;Half snap thresholf</kbd>)
remember to reset the snap factor to its default setting when done.
</p>
<img src="creating_schematic11.png">
<img src="creating_schematic11.png" width="640">
<p>
This completes the nand2 component. It is now ready to be placed in a schematic. Open a test schematic
(for example <kbd>mylib/test.sch</kbd> (remember to save the nand2.sym you have just created),
@ -112,7 +112,7 @@ p{padding: 15px 30px 10px;}
Then insert <kbd>devices/lab_pin.sym</kbd> components and place wires to connect some nodes to the
newly instantiated nand2 component:
</p>
<img src="creating_schematic12.png">
<img src="creating_schematic12.png" width="640">
<p>
This is now a valid circuit. Let's test it by extracting the SPICE netlist. Enable the showing
of netlist window (<kbd>Options -&gt; Show netlist win</kbd>, or <kbd>'A'</kbd> key).
@ -147,13 +147,13 @@ m4 net1 B VSS VSS nmos w=5u l=0.18u m=1
This is an example of a hierarchical circuit. The nand2 is a symbol view of another lower level
schematic. We may place multiple times the nand2 symbol to create more complex circuits.
</p>
<img src="creating_schematic13.png">
<img src="creating_schematic13.png" width="640">
<p>
By selecting one of the nand2 gates and pressing the <kbd>'e'</kbd> key or menu
<kbd>Edit -&gt; Push schematic</kbd> we can 'descend' into it and navigate through the various
hierarchies. Pressing <kbd>&lt;ctrl&gt;e</kbd> returns back to the upper level.
</p>
<img src="creating_schematic14.png">
<img src="creating_schematic14.png" width="640">
<p>
This is the corresponding netlist:
</p>
@ -193,7 +193,7 @@ m4 net1 B VSS VSS nmos w=5u l=0.18u m=1
select the symbol, then
Press the <kbd>'H'</kbd> key or the <kbd>Symbol-&gt;Attach pins to component instance</kbd> menu entry.
</p>
<img src="auto_wiring1.png">
<img src="auto_wiring1.png" width="640">
<p>
The <kbd>use prefix</kbd> will prepend the shown prefix to the wire names to be attached to the component.
The default value for the prefix is the instance name followed by an underscore.<br>
@ -203,7 +203,7 @@ m4 net1 B VSS VSS nmos w=5u l=0.18u m=1
the second example with <kbd>use prefix</kbd> not selected and <kbd>use wire labels</kbd> selected. As you
can see in the second example you may draw wires without overstriking the labels.
</p>
<img src="auto_wiring2.png">
<img src="auto_wiring2.png" width="640">
<!-- end of slide -->
<div class="filler"></div>

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@ -27,13 +27,13 @@ p{padding: 15px 30px 10px;}
press the edit property bindkey (<kbd>q</kbd> key) and set a new name for the symbol, set also the
<kbd>copy cell</kbd> checkbox:
</p>
<img src="symbol_generation5.png">
<img src="symbol_generation5.png" width="640">
<p>
After pressing <kbd>OK</kbd> a copy (both schematic and symbol views) of the previously selected
component will be created. After this clone operation modifications can be made on the newly
created schematic and symbol views without affecting the original component.
</p>
<img src="symbol_generation6.png">
<img src="symbol_generation6.png" width="640">
<p> for more info on symbols see the <a href="tutorial_create_symbol.html">Tutorial</a> </p><br>

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@ -67,7 +67,7 @@ p{padding: 15px 30px 10px;}
(lines, polygons, rectangles, text) that can be shown as a single atomic entity.
Once created a symbol can be placed in a schematic. The instantiation of a symbol is called 'component'.
</p>
<img src="building_symbol_03.png">
<img src="building_symbol_03.png" width="640">
<p>
The above picture shows a resistor symbol, built drawing some lines on layer 4 (green),
some pins on layer 5 (red) and some text.
@ -75,7 +75,7 @@ p{padding: 15px 30px 10px;}
and can be placed like just any other primitive object multiple times in a schematic window
with different orientations.
</p>
<img src="developer_info_01.png">
<img src="developer_info_01.png" width="640">
<h3>WIRES</h3>
<p>
Another special primitive object in XSCHEM is 'Wire', Graphically it is drawn as a line on layer 1 (wires).
@ -101,7 +101,7 @@ p{padding: 15px 30px 10px;}
XSCHEM coordinates are stored as double precision floating point numbers, axis orientation is the same as Xorg
default coordinate orientation:
</p>
<img src="developer_info_02.png">
<img src="developer_info_02.png" width="640">
<p>
When drawing objecs in XSCHEM coordinates are snapped to a multiple of 10.0 coordinate units,
so all drawn objects are easily aligned.
@ -242,7 +242,7 @@ in this case only the verilog-related global property has some definition. This
of text objects. Using rotation and mirror text can be aligned to any corner of its bounding box, so there are 4 different
alignments for vertical text and 4 different alignments for horizontal text. Below picture shows how text is displayed
with respect to its anchor point.
<img src="developer_info_03.png"></li>
<img src="developer_info_03.png" width="640"></li>
<li> text X and Y sizes are stored as floating point numbers.</li>
<li> Finally a property string is stored with the same syntax as the displayed text field.
Currently the following attributes are predefined for text objects:<br><br>
@ -293,7 +293,7 @@ in this case only the verilog-related global property has some definition. This
the arc radius, the start angle (measured counterclockwise from the three o'clock direction), the arc sweep angle
(measured counterclockwise from the start angle) and the property string (empty in this example).
Angles are measured in degrees.<br>
<img src="developer_info_07.png">
<img src="developer_info_07.png" width="640">
</p>
<h3>COMPONENT INSTANCE</h3>
<p>
@ -306,7 +306,7 @@ in this case only the verilog-related global property has some definition. This
mirror (integer range [0:1]), and a property string defining various attributes
including the mandatory <kbd>name=...</kbd> attribute.<br>
Orientation and mirror meanings are as follows:<br>
<img src="developer_info_04.png">
<img src="developer_info_04.png" width="640">
</p>
<h3>EXAMPLE OF A COMPLETE SYMBOL FILE (7805.sym)</h3><br>
<pre class="code">
@ -335,7 +335,7 @@ T {@#0:pinnumber} -47.5 -2.5 0 0 0.12 0.12 {}
T {@#1:pinnumber} -2.5 12.5 0 0 0.12 0.12 {}
T {@#2:pinnumber} 47.5 -2.5 0 1 0.12 0.12 {}
</pre>
<img src="developer_info_05.png"><br>
<img src="developer_info_05.png" width="640"><br>
<br>
<h3>EXAMPLE OF A COMPLETE SCHEMATIC FILE (pcb_test1.sch)</h3><br>
<pre class="code">
@ -420,7 +420,7 @@ assign VCC12=1;
"}
C {verilog_timescale.sym} 1050 -100 0 0 {name=s1 timestep="1ns" precision="1ns" }
</pre>
<img src="developer_info_06.png"><br>
<img src="developer_info_06.png" width="640"><br>
<br>
<!-- end of slide -->
<div class="filler"></div>

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@ -40,10 +40,10 @@ p{padding: 15px 30px 10px;}
XSCHEM is intended to handle very big schematics, mouse drags are used to select a rectangular portion
of the circuit to move / stretch, if a mouse click + drag moves components it would be very easy to move
things instead of selecting things. This happens with geda-gschem for example: <br>
<img src="faq00.png"><br>
<img src="faq00.png" width="640"><br>
Here i want to select the R7 and R8 resistors, so i place the mouse close to the upper-left R7 boundary and
start dragging, but since clicking also selects nearby objects the wire gets selected and moving the mouse will move the wire.<br>
<img src="faq01.png"><br>
<img src="faq01.png" width="640"><br>
This behavior is considered not acceptable so clicking and dragging will never modify the circuit.
Pressing 'm' (for move) or 'c' (for copy) makes the behavior more predictable and safer. A new user just needs to get used to it.
</p>

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@ -29,27 +29,27 @@ p{padding: 15px 30px 10px;}
<kbd>&lt;Shift&gt;K</kbd> clears all highlight nets, <kbd>&lt;Ctrl&gt;k</kbd> clears selected nets.
</p>
<p>Select some nets...</p>
<img src="probes1.png">
<img src="probes1.png" width="640">
<p>...press the <kbd>'k'</kbd> key...</p>
<img src="probes2.png">
<img src="probes2.png" width="640">
<p>...all nets are highlighted, select the white net...</p>
<img src="probes3.png">
<img src="probes3.png" width="640">
<p>..press the <kbd>&lt;Ctrl&gt;k</kbd> key and white net is un-highlighted...</p>
<img src="probes4.png">
<img src="probes4.png" width="640">
<p>
if you descend into component instance <kbd>x1</kbd> (mos_power_ampli) (<kbd>'e'</kbd> key) you will see the highlight nets
propagated into the child component.
</p>
<img src="probes5.png">
<img src="probes5.png" width="640">
<p>
A very useful function is the 'View only probes' mode, (<kbd>'5'</kbd> key) that hides
everything but the highlight probes. This is useful in very big VLSI designs to quickly
locate start and end point of nets.
Pressing again the <kbd>'5'</kbd> key restores the normal view.
</p>
<img src="probes6.png">
<img src="probes6.png" width="640">
<br>
<img src="probes7.png">
<img src="probes7.png" width="640">
<!-- end of slide -->
<div class="filler"></div>

View File

@ -43,7 +43,7 @@ p{padding: 15px 30px 10px;}
<p>
Consider the following top level schematic, part of the XSCHEM distribution
(<kbd>examples/poweramp.sch</kbd>).</p>
<img src="netlisting1.png">
<img src="netlisting1.png" width="640">
<p>
This schematic is made of some <kbd>leaf</kbd> components and some
<kbd>subcircuit</kbd> components:

View File

@ -37,12 +37,12 @@ p{padding: 15px 30px 10px;}
<kbd>shift</kbd> key pressed, so with edit property <kbd>'q'</kbd> key
you will change properties for both.
</p>
<img src="parameters1.png">
<img src="parameters1.png" width="640">
<p>
By doing the same for the NMOS transistors we end up with a schematic with fully
parametrized transistor geometry.
</p>
<img src="parameters2.png">
<img src="parameters2.png" width="640">
<p>
Now we have to change the <kbd>mylib/nand2.sym</kbd> symbol. Save the changes in the
nand2 schematic (<kbd>&lt;shift&gt;S</kbd>) and load (<kbd>Ctrl-o</kbd>)
@ -50,7 +50,7 @@ p{padding: 15px 30px 10px;}
anything hit the <kbd>'q'</kbd> key to edit the symbol global property string.
make the changes as shown in the picture.
</p>
<img src="parameters3.png">
<img src="parameters3.png" width="640">
<p>
The <kbd>template</kbd> attribute defines the default values to assign to WN, LN, WP, LP.
The <kbd>format</kbd> string is updated to pass parameters,
@ -59,7 +59,7 @@ p{padding: 15px 30px 10px;}
You may also add some descriptive text (<kbd>'t'</kbd>)
so you will visually see the actual value for the parameters of the component:
</p>
<img src="parameters4.png">
<img src="parameters4.png" width="640">
<p>
Now close the modified symbol saving the changes. Let's test the placement of the
new modified symbol. Start a new
@ -67,7 +67,7 @@ p{padding: 15px 30px 10px;}
the NAND2 gate. by pressing <kbd>'q'</kbd> you are now able to speciify different values
for the geometric parameters:
</p>
<img src="parameters5.png">
<img src="parameters5.png" width="640">
<p>
let's place a second instance (select and <kbd>'c'</kbd> copy key) of the nand gate.
set for the second NAND gate different WN, LN, WP, LP parameters.
@ -79,7 +79,7 @@ p{padding: 15px 30px 10px;}
TIP: XSCHEM can automatically place pin labels on a component: just select it and
press the <kbd>Shift-h</kbd> key.
</p>
<img src="parameters6.png">
<img src="parameters6.png" width="640">
<p>
now save the new schematic (<kbd>'s'</kbd> key, save in <kbd>mylib/test2.sch</kbd>)
If you enable the netlist window, menu <kbd>Options-&gt;Show netlist win</kbd> and press

View File

@ -29,13 +29,13 @@ user:~$ xschem
<p> the xschem window should appear. If <kbd>xschem</kbd> is not in the search path then specify
its full pathname.
</p>
<img src="xschem_home.png">
<img src="xschem_home.png" width="640">
<p> if a filename is given that file will be loaded on startup: </p>
<pre class="code">
user:~$ xschem .../xschem_library/examples/0_examples_top.sch
</pre>
<img src="xschem_home1.png">
<img src="xschem_home1.png" width="640">
@ -98,12 +98,12 @@ the schematic file `counter.sch' will be loaded.
To create a new schematic run xschem and give a non existent filename:<br>
<kbd>xschem aaa.sch</kbd>
</p>
<img src="xschem_new_file.png">
<img src="xschem_new_file.png" width="640">
<p>
You can save the schematic by pressing <kbd>'&lt;ctrl shift&gt;s'</kbd> or
by using the menu <kbd>File - Save As</kbd>:
</p>
<img src="xschem_saveas.png">
<img src="xschem_saveas.png" width="640">
<p>
If no filename change is needed you can just use <kbd>File - Save</kbd>.
Now a new empty schematic file is created. You can use this <kbd>test.sch</kbd> for testing while

View File

@ -28,7 +28,7 @@ p{padding: 15px 30px 10px;}
can be placed in a schematic acting as a container of text files for all the needed SPICE models and any
additional information to make the schematic ready for simulation.
</p>
<img src="simulation10.png">
<img src="simulation10.png" width="640">
<p>
The <kbd>devices/netlist_not_shown</kbd> symbol shown in the picture (with name MODELS) for example contains
all the spice models of the components used in the schematic, this makes
@ -48,7 +48,7 @@ p{padding: 15px 30px 10px;}
that is able to show simulator results. Install these two valuable tools and setup
simulator invocation by using the Simulator configurator (<kbd>Simulation-&gt;Configure Simulators and tools</kbd>).
</p>
<img src="simulation11.png">
<img src="simulation11.png" width="640">
<p>
The text entry on the verilog line is the command to invoke icarus verilog simulation. <kbd>$N</kbd>
will be expanded to the netlist file (<kbd>$netlist_dir/greycnt.v</kbd>), while <kbd>$n</kbd>
@ -64,7 +64,7 @@ p{padding: 15px 30px 10px;}
<pre class="code">
user:~$ xschem examples/greycnt
</pre>
<img src="simulation1.png">
<img src="simulation1.png" width="640">
<p>
This testbench has a 8 bit input vector A[7:0] and two output vectors, B[7:0] and C[7:0].
B[7:0] is a grey coded vector, this mean that if A[7:0] is incremented as a binary number
@ -81,19 +81,19 @@ user:~$ xschem examples/greycnt
An Ex-Nor gate can be represented as a verilog primitive, so for the xnor gate we just need to setup
a <kbd>verilog_format</kbd> attribute in the global property string of the <kbd>xnor.sym</kbd> gate:
</p>
<img src="simulation2.png">
<img src="simulation2.png" width="640">
<p>
the 'assign' symbol is much simpler, in this property string you see the definition for SPICE
(<kbd>format</kbd> attribute), Verilog (<kbd>verilog_format</kbd>) and VHDL (<kbd>vhdl_format</kbd>).
This shows how a single symbol can be used for different netlist formats.
</p>
<img src="simulation3.png">
<img src="simulation3.png" width="640">
<p>
While showing the top-level testbench <kbd>greycnt</kbd> set XSCHEM in Verilog mode
(menu <kbd>Options-&gt;Verilog</kbd> radio button, or <kbd>&lt;Shift&gt;V</kbd> key) and press
the edit property <kbd>'q'</kbd> key, you will see some verilog code:
</p>
<img src="simulation4.png">
<img src="simulation4.png" width="640">
<p>
This is the testbench behavioral code that generates stimuli for the simulation and gives
instructions on where to save simulation results. If you generate the verilog netlist with
@ -149,28 +149,28 @@ endmodule
in this case the input vector A[7:0] and the grey coded B[7:0] vectors are shown. You can quit the
simulator log window by pressing <kbd>'q'</kbd>.
</p>
<img src="simulation5.png">
<img src="simulation5.png" width="640">
<p>
If simulation completes with no errors waveforms can be viewed. Press the <kbd>Waves</kbd> button
in the top-right of the menu bar, you may add waveforms in the gtkwave window:
</p>
<img src="simulation6.png">
<img src="simulation6.png" width="640">
<p>
If the schematic contains errors that the simulator can not handle instead of the simulation
log a window showing the error messages from the simulator is shown:
</p>
<img src="simulation7.png">
<img src="simulation7.png" width="640">
<p>
To facilitate the debug you may wish to edit the netlist (<kbd>Simulation-&gt;Edit Netlist</kbd>)
to locate the error, in the picture below i inserted deliberately a random string to
trigger the failure:
</p>
<img src="simulation8.png">
<img src="simulation8.png" width="640">
<p>
As you can see the error is in the behavioral code of the top level greycnt schematic, so edit the
global property (<kbd>'q'</kbd> key with no component selected) and fix the error.
</p>
<img src="simulation9.png">
<img src="simulation9.png" width="640">
<!-- end of slide -->
<div class="filler"></div>

View File

@ -56,7 +56,7 @@ p{padding: 15px 30px 10px;}
<li><kbd>netlist_commands</kbd>: the symbol is used to place SPICE commands into a spice netlist.
It should also have a <kbd>value</kbd> attribute that may contain arbitrary text that is
copied verbatim into the netlist. More on this in the <a href="...">netlist</a> slide.</li>
<img src="netlist_commands.png">
<img src="netlist_commands.png" width="640">
</ul><br>
<p class="important">
Only symbols of type <kbd>subcircuit</kbd> or <kbd>primitive</kbd> may be descended into
@ -87,10 +87,10 @@ p{padding: 15px 30px 10px;}
This allows to create different netlists for simulation (example: all MOS are defined as subcircuits)
or LVS (no device subcircuits).
</li>
<img src="spiceprefix.png">
<img src="spiceprefix.png" width="640">
<li><kbd>template</kbd>: Specifies default values for symbol parameters</li>
</ul>
<img src="general_rules.png">
<img src="general_rules.png" width="640">
<p>
The order these attributes appear in the property string is not important,
they can be on the same line or on different lines:
@ -135,7 +135,7 @@ type=nmos
instead of a <lbd>@</kbd> prefix. The only difference is that if no matching attribute is defined
in instance the <kbd>$var</kbd> resolves to <kbd>var</kbd> instead of an empty string.
</p>
<img src="attribute_substitution.png">
<img src="attribute_substitution.png" width="640">
<p>
If no matching attribute is defined in instance (for example we have <kbd>@W</kbd> in symbol and no <kbd>W=...</kbd> in instance)
the <kbd>@W</kbd> string is substituted with an empty string.
@ -184,7 +184,7 @@ type=nmos
MOS symbol definition; the <kbd>model</kbd> attribute is declared as <kbd>string</kbd> and it will be
quoted in VHDL netlists.
</p>
<img src="symbol_properties1.png">
<img src="symbol_properties1.png" width="640">
<p>the resulting netlist is shown here, note that without the <kbd>generic_type</kbd>
attribute the <kbd>irf5305</kbd> string would not be quoted.</p>
<pre class="code">
@ -215,7 +215,7 @@ end arch_test2 ;
pins. This allows to realize inherited connections, a kind of hidden pins with connections passed as parameters.
Example of a symbol definition for the following cmos gate:
</p>
<img src="symbol_property_syntax1.png">
<img src="symbol_property_syntax1.png" width="640">
<p>
the symbol property list defines 2 extra pins , VCCPIN and VSSPIN that can be assigned to at
component instantiation. The <kbd>extra</kbd> property tells XSCHEM that these 2 parameters are connection pins and not parameters
@ -298,7 +298,7 @@ m5 net1 b net2 VSSPIN nlv w=wn l=ln geomod=0 m=1
<p>
Defines the direction of a symbol pin. Allowed values are <kbd>in</kbd>, <kbd>out</kbd>, <kbd>inout</kbd>.
</p>
<img src="symbol_property_syntax2.png">
<img src="symbol_property_syntax2.png" width="640">
<li><kbd>propag=n</kbd></li>
<p>
This attribute instructs xschem to do a 'propagate highlight' from the pin with this attribute to the
@ -312,7 +312,7 @@ m5 net1 b net2 VSSPIN nlv w=wn l=ln geomod=0 m=1
global attribute. There is one 'funtion<kbd>n</kbd>' for each <kbd>n</kbd> output pin.
see 'function<kbd>n</kbd>' attribute for more info.
</p>
<img src="symbol_property_syntax4.png">
<img src="symbol_property_syntax4.png" width="640">
<li><kbd>clock=n</kbd></li>
<p>
@ -332,7 +332,7 @@ m5 net1 b net2 VSSPIN nlv w=wn l=ln geomod=0 m=1
after selecting the pin to know its sequence number). Multiple functions (function3="...", function4="...")
can be defined in case of elements with multiple outputs.
</p>
<img src="symbol_property_syntax5.png">
<img src="symbol_property_syntax5.png" width="640">
<p>
Commands that can appear in functions are:
</p>
@ -363,7 +363,7 @@ m5 net1 b net2 VSSPIN nlv w=wn l=ln geomod=0 m=1
Global nets in spice netlists are like global variables in a C program, these nets are accessible at any
hierarchical level without the need of passing them through pin connections.
</p>
<img src="symbol_property_syntax3.png">
<img src="symbol_property_syntax3.png" width="640">
<li><kbd>spice_netlist</kbd></li>
<li><kbd>verilog_netlist</kbd></li>
<li><kbd>vhdl_netlist</kbd></li>

View File

@ -42,7 +42,7 @@ p{padding: 15px 30px 10px;}
In a very similar way multiple instances can be placed in a schematic setting the 'name' attribute to a vector notation.<br>
For example in picture below <kbd>x22[15:0]</kbd> represents 16 inverters with names <kbd>x22[15],x22[14],...,x22[0]</kbd>.
</p>
<img src="busses0.png">
<img src="busses0.png" width="640">
<br>
<p>
@ -65,11 +65,11 @@ p{padding: 15px 30px 10px;}
(<kbd>devices/bus_connect_nolab.sym</kbd>) are used to take slices of bits from the main bus. Wire labels are used to define bus slices.
To display thick wires for busses, select all wire segments, then press 'q' and add attribute <kbd>bus=true</kbd>.
</p>
<img src="busses1.png">
<img src="busses1.png" width="640">
<p>
following picture shows an istantiation of 6 inverters:
</p>
<img src="busses2.png">
<img src="busses2.png" width="640">
<p>
The generated spice netlist is the following:
</p>
@ -86,7 +86,7 @@ xinv0 BB5 AA0 bf
<p>
Example of a more complex bus routing. main bus is a bundle of 2 buses: DATA_A[0..15] and DATA_B[0..15]
</p>
<img src="busses3.png">
<img src="busses3.png" width="640">
<!-- end of slide -->
<div class="filler"></div>
</div>

View File

@ -22,14 +22,14 @@ p{padding: 15px 30px 10px;}
In this tutorial we will build a 4011 CMOS quad 2-input NAND symbol.
This IC has 4 nand gates (3 pins each, total 4*3=12 pins + VDD,VSS power pins)
This device comes in a dual in line 14 pin package.<br>
<img src="tutorial_create_symbol_000.png">
<img src="tutorial_create_symbol_001.png">
<img src="tutorial_create_symbol_000.png" width="640">
<img src="tutorial_create_symbol_001.png" width="640">
</p>
<ol>
<li>
Start xschem giving <kbd> 4011-1.sym</kbd> as filename:<br>
<img src="tutorial_create_symbol_00.png">
<img src="tutorial_create_symbol_00.png" width="640">
</li>
<li>
@ -42,7 +42,7 @@ p{padding: 15px 30px 10px;}
are on grid with the default '10' snap setting.
Use the <kbd>m</kbd> key after selecting objects to move them around.
<br>
<img src="tutorial_create_symbol_01.png">
<img src="tutorial_create_symbol_01.png" width="640">
<p class="important"> Do <b>NOT</b> forget to reset the grid setting to the default (10) value
as soon as you finished drawing small objects, otherwise the rest of the objects will be all
off grid making the symbol unusable</p><br>
@ -59,7 +59,7 @@ p{padding: 15px 30px 10px;}
They should be equal to 5. remember to reset the grid to default 10 when done. <br><br>
<p class="important">Update: a more advanced command is now available to place a symbol pin: <kbd>Alt-p</kbd></p>
</li>
<img src="tutorial_create_symbol_02.png">
<img src="tutorial_create_symbol_02.png" width="640">
<li>
Now when <b>no object is selected</b> press <kbd>q</kbd> to edit the symbol global attributes. Type the following
@ -82,14 +82,14 @@ extra_pinnumber="14 7"
The <kbd>extra</kbd> and <kbd>extra_pinnumber</kbd> attributes specify extra pin connections that are
implicit, not drawn on the symbol. This is one of the possible styles to handle power connections on
slotted devices.<br>
<img src="tutorial_create_symbol_03.png">
<img src="tutorial_create_symbol_03.png" width="640">
</li>
<li>
Press the <kbd>t</kbd> to place some text; set text v and h size to 0.2 and write <kbd>@name</kbd>;
this will be replaced with the instance name (aka refdes) when using the symbol in a schematic.
Place a similar string with text <kbd>@symname</kbd> and place it under the @name string.<br>
<img src="tutorial_create_symbol_04.png">
<img src="tutorial_create_symbol_04.png" width="640">
</li>
<li>
@ -107,7 +107,7 @@ extra_pinnumber="14 7"
The <kbd>dir</kbd> attribute specifies the direction of the pin; XSCHEM supports
<kbd>in</kbd>, <kbd>out</kbd> and <kbd>inout</kbd> types. These attributes are used mainly for
digital simulators (Verilog and VHDL), but specifying pin direction is good practice anyway.<br>
<img src="tutorial_create_symbol_05.png">
<img src="tutorial_create_symbol_05.png" width="640">
<p class="important">Instead of the <kbd>q</kbd> key the attribute dialog box can also be displayed
by placing the mouse pointer over the pin object and pressing the <kbd>right</kbd> mouse button</p><br>
</li>
@ -115,7 +115,7 @@ extra_pinnumber="14 7"
<li>
We want now to place some text near the gate pins to display the pin number: again, use the <kbd>t</kbd> key
and place the following text, with hsize and vsize set to 0.2:<br>
<img src="tutorial_create_symbol_06.png"> <br>
<img src="tutorial_create_symbol_06.png" width="640"> <br>
The complicated syntax of these text labels has the following meaning:<br>
<ul>
<li> The <kbd>@</kbd> is the variable expansion (macro) identifier, as usual.</li>
@ -133,22 +133,22 @@ extra_pinnumber="14 7"
in XSCHEM list (that reflects the creation order) you can reference pins by their name;
The only reason to use the previous syntax with pin index numbers is efficiency when dealing with
extremely big symbols (SoC or similar high pin count chips).<br>
<img src="tutorial_create_symbol_07.png">
<img src="tutorial_create_symbol_07.png" width="640">
<li>
The symbol is now complete; save it and close XSCHEM. Now open again xschem with an empty schematic,
for example <kbd>xschem test.sch</kbd>. Press the <kbd>Insert</kbd> key and place the 4011-1 symbol:<br>
<img src="tutorial_create_symbol_08.png"> <br>
<img src="tutorial_create_symbol_08.png" width="640"> <br>
We see that all pin numbers are shown for each pin; this reminds us that this is a slotted device!
slotted devices should specify the slot number in the instance <kbd>name</kbd> so, select the component, press
<kbd>q</kbd> and change the <kbd>U1</kbd> name attribute to <kbd>U1:1</kbd>.
You can also remove the <kbd>.sym</kbd> extension in the 'Symbol' entry of the dialog box,
for more compactness:<br>
<img src="tutorial_create_symbol_09.png"> <br>
<img src="tutorial_create_symbol_09.png" width="640"> <br>
As you can see now the slot is resolved and the right pin numbers are displayed.
Now select and copy the component (use the <kbd>c</kbd> key), and change the <kbd>name</kbd>
attribute of the new copy to <kbd>U1:3</kbd>:<br>
<img src="tutorial_create_symbol_10.png"> <br>
<img src="tutorial_create_symbol_10.png" width="640"> <br>
</li>
<li>
@ -156,11 +156,11 @@ extra_pinnumber="14 7"
to draw wires; when done with the wiring insert a net label by pressing the <kbd>Insert</kbd>
key and navigating to <kbd>.../share/xschem/xschem_library/devices</kbd> (the XSCHEM system
symbol library) and selecting <kbd>lab_pin</kbd>:<br>
<img src="tutorial_create_symbol_11.png"> <br>
<img src="tutorial_create_symbol_11.png" width="640"> <br>
Place 4 of these <kbd>lab_pin</kbd> symbols and set their <kbd>lab</kbd> attribute
to <kbd>S_, R_, Q, Q_</kbd> respectively;
place the 4 labels as shown (use the <kbd>Shift-f</kbd> key to flip the <kbd>Q, Q_</kbd> labels):<br>
<img src="tutorial_create_symbol_12.png"> <br>
<img src="tutorial_create_symbol_12.png" width="640"> <br>
</li>
<li>
@ -169,7 +169,7 @@ extra_pinnumber="14 7"
<kbd>Shift-v</kbd> multiple times to set the netlisting mode as shown in the bottom status bar
to <kbd>tedax</kbd>, and finally press the <kbd>Netlist</kbd> button located in the top-right
region of the window: <br>
<img src="tutorial_create_symbol_13.png"> <br>
<img src="tutorial_create_symbol_13.png" width="640"> <br>
This is the resulting netlist you should get:<br><br>
<pre class="code">
tEDAx v1

View File

@ -57,9 +57,9 @@ done
<p>
Below an example of a schematic and a symbol shown both in xschem and lepton-schematic (gschem fork)
</p>
<img src = "tutorial_gschemtoxschem_01.png">
<img src = "tutorial_gschemtoxschem_01.png" width="640">
<br>
<img src = "tutorial_gschemtoxschem_02.png">
<img src = "tutorial_gschemtoxschem_02.png" width="640">
<h3> Notes for schematics targeted for spice simulations </h3>
<p>
@ -96,7 +96,7 @@ done
since the LATESN symbol does not have such supply pins.<br>
In spice netlist VDD/GND to the subcircuit is in this particular case passed via net-assign.
</p>
<img src = "tutorial_gschemtoxschem_03.png">
<img src = "tutorial_gschemtoxschem_03.png" width="640">
<br>

View File

@ -128,7 +128,7 @@ schippes@mazinga:~/build/trunk$ sudo make install
schippes@mazinga:~/build/trunk$ cd
schippes@mazinga:~$ xschem
</pre>
<img src="tutorial_install_xschem_00.png"><br>
<img src="tutorial_install_xschem_00.png" width="640"><br>
if /usr/local/bin is not in your PATH variable use the full xschem path:
<pre class="code">
schippes@mazinga:~$ /usr/local/bin/xschem
@ -156,21 +156,21 @@ schippes@mazinga:~$ xschem
</li><br>
<li> Select menu <kbd>File - Open</kbd> and navigate to <kbd>/usr/local/share/doc/xschem/examples</kbd>:<br>
<img src="tutorial_install_xschem_01.png"><br>
<img src="tutorial_install_xschem_01.png" width="640"><br>
</li><br>
<li>Select <kbd>0_examples_top.sch</kbd> and press 'OK':<br>
<img src="tutorial_install_xschem_02.png"><br>
<img src="tutorial_install_xschem_02.png" width="640"><br>
</li>
<li>
This schematic contains a set of sub-schematics. Select one of them by clicking it with
the left mouse button (test_lm324 in this example) and press the <kbd>Alt-e</kbd> key combination:
another xschem window will be opened with the schematic view of the selected symbol:<br>
<img src="tutorial_install_xschem_03.png"><br>
<img src="tutorial_install_xschem_03.png" width="640"><br>
</li><br>
<li> Click on the lm324 symbol, it can now be edited using the <kbd>Alt-i</kbd> key combination:<br>
<img src="tutorial_install_xschem_04.png"><br>
<img src="tutorial_install_xschem_04.png" width="640"><br>
</li><br>
<li> Now close all xschem windows and restart a new xschem instance from terminal:
@ -183,36 +183,36 @@ schippes@mazinga:~$ xschem
We want to create a simple circuit in this empty schematic window:
press the <kbd>Insert</kbd> key (this is used to place components) in the file selector
navigate to <kbd>/usr/local/share/xschem/xschem_library</kbd> and select <kbd>res.sym</kbd>:<br>
<img src="tutorial_install_xschem_05.png"><br>
<img src="tutorial_install_xschem_05.png" width="640"><br>
</li><br>
<li>
Lets add another component: press <kbd>Insert</kbd> key again and navigate to
<kbd>/usr/local/share/doc/xschem/examples</kbd> and select <kbd>lm324.sym</kbd>:<br>
<img src="tutorial_install_xschem_06.png"><br>
<img src="tutorial_install_xschem_06.png" width="640"><br>
</li><br>
<li> Select (click on it) the lm324 symbol and move it by pressing the <kbd>m</kbd> key: <br>
<img src="tutorial_install_xschem_07.png"><br>
<img src="tutorial_install_xschem_07.png" width="640"><br>
</li><br>
<li>
Place the lm324 component where you want in the schematic by placing the mouse and
clicking the left button:<br>
<img src="tutorial_install_xschem_08.png"><br>
<img src="tutorial_install_xschem_08.png" width="640"><br>
</li><br>
<li>
The lm324.sym component has a schematic (<kbd>.sch</kbd>) representation, while the resistor is a primitive,
it has only a symbol view (<kbd>.sym</kbd>). you can see the schematic of the lm324 by selecting it and
pressing <kbd>Alt-e</kbd>: <br>
<img src="tutorial_install_xschem_09.png"><br>
<img src="tutorial_install_xschem_09.png" width="640"><br>
</li><br>
<li>
Close the lm324.sch window and view the symbol view of the resistor by selecting it and
pressing <kbd>Alt-i</kbd>:<br>
<img src="tutorial_install_xschem_10.png"><br>
<img src="tutorial_install_xschem_10.png" width="640"><br>
</li><br>
</ol>

View File

@ -25,7 +25,7 @@ p{padding: 15px 30px 10px;}
This tutorial is based on the <kbd>cmos_example.sch</kbd> example schematic located in the <kbd>examples/</kbd>
directory. Start Xschem from a terminal since we need to give some commands in this tutorial.
</p>
<img style="box-shadow:none;" src="backannotation1.png">
<img style="box-shadow:none;" src="backannotation1.png" width="640">
<h3> CONFIGURATION </H3>
<p>
@ -60,14 +60,14 @@ lappend tcl_files ${XSCHEM_SHAREDIR}/ngspice_backannotate.tcl
<kbd>Ngspice</kbd> simulator is selected (not Ngspice batch). Also ensure the spice netlist mode is
selected (<kbd>Options -&gt; Spice netlist</kbd>).
</p>
<img src="backannotation2.png">
<img src="backannotation2.png" width="640">
<h3> SIMULATION </H3>
<p>
If you now press the <kbd>Netlist</kbd> followed by the <kbd>Simulate</kbd> button simulation should complete
with no errors.
</p>
<img src="backannotation3.png">
<img src="backannotation3.png" width="640">
<p>
You can close the simulator since we need only the <kbd>cmos_example.raw</kbd> file that is now saved
in the simulation directory (usually <kbd>~/.xschem/simulations/cmos_example.raw</kbd>).<br>
@ -89,17 +89,17 @@ xschem [~]
The first element is the <kbd>devices/spice_probe.sym</kbd> component. This must be attached to
some schematic wires to show the voltage value.
</p>
<img style="box-shadow:none;" src="backannotation4.png">
<img style="box-shadow:none;" src="backannotation4.png" width="640">
<p>
Place some of these elements on various nets, issue the above mentioned <kbd>ngspice::annotate</kbd>
command and see the voltage values in the schematic.
</p>
<img style="box-shadow:none;" src="backannotation5.png">
<img style="box-shadow:none;" src="backannotation5.png" width="640">
<p>
Another useful component is the <kbd>devices/ammeter.sym</kbd> one which allow to monitor branch currents.
Break some wires and insert this component as shown here:
</p>
<img style="box-shadow:none;" src="backannotation6.png">
<img style="box-shadow:none;" src="backannotation6.png" width="640">
<p class="important">
IMPORTANT: When inserting current probes the circuit topology changes (new nodes are created) so you need to
re-create the netlist and re-run the simulation
@ -108,7 +108,7 @@ xschem [~]
Doing again the <kbd>ngspice::annotate</kbd> command after simulation will update the ammeters showing
the branch currents.
</p>
<img style="box-shadow:none;" src="backannotation7.png">
<img style="box-shadow:none;" src="backannotation7.png" width="640">
<p>
These voltage and current values are inserted in the probe components as <b>attributes</b> and thus can be saved
to file. Remember that if you change the circuit the values shown in the probe elements are no longer valid,
@ -119,7 +119,7 @@ xschem [~]
annotate script. The advantage of this method is that values pushed into probes can be saved to file and are
thus persistent.
</p>
<img src="backannotation8.png">
<img src="backannotation8.png" width="640">
<h3> PULL ANNOTATION METHOD </H3>
<p>
@ -151,16 +151,16 @@ write cmos_example.raw
component, but does not need to be attached to any specific point or wire.
Edit its attributes and set its <kbd>node</kbd> attribute to an existing saved variable in the raw file.
</p>
<img src="backannotation9.png">
<img src="backannotation9.png" width="640">
<p>
Run again the simulation and the <kbd>ngspice::annotate</kbd> command and values will be updated.
</p>
<img style="box-shadow:none;" src="backannotation10.png">
<img style="box-shadow:none;" src="backannotation10.png" width="640">
<p>
You can add additional variables in the raw file , for example modifying the .save instruction:<br>
<kbd>.save all @m4[gm] @m5[gm] @m1[gm]</kbd>
</p>
<img src="backannotation11.png">
<img src="backannotation11.png" width="640">
<p>
Data annotated into the schematic using these components allows more simulation parameters to be viewed into
the schematic, not being restricted to currents and voltages. Since these components get data using a pull method
@ -174,11 +174,11 @@ write cmos_example.raw
more complex data. In the example below this component is used to display the electrical power of transistor m3,
calculated as <kbd>V(GN) * Id(m3)</kbd>.
</p>
<img src="backannotation12.png">
<img src="backannotation12.png" width="640">
<p>
The example shown uses this component to display a (meaningless, but shows the usage) gm ratio of 2 transistors:
</p>
<img src="backannotation13.png">
<img src="backannotation13.png" width="640">
<p>
The syntax is a bit complex, considering the verbosity of TCL and the strange ngspice naming syntax, however
once a working one is created changing the expression is easy.
@ -189,7 +189,7 @@ write cmos_example.raw
can be placed with the tcl command for doing the annotation. Just do a <kbd>Ctrl-Click</kbd> on it to trigger
the annotation.
</p>
<img src="backannotation14.png">
<img src="backannotation14.png" width="640">
<br>
<br>
<br>

View File

@ -34,54 +34,54 @@ p{padding: 15px 30px 10px;}
<li>Again, press 'Insert' and place 'vsource_arith.sym'</li>
<li>By selecting (left btn click) and moving ('m') place the components like in this picture:</li>
<img src="tutorial_run_simulation_01.png">
<img src="tutorial_run_simulation_01.png" width="640">
<li>Press the right mouse button on the capacitor and set its 'value=' attribute to 50nF:</li>
<img src="tutorial_run_simulation_02.png">
<img src="tutorial_run_simulation_02.png" width="640">
<li>Do the same for the inductor (10mH) and the resistor (1k)</li>
<li>Set the voltage source VOL to: "'3*cos(time*time*time*1e11)'" (include quotes, single and double):</li>
<img src="tutorial_run_simulation_03.png">
<img src="tutorial_run_simulation_03.png" width="640">
<li>Pressing the 'w' key and moving the mouse you draw wires, wire the components as shown (press 'w', move the mouse and click, this draws a wire segment):</li>
<img src="tutorial_run_simulation_04.png">
<img src="tutorial_run_simulation_04.png" width="640">
<li>Press 'Insert key and place one instance of 'lab_pin', then use the right mouse button to change its 'lab' attribute to A:</li>
<img src="tutorial_run_simulation_05.png">
<img src="tutorial_run_simulation_05.png" width="640">
<li>Move the label as shown, (you can use 'Shift+F' to flip and 'Shift+R' to rotate), then using 'c' copy this pin label and edit attributes to create the B and C labels, place all of these as shown:</li>
<img src="tutorial_run_simulation_06.png">
<img src="tutorial_run_simulation_06.png" width="640">
<li>Select the 'C' label and copy it as shown here, set its lab attribute to 0 (this will be the 0V (gnd node))</li>
<img src="tutorial_run_simulation_07.png">
<img src="tutorial_run_simulation_07.png" width="640">
<li>Press 'Insert key, place the 'code.sym' symbol, set name and value attributes as follows:</li>
<img src="tutorial_run_simulation_08.png">
<img src="tutorial_run_simulation_08.png" width="640">
<li>Cosmetics: add 'title.sym' move the circuit (by selecting it dragging the mouse and pressing 'm', if needed). Note that you can do a 'stretch move'operation if you need move components keeping the wires attached; refer to the xschem manual <a href="http://repo.hu/projects/xschem/xschem_man/commands.html">here</a></li>
<img src="tutorial_run_simulation_09.png">
<img src="tutorial_run_simulation_09.png" width="640">
<li>The circuit is ready for simulation: press 'netlist' the 'rlc.spice' will be generated in current dir.</li>
<li>If ngspice is installed on the system press 'Simulate':</li>
<li>In the simulator window type 'plot a b c':</li>
<img src="tutorial_run_simulation_10.png">
<img src="tutorial_run_simulation_10.png" width="640">
<li>If you set 'Simulation -&gt; Configure simulators and tools -&gt; Ngspice Batch' and press 'Simulate' again the sim will be run in batch mode, a 'rlc.raw' file will be generated and a 'rlc.out' file will contain the simulator textual output.</li>

View File

@ -93,7 +93,7 @@ DEMO ONLY
<kbd>&lt;install_path&gt;/share/xschem/symgen.awk sample.symdef &gt; sample.sym</kbd><br>
The resulting symbol is shown here under, side-compared with the same symbol generated by djboxsym for gschem:
</p>
<img src = "symgen_vs_djboxsym.png" style="max-width: 100%;">
<img src = "symgen_vs_djboxsym.png" style="max-width: 100%;" width="640">
<p>
Another <kbd>sample2.symdef</kbd> file specifically created to generate a perfectly valid xschem symbol (including
attributes for spice netlisting) is the following:
@ -171,7 +171,7 @@ STEFAN FREDERIK SCHIPPERS
9 io&gt; DGND1
20 io&gt; GND2
</pre>
<img src = "tutorial_symgen_02.png" style="max-width: 100%;">
<img src = "tutorial_symgen_02.png" style="max-width: 100%;" width="640">
<p>
some extensions of xschem's symdef text file format with respect to original
<a href="http://www.gedasymbols.org/user/dj_delorie/tools/djboxsym.html">djboxsym</a> format:

View File

@ -36,8 +36,8 @@ p{padding: 15px 30px 10px;}
<li>Native Windows port is planned.</li>
</ul>
</h3>
<img src="tutorial_xschem_slides01.png" style="position:fixed; top:20%; right:2%;max-width: 30%;border: 1px solid">
<img src="tutorial_xschem_slides02.png" style="position:fixed; top:55%; right:4%;max-width: 30%;border: 1px solid">
<img src="tutorial_xschem_slides01.png" style="position:fixed; top:20%; right:2%;max-width: 30%;border: 1px solid" width="640">
<img src="tutorial_xschem_slides02.png" style="position:fixed; top:55%; right:4%;max-width: 30%;border: 1px solid" width="640">
<!-- end of slide -->
<div class="filler"></div>
</div>

View File

@ -34,7 +34,7 @@ p{padding: 15px 30px 10px;}
<li>A symbol definition is stored in a .sym file (inv.sym), while the circuit implementation is in a .sch file (inv.sch).</li>
</ul>
</h3>
<img src="tutorial_xschem_slides05.png" style="position:fixed; top:15%; right:2%;width:40%; max-width: 40%;">
<img src="tutorial_xschem_slides05.png" style="position:fixed; top:15%; right:2%;width:40%; max-width: 40%;" width="640">
<!-- end of slide -->
<div class="filler"></div>
</div>

View File

@ -32,7 +32,7 @@ p{padding: 15px 30px 10px;}
<li>If symbol is a subcircuit<br>draw schematic (mynand.sch).</li>
</ol>
</h3>
<img src="tutorial_xschem_slides12.png" style="position:fixed; top:11%; right:2%;width:62%; max-width: 62%;">
<img src="tutorial_xschem_slides12.png" style="position:fixed; top:11%; right:2%;width:62%; max-width: 62%;" width="640">
<!-- end of slide -->
<div class="filler"></div>
</div>

View File

@ -33,7 +33,7 @@ p{padding: 15px 30px 10px;}
</ul>
</h3>
<img src="tutorial_xschem_slides06.png" style="position:fixed; top:18%; right:2%;width:38%; max-width: 38%;">
<img src="tutorial_xschem_slides06.png" style="position:fixed; top:18%; right:2%;width:38%; max-width: 38%;" width="640">
<!-- end of slide -->
<div class="filler"></div>
</div>

View File

@ -31,8 +31,8 @@ p{padding: 15px 30px 10px;}
of the feedback inverter is different from the forward inverter. This is all done with instance attributes.</li>
</ul>
</h3>
<img src="tutorial_xschem_slides17.png" style="position:fixed; top:10%; right:2%;width:25%; max-width: 25%;">
<img src="tutorial_xschem_slides18.png" style="position:fixed; bottom:5%; left:8%;width:45%; max-width: 45%;">
<img src="tutorial_xschem_slides17.png" style="position:fixed; top:10%; right:2%;width:25%; max-width: 25%;" width="640">
<img src="tutorial_xschem_slides18.png" style="position:fixed; bottom:5%; left:8%;width:45%; max-width: 45%;" width="640">
<!-- end of slide -->
<div class="filler"></div>
</div>

View File

@ -52,8 +52,8 @@ th,td {font-size: 60%;padding: 3px;}
<li> DC Operating point information back-annotation into the schematic is possible.</li>
</ul>
</h3>
<img src="tutorial_xschem_slides07.png" style="position:fixed; top:15%; right:6%; max-width: 35%;">
<img src="tutorial_xschem_slides13.png" style="border: 4px solid grey;position:fixed; top:50%; right:2%; max-width: 25%;">
<img src="tutorial_xschem_slides07.png" style="position:fixed; top:15%; right:6%; max-width: 35%;" width="640">
<img src="tutorial_xschem_slides13.png" style="border: 4px solid grey;position:fixed; top:50%; right:2%; max-width: 25%;" width="640">
<!-- end of slide -->
<div class="filler"></div>
</div>

View File

@ -36,7 +36,7 @@ p{padding: 15px 30px 10px;}
<li> No information about external tools is hard coded in Xschem.</li>
</ul>
</h3>
<img src="tutorial_xschem_slides10.png" style="position:fixed; top:15%; right:2%; max-width: 55%;">
<img src="tutorial_xschem_slides10.png" style="position:fixed; top:15%; right:2%; max-width: 55%;" width="640">
<!-- end of slide -->
<div class="filler"></div>
</div>

View File

@ -29,9 +29,9 @@ p{padding: 15px 30px 10px;}
<li> 16 read accesses simulated in 12 minutes with ngspice.</li>
<li> ldq[15:0] data output matches expected data from ROM array.</li>
</ul>
<img src="tutorial_xschem_slides14.png" style="max-width: 68%;">
<img src="tutorial_xschem_slides14.png" style="max-width: 68%;" width="640">
</h3>
<img src="tutorial_xschem_slides15.png" style="position:fixed; top:15%; right:2%; max-height: 70%; max-width: 40%;">
<img src="tutorial_xschem_slides15.png" style="position:fixed; top:15%; right:2%; max-height: 70%; max-width: 40%;" width="640">
<!-- end of slide -->
<div class="filler"></div>
</div>

View File

@ -33,7 +33,7 @@ p{padding: 15px 30px 10px;}
<li> Mixed mode simulation: Leverage Xyce / Icarus Verilog (XyceCInterface-VPI)? </li>
<li> Other improvements driven by users. <span style="color:#f00;">Your</span> feedback is Welcome!</li>
</ul>
<img src="tutorial_xschem_slides11.png" style="position:fixed; top:5%; right:2%; max-height: 79%;">
<img src="tutorial_xschem_slides11.png" style="position:fixed; top:5%; right:2%; max-height: 79%;" width="640">
<!-- end of slide -->
<div class="filler"></div>
</div>

View File

@ -32,8 +32,8 @@ p{padding: 15px 30px 10px;}
<li>ASCII output file format, simple and <a href="http://repo.hu/projects/xschem/xschem_man/developer_info.html">documented</a>.</li>
</ul>
</h2>
<img src="tutorial_xschem_slides09.png" style="position:fixed; top:10%; right:4%; max-width: 45%;">
<img src="tutorial_xschem_slides08.png" style="position:fixed; top:20%; right:2%; max-width: 37%;">
<img src="tutorial_xschem_slides09.png" style="position:fixed; top:10%; right:4%; max-width: 45%;" width="640">
<img src="tutorial_xschem_slides08.png" style="position:fixed; top:20%; right:2%; max-width: 37%;" width="640">
<!-- end of slide -->
<div class="filler"></div>
</div>

View File

@ -34,7 +34,7 @@ p{padding: 15px 30px 10px;}
electrical node in the picture below has been highlighted in red (this is a XSCHEM function we
will cover later on).
</p>
<img src="xschem_wires.png">
<img src="xschem_wires.png" width="640">
<h3> LINES </h3>
<p>
@ -44,7 +44,7 @@ p{padding: 15px 30px 10px;}
wires, but using the <kbd>'l'</kbd> key. The 'Layers' menu allows to select various different layers (colors)
for the line.
</p>
<img src="xschem_lines.png">
<img src="xschem_lines.png" width="640">
<h3> RECTANGLES </h3>
<p>
Rectangles like Lines are drawable on multiple layers, and also do not carry any electrical information.
@ -52,7 +52,7 @@ p{padding: 15px 30px 10px;}
Different fill styles (or no fill) can be defined for each layer. Rectangles are placed with the
<kbd>'r'</kbd> bindkey
</p>
<img src="xschem_rectangles.png">
<img src="xschem_rectangles.png" width="640">
<h3> POLYGONS </h3>
<p>
Polygons are paths that can be drawn on any layer. Placements begins with the <kbd>'ctrl-w'</kbd> key
@ -66,7 +66,7 @@ p{padding: 15px 30px 10px;}
<p>
A <kbd>fill=true</kbd> attribute may be given to have the shape filled with the layer fill style.
</p>
<img src="xschem_polygons.png">
<img src="xschem_polygons.png" width="640">
<h3> CIRCLES / ARCS </h3>
<p>
Arcs may be placed by hitting the <kbd>Shift-C</kbd> key. First click the start point, then the end point.
@ -81,14 +81,14 @@ p{padding: 15px 30px 10px;}
If a circle is needed then use the <kbd>Ctrl-Shift-C</kbd> key combination.
<br>A <kbd>fill=true</kbd> attribute may be given to have the shape filled with the layer fill style.
</p>
<img src="xschem_elements_01.png">
<img src="xschem_elements_01.png" width="640">
<h3> TEXT </h3>
<p>
Text can be placed with the <kbd>'t'</kbd> bindkey.
A dialog box appears where the user inputs the text and text size.
</p>
<img src="xschem_texts.png">
<img src="xschem_texts.png" width="640">
<p>
The <kbd>layer</kbd> property can be used
to draw text on a different layer, for example, setting <kbd>layer=6</kbd> will draw on cyan color.
@ -99,12 +99,12 @@ p{padding: 15px 30px 10px;}
A <kbd>weight=bold</kbd> attribute may be given for bold text, while a <kbd>slant=italic</kbd> or
<kbd>slant=oblique</kbd> may specify italic or slanted text.
</p>
<img src="xschem_elements_02.png">
<img src="xschem_elements_02.png" width="640">
<p>
You wil learn in the <a href="xschem_properties.html">xschem properties chapter</a>
how to set, edit and change object properties.
</p>
<img src="xschem_texts1.png">
<img src="xschem_texts1.png" width="640">
<h3> SYMBOLS </h3>
<p>
Symbols are graphical elements that represent electrical components. A symbol represents an electronic
@ -114,7 +114,7 @@ p{padding: 15px 30px 10px;}
For example you see three placements of the 'npn' bipolar transistor symbol.
Like in C++, where objects are instances of classes, here components are instances of symbols.
</p>
<img src="xschem_symbols.png">
<img src="xschem_symbols.png" width="640">
<p>
Symbols (like schematic drawings) are stored in xschem libraries.
For XSCHEM a library is just a directory placed under the

View File

@ -4,8 +4,8 @@
<link rel="stylesheet" type="text/css" href="xschem_man.css" />
</head>
<body class="footer">
<img style="margin: 0;width: auto;box-shadow: none;padding-left: 20px;padding-top: 3px;float: left;" src=xschem.gif height="27">
<img style="margin: 0;width: auto;box-shadow: none;padding-left: 80px;padding-top: 3px;float: left;" src=xschem_logo.png height="27">
<img style="margin: 0;width: auto;box-shadow: none;padding-left: 20px;padding-top: 3px;float: left;" src=xschem.gif height="27" width="640">
<img style="margin: 0;width: auto;box-shadow: none;padding-left: 80px;padding-top: 3px;float: left;" src=xschem_logo.png height="27" width="640">
<p style="color: white;
font-size: 12px;
position: relative;

Binary file not shown.

View File

@ -41,7 +41,7 @@ p{padding: 15px 30px 10px;}
bindkey <kbd>'q'</kbd> a dialog box
shows the property string associated with the selected pin:
</p>
<img src="edit_property.png">
<img src="edit_property.png" width="640">
<p>
The <kbd>name=p&nbsp;dir=inout&nbsp;propag=1&nbsp;pinnumber=1</kbd> property string tells that the
selected pin name is <kbd>'p'</kbd>,
@ -54,7 +54,7 @@ p{padding: 15px 30px 10px;}
To view the xschem index of a pin click and hold the mouse on it, the index will be shown as
<kbd>n= &lt;number&gt; </kbd> in the bottom status line:
</p>
<img src="edit_property2.png">
<img src="edit_property2.png" width="640">
<p>
The <kbd> pinnumber=1</kbd> attribute is used when exporting to pcb software (via the tEDAx netlist)
and tells to which pin number on the resistor footprint this positive pin is bound.
@ -63,7 +63,7 @@ p{padding: 15px 30px 10px;}
The text primitives also have properties. For texts the property string may be used
to specify font and the layer to use for displaying text.
</p>
<img src="text_property.png">
<img src="text_property.png" width="640">
<h3>GLOBAL PROPERTIES</h3>
<p>
If you click outside of any displayed graphics in XSCHEM
@ -80,7 +80,7 @@ p{padding: 15px 30px 10px;}
So, in addition to properties associated to graphical objects and
symbols, we also have properties associated to schematic (.sch) and symbol files (.sym)
</p>
<img src="global_property.png">
<img src="global_property.png" width="640">
<p>
In the above 'Symbol' global property string, the <kbd>format</kbd> attribute defines the format of the SPICE netlist.
The SPICE netlist element line starts with the
@ -92,7 +92,7 @@ p{padding: 15px 30px 10px;}
We will return on component instantiation later, but for now,
considering the following picture:
</p>
<img src="nets_pins.png">
<img src="nets_pins.png" width="640">
<p>
The <kbd>@name</kbd> will expand to R0, <kbd>@pinlist</kbd> for the <kbd>R0</kbd>
component will expand to <kbd>POS&nbsp;NEG</kbd>.<br>
@ -103,7 +103,7 @@ p{padding: 15px 30px 10px;}
of these. Select a pin, press the copy <kbd>'c'</kbd>
bindkey and place a new copy of it somewhere.
</p>
<img src="place_pin.png" style="width: 90%;">
<img src="place_pin.png" style="width: 90%;" width="640">
<p>
After copying the pin you may change its properties, for example you
will change its property string to
@ -133,7 +133,7 @@ p{padding: 15px 30px 10px;}
set its number to 1 and so on.
By doing so you have defined a specific pin ordering of the symbol.
</p>
<img src="pin_order.png">
<img src="pin_order.png" width="640">
<h3> PRIMITIVE OBJECT PROPERTIES</h3>
<p>
@ -154,7 +154,7 @@ p{padding: 15px 30px 10px;}
<li> <kbd>bus=true</kbd>. This specifies to draw a wider line. Mostly used to display wire buses.</li>
</ul>
</p>
<img src="dashes.png">
<img src="dashes.png" width="640">