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add @#pin:spice_get_voltage attribute for pin texts that displays voltage of net attached to pin. remove net_name=... attributes from symbols and instance global attributes since it is no more used. set default value for show_pin_net_names to 1.

This commit is contained in:
stefan schippers 2024-05-02 10:32:12 +02:00
parent ba44bfb337
commit 9c750b5044
79 changed files with 522 additions and 1992 deletions
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6
doc/xschem_man/symbol_property_syntax.html
View File

@ -606,6 +606,12 @@ verilog_format="xnor #(@risedel , @falldel ) @name ( @@Z , @@A , @@B );"
<p> these expand to the full hierarchy name of the net attached to pin with name <kbd>pin_name</kbd> or with
sequence number <kbd>n</kbd>. </p>
<li><kbd>@#pin_name:spice_get_voltage</kbd></li>
<li><kbd>@#n:spice_get_voltage</kbd></li>
<p> these expand to the voltage of the net attached to the pin with name <kbd>pin_name</kbd> or with
sequence number <kbd>n</kbd>, extracted from simulation raw file (operating point or
cursor <kbd>b</kbd> position)</p>
<li><kbd>@sch_last_modified</kbd></li>
<p>
this indicates the last modification time of the <kbd>.sch</kbd> file of the symbol.

87
src/token.c
View File

@ -613,7 +613,8 @@ const char *get_sym_template(char *s,char *extra)
}
/* caller is responsible for freeing up storage for return value
* return NULL if no matching token found */
* return NULL if no matching token found
* caller is responsible for freeing up storage for pin_attr_value */
static char *get_pin_attr_from_inst(int inst, int pin, const char *attr)
{
size_t attr_size;
@ -646,7 +647,7 @@ static char *get_pin_attr_from_inst(int inst, int pin, const char *attr)
if(xctx->tok_size) my_strdup2(_ALLOC_ID_, &pin_attr_value, str);
}
}
return pin_attr_value; /* caller is responsible for freeing up storage for pin_attr_value */
return pin_attr_value;
}
int get_last_used_index(const char *old_basename, const char *brkt)
@ -3489,7 +3490,7 @@ char *find_nth(const char *str, const char *sep, const char *quote, int keep_quo
/* given a token like @#pin:attr get value of pin attribute 'attr'
* if only @#pin is given return name of net attached to 'pin'
* caller should free returned string */
static char *get_pin_attr(const char *token, int inst, int s_pnetname)
static char *get_pin_attr(const char *token, int inst)
{
char *value = NULL;
int n;
@ -3515,39 +3516,67 @@ static char *get_pin_attr(const char *token, int inst, int s_pnetname)
/* @#n:net_name attribute (n = pin number or name) will translate to net name attached to pin
* if 'net_name=true' attribute is set in instance or symbol */
if(!pin_attr_value && is_net_name) {
char *instprop = xctx->inst[inst].prop_ptr;
char *symprop = (xctx->inst[inst].ptr + xctx->sym)->prop_ptr;
if(s_pnetname && (!strboolcmp(get_tok_value(symprop, "net_name", 0), "true") ||
!strboolcmp(get_tok_value(instprop, "net_name", 0), "true"))) {
prepare_netlist_structs(0);
my_strdup2(_ALLOC_ID_, &pin_attr_value,
xctx->inst[inst].node && xctx->inst[inst].node[n] ? xctx->inst[inst].node[n] : "?");
/* do not show net_name: set to empty string */
} else {
my_strdup2(_ALLOC_ID_, &pin_attr_value, "");
prepare_netlist_structs(0);
my_strdup2(_ALLOC_ID_, &pin_attr_value,
xctx->inst[inst].node && xctx->inst[inst].node[n] ? xctx->inst[inst].node[n] : "");
}
else if(!pin_attr_value && !is_net_name && !strcmp(pin_attr, "spice_get_voltage"))
{
int start_level; /* hierarchy level where waves were loaded */
int live = tclgetboolvar("live_cursor2_backannotate");
if(live && (start_level = sch_waves_loaded()) >= 0 && xctx->raw->annot_p>=0) {
int multip;
char *fqnet = NULL;
const char *path = xctx->sch_path[xctx->currsch] + 1;
char *net = NULL;
int idx;
double val;
const char *valstr;
if(path) {
prepare_netlist_structs(0);
my_strdup2(_ALLOC_ID_, &net, net_name(inst, n, &multip, 0, 0));
if(multip == 1 && net && net[0]) {
char *rn;
dbg(1, "translate() @spice_get_voltage: inst=%d\n", inst);
dbg(1, " net=%s\n", net);
rn = resolved_net(net);
if(rn) {
my_strdup2(_ALLOC_ID_, &fqnet, rn);
if(rn) my_free(_ALLOC_ID_, &rn);
strtolower(fqnet);
dbg(1, "translate() @spice_get_voltage: fqnet=%s start_level=%d\n", fqnet, start_level);
idx = get_raw_index(fqnet, NULL);
if(idx >= 0) {
val = xctx->raw->cursor_b_val[idx];
}
if(idx < 0) {
valstr = "";
} else {
valstr = dtoa_eng(val);
}
my_strdup2(_ALLOC_ID_, &pin_attr_value, valstr);
dbg(1, "inst %d, net=%s, fqnet=%s idx=%d valstr=%s\n", inst, net, fqnet, idx, valstr);
if(fqnet) my_free(_ALLOC_ID_, &fqnet);
}
}
if(net) my_free(_ALLOC_ID_, &net);
}
}
}
/* @#n:resolved_net attribute (n = pin number or name) will translate to hierarchy-resolved net */
if(!pin_attr_value && !strcmp(pin_attr, "resolved_net")) {
char *rn = NULL;
char *instprop = xctx->inst[inst].prop_ptr;
char *symprop = (xctx->inst[inst].ptr + xctx->sym)->prop_ptr;
dbg(1, "translate(): resolved_net: %s, symbol %s\n", xctx->current_name, xctx->inst[inst].name);
if(s_pnetname && (!strboolcmp(get_tok_value(symprop, "net_name", 0), "true") ||
!strboolcmp(get_tok_value(instprop, "net_name", 0), "true"))) {
prepare_netlist_structs(0);
if(xctx->inst[inst].node && xctx->inst[inst].node[n]) {
rn = resolved_net(xctx->inst[inst].node[n]);
}
my_strdup2(_ALLOC_ID_, &pin_attr_value, rn ? rn : "?");
if(rn) my_free(_ALLOC_ID_, &rn);
} else {
my_strdup2(_ALLOC_ID_, &pin_attr_value, "");
prepare_netlist_structs(0);
if(xctx->inst[inst].node && xctx->inst[inst].node[n]) {
rn = resolved_net(xctx->inst[inst].node[n]);
}
my_strdup2(_ALLOC_ID_, &pin_attr_value, rn ? rn : "");
if(rn) my_free(_ALLOC_ID_, &rn);
}
if(!pin_attr_value ) my_strdup(_ALLOC_ID_, &pin_attr_value, "--UNDEF--");
if(!pin_attr_value ) my_strdup2(_ALLOC_ID_, &pin_attr_value, "--UNDEF--");
my_strdup2(_ALLOC_ID_, &value, pin_attr_value);
/* recognize slotted devices: instname = "U3:3", value = "a:b:c:d" --> value = "c" */
if(pin_attr_value[0] && !strcmp(pin_attr, "pinnumber") ) {
@ -3565,8 +3594,8 @@ static char *get_pin_attr(const char *token, int inst, int s_pnetname)
}
}
my_free(_ALLOC_ID_, &pin_attr_value);
my_free(_ALLOC_ID_, &pin_attr_value);
}
/* just @#pin was given */
else if(n>=0 && n < (xctx->inst[inst].ptr + xctx->sym)->rects[PINLAYER]) {
const char *str_ptr=NULL;
int multip;
@ -3605,14 +3634,12 @@ const char *translate(int inst, const char* s)
int escape=0;
char date[200];
int sp_prefix;
int s_pnetname;
int level;
Lcc *lcc;
char *value1 = NULL;
int sim_is_xyce;
char *instname = NULL;
s_pnetname = tclgetboolvar("show_pin_net_names");
sp_prefix = tclgetboolvar("spiceprefix");
if(!s || !xctx || !xctx->inst) {
my_free(_ALLOC_ID_, &result);
@ -3706,7 +3733,7 @@ const char *translate(int inst, const char* s)
}
}
} else if(inst >= 0 && token[0]=='@' && token[1]=='#') {
value = get_pin_attr(token, inst, s_pnetname);
value = get_pin_attr(token, inst);
if(value) {
tmp=strlen(value);
STR_ALLOC(&result, tmp + result_pos, &size);

2
src/xschem.tcl
View File

@ -8455,7 +8455,7 @@ set_ne keep_symbols 0 ;# if set loaded symbols will not be purged when descendin
set_ne hide_symbols 0
# show net names if symbol has attributes like @#n:net_name (where n = pin number or pin name)
# and net_name=true global attribute set on symbol or instance.
set_ne show_pin_net_names 0
set_ne show_pin_net_names 1
# gaw tcp {host port}
set_ne gaw_tcp_address {localhost 2020}

4
xschem_library/devices/ammeter.sym
View File

@ -34,6 +34,6 @@ L 4 -0 10 7.5 0 {}
B 5 -2.5 -32.5 2.5 -27.5 {name=plus dir=inout propag=1}
B 5 -2.5 27.5 2.5 32.5 {name=minus dir=inout propag=0}
T {@name} 15 -18.75 0 0 0.2 0.2 {}
T {@#0:net_name} 10 -28.75 0 0 0.15 0.15 {layer=15}
T {@#1:net_name} 10 20 0 0 0.15 0.15 {layer=15}
T {@#0:net_name} 10 -28.75 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#1:net_name} 10 20 0 0 0.15 0.15 {layer=15 hide=instance}
T {@spice_get_current} 2.5 7.5 0 0 0.2 0.2 {layer=15}

6
xschem_library/devices/asrc.sym
View File

@ -1,4 +1,4 @@
v {xschem version=3.4.4 file_version=1.2
v {xschem version=3.4.5 file_version=1.2
*
* This file is part of XSCHEM,
* a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit
@ -35,5 +35,5 @@ B 5 -2.5 27.5 2.5 32.5 {name=m dir=inout}
A 4 0 0 15 270 360 {}
T {@function} 20 0 0 0 0.2 0.2 {}
T {@name} 20 -17.5 0 0 0.2 0.2 {}
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15}
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15}
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15 hide=instance}

4
xschem_library/devices/bsource.sym
View File

@ -37,5 +37,5 @@ A 4 0 0 15 270 360 {}
T {@name} 20 -17.5 0 0 0.2 0.2 {}
T {@VAR
@FUNC} 20 0 0 0 0.2 0.2 {}
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15}
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15}
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15 hide=instance}

3
xschem_library/devices/bus_tap.sym
View File

@ -22,7 +22,6 @@ v {xschem version=3.4.4 file_version=1.2
G {}
K {type=bus_tap
template="name=l1 lab=[0]"
net_name=true
format="* tap: @#1:net_name --> @#0:net_name"
verilog_format="// tap: @#1:net_name --> @#0:net_name"
vhdl_format="-- tap: @#1:net_name --> @#0:net_name"
@ -34,4 +33,4 @@ L 1 0 0 10 -10 {}
B 5 9.375 -10.625 10.625 -9.375 {name=tap dir=inout}
B 5 -0.625 -0.625 0.625 0.625 {name=bus dir=inout}
T {@lab} 12.5 -12.5 3 0 0.27 0.27 {}
T {@#0:net_name} 31.25 -12.5 3 0 0.15 0.15 {layer=15}
T {@#0:net_name} 31.25 -12.5 3 0 0.15 0.15 {layer=15 hide=instance}

4
xschem_library/devices/capa-2.sym
View File

@ -48,5 +48,5 @@ T {@value} 15 0 0 0 0.25 0.2 {}
T {@name} 15 -13.75 0 0 0.2 0.2 {}
T {@#0:pinnumber} -5 -26.25 0 1 0.2 0.2 {layer=13}
T {@#1:pinnumber} -5 16.25 0 1 0.2 0.2 {layer=13}
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15}
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15}
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15 hide=instance}

4
xschem_library/devices/capa.sym
View File

@ -49,7 +49,7 @@ T {@#0:pinnumber} -5 -26.25 0 1 0.2 0.2 {layer=13}
T {@#1:pinnumber} -5 16.25 0 1 0.2 0.2 {layer=13}
T {@name} 15 -18.75 0 0 0.2 0.2 {}
T {@value} 15 -6.25 0 0 0.2 0.2 {}
T {@#0:net_name} 10 -28.75 0 0 0.15 0.15 {layer=15}
T {@#1:net_name} 10 20 0 0 0.15 0.15 {layer=15}
T {@#0:net_name} 10 -28.75 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#1:net_name} 10 20 0 0 0.15 0.15 {layer=15 hide=instance}
T {m=@m} 15 6.25 0 0 0.2 0.2 {}
T {@spice_get_current} -2.5 5 0 1 0.2 0.2 {layer=15}

4
xschem_library/devices/cccs.sym
View File

@ -41,5 +41,5 @@ B 5 -2.5 27.5 2.5 32.5 {name=m dir=in}
T {@value} 25 10 0 0 0.2 0.2 {}
T {@name} 25 -15 0 0 0.2 0.2 {}
T {@vnam} 25 -2.5 0 0 0.2 0.2 {}
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15}
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15}
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15 hide=instance}

4
xschem_library/devices/ccvs.sym
View File

@ -38,5 +38,5 @@ B 5 -2.5 27.5 2.5 32.5 {name=m dir=inout}
T {@value} 25 10 0 0 0.2 0.2 {}
T {@name} 25 -15 0 0 0.2 0.2 {}
T {@vnam} 25 -2.5 0 0 0.2 0.2 {}
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15}
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15}
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15 hide=instance}

4
xschem_library/devices/crystal.sym
View File

@ -46,5 +46,5 @@ T {@name} 25 -13.75 0 0 0.2 0.2 {}
T {@value} 25 1.25 0 0 0.2 0.2 {}
T {@#0:pinnumber} -10 -26.25 0 1 0.2 0.2 {layer=13}
T {@#1:pinnumber} -10 16.25 0 1 0.2 0.2 {layer=13}
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15}
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15}
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15 hide=instance}

4
xschem_library/devices/diode.sym
View File

@ -45,6 +45,6 @@ T {@#0:pinnumber} -5 -26.25 0 1 0.2 0.2 {layer=13}
T {@#1:pinnumber} -5 17.5 0 1 0.2 0.2 {layer=13}
T {@name} 15 -18.75 0 0 0.2 0.2 {}
T {@model} 15 -6.25 0 0 0.2 0.2 {}
T {@#0:net_name} 10 -28.75 0 0 0.15 0.15 {layer=15}
T {@#1:net_name} 10 20 0 0 0.15 0.15 {layer=15}
T {@#0:net_name} 10 -28.75 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#1:net_name} 10 20 0 0 0.15 0.15 {layer=15 hide=instance}
T {@spice_get_current} -12.5 -2.5 0 1 0.2 0.2 {layer=15}

4
xschem_library/devices/ind.sym
View File

@ -45,8 +45,8 @@ A 4 0 0 7.5 90 180 {}
A 4 0 -15 7.5 90 180 {}
T {@#0:pinnumber} -10 -27.5 0 1 0.2 0.2 {layer=13}
T {@#1:pinnumber} -10 17.5 0 1 0.2 0.2 {layer=13}
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15}
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15}
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15 hide=instance}
T {@name} 15 -18.75 0 0 0.2 0.2 {}
T {@value} 15 -3.75 0 0 0.2 0.2 {}
T {m=@m} 15 11.25 0 0 0.2 0.2 {}

2
xschem_library/devices/iopin.sym
View File

@ -23,7 +23,7 @@ G {}
K {type=iopin
format="*.iopin @lab"
template="name=p1 lab=xxx"
net_name=true}
}
V {}
S {}
E {}

2
xschem_library/devices/ipin.sym
View File

@ -23,7 +23,7 @@ G {}
K {type=ipin
format="*.ipin @lab"
template="name=p1 lab=xxx"
net_name=true}
}
V {}
S {}
E {}

4
xschem_library/devices/isource.sym
View File

@ -36,6 +36,6 @@ A 4 0 0 15 270 360 {}
P 4 7 -0 -7.5 -0 2.5 2.5 2.5 -0 10 -2.5 2.5 0 2.5 -0 -7.5 {fill=true}
T {@name
@value} 20 -10 0 0 0.2 0.2 {}
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15}
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15}
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15 hide=instance}
T {@spice_get_current} -4.375 15 0 1 0.2 0.2 {layer=15}

4
xschem_library/devices/isource_arith.sym
View File

@ -38,5 +38,5 @@ B 5 -2.5 27.5 2.5 32.5 {name=m dir=inout}
A 4 0 0 15 270 360 {}
T {@name} 20 -17.5 0 0 0.2 0.2 {}
T {@CUR} 20 0 0 0 0.2 0.2 {}
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15}
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15}
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15 hide=instance}

8
xschem_library/devices/isource_pwl.sym
View File

@ -54,7 +54,7 @@ B 5 -42.5 -22.5 -37.5 -17.5 {name=cp dir=in}
B 5 -42.5 17.5 -37.5 22.5 {name=cm dir=in}
T {pwl(1)=@TABLE} 20 0 0 0 0.2 0.2 {}
T {@name} 20 -15 0 0 0.2 0.2 {}
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15}
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15}
T {@#2:net_name} -45 -32.5 0 1 0.15 0.15 {layer=15}
T {@#3:net_name} -45 22.5 0 1 0.15 0.15 {layer=15}
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#2:net_name} -45 -32.5 0 1 0.15 0.15 {layer=15 hide=instance}
T {@#3:net_name} -45 22.5 0 1 0.15 0.15 {layer=15 hide=instance}

4
xschem_library/devices/isource_table.sym
View File

@ -39,6 +39,6 @@ A 4 0 0 15 270 360 {}
T {@name} 20 -17.5 0 0 0.2 0.2 {}
T {@CTRL
@TABLE} 20 0 0 0 0.2 0.2 {}
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15}
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15}
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15 hide=instance}
T {@spice_get_current} -8.75 15 0 1 0.2 0.2 {layer=15}

4
xschem_library/devices/jumper.sym
View File

@ -44,5 +44,5 @@ T {@name} 15 -13.75 0 0 0.2 0.2 {}
T {@value} 15 1.25 0 0 0.2 0.2 {}
T {@#0:pinnumber} -10 -26.25 0 1 0.2 0.2 {layer=13}
T {@#1:pinnumber} -10 16.25 0 1 0.2 0.2 {layer=13}
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15}
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15}
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15 hide=instance}

2
xschem_library/devices/lab_pin.sym
View File

@ -23,7 +23,7 @@ G {}
K {type=label
format="*.alias @lab"
template="name=p1 sig_type=std_logic lab=xxx"
net_name=true}
}
V {}
S {}
E {}

1
xschem_library/devices/lab_show.sym
View File

@ -22,7 +22,6 @@ v {xschem version=3.4.4 file_version=1.2
G {}
K {type=show_label
template="name=l1"
net_name=true
highlight=true}
V {}
S {}

2
xschem_library/devices/lab_wire.sym
View File

@ -23,7 +23,7 @@ G {}
K {type=label
format="*.alias @lab"
template="name=p1 sig_type=std_logic lab=xxx"
net_name=true}
}
V {}
S {}
E {}

4
xschem_library/devices/led.sym
View File

@ -50,5 +50,5 @@ T {@name} 7.5 -20 0 0 0.2 0.2 {}
T {@value} 7.5 12.5 0 0 0.2 0.2 {}
T {@#0:pinnumber} -5 -26.25 0 1 0.2 0.2 {layer=13}
T {@#1:pinnumber} -5 16.25 0 1 0.2 0.2 {layer=13}
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15}
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15}
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15 hide=instance}

6
xschem_library/devices/njfet.sym
View File

@ -38,8 +38,8 @@ B 5 17.5 27.5 22.5 32.5 {name=s dir=inout}
P 4 7 -20 0 -5 0 -5 -5 5 -0 -5 5 -5 0 -20 0 {fill=true}
T {@spiceprefix@name} 7.5 7.5 0 0 0.2 0.2 {}
T {D} 25 -27.5 0 0 0.15 0.15 {}
T {@#0:net_name} 25 -42.5 0 0 0.15 0.15 {layer=15}
T {@#2:net_name} 25 32.5 0 0 0.15 0.15 {layer=15}
T {@#1:net_name} -25 -12.5 0 1 0.15 0.15 {layer=15}
T {@#0:net_name} 25 -42.5 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#2:net_name} 25 32.5 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#1:net_name} -25 -12.5 0 1 0.15 0.15 {layer=15 hide=instance}
T {@model} 7.5 -17.5 0 0 0.2 0.2 {}
T {area=@area} 7.5 -5 0 0 0.2 0.2 {}

6
xschem_library/devices/nmos3.sym
View File

@ -42,6 +42,6 @@ T {@model x @m} 8.75 -6.25 0 0 0.2 0.2 {}
T {@#0:pinnumber} 25 -27.5 0 0 0.2 0.2 {layer=13}
T {@#2:pinnumber} 25 17.5 0 0 0.2 0.2 {layer=13}
T {@#1:pinnumber} -10 6.25 0 1 0.2 0.2 {layer=13}
T {@#0:net_name} 25 -42.5 0 0 0.15 0.15 {layer=15}
T {@#2:net_name} 25 32.5 0 0 0.15 0.15 {layer=15}
T {@#1:net_name} -25 -12.5 0 1 0.15 0.15 {layer=15}
T {@#0:net_name} 25 -42.5 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#2:net_name} 25 32.5 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#1:net_name} -25 -12.5 0 1 0.15 0.15 {layer=15 hide=instance}

8
xschem_library/devices/nmos4.sym
View File

@ -46,7 +46,7 @@ B 5 17.5 -2.5 22.5 2.5 {name=b dir=in}
T {@w\\/@l\\/@m} 7.5 -18.75 0 0 0.2 0.2 {}
T {@spiceprefix@name} 7.5 7.5 0 0 0.2 0.2 {}
T {D} 25 -27.5 0 0 0.15 0.15 {}
T {@#0:net_name} 25 -42.5 0 0 0.15 0.15 {layer=15}
T {@#2:net_name} 25 32.5 0 0 0.15 0.15 {layer=15}
T {@#1:net_name} -25 -12.5 0 1 0.15 0.15 {layer=15}
T {@#3:net_name} 25 0.625 0 0 0.15 0.15 {layer=15}
T {@#0:net_name} 25 -42.5 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#2:net_name} 25 32.5 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#1:net_name} -25 -12.5 0 1 0.15 0.15 {layer=15 hide=instance}
T {@#3:net_name} 25 0.625 0 0 0.15 0.15 {layer=15 hide=instance}

8
xschem_library/devices/nmos4_depl.sym
View File

@ -47,7 +47,7 @@ B 5 17.5 -2.5 22.5 2.5 {name=b dir=in}
T {@w\\/@l\\/@m} 12.5 -18.75 0 0 0.2 0.2 {}
T {@spiceprefix@name} 12.5 7.5 0 0 0.2 0.2 {}
T {D} 25 -30 0 0 0.15 0.15 {}
T {@#0:net_name} 25 -42.5 0 0 0.15 0.15 {layer=15}
T {@#2:net_name} 25 32.5 0 0 0.15 0.15 {layer=15}
T {@#1:net_name} -25 -12.5 0 1 0.15 0.15 {layer=15}
T {@#3:net_name} 25 0.625 0 0 0.15 0.15 {layer=15}
T {@#0:net_name} 25 -42.5 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#2:net_name} 25 32.5 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#1:net_name} -25 -12.5 0 1 0.15 0.15 {layer=15 hide=instance}
T {@#3:net_name} 25 0.625 0 0 0.15 0.15 {layer=15 hide=instance}

2
xschem_library/devices/noconn.sym
View File

@ -31,5 +31,5 @@ S {}
E {}
L 4 -3.75 0 0 -0 {}
B 5 -1.25 -1.25 1.25 1.25 {name=p dir=inout}
T {@#0:net_name} -20.625 -4.375 0 1 0.15 0.15 {layer=15}
T {@#0:net_name} -20.625 -4.375 0 1 0.15 0.15 {layer=15 hide=instance}
T {NC} -16.25 -4.375 0 0 0.15 0.15 { layer=4}

6
xschem_library/devices/npn.sym
View File

@ -54,6 +54,6 @@ T {@name} 20 0 0 0 0.2 0.2 {}
T {@#0:pinnumber} 25 -25 0 0 0.2 0.2 {layer=13}
T {@#2:pinnumber} 25 12.5 0 0 0.2 0.2 {layer=13}
T {@#1:pinnumber} -5 6.25 0 1 0.2 0.2 {layer=13}
T {@#0:net_name} 25 -33.75 0 0 0.15 0.15 {layer=15}
T {@#2:net_name} 25 23.75 0 0 0.15 0.15 {layer=15}
T {@#1:net_name} -6.25 -12.5 0 1 0.15 0.15 {layer=15}
T {@#0:net_name} 25 -33.75 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#2:net_name} 25 23.75 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#1:net_name} -6.25 -12.5 0 1 0.15 0.15 {layer=15 hide=instance}

2
xschem_library/devices/opin.sym
View File

@ -23,7 +23,7 @@ G {}
K {type=opin
format="*.opin @lab"
template="name=p1 lab=xxx"
net_name=true}
}
V {}
S {}
E {}

4
xschem_library/devices/parax_cap.sym
View File

@ -1,4 +1,4 @@
v {xschem version=3.4.4 file_version=1.2
v {xschem version=3.4.5 file_version=1.2
*
* This file is part of XSCHEM,
* a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit
@ -39,4 +39,4 @@ T {@value} 10 13.75 0 0 0.2 0.15 {}
T {@name} 10 3.75 0 0 0.2 0.15 {}
T {@gnd} -5 7.5 0 1 0.2 0.15 {}
T {m=@m} 10 -6.25 0 0 0.2 0.15 {}
T {@#0:net_name} 5 -22.5 0 0 0.15 0.15 {layer=15}
T {@#0:net_name} 5 -22.5 0 0 0.15 0.15 {layer=15 hide=instance}

6
xschem_library/devices/pjfet.sym
View File

@ -36,10 +36,10 @@ B 5 17.5 27.5 22.5 32.5 {name=s dir=inout}
B 5 -22.5 -2.5 -17.5 2.5 {name=g dir=in}
B 5 17.5 -32.5 22.5 -27.5 {name=d dir=inout}
P 4 7 5 0 -7.5 0 -7.5 5 -17.5 0 -7.5 -5 -7.5 0 5 0 {fill=true}
T {@#1:net_name} -25 -12.5 0 1 0.15 0.15 {layer=15}
T {@#1:net_name} -25 -12.5 0 1 0.15 0.15 {layer=15 hide=instance}
T {@spiceprefix@name} 7.5 6.25 0 0 0.2 0.2 {}
T {D} 25 20 0 0 0.15 0.15 {}
T {@#2:net_name} 25 -42.5 0 0 0.15 0.15 {layer=15}
T {@#0:net_name} 25 32.5 0 0 0.15 0.15 {layer=15}
T {@#2:net_name} 25 -42.5 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#0:net_name} 25 32.5 0 0 0.15 0.15 {layer=15 hide=instance}
T {@model} 7.5 -18.75 0 0 0.2 0.2 {}
T {area=@area} 7.5 -6.25 0 0 0.2 0.2 {}

6
xschem_library/devices/pmos3.sym
View File

@ -41,6 +41,6 @@ A 4 -8.75 0 3.75 270 360 {}
T {@model} 7.5 -17.5 0 0 0.2 0.2 {}
T {@name} 7.5 5 0 0 0.2 0.2 {999}
T {D} 25 20 0 0 0.15 0.15 {}
T {@#2:net_name} 25 -42.5 0 0 0.15 0.15 {layer=15}
T {@#0:net_name} 25 32.5 0 0 0.15 0.15 {layer=15}
T {@#1:net_name} -25 -12.5 0 1 0.15 0.15 {layer=15}
T {@#2:net_name} 25 -42.5 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#0:net_name} 25 32.5 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#1:net_name} -25 -12.5 0 1 0.15 0.15 {layer=15 hide=instance}

8
xschem_library/devices/pmos4.sym
View File

@ -52,7 +52,7 @@ B 5 17.5 -2.5 22.5 2.5 {name=b dir=in}
T {@w\\/@l\\/@m} 7.5 -17.5 0 0 0.2 0.2 {}
T {@spiceprefix@name} 7.5 7.5 0 0 0.2 0.2 {}
T {D} 25 20 0 0 0.15 0.15 {}
T {@#2:net_name} 25 -42.5 0 0 0.15 0.15 {layer=15}
T {@#0:net_name} 25 32.5 0 0 0.15 0.15 {layer=15}
T {@#1:net_name} -25 -12.5 0 1 0.15 0.15 {layer=15}
T {@#3:net_name} 25 1.25 0 0 0.15 0.15 {layer=15}
T {@#2:net_name} 25 -42.5 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#0:net_name} 25 32.5 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#1:net_name} -25 -12.5 0 1 0.15 0.15 {layer=15 hide=instance}
T {@#3:net_name} 25 1.25 0 0 0.15 0.15 {layer=15 hide=instance}

6
xschem_library/devices/pnp.sym
View File

@ -52,6 +52,6 @@ T {@name} 20 0 0 0 0.2 0.2 {}
T {@#2:pinnumber} 25 -25 0 0 0.2 0.2 {layer=13}
T {@#0:pinnumber} 25 12.5 0 0 0.2 0.2 {layer=13}
T {@#1:pinnumber} -5 6.25 0 1 0.2 0.2 {layer=13}
T {@#2:net_name} 25 -33.75 0 0 0.15 0.15 {layer=15}
T {@#0:net_name} 25 23.75 0 0 0.15 0.15 {layer=15}
T {@#1:net_name} -6.25 -12.5 0 1 0.15 0.15 {layer=15}
T {@#2:net_name} 25 -33.75 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#0:net_name} 25 23.75 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#1:net_name} -6.25 -12.5 0 1 0.15 0.15 {layer=15 hide=instance}

4
xschem_library/devices/res.sym
View File

@ -64,7 +64,7 @@ T {@name} -15 -13.75 0 1 0.2 0.2 {}
T {@value} 15 -3.75 0 0 0.2 0.2 {}
T {@#0:pinnumber} -10 -26.25 0 1 0.2 0.2 {layer=13}
T {@#1:pinnumber} -10 16.25 0 1 0.2 0.2 {layer=13}
T {@#0:net_name} 10 -28.75 0 0 0.15 0.15 {layer=15}
T {@#1:net_name} 10 20 0 0 0.15 0.15 {layer=15}
T {@#0:net_name} 10 -28.75 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#1:net_name} 10 20 0 0 0.15 0.15 {layer=15 hide=instance}
T {m=@m} -15 1.25 0 1 0.2 0.2 {}
T {@spice_get_current} 12.5 -16.25 0 0 0.2 0.2 {layer=15}

6
xschem_library/devices/res3.sym
View File

@ -56,7 +56,7 @@ T {R=@R} 15 -18.25 0 0 0.2 0.2 {}
T {@#0:pinnumber} -10 -26.25 0 1 0.2 0.2 {layer=13}
T {@#1:pinnumber} -10 16.25 0 1 0.2 0.2 {layer=13}
T {@#2:pinnumber} -10 -6.25 0 1 0.2 0.2 {layer=13}
T {@#0:net_name} 10 -28.75 0 0 0.15 0.15 {layer=15}
T {@#1:net_name} 10 20 0 0 0.15 0.15 {layer=15}
T {@#2:net_name} 10 -4 0 0 0.15 0.15 {layer=15}
T {@#0:net_name} 10 -28.75 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#1:net_name} 10 20 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#2:net_name} 10 -4 0 0 0.15 0.15 {layer=15 hide=instance}
T {m=@m} 15 6.25 0 0 0.2 0.2 {}

4
xschem_library/devices/res_ac.sym
View File

@ -50,7 +50,7 @@ T {@name} 15 -13.75 0 0 0.2 0.2 {}
T {AC=@ac} -15 3.75 0 1 0.2 0.2 {}
T {@#0:pinnumber} -10 -26.25 0 1 0.2 0.2 {layer=13}
T {@#1:pinnumber} -10 16.25 0 1 0.2 0.2 {layer=13}
T {@#0:net_name} 10 -28.75 0 0 0.15 0.15 {layer=15}
T {@#1:net_name} 10 20 0 0 0.15 0.15 {layer=15}
T {@#0:net_name} 10 -28.75 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#1:net_name} 10 20 0 0 0.15 0.15 {layer=15 hide=instance}
T {m=@m} 15 1.25 0 0 0.2 0.2 {}
T {DC=@value} -15 -11.25 0 1 0.2 0.2 {}

8
xschem_library/devices/rnmos4.sym
View File

@ -47,7 +47,7 @@ B 5 17.5 -2.5 22.5 2.5 {name=b dir=in}
T {@w\\/@l\\/@m} 12.5 -18.75 0 0 0.2 0.2 {}
T {@spiceprefix@name} 12.5 7.5 0 0 0.2 0.2 {}
T {D} 25 -27.5 0 0 0.15 0.15 {}
T {@#0:net_name} 25 -42.5 0 0 0.15 0.15 {layer=15}
T {@#2:net_name} 25 32.5 0 0 0.15 0.15 {layer=15}
T {@#1:net_name} -25 -12.5 0 1 0.15 0.15 {layer=15}
T {@#3:net_name} 25 0.625 0 0 0.15 0.15 {layer=15}
T {@#0:net_name} 25 -42.5 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#2:net_name} 25 32.5 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#1:net_name} -25 -12.5 0 1 0.15 0.15 {layer=15 hide=instance}
T {@#3:net_name} 25 0.625 0 0 0.15 0.15 {layer=15 hide=instance}

4
xschem_library/devices/sqwsource.sym
View File

@ -47,6 +47,6 @@ B 5 -2.5 27.5 2.5 32.5 {name=m dir=inout}
A 4 0 0 15 270 360 {}
T {V=@vhi} 20 -6.25 0 0 0.2 0.2 {}
T {@name} 20 -18.75 0 0 0.2 0.2 {}
T {@#0:net_name} 10 -30 0 0 0.15 0.15 {layer=15}
T {@#1:net_name} 10 20 0 0 0.15 0.15 {layer=15}
T {@#0:net_name} 10 -30 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#1:net_name} 10 20 0 0 0.15 0.15 {layer=15 hide=instance}
T {f=@freq Hz} 20 6.25 0 0 0.2 0.2 {}

8
xschem_library/devices/switch_ngspice.sym
View File

@ -43,8 +43,8 @@ B 5 -2.5 27.5 2.5 32.5 {name=M dir=inout }
B 5 -42.5 17.5 -37.5 22.5 {name=CM dir=in }
T {@name} 5 -13 2 1 0.2 0.2 {}
T {@model} 5 -2 0 0 0.2 0.2 {}
T {@#1:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15}
T {@#2:net_name} 5 32.5 0 0 0.15 0.15 {layer=15}
T {@#0:net_name} -45 -12.5 0 1 0.15 0.15 {layer=15}
T {@#3:net_name} -45 22.5 0 1 0.15 0.15 {layer=15}
T {@#1:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#2:net_name} 5 32.5 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#0:net_name} -45 -12.5 0 1 0.15 0.15 {layer=15 hide=instance}
T {@#3:net_name} -45 22.5 0 1 0.15 0.15 {layer=15 hide=instance}
T {@device_model} 2.5 13 0 0 0.04 0.04 {}

6
xschem_library/devices/var_res.sym
View File

@ -60,6 +60,6 @@ T {@value} 15 1.25 0 0 0.2 0.2 {}
T {@#2:pinnumber} -10 -28.75 0 1 0.2 0.2 {layer=13}
T {@#1:pinnumber} -10 18.75 0 1 0.2 0.2 {layer=13}
T {@#0:pinnumber} -30 3.75 0 1 0.2 0.2 {layer=13}
T {@#2:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15}
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15}
T {@#0:net_name} -35 -12.5 0 1 0.15 0.15 {layer=15}
T {@#2:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#0:net_name} -35 -12.5 0 1 0.15 0.15 {layer=15 hide=instance}

8
xschem_library/devices/vccs.sym
View File

@ -53,7 +53,7 @@ B 5 -42.5 -22.5 -37.5 -17.5 {name=cp dir=in}
B 5 -42.5 17.5 -37.5 22.5 {name=cm dir=in}
T {@value} 20 5 0 0 0.2 0.2 {}
T {@name} 20 -17.5 0 0 0.2 0.2 {}
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15}
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15}
T {@#2:net_name} -45 -32.5 0 1 0.15 0.15 {layer=15}
T {@#3:net_name} -45 22.5 0 1 0.15 0.15 {layer=15}
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#2:net_name} -45 -32.5 0 1 0.15 0.15 {layer=15 hide=instance}
T {@#3:net_name} -45 22.5 0 1 0.15 0.15 {layer=15 hide=instance}

8
xschem_library/devices/vcr.sym
View File

@ -51,7 +51,7 @@ B 5 -42.5 17.5 -37.5 22.5 {name=cm dir=in}
T {pwl(1)=@TABLE} 20 0 0 0 0.2 0.2 {}
T {@function} 20 -12.5 0 0 0.2 0.2 {}
T {@name} 20 -25 0 0 0.2 0.2 {}
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15}
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15}
T {@#2:net_name} -45 -32.5 0 1 0.15 0.15 {layer=15}
T {@#3:net_name} -45 22.5 0 1 0.15 0.15 {layer=15}
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#2:net_name} -45 -32.5 0 1 0.15 0.15 {layer=15 hide=instance}
T {@#3:net_name} -45 22.5 0 1 0.15 0.15 {layer=15 hide=instance}

8
xschem_library/devices/vcvs.sym
View File

@ -45,8 +45,8 @@ B 5 -42.5 -22.5 -37.5 -17.5 {name=cp dir=in}
B 5 -42.5 17.5 -37.5 22.5 {name=cm dir=in}
T {@value} 20 5 0 0 0.2 0.2 {}
T {@name} 20 -17.5 0 0 0.2 0.2 {}
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15}
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15}
T {@#2:net_name} -45 -32.5 0 1 0.15 0.15 {layer=15}
T {@#3:net_name} -45 22.5 0 1 0.15 0.15 {layer=15}
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#2:net_name} -45 -32.5 0 1 0.15 0.15 {layer=15 hide=instance}
T {@#3:net_name} -45 22.5 0 1 0.15 0.15 {layer=15 hide=instance}
T {@spice_get_current} 20 -6.25 0 0 0.2 0.2 {layer=15}

4
xschem_library/devices/vsource.sym
View File

@ -35,6 +35,6 @@ B 5 -2.5 27.5 2.5 32.5 {name=m dir=inout}
A 4 0 0 15 270 360 {}
T {@name} 20 -18.75 0 0 0.2 0.2 {}
T {@value} 20 6.25 0 0 0.2 0.2 {}
T {@#0:net_name} 10 -28.75 0 0 0.15 0.15 {layer=15}
T {@#1:net_name} 10 20 0 0 0.15 0.15 {layer=15}
T {@#0:net_name} 10 -28.75 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#1:net_name} 10 20 0 0 0.15 0.15 {layer=15 hide=instance}
T {@spice_get_current} 20 -6.25 0 0 0.2 0.2 {layer=15}

6
xschem_library/devices/vsource_arith.sym
View File

@ -1,4 +1,4 @@
v {xschem version=3.4.4 file_version=1.2
v {xschem version=3.4.5 file_version=1.2
*
* This file is part of XSCHEM,
* a schematic capture and Spice/Vhdl/Verilog netlisting tool for circuit
@ -35,6 +35,6 @@ B 5 -2.5 27.5 2.5 32.5 {name=m dir=inout}
A 4 0 0 15 270 360 {}
T {@VOL} 20 0 0 0 0.2 0.2 {}
T {@name} 20 -17.5 0 0 0.2 0.2 {}
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15}
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15}
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15 hide=instance}
T {@spice_get_current} 12.5 15 0 0 0.2 0.2 {layer=15}

8
xschem_library/devices/vsource_pwl.sym
View File

@ -37,7 +37,7 @@ B 5 -42.5 17.5 -37.5 22.5 {name=cm dir=in}
A 4 0 0 15 270 360 {}
T {pwl(1)=@TABLE} 20 0 0 0 0.2 0.2 {}
T {@name} 20 -15 0 0 0.2 0.2 {}
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15}
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15}
T {@#2:net_name} -45 -32.5 0 1 0.15 0.15 {layer=15}
T {@#3:net_name} -45 22.5 0 1 0.15 0.15 {layer=15}
T {@#0:net_name} 5 -42.5 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#1:net_name} 5 32.5 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#2:net_name} -45 -32.5 0 1 0.15 0.15 {layer=15 hide=instance}
T {@#3:net_name} -45 22.5 0 1 0.15 0.15 {layer=15 hide=instance}

4
xschem_library/devices/zener.sym
View File

@ -45,7 +45,7 @@ P 4 4 -0 5 -10 -5 10 -5 -0 5 {fill=true}
T {@#0:pinnumber} -5 -26.25 0 1 0.2 0.2 {layer=13}
T {@#1:pinnumber} -5 17.5 0 1 0.2 0.2 {layer=13}
T {@name} 15 -18.75 0 0 0.2 0.2 {}
T {@#0:net_name} 10 -28.75 0 0 0.15 0.15 {layer=15}
T {@#1:net_name} 10 20 0 0 0.15 0.15 {layer=15}
T {@#0:net_name} 10 -28.75 0 0 0.15 0.15 {layer=15 hide=instance}
T {@#1:net_name} 10 20 0 0 0.15 0.15 {layer=15 hide=instance}
T {@model} 15 6.25 0 0 0.2 0.2 {}
T {@spice_get_current} -22.5 -2.5 0 1 0.2 0.2 {layer=15}

2
xschem_library/examples/LCC_instances.sch
View File

@ -291,7 +291,7 @@ xschem raw_read $netlist_dir/[file tail [file rootname [xschem get current_name]
}
C {ammeter.sym} 1350 -350 0 1 {name=Vmeas}
C {vdd.sym} 50 -280 0 0 {name=l2 lab=VDD}
C {nmos4.sym} 630 -840 3 0 {name=M1 model=n w=1u l=2u m=1 net_name=true}
C {nmos4.sym} 630 -840 3 0 {name=M1 model=n w=1u l=2u m=1}
C {lab_pin.sym} 630 -860 3 1 {name=l4 sig_type=std_logic lab=0}
C {vdd.sym} 680 -860 0 0 {name=l3 lab=VDD}
C {launcher.sym} 655 -1045 0 0 {name=h2

108
xschem_library/examples/TwoStageAmp.sch
View File

@ -62,118 +62,118 @@ N 760 -190 760 -170 {lab=VCC}
N 710 -580 730 -580 {lab=Vbase2}
C {title.sym} 160 -30 0 0 {name=l1 author="Stefan Schippers"}
C {vsource.sym} 90 -290 0 0 {name=Vinput
value="DC 1.6V AC 1 0 SIN(0 1MV 1KHZ)" net_name=true}
C {gnd.sym} 90 -260 0 0 {name=l2 lab=0 net_name=true}
value="DC 1.6V AC 1 0 SIN(0 1MV 1KHZ)"}
C {gnd.sym} 90 -260 0 0 {name=l2 lab=0}
C {res.sym} 150 -460 3 1 {name=R5
value=10
footprint=1206
device=resistor
m=1 net_name=true}
m=1}
C {capa.sym} 250 -460 3 1 {name=C1
m=1
value=2.2u
footprint=1206
device="ceramic capacitor" net_name=true}
device="ceramic capacitor"}
C {res.sym} 310 -550 0 0 {name=R1
value=28K
footprint=1206
device=resistor
m=1 net_name=true}
m=1}
C {res.sym} 330 -290 0 0 {name=R2
value=2K
footprint=1206
device=resistor
m=1 net_name=true}
C {gnd.sym} 330 -260 0 0 {name=l3 lab=0 net_name=true}
m=1}
C {gnd.sym} 330 -260 0 0 {name=l3 lab=0}
C {npn.sym} 410 -460 0 0 {name=Q1
model=Q2N3904
device=2N3904
footprint=TO92
area=1
pinnumber(1) = 2 ; "alternatively use pinnumber(B)"
pinnumber(2) = 1 ; "alternatively use pinnumber(E)" net_name=true}
pinnumber(2) = 1 ; "alternatively use pinnumber(E)"}
C {res.sym} 430 -290 0 0 {name=RE1
value=100
footprint=1206
device=resistor
m=1 net_name=true}
C {gnd.sym} 430 -260 0 0 {name=l4 lab=0 net_name=true}
m=1}
C {gnd.sym} 430 -260 0 0 {name=l4 lab=0}
C {capa.sym} 510 -290 0 0 {name=CE1
m=1
value=1p
footprint=1206
device="ceramic capacitor" net_name=true}
C {gnd.sym} 510 -260 0 0 {name=l5 lab=0 net_name=true}
device="ceramic capacitor"}
C {gnd.sym} 510 -260 0 0 {name=l5 lab=0}
C {res.sym} 430 -700 0 0 {name=RC1
value=3.3K
footprint=1206
device=resistor
m=1 net_name=true}
C {vdd.sym} 430 -730 0 0 {name=l6 lab=VCC net_name=true}
C {vdd.sym} 310 -580 0 0 {name=l7 lab=VCC net_name=true}
C {ipin.sym} 70 -460 0 0 {name=p1 lab=Vin net_name=true}
m=1}
C {vdd.sym} 430 -730 0 0 {name=l6 lab=VCC}
C {vdd.sym} 310 -580 0 0 {name=l7 lab=VCC}
C {ipin.sym} 70 -460 0 0 {name=p1 lab=Vin}
C {res.sym} 500 -580 3 1 {name=R8
value=1
footprint=1206
device=resistor
m=1 net_name=true}
m=1}
C {capa.sym} 600 -580 3 1 {name=C2
m=1
value=2.2u
footprint=1206
device="ceramic capacitor" net_name=true}
device="ceramic capacitor"}
C {res.sym} 690 -700 0 0 {name=R3
value=28K
footprint=1206
device=resistor
m=1 net_name=true}
m=1}
C {res.sym} 710 -490 0 0 {name=R4
value=2.8K
footprint=1206
device=resistor
m=1 net_name=true}
C {gnd.sym} 710 -460 0 0 {name=l8 lab=0 net_name=true}
C {vdd.sym} 690 -730 0 0 {name=l9 lab=VCC net_name=true}
m=1}
C {gnd.sym} 710 -460 0 0 {name=l8 lab=0}
C {vdd.sym} 690 -730 0 0 {name=l9 lab=VCC}
C {npn.sym} 820 -580 0 0 {name=Q2
model=Q2N3904
device=2N3904
footprint=TO92
area=1
pinnumber(1) = 2
pinnumber(2) = 1 net_name=true}
pinnumber(2) = 1}
C {res.sym} 840 -700 0 0 {name=RC2
value=1K
footprint=1206
device=resistor
m=1 net_name=true}
C {vdd.sym} 840 -730 0 0 {name=l10 lab=VCC net_name=true}
m=1}
C {vdd.sym} 840 -730 0 0 {name=l10 lab=VCC}
C {res.sym} 840 -290 0 0 {name=RE2
value=100
footprint=1206
device=resistor
m=1 net_name=true}
C {gnd.sym} 840 -260 0 0 {name=l11 lab=0 net_name=true}
m=1}
C {gnd.sym} 840 -260 0 0 {name=l11 lab=0}
C {capa.sym} 920 -290 0 0 {name=CE2
m=1
value=1p
footprint=1206
device="ceramic capacitor" net_name=true}
C {gnd.sym} 920 -260 0 0 {name=l12 lab=0 net_name=true}
device="ceramic capacitor"}
C {gnd.sym} 920 -260 0 0 {name=l12 lab=0}
C {capa.sym} 950 -630 3 1 {name=Cout
m=1
value=2.2u
footprint=1206
device="ceramic capacitor" net_name=true}
device="ceramic capacitor"}
C {res.sym} 1000 -490 0 0 {name=RL
value=100K
footprint=1206
device=resistor
m=1 net_name=true}
C {gnd.sym} 1000 -460 0 0 {name=l13 lab=0 net_name=true}
C {opin.sym} 1050 -630 0 0 {name=p2 lab=Vout net_name=true}
C {vdd.sym} 760 -190 0 0 {name=l14 lab=VCC net_name=true}
C {vsource.sym} 760 -140 0 0 {name=VCC value=15 net_name=true}
C {gnd.sym} 760 -110 0 0 {name=l15 lab=0 net_name=true}
m=1}
C {gnd.sym} 1000 -460 0 0 {name=l13 lab=0}
C {opin.sym} 1050 -630 0 0 {name=p2 lab=Vout}
C {vdd.sym} 760 -190 0 0 {name=l14 lab=VCC}
C {vsource.sym} 760 -140 0 0 {name=VCC value=15}
C {gnd.sym} 760 -110 0 0 {name=l15 lab=0}
C {code.sym} 160 -190 0 0 {name=MODELS value=".model Q2N3904 NPN(Is=6.734f Xti=3 Eg=1.11 Vaf=74.03 Bf=416.4 Ne=1.259
+ Ise=6.734f Ikf=66.78m Xtb=1.5 Br=.7371 Nc=2 Isc=0 Ikr=0 Rc=1
+ Cjc=3.638p Mjc=.3085 Vjc=.75 Fc=.5 Cje=4.493p Mje=.2593 Vje=.75
@ -189,21 +189,21 @@ value=".SAVE ALL
* .DC Vinput 0 5 .01
* .DC Vinput 1 2 .0
"}
C {spice_probe.sym} 1020 -630 0 0 {name=p3 analysis=tran voltage=0.0000e+00 net_name=true}
C {spice_probe.sym} 650 -580 0 0 {name=p4 analysis=tran voltage=1.28 net_name=true}
C {spice_probe.sym} 840 -500 0 0 {name=p5 analysis=tran voltage=0.5705 net_name=true}
C {spice_probe.sym} 430 -540 0 1 {name=p6 analysis=tran voltage=5.932 net_name=true}
C {spice_probe.sym} 360 -460 0 1 {name=p7 analysis=tran voltage=0.9675 net_name=true}
C {spice_probe.sym} 110 -460 0 1 {name=p8 analysis=tran voltage=1.6 net_name=true}
C {spice_probe.sym} 880 -630 0 0 {name=p9 analysis=tran voltage=9.328 net_name=true}
C {lab_pin.sym} 430 -650 0 0 {name=l16 sig_type=std_logic lab=Vcoll1 net_name=true}
C {lab_pin.sym} 840 -650 0 0 {name=l17 sig_type=std_logic lab=Vcoll2 net_name=true}
C {lab_pin.sym} 710 -550 0 0 {name=l18 sig_type=std_logic lab=Vbase2 net_name=true}
C {lab_pin.sym} 310 -510 0 0 {name=l19 sig_type=std_logic lab=Vbase1 net_name=true}
C {lab_pin.sym} 840 -420 0 0 {name=l20 sig_type=std_logic lab=Vem2 net_name=true}
C {lab_pin.sym} 430 -420 0 0 {name=l21 sig_type=std_logic lab=Vem1 net_name=true}
C {ammeter.sym} 840 -450 0 0 {name=vm2 current=0.005705 net_name=true}
C {ammeter.sym} 430 -370 0 0 {name=vm1 current=0.002765 net_name=true}
C {spice_probe.sym} 510 -330 0 0 {name=p10 analysis=tran voltage=0.2765 net_name=true}
C {spice_probe.sym} 760 -170 0 1 {name=p12 analysis=tran voltage=15 net_name=true}
C {ammeter.sym} 760 -580 3 0 {name=v1 current=3.2742e-05 net_name=true}
C {spice_probe.sym} 1020 -630 0 0 {name=p3 analysis=tran voltage=0.0000e+00}
C {spice_probe.sym} 650 -580 0 0 {name=p4 analysis=tran voltage=1.28}
C {spice_probe.sym} 840 -500 0 0 {name=p5 analysis=tran voltage=0.5705}
C {spice_probe.sym} 430 -540 0 1 {name=p6 analysis=tran voltage=5.932}
C {spice_probe.sym} 360 -460 0 1 {name=p7 analysis=tran voltage=0.9675}
C {spice_probe.sym} 110 -460 0 1 {name=p8 analysis=tran voltage=1.6}
C {spice_probe.sym} 880 -630 0 0 {name=p9 analysis=tran voltage=9.328}
C {lab_pin.sym} 430 -650 0 0 {name=l16 sig_type=std_logic lab=Vcoll1}
C {lab_pin.sym} 840 -650 0 0 {name=l17 sig_type=std_logic lab=Vcoll2}
C {lab_pin.sym} 710 -550 0 0 {name=l18 sig_type=std_logic lab=Vbase2}
C {lab_pin.sym} 310 -510 0 0 {name=l19 sig_type=std_logic lab=Vbase1}
C {lab_pin.sym} 840 -420 0 0 {name=l20 sig_type=std_logic lab=Vem2}
C {lab_pin.sym} 430 -420 0 0 {name=l21 sig_type=std_logic lab=Vem1}
C {ammeter.sym} 840 -450 0 0 {name=vm2 current=0.005705}
C {ammeter.sym} 430 -370 0 0 {name=vm1 current=0.002765}
C {spice_probe.sym} 510 -330 0 0 {name=p10 analysis=tran voltage=0.2765}
C {spice_probe.sym} 760 -170 0 1 {name=p12 analysis=tran voltage=15}
C {ammeter.sym} 760 -580 3 0 {name=v1 current=3.2742e-05}

10
xschem_library/examples/classD_amp.sch
View File

@ -294,7 +294,7 @@ lab=#net4}
C {nmos3.sym} 440 -770 0 0 {name=xm2 model=irf540 m=1
program=evince
url="https://www.vishay.com/docs/91021/irf540.pdf"
net_name=true
device_model=".SUBCKT irf540 1 2 3
M1 9 7 8 8 MM L=100u W=100u
@ -342,7 +342,7 @@ D4 0 6 MD3
C {nmos3.sym} 440 -1090 0 0 {name=xm1 model=irf540 m=1
program=xdg-open
url="https://www.vishay.com/docs/91021/irf540.pdf"
net_name=true
device_model=".SUBCKT irf540 1 2 3
M1 9 7 8 8 MM L=100u W=100u
@ -388,15 +388,15 @@ D4 0 6 MD3
.ENDS
"}
C {lab_pin.sym} 460 -640 0 0 {name=p18 lab=VNN}
C {ammeter.sym} 460 -870 0 0 {name=vd net_name=true current=0.2069}
C {ammeter.sym} 460 -970 0 0 {name=vu net_name=true current=0.2005}
C {ammeter.sym} 460 -870 0 0 {name=vd}
C {ammeter.sym} 460 -970 0 0 {name=vu}
C {lab_pin.sym} 460 -1160 0 0 {name=p27 lab=VPP}
C {lab_pin.sym} 460 -910 0 0 {name=p3 lab=OUT}
C {comp_ngspice.sym} 550 -370 2 1 {name=x1
OFFSET=5
AMPLITUDE=10}
C {lab_pin.sym} 750 -370 0 1 {name=p6 lab=DRIVED}
C {title.sym} 160 -40 0 0 {name=l1 author="Stefan Schippers" net_name=true}
C {title.sym} 160 -40 0 0 {name=l1 author="Stefan Schippers"}
C {vsource.sym} 70 -540 0 0 {name=VVPP value=40}
C {lab_pin.sym} 70 -490 0 0 {name=p9 lab=VSS}
C {lab_pin.sym} 70 -590 0 0 {name=p10 lab=VPP}

66
xschem_library/examples/cmos_example.sch
View File

@ -259,47 +259,47 @@ N 690 -340 690 -320 {
lab=#net2}
N 500 -460 500 -400 {
lab=G}
C {lab_pin.sym} 750 -360 0 0 {name=p20 lab=0 net_name=true}
C {lab_pin.sym} 30 -220 0 0 {name=p17 lab=0 net_name=true}
C {title.sym} 160 -30 0 0 {name=l1 author="Stefan Schippers" net_name=true}
C {nmos4.sym} 550 -160 0 0 {name=m1 model=cmosn w=5u l=2u m=1 net_name=true}
C {pmos4.sym} 670 -490 0 0 {name=m2 model=cmosp w=5u l=2u m=1 net_name=true}
C {vsource.sym} 30 -250 0 0 {name=VVCC value='VCC' net_name=true
C {lab_pin.sym} 750 -360 0 0 {name=p20 lab=0}
C {lab_pin.sym} 30 -220 0 0 {name=p17 lab=0}
C {title.sym} 160 -30 0 0 {name=l1 author="Stefan Schippers"}
C {nmos4.sym} 550 -160 0 0 {name=m1 model=cmosn w=5u l=2u m=1}
C {pmos4.sym} 670 -490 0 0 {name=m2 model=cmosp w=5u l=2u m=1}
C {vsource.sym} 30 -250 0 0 {name=VVCC value='VCC'
}
C {lab_pin.sym} 570 -100 0 0 {name=p1 lab=0 net_name=true}
C {lab_pin.sym} 60 -310 0 1 {name=p2 lab=VCC net_name=true}
C {nmos4.sym} 280 -160 0 1 {name=m3 model=cmosn w=5u l=2u m=1 net_name=true}
C {lab_pin.sym} 260 -100 0 0 {name=p3 lab=0 net_name=true}
C {isource.sym} 260 -270 0 0 {name=IBIAS value='IB' net_name=true
C {lab_pin.sym} 570 -100 0 0 {name=p1 lab=0}
C {lab_pin.sym} 60 -310 0 1 {name=p2 lab=VCC}
C {nmos4.sym} 280 -160 0 1 {name=m3 model=cmosn w=5u l=2u m=1}
C {lab_pin.sym} 260 -100 0 0 {name=p3 lab=0}
C {isource.sym} 260 -270 0 0 {name=IBIAS value='IB'
}
C {lab_pin.sym} 260 -300 0 0 {name=p4 lab=0 net_name=true}
C {nmos4.sym} 480 -290 0 0 {name=m4 model=cmosn w=10u l=1u m=1 net_name=true}
C {lab_pin.sym} 520 -290 0 1 {name=p5 lab=0 net_name=true}
C {nmos4.sym} 710 -290 0 1 {name=m5 model=cmosn w=10u l=1u m=1 net_name=true}
C {lab_pin.sym} 670 -290 0 0 {name=p0 lab=0 net_name=true}
C {lab_pin.sym} 740 -490 0 1 {name=p6 lab=VCC net_name=true}
C {pmos4.sym} 520 -490 0 1 {name=m6 model=cmosp w=5u l=2u m=1 net_name=true}
C {lab_pin.sym} 450 -490 0 0 {name=p7 lab=VCC net_name=true}
C {lab_pin.sym} 570 -580 0 0 {name=p8 lab=VCC net_name=true}
C {lab_pin.sym} 440 -290 0 0 {name=p9 lab=PLUS net_name=true}
C {lab_pin.sym} 750 -290 0 1 {name=p10 lab=MINUS net_name=true}
C {lab_pin.sym} 840 -420 0 1 {name=p11 lab=DIFFOUT net_name=true}
C {lab_pin.sym} 260 -220 0 0 {name=p13 lab=GN net_name=true}
C {lab_pin.sym} 30 -350 0 0 {name=p14 lab=0 net_name=true}
C {lab_pin.sym} 260 -300 0 0 {name=p4 lab=0}
C {nmos4.sym} 480 -290 0 0 {name=m4 model=cmosn w=10u l=1u m=1}
C {lab_pin.sym} 520 -290 0 1 {name=p5 lab=0}
C {nmos4.sym} 710 -290 0 1 {name=m5 model=cmosn w=10u l=1u m=1}
C {lab_pin.sym} 670 -290 0 0 {name=p0 lab=0}
C {lab_pin.sym} 740 -490 0 1 {name=p6 lab=VCC}
C {pmos4.sym} 520 -490 0 1 {name=m6 model=cmosp w=5u l=2u m=1}
C {lab_pin.sym} 450 -490 0 0 {name=p7 lab=VCC}
C {lab_pin.sym} 570 -580 0 0 {name=p8 lab=VCC}
C {lab_pin.sym} 440 -290 0 0 {name=p9 lab=PLUS}
C {lab_pin.sym} 750 -290 0 1 {name=p10 lab=MINUS}
C {lab_pin.sym} 840 -420 0 1 {name=p11 lab=DIFFOUT}
C {lab_pin.sym} 260 -220 0 0 {name=p13 lab=GN}
C {lab_pin.sym} 30 -350 0 0 {name=p14 lab=0}
C {vsource.sym} 30 -380 0 0 {name=VMINUS
value="2.5 pulse 2.4 2.6 10n 1n 1n 0.999u 2u ac 1 0"
net_name=true
}
C {lab_pin.sym} 60 -440 0 1 {name=p15 lab=MINUS net_name=true}
C {lab_pin.sym} 30 -500 0 0 {name=p16 lab=0 net_name=true}
C {vsource.sym} 30 -530 0 0 {name=VPLUS value=2.5 net_name=true}
C {lab_pin.sym} 60 -590 0 1 {name=p18 lab=PLUS net_name=true}
C {lab_pin.sym} 60 -440 0 1 {name=p15 lab=MINUS}
C {lab_pin.sym} 30 -500 0 0 {name=p16 lab=0}
C {vsource.sym} 30 -530 0 0 {name=VPLUS value=2.5}
C {lab_pin.sym} 60 -590 0 1 {name=p18 lab=PLUS}
C {capa.sym} 750 -390 0 0 {name=CL
m=1
value=0.2p
footprint=1206
device="ceramic capacitor" net_name=true}
C {lab_pin.sym} 500 -430 0 0 {name=p12 lab=G net_name=true}
device="ceramic capacitor"}
C {lab_pin.sym} 500 -430 0 0 {name=p12 lab=G}
C {launcher.sym} 700 -60 0 0 {name=h1
descr=Backannotate
tclcommand="xschem annotate_op $\{netlist_dir\}/cmos_example_ngspice.raw"
@ -403,7 +403,7 @@ C {ngspice_get_expr.sym} 160 -150 0 0 {name=r8 node="[to_eng [expr \{[ngspice::g
descr="Power="
}
C {ammeter.sym} 500 -370 0 1 {name=Vmeasl}
C {lab_pin.sym} 570 -230 0 0 {name=p19 lab=S net_name=true}
C {lab_pin.sym} 570 -230 0 0 {name=p19 lab=S}
C {launcher.sym} 475 -735 0 0 {name=h5
descr="Switch rawfile"
tclcommand="

4
xschem_library/examples/cmos_inv.sch
View File

@ -59,8 +59,8 @@ C {opin.sym} 370 -230 0 0 {name=p2 lab=Z}
C {ipin.sym} 60 -230 0 0 {name=p1 lab=A goto=0}
C {vdd.sym} 140 -400 0 0 {name=l1 lab=VDD}
C {lab_pin.sym} 140 -120 0 0 {name=l2 sig_type=std_logic lab=0}
C {pmos4.sym} 120 -350 0 0 {name=M2 model=p w=WP l=LLP m=1 net_name=true}
C {nmos4.sym} 120 -170 0 0 {name=M1 model=n w=WN l=LLN m=1 net_name=true}
C {pmos4.sym} 120 -350 0 0 {name=M2 model=p w=WP l=LLP m=1}
C {nmos4.sym} 120 -170 0 0 {name=M1 model=n w=WN l=LLN m=1}
C {lab_pin.sym} 200 -170 0 1 {name=l3 sig_type=std_logic lab=0}
C {lab_pin.sym} 200 -350 0 1 {name=l4 sig_type=std_logic lab=VDD}
C {title.sym} 160 -30 0 0 {name=l5 author="Stefan Schippers"}

2
xschem_library/examples/cmos_inv.sym
View File

@ -26,7 +26,7 @@ format="@name @pinlist @symname WN=@WN WP=@WP LLN=@LLN LLP=@LLP m=@m"
verilog_primitive=true
verilog_format="assign #80 @@Z = ~ @@A ;"
template="name=X1 WN=15u WP=45u LLN=3u LLP=3u m=1"
net_name=true}
}
V {}
S {}
E {}

2
xschem_library/examples/lightning.sch
View File

@ -208,7 +208,7 @@ C {var_res.sym} 580 -710 0 0 {name=R8
value=9.5K
footprint=1206
m=1
net_name=true}
}
C {code.sym} 40 -210 0 0 {name=MODELS value="
** you need to get the spice models for Q2N4401, Q2N4403 and D1N914
** and put them in file referenced below.

90
xschem_library/examples/mos_power_ampli.sch
View File

@ -23,7 +23,7 @@ G {}
K {type=subcircuit
format="@name @pinlist @symname"
template="name=x1"
net_name=true
}
V {}
S {}
@ -211,21 +211,21 @@ C {ipin.sym} 0 -140 0 0 {name=p3 lab=VNN}
C {nmos3.sym} 1090 -530 0 0 {name=xm2 model=irf540 m=1
program=evince
url="https://www.vishay.com/docs/91021/irf540.pdf"
net_name=true}
C {res.sym} 960 -500 0 1 {name=R7 m=1 value=320 net_name=true}
}
C {res.sym} 960 -500 0 1 {name=R7 m=1 value=320}
C {nmos3.sym} 1090 -850 0 0 {name=xm1 model=irf540 m=1
program=evince
url="https://www.vishay.com/docs/91021/irf540.pdf" net_name=true}
C {res.sym} 960 -820 0 1 {name=R0 m=1 value=320 net_name=true}
url="https://www.vishay.com/docs/91021/irf540.pdf"}
C {res.sym} 960 -820 0 1 {name=R0 m=1 value=320}
C {lab_wire.sym} 880 -530 0 0 {name=l8 lab=GB}
C {res.sym} 340 -1140 0 1 {name=R2 m=1 value=50 net_name=true}
C {res.sym} 180 -1140 0 1 {name=R3 m=1 value=50 net_name=true}
C {res.sym} 340 -1140 0 1 {name=R2 m=1 value=50}
C {res.sym} 180 -1140 0 1 {name=R3 m=1 value=50}
C {lab_pin.sym} 340 -1170 0 0 {name=p10 lab=VPP}
C {npn.sym} 160 -620 0 0 {name=Q5 model=q2n2222 area=1 net_name=true}
C {pnp.sym} 820 -1040 0 0 {name=Q4 model=q2n2907p area=1 net_name=true}
C {res.sym} 840 -1140 0 1 {name=R9 m=1 value=50 net_name=true}
C {pnp.sym} 540 -880 0 0 {name=Q6 model=q2n2907p area=1 net_name=true}
C {res.sym} 560 -1140 0 1 {name=R4 m=1 value=50 net_name=true}
C {npn.sym} 160 -620 0 0 {name=Q5 model=q2n2222 area=1}
C {pnp.sym} 820 -1040 0 0 {name=Q4 model=q2n2907p area=1}
C {res.sym} 840 -1140 0 1 {name=R9 m=1 value=50}
C {pnp.sym} 540 -880 0 0 {name=Q6 model=q2n2907p area=1}
C {res.sym} 560 -1140 0 1 {name=R4 m=1 value=50}
C {lab_pin.sym} 180 -670 0 0 {name=p15 lab=C5}
C {lab_pin.sym} 340 -670 0 1 {name=p16 lab=C9}
C {lab_pin.sym} 180 -1090 0 0 {name=p17 lab=E1}
@ -234,11 +234,11 @@ C {lab_pin.sym} 340 -1090 0 1 {name=p23 lab=E2}
C {lab_pin.sym} 560 -1070 0 1 {name=p28 lab=E6}
C {lab_pin.sym} 840 -1090 0 0 {name=p29 lab=E4}
C {lab_pin.sym} 180 -1210 0 0 {name=p34 lab=VBOOST}
C {ammeter.sym} 1110 -630 0 0 {name=vd net_name=true }
C {ammeter.sym} 1110 -730 0 0 {name=vu net_name=true }
C {pnp.sym} 200 -1040 0 1 {name=Q1 model=q2n2907p area=1 net_name=true}
C {pnp.sym} 360 -880 0 1 {name=Q2 model=q2n2907p area=1 net_name=true}
C {npn.sym} 360 -620 0 1 {name=Q9 model=q2n2222 area=1 net_name=true}
C {ammeter.sym} 1110 -630 0 0 {name=vd}
C {ammeter.sym} 1110 -730 0 0 {name=vu}
C {pnp.sym} 200 -1040 0 1 {name=Q1 model=q2n2907p area=1}
C {pnp.sym} 360 -880 0 1 {name=Q2 model=q2n2907p area=1}
C {npn.sym} 360 -620 0 1 {name=Q9 model=q2n2222 area=1}
C {lab_pin.sym} 560 -760 0 0 {name=p9 lab=C6}
C {code.sym} 970 -350 0 0 {name=STIMULI
only_toplevel=true
@ -277,29 +277,29 @@ rload out 0 4
*.probe dc v(plus,vdc)
"}
C {lab_wire.sym} 920 -850 0 0 {name=l1 lab=GA}
C {res.sym} 800 -530 1 1 {name=R11 m=1 value=1000 net_name=true
C {res.sym} 800 -530 1 1 {name=R11 m=1 value=1000
hide_texts=true}
C {pnp.sym} 540 -580 0 0 {name=Q8 model=q2n2907p area=1 net_name=true}
C {capa.sym} 1240 -1020 0 0 {name=C12 m=1 value="40u" net_name=true}
C {pnp.sym} 540 -580 0 0 {name=Q8 model=q2n2907p area=1}
C {capa.sym} 1240 -1020 0 0 {name=C12 m=1 value="40u"}
C {diode.sym} 920 -1240 0 0 {name=D0 model=d1n4148 area=1
url="http://pdf.datasheetcatalog.com/datasheet/bytes/1N5406.pdf" net_name=true}
C {res.sym} 1240 -930 0 1 {name=R18 m=1 value=200 net_name=true}
url="http://pdf.datasheetcatalog.com/datasheet/bytes/1N5406.pdf"}
C {res.sym} 1240 -930 0 1 {name=R18 m=1 value=200}
C {zener.sym} 1240 -1240 0 0 {name=D1 model=d1n758 area=1
url="http://www.futurlec.com/Datasheet/Diodes/1N746-1N759.pdf" net_name=true}
C {res.sym} 690 -850 0 1 {name=R14 m=1 value=4k net_name=true}
C {pnp.sym} 820 -900 0 0 {name=Q11 model=q2n2907p area=1 net_name=true}
C {res.sym} 690 -940 0 1 {name=R15 m=1 value=4k net_name=true}
C {res.sym} 260 -510 0 1 {name=R5 m=1 value=40 net_name=true}
C {res.sym} 260 -450 0 1 {name=R6 m=1 value=40 net_name=true}
url="http://www.futurlec.com/Datasheet/Diodes/1N746-1N759.pdf"}
C {res.sym} 690 -850 0 1 {name=R14 m=1 value=4k}
C {pnp.sym} 820 -900 0 0 {name=Q11 model=q2n2907p area=1}
C {res.sym} 690 -940 0 1 {name=R15 m=1 value=4k}
C {res.sym} 260 -510 0 1 {name=R5 m=1 value=40}
C {res.sym} 260 -450 0 1 {name=R6 m=1 value=40}
C {zener.sym} 150 -270 2 0 {name=D2 model=1N746 area=1
url="http://www.futurlec.com/Datasheet/Diodes/1N746-1N759.pdf"
net_name=true}
C {npn.sym} 240 -300 0 0 {name=Q3 model=q2n2222 area=1 net_name=true}
C {res.sym} 150 -330 0 1 {name=R1 m=1 value=7k net_name=true}
}
C {npn.sym} 240 -300 0 0 {name=Q3 model=q2n2222 area=1}
C {res.sym} 150 -330 0 1 {name=R1 m=1 value=7k}
C {lab_pin.sym} 150 -400 0 0 {name=p7 lab=VPP}
C {res.sym} 260 -210 0 1 {name=R10 m=1 value=110 net_name=true}
C {capa.sym} 50 -250 0 0 {name=C3 m=1 value=100n net_name=true}
C {res.sym} 560 -700 0 1 {name=R12 m=1 value=400 net_name=true}
C {res.sym} 260 -210 0 1 {name=R10 m=1 value=110}
C {capa.sym} 50 -250 0 0 {name=C3 m=1 value=100n}
C {res.sym} 560 -700 0 1 {name=R12 m=1 value=400}
C {lab_pin.sym} 690 -890 0 0 {name=p12 lab=B1}
C {lab_pin.sym} 340 -550 0 1 {name=p13 lab=E9}
C {lab_pin.sym} 560 -530 0 0 {name=p19 lab=C8}
@ -309,24 +309,24 @@ C {lab_pin.sym} 260 -260 0 1 {name=p22 lab=E3}
C {lab_pin.sym} 260 -350 0 0 {name=p26 lab=C3}
C {lab_pin.sym} 50 -300 0 0 {name=p30 lab=B3}
C {lab_pin.sym} 520 -580 0 0 {name=p33 lab=VSS}
C {res.sym} 340 -750 0 1 {name=R13 m=1 value=300 net_name=true}
C {npn.sym} 200 -720 0 1 {name=Q7 model=q2n2222 area=1 net_name=true}
C {res.sym} 340 -750 0 1 {name=R13 m=1 value=300}
C {npn.sym} 200 -720 0 1 {name=Q7 model=q2n2222 area=1}
C {lab_pin.sym} 180 -780 0 0 {name=p8 lab=C7}
C {lab_pin.sym} 340 -800 0 1 {name=p31 lab=C2}
C {title.sym} 160 -30 0 0 {name=l2 author="Stefan Schippers"}
C {lab_pin.sym} 860 -790 0 0 {name=p32 lab=SA}
C {ammeter.sym} 1110 -440 0 0 {name=v0 net_name=true }
C {ammeter.sym} 1110 -440 0 0 {name=v0}
C {lab_pin.sym} 860 -470 0 0 {name=p35 lab=SB}
C {ammeter.sym} 560 -980 0 0 {name=v1 net_name=true }
C {ammeter.sym} 340 -980 0 0 {name=v2 net_name=true }
C {ammeter.sym} 260 -390 0 0 {name=v3 net_name=true }
C {ammeter.sym} 700 -530 3 0 {name=v4 net_name=true }
C {ammeter.sym} 690 -770 0 0 {name=v5 net_name=true }
C {ammeter.sym} 180 -960 0 1 {name=v6 net_name=true }
C {ammeter.sym} 840 -980 0 0 {name=v7 net_name=true }
C {ammeter.sym} 560 -980 0 0 {name=v1}
C {ammeter.sym} 340 -980 0 0 {name=v2}
C {ammeter.sym} 260 -390 0 0 {name=v3}
C {ammeter.sym} 700 -530 3 0 {name=v4}
C {ammeter.sym} 690 -770 0 0 {name=v5}
C {ammeter.sym} 180 -960 0 1 {name=v6}
C {ammeter.sym} 840 -980 0 0 {name=v7}
C {spice_probe_vdiff.sym} 860 -500 0 0 {name=p37 }
C {spice_probe_vdiff.sym} 860 -820 0 0 {name=p38 voltage=3.68}
C {ammeter.sym} 1300 -680 3 0 {name=v8 net_name=true }
C {ammeter.sym} 1300 -680 3 0 {name=v8}
C {opin.sym} 1390 -680 0 0 {name=p5 lab=OUT}
C {ipin.sym} 0 -570 0 0 {name=p1 lab=MINUS}
C {ipin.sym} 0 -180 0 0 {name=p4 lab=VSS}

1
xschem_library/examples/mos_power_ampli.sym
View File

@ -23,7 +23,6 @@ G {}
K {type=subcircuit
format="@name @pinlist @symname"
template="name=x1"
net_name=true
}
V {}
S {}

1
xschem_library/examples/mos_power_ampli_extracted.sym
View File

@ -23,7 +23,6 @@ G {}
K {type=subcircuit
format="@name @pinlist @symname"
template="name=x1"
net_name=true
xxxspice_sym_def = "
* Ideal amplifier
.subckt mos_power_ampli_extracted MINUS PLUS VSS OUT VPP VNN

68
xschem_library/examples/plot_manipulation.sch
View File

@ -83,42 +83,42 @@ N 240 -150 240 -120 {lab=0}
N 220 -150 240 -150 {lab=0}
N 220 -180 220 -150 {lab=0}
N 220 -180 240 -180 {lab=0}
C {lab_pin.sym} 750 -300 0 0 {name=p20 lab=0 net_name=true}
C {lab_pin.sym} 30 -150 0 0 {name=p17 lab=0 net_name=true}
C {title.sym} 160 -30 0 0 {name=l1 author="Stefan Schippers" net_name=true}
C {nmos4.sym} 480 -180 0 0 {name=m1 model=cmosn w=5u l=2u m=1 net_name=true}
C {pmos4.sym} 550 -430 0 0 {name=m2 model=cmosp w=5u l=2u m=1 net_name=true}
C {vsource.sym} 30 -180 0 0 {name=VVCC value=5 net_name=true}
C {lab_pin.sym} 500 -120 0 0 {name=p1 lab=0 net_name=true}
C {lab_pin.sym} 60 -240 0 1 {name=p2 lab=VCC net_name=true}
C {nmos4.sym} 260 -180 0 1 {name=m3 model=cmosn w=5u l=2u m=1 net_name=true}
C {lab_pin.sym} 240 -120 0 0 {name=p3 lab=0 net_name=true}
C {isource.sym} 240 -290 0 0 {name=IBIAS value=100u net_name=true}
C {lab_pin.sym} 240 -320 0 0 {name=p4 lab=0 net_name=true}
C {nmos4.sym} 410 -280 0 0 {name=m4 model=cmosn w=10u l=1u m=1 net_name=true}
C {lab_pin.sym} 450 -280 0 1 {name=p5 lab=0 net_name=true}
C {nmos4.sym} 590 -280 0 1 {name=m5 model=cmosn w=10u l=1u m=1 net_name=true}
C {lab_pin.sym} 550 -280 0 0 {name=p0 lab=0 net_name=true}
C {lab_pin.sym} 620 -430 0 1 {name=p6 lab=VCC net_name=true}
C {pmos4.sym} 450 -430 0 1 {name=m6 model=cmosp w=5u l=2u m=1 net_name=true}
C {lab_pin.sym} 380 -430 0 0 {name=p7 lab=VCC net_name=true}
C {lab_pin.sym} 500 -520 0 0 {name=p8 lab=VCC net_name=true}
C {lab_pin.sym} 370 -280 0 0 {name=p9 lab=PLUS net_name=true}
C {lab_pin.sym} 630 -280 0 1 {name=p10 lab=MINUS net_name=true}
C {lab_pin.sym} 830 -360 0 1 {name=p11 lab=DIFFOUT net_name=true}
C {lab_pin.sym} 240 -230 0 0 {name=p13 lab=GN net_name=true}
C {lab_pin.sym} 30 -280 0 0 {name=p14 lab=0 net_name=true}
C {vsource.sym} 30 -310 0 0 {name=VPLUS value=2.5 net_name=true
C {lab_pin.sym} 750 -300 0 0 {name=p20 lab=0}
C {lab_pin.sym} 30 -150 0 0 {name=p17 lab=0}
C {title.sym} 160 -30 0 0 {name=l1 author="Stefan Schippers"}
C {nmos4.sym} 480 -180 0 0 {name=m1 model=cmosn w=5u l=2u m=1}
C {pmos4.sym} 550 -430 0 0 {name=m2 model=cmosp w=5u l=2u m=1}
C {vsource.sym} 30 -180 0 0 {name=VVCC value=5}
C {lab_pin.sym} 500 -120 0 0 {name=p1 lab=0}
C {lab_pin.sym} 60 -240 0 1 {name=p2 lab=VCC}
C {nmos4.sym} 260 -180 0 1 {name=m3 model=cmosn w=5u l=2u m=1}
C {lab_pin.sym} 240 -120 0 0 {name=p3 lab=0}
C {isource.sym} 240 -290 0 0 {name=IBIAS value=100u}
C {lab_pin.sym} 240 -320 0 0 {name=p4 lab=0}
C {nmos4.sym} 410 -280 0 0 {name=m4 model=cmosn w=10u l=1u m=1}
C {lab_pin.sym} 450 -280 0 1 {name=p5 lab=0}
C {nmos4.sym} 590 -280 0 1 {name=m5 model=cmosn w=10u l=1u m=1}
C {lab_pin.sym} 550 -280 0 0 {name=p0 lab=0}
C {lab_pin.sym} 620 -430 0 1 {name=p6 lab=VCC}
C {pmos4.sym} 450 -430 0 1 {name=m6 model=cmosp w=5u l=2u m=1}
C {lab_pin.sym} 380 -430 0 0 {name=p7 lab=VCC}
C {lab_pin.sym} 500 -520 0 0 {name=p8 lab=VCC}
C {lab_pin.sym} 370 -280 0 0 {name=p9 lab=PLUS}
C {lab_pin.sym} 630 -280 0 1 {name=p10 lab=MINUS}
C {lab_pin.sym} 830 -360 0 1 {name=p11 lab=DIFFOUT}
C {lab_pin.sym} 240 -230 0 0 {name=p13 lab=GN}
C {lab_pin.sym} 30 -280 0 0 {name=p14 lab=0}
C {vsource.sym} 30 -310 0 0 {name=VPLUS value=2.5
}
C {lab_pin.sym} 60 -370 0 1 {name=p15 lab=PLUS net_name=true}
C {lab_pin.sym} 30 -430 0 0 {name=p16 lab=0 net_name=true}
C {vsource.sym} 30 -460 0 0 {name=V1 value=2.5 net_name=true}
C {lab_pin.sym} 60 -520 0 1 {name=p18 lab=MINUS net_name=true}
C {lab_pin.sym} 60 -370 0 1 {name=p15 lab=PLUS}
C {lab_pin.sym} 30 -430 0 0 {name=p16 lab=0}
C {vsource.sym} 30 -460 0 0 {name=V1 value=2.5}
C {lab_pin.sym} 60 -520 0 1 {name=p18 lab=MINUS}
C {capa.sym} 750 -330 0 0 {name=CL
m=1
value=2p
footprint=1206
device="ceramic capacitor" net_name=true}
device="ceramic capacitor"}
C {code.sym} 870 -190 0 0 {name=STIMULI
only_toplevel=true
value="
@ -168,10 +168,10 @@ quit 0
** xyce, not needed if -r given om cmdline
* .print tran format=raw v(diffout) v(plus) v(minus)
" net_name=true}
"}
C {ngspice_probe.sym} 500 -210 0 0 {name=r9}
C {lab_pin.sym} 430 -370 0 0 {name=p12 lab=G net_name=true}
C {lab_pin.sym} 500 -230 0 0 {name=p19 lab=S net_name=true}
C {lab_pin.sym} 430 -370 0 0 {name=p12 lab=G}
C {lab_pin.sym} 500 -230 0 0 {name=p19 lab=S}
C {launcher.sym} 1100 -200 0 0 {name=h3
descr="Select arrow and
Ctrl-Left-Click to load/unload waveforms"

6
xschem_library/examples/poweramp.sch
View File

@ -262,9 +262,9 @@ C {lab_pin.sym} 350 -270 0 0 {name=p19 lab=FB}
C {lab_pin.sym} 350 -730 0 0 {name=p25 lab=FBN}
C {title.sym} 160 -30 0 0 {name=l2 author="Stefan Schippers"}
C {lab_pin.sym} 870 -1150 0 0 {name=p27 lab=IN_INT}
C {ammeter.sym} 260 -1210 3 0 {name=vcurrvpp net_name=true }
C {ammeter.sym} 260 -1050 3 0 {name=vcurrvnn net_name=true }
C {ammeter.sym} 260 -1130 3 0 {name=vcurrvss net_name=true }
C {ammeter.sym} 260 -1210 3 0 {name=vcurrvpp}
C {ammeter.sym} 260 -1050 3 0 {name=vcurrvnn}
C {ammeter.sym} 260 -1130 3 0 {name=vcurrvss}
C {launcher.sym} 710 -70 0 0 {name=h2
descr="Ctrl-Click
Clear all probes"

6
xschem_library/examples/poweramp_lcc.sch
View File

@ -256,9 +256,9 @@ C {lab_pin.sym} 270 1050 0 1 {name=p19 lab=FB}
C {lab_pin.sym} 250 -540 0 1 {name=p25 lab=FBN}
C {title.sym} 180 1470 0 0 {name=l2 author="Stefan Schippers"}
C {lab_pin.sym} 2200 -1100 0 0 {name=p27 lab=IN_INT}
C {ammeter.sym} 2020 -1410 3 0 {name=vcurrvpp net_name=true }
C {ammeter.sym} 2020 -1250 3 0 {name=vcurrvnn net_name=true }
C {ammeter.sym} 2020 -1330 3 0 {name=vcurrvss net_name=true }
C {ammeter.sym} 2020 -1410 3 0 {name=vcurrvpp}
C {ammeter.sym} 2020 -1250 3 0 {name=vcurrvnn}
C {ammeter.sym} 2020 -1330 3 0 {name=vcurrvss}
C {launcher.sym} 60 -120 0 0 {name=h2
descr="Ctrl-Click
Clear all probes"

8
xschem_library/examples/rlc.sch
View File

@ -119,18 +119,18 @@ value="
write rlc.raw
.endc
"}
C {capa.sym} 150 -510 0 0 {name=C1 m=1 value=50nF footprint=1206 device="ceramic capacitor" net_name=true}
C {capa.sym} 150 -510 0 0 {name=C1 m=1 value=50nF footprint=1206 device="ceramic capacitor"}
C {lab_pin.sym} 150 -290 2 1 {name=l2 sig_type=std_logic lab=C}
C {lab_pin.sym} 150 -560 2 0 {name=l4 sig_type=std_logic lab=A}
C {lab_pin.sym} 350 -200 2 0 {name=l5 sig_type=std_logic lab=0}
C {res.sym} 350 -450 0 0 {name=R1 m=1 value=1k footprint=1206 device=resistor
net_name=true}
C {ind.sym} 150 -350 0 0 {name=L1 value=10mH net_name=true}
}
C {ind.sym} 150 -350 0 0 {name=L1 value=10mH}
C {vsource.sym} 150 -230 0 0 {name=V1
xvalue="pwl 0 0 100u 0 101u 3"
value="pulse 0 3 0 100n 100n 9.9u 20u"
net_name=true}
}
C {ammeter.sym} 350 -310 0 0 {name=Vmeas}
C {lab_pin.sym} 150 -450 2 0 {name=l6 sig_type=std_logic lab=B}
C {lab_pin.sym} 350 -380 2 0 {name=l7 sig_type=std_logic lab=D}

56
xschem_library/examples/test_ac.sch
View File

@ -156,33 +156,33 @@ N 520 -610 560 -610 {
lab=D}
N 520 -570 560 -570 {
lab=0}
C {lab_pin.sym} 30 -150 0 0 {name=p17 lab=0 net_name=true}
C {title.sym} 160 -30 0 0 {name=l1 author="Stefan Schippers" net_name=true}
C {nmos4.sym} 430 -150 0 0 {name=m1 model=cmosn w=5u l=2u m=1 net_name=true}
C {pmos4.sym} 500 -400 0 0 {name=mtop_2nd model=cmosp w=5u l=2u m=1 net_name=true}
C {vsource.sym} 30 -180 0 0 {name=VVCC value=5 net_name=true}
C {lab_pin.sym} 450 -90 0 0 {name=p1 lab=0 net_name=true}
C {lab_pin.sym} 60 -240 0 1 {name=p2 lab=VCC net_name=true}
C {nmos4.sym} 210 -150 0 1 {name=m3 model=cmosn w=5u l=2u m=1 net_name=true}
C {lab_pin.sym} 190 -90 0 0 {name=p3 lab=0 net_name=true}
C {isource.sym} 190 -260 0 0 {name=IBIAS value=\{IBIAS\} net_name=true}
C {lab_pin.sym} 190 -290 0 0 {name=p4 lab=0 net_name=true}
C {nmos4.sym} 360 -250 0 0 {name=m4 model=cmosn w=10u l=1u m=1 net_name=true}
C {lab_pin.sym} 400 -250 0 1 {name=p5 lab=0 net_name=true}
C {nmos4.sym} 540 -250 0 1 {name=m5 model=cmosn w=10u l=1u m=1 net_name=true}
C {lab_pin.sym} 500 -250 0 0 {name=p0 lab=0 net_name=true}
C {lab_pin.sym} 570 -400 0 1 {name=p6 lab=VCC net_name=true}
C {pmos4.sym} 400 -400 0 1 {name=mtop_1st model=cmosp w=5u l=2u m=1 net_name=true}
C {lab_pin.sym} 330 -400 0 0 {name=p7 lab=VCC net_name=true}
C {lab_pin.sym} 450 -490 0 0 {name=p8 lab=VCC net_name=true}
C {lab_pin.sym} 320 -250 0 0 {name=p9 lab=PLUS net_name=true}
C {lab_pin.sym} 580 -240 0 1 {name=p10 lab=MINUS net_name=true}
C {lab_pin.sym} 900 -330 0 1 {name=p11 lab=DIFFOUT net_name=true}
C {lab_pin.sym} 190 -200 0 0 {name=p13 lab=GN net_name=true}
C {lab_pin.sym} 30 -280 0 0 {name=p14 lab=0 net_name=true}
C {lab_pin.sym} 30 -150 0 0 {name=p17 lab=0}
C {title.sym} 160 -30 0 0 {name=l1 author="Stefan Schippers"}
C {nmos4.sym} 430 -150 0 0 {name=m1 model=cmosn w=5u l=2u m=1}
C {pmos4.sym} 500 -400 0 0 {name=mtop_2nd model=cmosp w=5u l=2u m=1}
C {vsource.sym} 30 -180 0 0 {name=VVCC value=5}
C {lab_pin.sym} 450 -90 0 0 {name=p1 lab=0}
C {lab_pin.sym} 60 -240 0 1 {name=p2 lab=VCC}
C {nmos4.sym} 210 -150 0 1 {name=m3 model=cmosn w=5u l=2u m=1}
C {lab_pin.sym} 190 -90 0 0 {name=p3 lab=0}
C {isource.sym} 190 -260 0 0 {name=IBIAS value=\{IBIAS\}}
C {lab_pin.sym} 190 -290 0 0 {name=p4 lab=0}
C {nmos4.sym} 360 -250 0 0 {name=m4 model=cmosn w=10u l=1u m=1}
C {lab_pin.sym} 400 -250 0 1 {name=p5 lab=0}
C {nmos4.sym} 540 -250 0 1 {name=m5 model=cmosn w=10u l=1u m=1}
C {lab_pin.sym} 500 -250 0 0 {name=p0 lab=0}
C {lab_pin.sym} 570 -400 0 1 {name=p6 lab=VCC}
C {pmos4.sym} 400 -400 0 1 {name=mtop_1st model=cmosp w=5u l=2u m=1}
C {lab_pin.sym} 330 -400 0 0 {name=p7 lab=VCC}
C {lab_pin.sym} 450 -490 0 0 {name=p8 lab=VCC}
C {lab_pin.sym} 320 -250 0 0 {name=p9 lab=PLUS}
C {lab_pin.sym} 580 -240 0 1 {name=p10 lab=MINUS}
C {lab_pin.sym} 900 -330 0 1 {name=p11 lab=DIFFOUT}
C {lab_pin.sym} 190 -200 0 0 {name=p13 lab=GN}
C {lab_pin.sym} 30 -280 0 0 {name=p14 lab=0}
C {vsource.sym} 30 -310 0 0 {name=VPLUS value="dc 2.5"
}
C {lab_pin.sym} 60 -370 0 1 {name=p15 lab=PLUS net_name=true}
C {lab_pin.sym} 60 -370 0 1 {name=p15 lab=PLUS}
C {lab_pin.sym} 750 -610 0 0 {name=l18 lab=DIFFOUT}
C {lab_pin.sym} 750 -570 0 0 {name=l19 lab=0}
C {lab_pin.sym} 830 -540 0 0 {name=l20 lab=0}
@ -194,10 +194,10 @@ C {lab_pin.sym} 520 -570 0 0 {name=l3 lab=0}
C {lab_pin.sym} 600 -540 0 0 {name=l4 lab=0}
C {lab_pin.sym} 600 -660 0 1 {name=l5 lab=D_L}
C {vcvs.sym} 600 -590 0 0 {name=e2 value=1}
C {nmos4.sym} 810 -420 0 1 {name=m7 model=cmosn w=10u l=1u m=1 net_name=true}
C {nmos4.sym} 810 -420 0 1 {name=m7 model=cmosn w=10u l=1u m=1}
C {lab_pin.sym} 790 -470 0 0 {name=l6 lab=DIFFOUT_L}
C {lab_pin.sym} 790 -370 0 0 {name=l7 lab=D_L}
C {lab_pin.sym} 790 -420 0 0 {name=p18 lab=0 net_name=true}
C {lab_pin.sym} 790 -420 0 0 {name=p18 lab=0}
C {vsource.sym} 690 -230 3 0 {name=VLOOP value="dc 0 ac 1 0"}
C {launcher.sym} 1040 -580 0 0 {name=h2
descr="View raw file"
@ -837,7 +837,7 @@ tclcommand="
xschem raw_read $netlist_dir/[file tail [file rootname [xschem get current_name]]].raw ac
"
}
C {lab_pin.sym} 750 -140 0 0 {name=p12 lab=0 net_name=true}
C {lab_pin.sym} 750 -140 0 0 {name=p12 lab=0}
C {res.sym} 750 -190 0 0 {name=R2
value=10G
m=1}

58
xschem_library/examples/test_ac_xyce.sch
View File

@ -132,33 +132,33 @@ N 750 -220 800 -220 {
lab=#net2}
N 750 -160 800 -160 {
lab=0}
C {lab_pin.sym} 30 -150 0 0 {name=p17 lab=0 net_name=true}
C {title.sym} 160 -30 0 0 {name=l1 author="Stefan Schippers" net_name=true}
C {nmos4.sym} 430 -150 0 0 {name=m1 model=cmosn w=5u l=2u m=1 net_name=true}
C {pmos4.sym} 500 -400 0 0 {name=mtop_2nd model=cmosp w=5u l=2u m=1 net_name=true}
C {vsource.sym} 30 -180 0 0 {name=VVCC value=5 net_name=true}
C {lab_pin.sym} 450 -90 0 0 {name=p1 lab=0 net_name=true}
C {lab_pin.sym} 60 -240 0 1 {name=p2 lab=VCC net_name=true}
C {nmos4.sym} 210 -150 0 1 {name=m3 model=cmosn w=5u l=2u m=1 net_name=true}
C {lab_pin.sym} 190 -90 0 0 {name=p3 lab=0 net_name=true}
C {isource.sym} 190 -260 0 0 {name=IBIAS value=10u net_name=true}
C {lab_pin.sym} 190 -290 0 0 {name=p4 lab=0 net_name=true}
C {nmos4.sym} 360 -250 0 0 {name=m4 model=cmosn w=10u l=1u m=1 net_name=true}
C {lab_pin.sym} 400 -250 0 1 {name=p5 lab=0 net_name=true}
C {nmos4.sym} 540 -250 0 1 {name=m5 model=cmosn w=10u l=1u m=1 net_name=true}
C {lab_pin.sym} 500 -250 0 0 {name=p0 lab=0 net_name=true}
C {lab_pin.sym} 570 -400 0 1 {name=p6 lab=VCC net_name=true}
C {pmos4.sym} 400 -400 0 1 {name=mtop_1st model=cmosp w=5u l=2u m=1 net_name=true}
C {lab_pin.sym} 330 -400 0 0 {name=p7 lab=VCC net_name=true}
C {lab_pin.sym} 450 -490 0 0 {name=p8 lab=VCC net_name=true}
C {lab_pin.sym} 320 -250 0 0 {name=p9 lab=PLUS net_name=true}
C {lab_pin.sym} 580 -250 0 1 {name=p10 lab=MINUS net_name=true}
C {lab_pin.sym} 900 -330 0 1 {name=p11 lab=DIFFOUT net_name=true}
C {lab_pin.sym} 190 -200 0 0 {name=p13 lab=GN net_name=true}
C {lab_pin.sym} 30 -280 0 0 {name=p14 lab=0 net_name=true}
C {lab_pin.sym} 30 -150 0 0 {name=p17 lab=0}
C {title.sym} 160 -30 0 0 {name=l1 author="Stefan Schippers"}
C {nmos4.sym} 430 -150 0 0 {name=m1 model=cmosn w=5u l=2u m=1}
C {pmos4.sym} 500 -400 0 0 {name=mtop_2nd model=cmosp w=5u l=2u m=1}
C {vsource.sym} 30 -180 0 0 {name=VVCC value=5}
C {lab_pin.sym} 450 -90 0 0 {name=p1 lab=0}
C {lab_pin.sym} 60 -240 0 1 {name=p2 lab=VCC}
C {nmos4.sym} 210 -150 0 1 {name=m3 model=cmosn w=5u l=2u m=1}
C {lab_pin.sym} 190 -90 0 0 {name=p3 lab=0}
C {isource.sym} 190 -260 0 0 {name=IBIAS value=10u}
C {lab_pin.sym} 190 -290 0 0 {name=p4 lab=0}
C {nmos4.sym} 360 -250 0 0 {name=m4 model=cmosn w=10u l=1u m=1}
C {lab_pin.sym} 400 -250 0 1 {name=p5 lab=0}
C {nmos4.sym} 540 -250 0 1 {name=m5 model=cmosn w=10u l=1u m=1}
C {lab_pin.sym} 500 -250 0 0 {name=p0 lab=0}
C {lab_pin.sym} 570 -400 0 1 {name=p6 lab=VCC}
C {pmos4.sym} 400 -400 0 1 {name=mtop_1st model=cmosp w=5u l=2u m=1}
C {lab_pin.sym} 330 -400 0 0 {name=p7 lab=VCC}
C {lab_pin.sym} 450 -490 0 0 {name=p8 lab=VCC}
C {lab_pin.sym} 320 -250 0 0 {name=p9 lab=PLUS}
C {lab_pin.sym} 580 -250 0 1 {name=p10 lab=MINUS}
C {lab_pin.sym} 900 -330 0 1 {name=p11 lab=DIFFOUT}
C {lab_pin.sym} 190 -200 0 0 {name=p13 lab=GN}
C {lab_pin.sym} 30 -280 0 0 {name=p14 lab=0}
C {vsource.sym} 30 -310 0 0 {name=VPLUS value="dc 2.5"
}
C {lab_pin.sym} 60 -370 0 1 {name=p15 lab=PLUS net_name=true}
C {lab_pin.sym} 60 -370 0 1 {name=p15 lab=PLUS}
C {code.sym} 10 -550 0 0 {name=STIMULI
only_toplevel=true
value="
@ -178,23 +178,23 @@ value="
** xyce, not needed if -r given om cmdline
* .print tran format=raw v(diffout) v(plus) v(minus)
" net_name=true}
"}
C {lab_pin.sym} 790 -570 0 0 {name=l18 lab=DIFFOUT}
C {lab_pin.sym} 790 -530 0 0 {name=l19 lab=0}
C {lab_pin.sym} 830 -500 0 0 {name=l20 lab=0}
C {lab_pin.sym} 830 -600 0 1 {name=l21 lab=DIFFOUT_L}
C {vcvs.sym} 830 -550 0 0 {name=e1 value=1}
C {lab_pin.sym} 750 -140 0 0 {name=p12 lab=0 net_name=true}
C {lab_pin.sym} 750 -140 0 0 {name=p12 lab=0}
C {lab_pin.sym} 450 -200 0 0 {name=p16 lab=D}
C {lab_pin.sym} 610 -570 0 0 {name=l2 lab=D}
C {lab_pin.sym} 610 -530 0 0 {name=l3 lab=0}
C {lab_pin.sym} 650 -500 0 0 {name=l4 lab=0}
C {lab_pin.sym} 650 -600 0 1 {name=l5 lab=D_L}
C {vcvs.sym} 650 -550 0 0 {name=e2 value=1}
C {nmos4.sym} 810 -420 0 1 {name=m7 model=cmosn w=10u l=1u m=1 net_name=true}
C {nmos4.sym} 810 -420 0 1 {name=m7 model=cmosn w=10u l=1u m=1}
C {lab_pin.sym} 790 -470 0 0 {name=l6 lab=DIFFOUT_L}
C {lab_pin.sym} 790 -370 0 0 {name=l7 lab=D_L}
C {lab_pin.sym} 790 -420 0 0 {name=p18 lab=0 net_name=true}
C {lab_pin.sym} 790 -420 0 0 {name=p18 lab=0}
C {vsource.sym} 690 -230 3 0 {name=VLOOP value="dc 0 ac 1 0"}
C {res.sym} 750 -190 0 0 {name=R2
value=10G

50
xschem_library/examples/test_doublepin.sch
View File

@ -264,11 +264,11 @@ lab=BB}
N 1920 -1450 1980 -1450 {
lab=RRSSTT}
C {doublepin.sym} 1230 -670 0 0 {name=x9
net_name=true}
}
C {doublepin.sym} 810 -670 0 1 {name=x8
net_name=true}
}
C {doublepin.sym} 780 -880 0 0 {name=x2
net_name=true}
}
C {lab_wire.sym} 550 -890 0 0 {name=l2 sig_type=std_logic lab=AA[3:0]}
C {lab_pin.sym} 510 -830 0 1 {name=p3 lab=ZZ[5]}
C {lab_pin.sym} 960 -830 0 1 {name=p5 lab=ZZ[6]}
@ -276,9 +276,9 @@ C {lab_wire.sym} 550 -930 0 0 {name=l3 sig_type=std_logic lab=RRSSTT}
C {lab_wire.sym} 550 -910 0 0 {name=l4 sig_type=std_logic lab=CCKK}
C {lab_wire.sym} 550 -870 0 0 {name=l5 sig_type=std_logic lab=BB}
C {doublepin.sym} 330 -1110 0 0 {name=x3
net_name=true}
}
C {doublepin.sym} 780 -1110 0 0 {name=x4
net_name=true}
}
C {lab_pin.sym} 180 -1120 0 0 {name=l6 sig_type=std_logic lab=AA[3:0]}
C {lab_pin.sym} 510 -1060 0 1 {name=p1 lab=ZZ[3]}
C {lab_pin.sym} 960 -1060 0 1 {name=p2 lab=ZZ[4]}
@ -290,9 +290,9 @@ C {lab_pin.sym} 930 -1160 0 1 {name=l11 sig_type=std_logic lab=RRSSTT}
C {lab_pin.sym} 930 -1140 0 1 {name=l12 sig_type=std_logic lab=CCKK}
C {lab_pin.sym} 930 -1100 0 1 {name=l13 sig_type=std_logic lab=BB}
C {doublepin.sym} 330 -1340 0 0 {name=x5
net_name=true}
}
C {doublepin.sym} 780 -1340 0 0 {name=x6
net_name=true}
}
C {lab_pin.sym} 180 -1350 0 0 {name=l14 sig_type=std_logic lab=AA[3:0]}
C {lab_pin.sym} 510 -1290 0 1 {name=p4 lab=ZZ[1]}
C {lab_pin.sym} 960 -1290 0 1 {name=p6 lab=ZZ[2]}
@ -309,14 +309,14 @@ C {lab_wire.sym} 550 -1370 0 0 {name=l24 sig_type=std_logic lab=CCKK}
C {lab_wire.sym} 550 -1330 0 0 {name=l25 sig_type=std_logic lab=BB}
C {lab_pin.sym} 180 -660 0 0 {name=l33 sig_type=std_logic lab=BB}
C {doublepin.sym} 330 -880 0 0 {name=x1
net_name=true}
}
C {lab_pin.sym} 510 -620 0 1 {name=p7 lab=ZZ[7]}
C {lab_pin.sym} 630 -620 0 0 {name=p8 lab=ZZ[8]}
C {lab_pin.sym} 180 -680 0 0 {name=l30 sig_type=std_logic lab=AA[3:0]}
C {lab_pin.sym} 180 -720 0 0 {name=l31 sig_type=std_logic lab=RRSSTT}
C {lab_pin.sym} 180 -700 0 0 {name=l32 sig_type=std_logic lab=CCKK}
C {doublepin.sym} 330 -670 0 0 {name=x7
net_name=true}
}
C {iopin.sym} 100 -80 0 0 { name=p9 lab=RRSSTT }
C {iopin.sym} 100 -100 0 0 { name=p10 lab=CCKK }
C {iopin.sym} 100 -120 0 0 { name=p11 lab=BB }
@ -325,55 +325,55 @@ C {opin.sym} 270 -120 0 0 { name=p13 lab=ZZ[22:1]}
C {title.sym} 160 -30 0 0 {name=l1 author="Stefan Schippers"}
C {lab_pin.sym} 1410 -620 0 1 {name=p8 lab=ZZ[9]}
C {doublepin.sym} 1110 -460 0 0 {name=x10
net_name=true}
}
C {doublepin.sym} 810 -460 0 1 {name=x11
net_name=true}
}
C {lab_pin.sym} 440 -410 0 1 {name=p7 lab=ZZ[12]}
C {lab_pin.sym} 630 -410 0 0 {name=p8 lab=ZZ[11]}
C {doublepin.sym} 260 -460 0 0 {name=x12
net_name=true}
}
C {lab_pin.sym} 1290 -410 0 1 {name=p1 lab=ZZ[10]}
C {doublepin.sym} 1370 -1040 0 0 {name=x13
net_name=true}
}
C {lab_pin.sym} 1550 -990 0 1 {name=p2 lab=ZZ[13]}
C {lab_pin.sym} 1520 -1050 0 1 {name=l1 sig_type=std_logic lab=AA[3:0]}
C {lab_pin.sym} 1520 -1090 0 1 {name=l11 sig_type=std_logic lab=RRSSTT}
C {lab_pin.sym} 1520 -1070 0 1 {name=l12 sig_type=std_logic lab=CCKK}
C {lab_pin.sym} 1520 -1030 0 1 {name=l13 sig_type=std_logic lab=BB}
C {doublepin.sym} 1370 -1300 0 1 {name=x14
net_name=true}
}
C {lab_pin.sym} 1190 -1250 0 0 {name=p2 lab=ZZ[14]}
C {lab_pin.sym} 1520 -1310 0 1 {name=l3 sig_type=std_logic lab=AA[3:0]}
C {lab_pin.sym} 1520 -1350 0 1 {name=l11 sig_type=std_logic lab=RRSSTT}
C {lab_pin.sym} 1520 -1330 0 1 {name=l12 sig_type=std_logic lab=CCKK}
C {lab_pin.sym} 1520 -1290 0 1 {name=l13 sig_type=std_logic lab=BB}
C {doublepin.sym} 330 -230 0 0 {name=x17[1:0]
net_name=true}
}
C {doublepin.sym} 860 -230 0 1 {name=x16[1:0]
net_name=true}
}
C {lab_pin.sym} 510 -180 0 1 {name=p7 lab=ZZ[17]}
C {lab_pin.sym} 680 -180 0 0 {name=p8 lab=ZZ[16]}
C {doublepin.sym} 1230 -230 0 0 {name=x22[1:0]
net_name=true}
}
C {lab_pin.sym} 1410 -180 0 1 {name=p1 lab=ZZ[15]}
C {inv_ngspice.sym} 80 -260 0 0 {name=x18 ROUT=1000 net_name=true}
C {inv_ngspice.sym} 70 -450 0 0 {name=x19 ROUT=1000 net_name=true}
C {inv_ngspice.sym} 80 -260 0 0 {name=x18 ROUT=1000}
C {inv_ngspice.sym} 70 -450 0 0 {name=x19 ROUT=1000}
C {doublepin.sym} 1590 -460 0 0 {name=x20
net_name=true}
}
C {lab_pin.sym} 1770 -310 0 1 {name=p8 lab=ZZ[18]}
C {doublepin.sym} 1890 -460 0 0 {name=x21
net_name=true}
}
C {lab_pin.sym} 2070 -310 0 1 {name=p8 lab=ZZ[19]}
C {inv_ngspice.sym} 770 -350 0 0 {name=x15 ROUT=1000 net_name=true}
C {inv_ngspice.sym} 770 -350 0 0 {name=x15 ROUT=1000}
C {doublepin.sym} 1410 -870 0 0 {name=x23
net_name=true}
}
C {lab_wire.sym} 1180 -880 0 0 {name=l2 sig_type=std_logic lab=AA[3:0]}
C {lab_pin.sym} 1590 -820 0 1 {name=p5 lab=ZZ[20]}
C {lab_wire.sym} 1180 -920 0 0 {name=l3 sig_type=std_logic lab=RRSSTT}
C {lab_wire.sym} 1180 -900 0 0 {name=l4 sig_type=std_logic lab=CCKK}
C {lab_wire.sym} 1180 -860 0 0 {name=l5 sig_type=std_logic lab=BB}
C {doublepin.sym} 1910 -870 0 1 {name=x24
net_name=true}
}
C {lab_pin.sym} 1730 -820 0 0 {name=p5 lab=ZZ[21]}
C {xcross.sym} 1900 -1370 0 0 {name=x25}
C {xcross.sym} 2140 -1290 0 0 {name=x26}
@ -381,7 +381,7 @@ C {xcross.sym} 1860 -1070 0 0 {name=x27}
C {xcross.sym} 2020 -1070 0 0 {name=x28}
C {xcross.sym} 2180 -990 0 0 {name=x29}
C {doublepin.sym} 2510 -980 0 1 {name=x30
net_name=true}
}
C {lab_pin.sym} 2330 -930 0 0 {name=p5 lab=ZZ[22]}
C {xcross.sym} 2060 -1410 2 0 {name=x31}
C {use.sym} 1590 -100 0 0 {------------------------------------------------

6
xschem_library/examples/test_extracted_netlist.sch
View File

@ -161,9 +161,9 @@ C {vsource.sym} 290 -170 0 0 {name=VNN value="dc 50"}
C {lab_pin.sym} 530 -280 0 1 {name=p7 lab=VPP}
C {lab_pin.sym} 530 -120 0 1 {name=p8 lab=VNN}
C {lab_pin.sym} 530 -200 0 1 {name=p9 lab=VSS}
C {ammeter.sym} 430 -280 3 0 {name=vcurrvpp net_name=true current=0.54}
C {ammeter.sym} 430 -120 3 0 {name=vcurrvnn net_name=true current=-0.4526}
C {ammeter.sym} 430 -200 3 0 {name=vcurrvss net_name=true current=-0.08742}
C {ammeter.sym} 430 -280 3 0 {name=vcurrvpp}
C {ammeter.sym} 430 -120 3 0 {name=vcurrvnn}
C {ammeter.sym} 430 -200 3 0 {name=vcurrvss}
C {ngspice_probe.sym} 370 -200 0 1 {name=p34}
C {ngspice_probe.sym} 290 -280 0 1 {name=p35}
C {ngspice_probe.sym} 290 -120 0 1 {name=p36}

76
xschem_library/examples/test_nyquist.sch
View File

@ -302,42 +302,42 @@ N 990 -430 990 -410 {
lab=DIFFOUT}
N 990 -490 990 -430 {
lab=DIFFOUT}
C {lab_pin.sym} 30 -220 0 0 {name=p17 lab=0 net_name=true}
C {title.sym} 160 -30 0 0 {name=l1 author="Stefan Schippers" net_name=true}
C {nmos4.sym} 550 -160 0 0 {name=m1 model=cmosn w=5u l=2u m=2 net_name=true
C {lab_pin.sym} 30 -220 0 0 {name=p17 lab=0}
C {title.sym} 160 -30 0 0 {name=l1 author="Stefan Schippers"}
C {nmos4.sym} 550 -160 0 0 {name=m1 model=cmosn w=5u l=2u m=2
}
C {pmos4.sym} 670 -490 0 0 {name=m2 model=cmosp w=5u l=2u m=1 net_name=true
C {pmos4.sym} 670 -490 0 0 {name=m2 model=cmosp w=5u l=2u m=1
}
C {vsource.sym} 30 -250 0 0 {name=VVCC value='VCC' net_name=true
C {vsource.sym} 30 -250 0 0 {name=VVCC value='VCC'
}
C {lab_pin.sym} 570 -100 0 0 {name=p1 lab=0 net_name=true}
C {lab_pin.sym} 60 -310 0 1 {name=p2 lab=VCC net_name=true}
C {nmos4.sym} 280 -160 0 1 {name=m3 model=cmosn w=5u l=2u m=1 net_name=true
C {lab_pin.sym} 570 -100 0 0 {name=p1 lab=0}
C {lab_pin.sym} 60 -310 0 1 {name=p2 lab=VCC}
C {nmos4.sym} 280 -160 0 1 {name=m3 model=cmosn w=5u l=2u m=1
}
C {lab_pin.sym} 260 -100 0 0 {name=p3 lab=0 net_name=true}
C {isource.sym} 260 -270 0 0 {name=IBIAS value='IB' net_name=true
C {lab_pin.sym} 260 -100 0 0 {name=p3 lab=0}
C {isource.sym} 260 -270 0 0 {name=IBIAS value='IB'
}
C {lab_pin.sym} 260 -300 0 0 {name=p4 lab=0 net_name=true}
C {nmos4.sym} 480 -290 0 0 {name=m4 model=cmosn w=10u l=1u m=1 net_name=true
C {lab_pin.sym} 260 -300 0 0 {name=p4 lab=0}
C {nmos4.sym} 480 -290 0 0 {name=m4 model=cmosn w=10u l=1u m=1
}
C {lab_pin.sym} 520 -290 0 1 {name=p5 lab=0 net_name=true}
C {nmos4.sym} 710 -290 0 1 {name=m5 model=cmosn w=10u l=1u m=1 net_name=true
C {lab_pin.sym} 520 -290 0 1 {name=p5 lab=0}
C {nmos4.sym} 710 -290 0 1 {name=m5 model=cmosn w=10u l=1u m=1
}
C {lab_pin.sym} 670 -290 0 0 {name=p0 lab=0 net_name=true}
C {lab_pin.sym} 740 -490 0 1 {name=p6 lab=VCC net_name=true}
C {pmos4.sym} 520 -490 0 1 {name=m6 model=cmosp w=5u l=2u m=1 net_name=true
C {lab_pin.sym} 670 -290 0 0 {name=p0 lab=0}
C {lab_pin.sym} 740 -490 0 1 {name=p6 lab=VCC}
C {pmos4.sym} 520 -490 0 1 {name=m6 model=cmosp w=5u l=2u m=1
}
C {lab_pin.sym} 450 -490 0 0 {name=p7 lab=VCC net_name=true}
C {lab_pin.sym} 570 -580 0 0 {name=p8 lab=VCC net_name=true}
C {lab_pin.sym} 750 -290 0 1 {name=p9 lab=PLUS net_name=true}
C {lab_pin.sym} 440 -290 0 0 {name=p10 lab=MINUS net_name=true}
C {lab_pin.sym} 840 -420 0 1 {name=p11 lab=DIFFOUT net_name=true}
C {lab_pin.sym} 260 -220 0 0 {name=p13 lab=GN net_name=true}
C {lab_pin.sym} 30 -500 0 0 {name=p16 lab=0 net_name=true}
C {vsource.sym} 30 -530 0 0 {name=VPLUS value="dc 2.5 pwl 0 2.5 100n 2.5 100.1n 2.51" net_name=true
C {lab_pin.sym} 450 -490 0 0 {name=p7 lab=VCC}
C {lab_pin.sym} 570 -580 0 0 {name=p8 lab=VCC}
C {lab_pin.sym} 750 -290 0 1 {name=p9 lab=PLUS}
C {lab_pin.sym} 440 -290 0 0 {name=p10 lab=MINUS}
C {lab_pin.sym} 840 -420 0 1 {name=p11 lab=DIFFOUT}
C {lab_pin.sym} 260 -220 0 0 {name=p13 lab=GN}
C {lab_pin.sym} 30 -500 0 0 {name=p16 lab=0}
C {vsource.sym} 30 -530 0 0 {name=VPLUS value="dc 2.5 pwl 0 2.5 100n 2.5 100.1n 2.51"
}
C {lab_pin.sym} 60 -590 0 1 {name=p18 lab=PLUS net_name=true}
C {lab_pin.sym} 500 -430 0 0 {name=p12 lab=G net_name=true}
C {lab_pin.sym} 60 -590 0 1 {name=p18 lab=PLUS}
C {lab_pin.sym} 500 -430 0 0 {name=p12 lab=G}
C {launcher.sym} 700 -60 0 0 {name=h1
descr=Backannotate
tclcommand="xschem annotate_op"
@ -379,8 +379,8 @@ value=".temp 30
"}
C {ammeter.sym} 500 -370 0 1 {name=Vmeasl}
C {lab_pin.sym} 570 -230 0 0 {name=p19 lab=S net_name=true}
C {nmos4.sym} 1140 -160 0 0 {name=m7 model=cmosn w=5u l=2u m=1 net_name=true
C {lab_pin.sym} 570 -230 0 0 {name=p19 lab=S}
C {nmos4.sym} 1140 -160 0 0 {name=m7 model=cmosn w=5u l=2u m=1
device_model="
*n-ch model
.MODEL CMOSN NMOS (
@ -418,9 +418,9 @@ device_model="
+PRDSW = -114.7860236 PK2 = -5.151187E-3 WKETA = 5.687313E-3
+LKETA = -0.018518 )
"}
C {lab_pin.sym} 1160 -100 0 0 {name=p21 lab=0 net_name=true}
C {lab_pin.sym} 1060 -160 0 0 {name=p22 lab=GN net_name=true}
C {pmos4.sym} 1140 -490 0 0 {name=m8 model=cmosp w=5u l=2u m=1 net_name=true
C {lab_pin.sym} 1160 -100 0 0 {name=p21 lab=0}
C {lab_pin.sym} 1060 -160 0 0 {name=p22 lab=GN}
C {pmos4.sym} 1140 -490 0 0 {name=m8 model=cmosp w=5u l=2u m=1
device_model="
*p-ch model
.MODEL CMOSP PMOS (
@ -458,8 +458,8 @@ device_model="
+PRDSW = 52.7951169 PK2 = 9.714153E-4 WKETA = 0.0109418
+LKETA = 7.702974E-3 )
"}
C {lab_pin.sym} 1210 -490 0 1 {name=p23 lab=VCC net_name=true}
C {lab_pin.sym} 1260 -330 0 1 {name=p24 lab=OUT net_name=true
C {lab_pin.sym} 1210 -490 0 1 {name=p23 lab=VCC}
C {lab_pin.sym} 1260 -330 0 1 {name=p24 lab=OUT
lock=1}
C {launcher.sym} 2000 -100 0 0 {name=h5
descr="load waves"
@ -483,7 +483,7 @@ m=1
value=200f
footprint=1206
device="ceramic capacitor"}
C {lab_pin.sym} 520 -790 0 0 {name=p20 lab=MINUS net_name=true}
C {lab_pin.sym} 520 -790 0 0 {name=p20 lab=MINUS}
C {lab_pin.sym} 750 -1040 2 0 {name=l18 lab=S}
C {lab_pin.sym} 710 -1040 2 0 {name=l19 lab=0}
C {lab_pin.sym} 680 -980 1 0 {name=l20 lab=0}
@ -492,9 +492,9 @@ C {lab_pin.sym} 750 -1180 2 0 {name=l2 lab=G}
C {lab_pin.sym} 710 -1180 2 0 {name=l3 lab=0}
C {lab_pin.sym} 680 -1120 1 0 {name=l4 lab=0}
C {vcvs.sym} 730 -1120 1 0 {name=e2 value=1}
C {lab_pin.sym} 900 -1050 0 0 {name=p25 lab=0 net_name=true}
C {lab_pin.sym} 980 -790 0 1 {name=p27 lab=OUT net_name=true}
C {nmos4.sym} 920 -1050 0 1 {name=m10 model=cmosn w=10u l=1u m=1 net_name=true
C {lab_pin.sym} 900 -1050 0 0 {name=p25 lab=0}
C {lab_pin.sym} 980 -790 0 1 {name=p27 lab=OUT}
C {nmos4.sym} 920 -1050 0 1 {name=m10 model=cmosn w=10u l=1u m=1
}
C {res.sym} 890 -790 1 0 {name=R3
value=10G

10
xschem_library/generators/test_generators.sch
View File

@ -66,7 +66,7 @@ value=1k
footprint=1206
device=resistor
m=1
net_name=true}
}
C {lab_show.sym} 180 -380 0 0 {name=l1}
C {lab_show.sym} 180 -260 0 0 {name=l2}
C {capa.sym} 460 -250 0 0 {name=C1
@ -74,21 +74,21 @@ m=1
value=1p
footprint=1206
device="ceramic capacitor"
net_name=true}
}
C {capa.sym} 570 -250 0 0 {name=C2
m=1
value=1p
footprint=1206
device="ceramic capacitor"
net_name=true}
}
C {tier.tcl(@lab\\)} 460 -220 0 0 {name=p3 sig_type=std_logic lab=VSS}
C {tier.tcl(@lab\\)} 570 -220 0 0 {name=p4 sig_type=std_logic lab=VSS}
C {res.tcl(@value\\)} 460 -390 0 0 {name=R2 value=100
net_name=true
tclcommand="edit_file [abs_sym_path res.tcl]"
}
C {res.tcl(@value\\)} 570 -390 0 0 {name=R3 value=0.1
net_name=true
tclcommand="edit_file [abs_sym_path res.tcl]"
}
C {lab_show.sym} 460 -290 0 0 {name=l3}

12
xschem_library/ngspice/adc.sch
View File

@ -122,19 +122,19 @@ C {ipin.sym} 640 -190 0 0 {name=p10 lab=CK}
C {ipin.sym} 640 -150 0 0 {name=p11 lab=RST}
C {lab_pin.sym} 790 -170 0 0 {name=p14 lab=VCC}
C {lab_pin.sym} 950 -190 0 1 {name=p24 lab=C[5:0]}
C {and3_ngspice.sym} 1120 -230 0 0 {name=x5 ROUT=1000 net_name=true}
C {and3_ngspice.sym} 1120 -230 0 0 {name=x5 ROUT=1000}
C {lab_pin.sym} 1080 -250 0 0 {name=p25 lab=C[5]}
C {lab_pin.sym} 1080 -230 0 0 {name=p26 lab=C[4]}
C {lab_pin.sym} 1080 -210 0 0 {name=p27 lab=C[3]}
C {lab_pin.sym} 1080 -150 0 0 {name=p28 lab=C[1]}
C {lab_pin.sym} 1080 -130 0 0 {name=p29 lab=C[0]}
C {and3_ngspice.sym} 1120 -150 0 0 {name=x6 ROUT=1000
net_name=true}
}
C {lab_pin.sym} 1080 -170 0 0 {name=p30 lab=C[2]}
C {and_ngspice.sym} 1220 -190 0 0 {name=x7 ROUT=1000
net_name=true}
}
C {or_ngspice.sym} 1320 -210 0 0 {name=x8 ROUT=1000
net_name=true}
}
C {lab_pin.sym} 1280 -230 0 0 {name=p31 lab=RST}
C {lab_pin.sym} 1540 -230 0 1 {name=p15 lab=RSTI}
C {flip_flop_ngspice.sym} 1480 -210 0 0 {name=x9}
@ -144,7 +144,7 @@ C {lab_pin.sym} 1520 -390 0 0 {name=p1 lab=RST}
C {spice_probe.sym} 840 -250 0 0 {name=p6 attrs=""}
C {spice_probe.sym} 710 -410 0 0 {name=p17 attrs=""}
C {spice_probe.sym} 1540 -270 0 0 {name=p18 attrs=""}
C {inv_ngspice.sym} 1040 -410 0 0 {name=x11 net_name=true RUP=1000}
C {inv_ngspice.sym} 1040 -410 0 0 {name=x11 RUP=1000}
C {lab_wire.sym} 1130 -410 0 0 {name=l2 lab=QN}
C {spice_probe.sym} 1090 -410 0 0 {name=p19 attrs=""}
C {ipin.sym} 300 -370 0 0 {name=p242 lab=VREF}
@ -168,4 +168,4 @@ C {spice_probe.sym} 220 -430 0 0 {name=p265 attrs=""}
C {opamp_65nm.sym} 370 -400 2 1 {name=x41}
C {comp_65nm.sym} 610 -410 0 0 {name=x42}
C {spice_probe.sym} 1470 -430 0 0 {name=p2 attrs=""}
C {or_ngspice.sym} 1110 -320 0 0 {name=x3 ROUT=1000 net_name=true}
C {or_ngspice.sym} 1110 -320 0 0 {name=x3 ROUT=1000}

2
xschem_library/ngspice/diode_ngspice.sch
View File

@ -33,7 +33,7 @@ N 430 -310 430 -270 {
lab=mn}
C {iopin.sym} 430 -150 0 0 {name=p1 lab=plus}
C {iopin.sym} 430 -370 0 0 {name=p2 lab=minus}
C {title.sym} 160 -40 0 0 {name=l1 author="Stefan Schippers" net_name=true}
C {title.sym} 160 -40 0 0 {name=l1 author="Stefan Schippers"}
C {ammeter.sym} 430 -340 2 0 {name=Vm}
C {ammeter.sym} 430 -180 2 0 {name=Vp}
C {lab_pin.sym} 430 -210 0 1 {name=l2 sig_type=std_logic lab=pn}

2
xschem_library/ngspice/pv_ngspice.sch
View File

@ -133,7 +133,7 @@ quit
.endc
"}
C {iopin.sym} 640 -500 2 1 {name=p2 lab=minus}
C {title.sym} 160 -40 0 0 {name=l1 author="Stefan Schippers" net_name=true}
C {title.sym} 160 -40 0 0 {name=l1 author="Stefan Schippers"}
C {ipin.sym} 100 -840 2 1 {name=p2 lab=fade}
C {ammeter.sym} 140 -750 3 0 {name=Vf}
C {iopin.sym} 640 -880 2 1 {name=p1 lab=plus}

28
xschem_library/ngspice/solar_panel.sch
View File

@ -274,7 +274,7 @@ N 770 -1030 890 -1030 {
lab=TRIANG}
N 820 -330 820 -210 {
lab=0}
C {title.sym} 160 -40 0 0 {name=l1 author="Stefan Schippers" net_name=true}
C {title.sym} 160 -40 0 0 {name=l1 author="Stefan Schippers"}
C {code_shown.sym} 170 -310 0 0 {name=CONTROL
value="tcleval(
.option savecurrents
@ -290,18 +290,18 @@ value="tcleval(
)
"
net_name=true}
}
C {code.sym} 20 -240 0 0 {name=MODELS value=".MODEL DIODE D(IS=1.139e-08 RS=0.99 CJO=9.3e-12 VJ=1.6 M=0.411 BV=30 EG=0.7 )
.MODEL swmod SW(VT=0.5 VH=0.01 RON=0.01 ROFF=10000000)
" net_name=true}
"}
C {lab_pin.sym} 650 -530 0 1 {name=l4 lab=PANEL }
C {lab_pin.sym} 800 -210 0 0 {name=l6 lab=0 }
C {ammeter.sym} 1070 -440 3 0 {name=Vled net_name=true}
C {ammeter.sym} 1070 -440 3 0 {name=Vled}
C {ind.sym} 890 -610 3 1 {name=L2
m=1
value=40u
footprint=1206
device=inductor net_name=true
device=inductor
hide_texts=true}
C {lab_pin.sym} 1140 -440 0 1 {name=l7 lab=LED }
C {lab_pin.sym} 820 -550 0 1 {name=l9 lab=SW }
@ -309,11 +309,11 @@ C {capa.sym} 1010 -280 0 0 {name=C1
m=1
value=500n
footprint=1206
device="ceramic capacitor" net_name=true
device="ceramic capacitor"
hide_texts=true}
C {lab_pin.sym} 1010 -400 0 1 {name=l10 lab=VO }
C {lab_pin.sym} 530 -610 0 0 {name=l3 lab=PANEL }
C {ammeter.sym} 970 -610 3 0 {name=Vind net_name=true}
C {ammeter.sym} 970 -610 3 0 {name=Vind}
C {isource_table.sym} 1100 -330 0 0 {name=G2[9..0] CTRL="V(LED)" TABLE="
+ (0, 0)
+ (4.8, 5m)
@ -329,9 +329,9 @@ C {isource_table.sym} 1100 -330 0 0 {name=G2[9..0] CTRL="V(LED)" TABLE="
+ (7.2, 395m)
+ (7.4, 470m)
+ (8.0, 750m)"
net_name=true}
C {ammeter.sym} 610 -610 3 0 {name=Vsw net_name=true}
C {ammeter.sym} 820 -360 2 0 {name=Vdiode net_name=true}
}
C {ammeter.sym} 610 -610 3 0 {name=Vsw}
C {ammeter.sym} 820 -360 2 0 {name=Vdiode}
C {spice_probe.sym} 1120 -440 0 0 {name=p1 analysis=tran}
C {spice_probe.sym} 650 -530 0 0 {name=p2 analysis=tran}
C {spice_probe.sym} 820 -510 0 1 {name=p3 analysis=tran}
@ -347,14 +347,14 @@ C {capa.sym} 500 -500 0 0 {name=C11
m=1
value=10u
footprint=1206
device="ceramic capacitor" net_name=true}
device="ceramic capacitor"}
C {lab_pin.sym} 500 -370 0 0 {name=l90 lab=0 }
C {ammeter.sym} 430 -530 3 1 {name=Vpanel net_name=true}
C {ammeter.sym} 430 -530 3 1 {name=Vpanel}
C {diode_ngspice.sym} 820 -460 2 0 {name=X2 m=1 Roff=1e9 Ron=0.1}
C {switch_ngspice.sym} 760 -610 1 0 {name=S1 model=swmod}
C {lab_pin.sym} 740 -650 0 0 {name=l5 lab=0 }
C {ammeter.sym} 560 -530 3 1 {name=Vpanel1 net_name=true}
C {ammeter.sym} 500 -420 0 0 {name=Vcap net_name=true}
C {ammeter.sym} 560 -530 3 1 {name=Vpanel1}
C {ammeter.sym} 500 -420 0 0 {name=Vcap}
C {vsource.sym} 160 -390 0 0 {name=Vfade value="pwl 0 1 1m 0"}
C {lab_pin.sym} 160 -340 0 0 {name=l8 lab=0 }
C {ngspice_get_expr.sym} 1120 -370 0 0 {name=r29

1503
xschem_library/rom8k/passhs.sch
View File

File diff suppressed because it is too large Load Diff

2
xschem_library/rom8k/rom2_sa.sym
View File

@ -23,7 +23,7 @@ G {}
K {type=subcircuit
format="@name @pinlist @symname"
template="name=x1"
net_name=true}
}
V {}
S {}
E {}

2
xschem_library/rom8k/rom2_sacell.sym
View File

@ -23,7 +23,7 @@ G {}
K {type=subcircuit
format="@name @pinlist @symname"
template="name=x1"
net_name=true}
}
V {}
S {}
E {}

2
xschem_library/rom8k/rom3_rowdec.sym
View File

@ -23,7 +23,7 @@ G {}
K {type=subcircuit
format="@name @pinlist @symname"
template="name=x1"
net_name=true}
}
V {}
S {}
E {}