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165 Commits
Author SHA1 Message Date
Wilson Snyder eb072da81c Version bump 2009-03-28 10:30:35 -04:00
Wilson Snyder 38669d0a10 Add SYSTEMPERL_INCLUDE envvar to assist RPM builds. 2009-03-28 10:18:53 -04:00
Wilson Snyder 202a8bc3bb Internals: Use common wrapper for setenv 2009-03-28 09:15:13 -04:00
Wilson Snyder 45e8ed6b49 Internals: Cleanup what symbol lookups need to recurse up vs not. 2009-03-24 09:22:58 -04:00
Wilson Snyder 96692e8a5b Report errors when duplicate labels are used, bug72. 2009-03-23 14:57:15 -04:00
Wilson Snyder ecb08b0cf3 Internals: V3Link uses new common func to make symbol table 2009-03-23 13:52:36 -04:00
Wilson Snyder 71bdfd9710 Fix ASSIGN_SI errors with new --pins-bv 1 option 2009-03-13 22:58:55 -04:00
Wilson Snyder 193dcf38f4 Add --pins-bv option to use sc_bv for all ports. 2009-03-13 14:17:30 -04:00
Wilson Snyder 09091781cf Fix the SC_MODULE name() to not include __PVT__, for nicer coverage. 2009-03-12 14:07:38 -04:00
Wilson Snyder 023519c8f6 Version bump 2009-02-26 07:44:00 -05:00
Wilson Snyder d60d0a60c7 Support repeat and forever statements. 2009-02-25 22:06:59 -05:00
Wilson Snyder 8fe0c3dd84 Commentary in parser to match Verilog-Perl 2009-02-25 17:16:51 -05:00
Wilson Snyder 85419f01a9 Fix left associativity for ?: operators. 2009-02-07 20:54:09 -05:00
Wilson Snyder a199f4a849 Update Bison parser to track Verilog-Perl 3.110. No functional change 2009-01-28 15:27:41 -05:00
Wilson Snyder 290795a76b Commentary 2009-01-28 14:28:55 -05:00
Wilson Snyder c2cf2bc0ba Commentary 2009-01-26 18:36:59 -05:00
Wilson Snyder 2224918730 Fix error messages to consistently go to stderr. 2009-01-26 07:57:59 -05:00
Wilson Snyder c4e69daecd Add IEEE grammar comments; sync with Verilator-Perl parser 2009-01-24 21:36:14 -05:00
Wilson Snyder 9162e68d82 Commentary 2009-01-24 21:35:08 -05:00
Wilson Snyder 08f736ae33 bisonpre: Reconsile Verilog-Perl and Verilator bisonpre 2009-01-24 16:44:03 -05:00
Wilson Snyder 81092edab4 Commentary 2009-01-21 16:59:42 -05:00
Wilson Snyder 21b5a4e9e4 Add --debugi-<srcfile> option. 2009-01-21 16:56:50 -05:00
Wilson Snyder 057928b079 Fix VL_RANDom to better randomize bits. 2009-01-21 13:52:51 -05:00
Wilson Snyder 4beaa45199 Clock_enable is past experimental; bug50. 2009-01-20 07:24:57 -05:00
Wilson Snyder 8f88fa45f1 Make grammer names more closely track IEEE. No functional change. 2009-01-15 13:58:43 -05:00
Wilson Snyder 13e8176884 Fix compile issues with GCC 4.3, bug47. 2009-01-09 11:28:50 -05:00
Wilson Snyder aac0130613 Version bump 2009-01-08 10:52:37 -05:00
Wilson Snyder 0877f44cb5 Fix creating parameterized modules when no parameter values are changed. 2009-01-08 09:22:31 -05:00
Wilson Snyder 59159b4811 Clock gating optimization, currently disabled. Merge from branch 2009-01-07 09:37:59 -05:00
Wilson Snyder 12bd12e112 Support bufif0, bufif1, notif0, notif1 2009-01-06 11:57:25 -05:00
Lane Brooks 0e4f9170fa Tristate support; merge from branch. 2009-01-06 11:03:57 -05:00
Lane Brooks 6f81a9cb1e Added *~ to .gitignore to exclude emacs backup files. 2009-01-06 09:25:47 -05:00
Wilson Snyder 41555e5aa3 Coverage of each parametarized module is counted separately. 2009-01-05 14:16:09 -05:00
Wilson Snyder 3d06720628 Copyright year update 2009-01-02 11:47:39 -05:00
Wilson Snyder c1d2b98386 Fix wrong result for read of delayed FSM signal, bug46. 2008-12-30 17:11:25 -05:00
Wilson Snyder 1a60723d77 Fix internal error on "output x; reg x = y;" 2008-12-30 14:34:01 -05:00
Wilson Snyder cc31ab84d7 Add synmul test 2008-12-23 11:43:11 -05:00
Wilson Snyder a07a234761 Fix compile error on Ubuntu 8.10. 2008-12-22 11:28:42 -05:00
Wilson Snyder 0bb4ccd7cd Fix coverage module names including parameter values 2008-12-12 17:28:27 -05:00
Wilson Snyder 74cf205bcf Move coverage type field into page field, and add module name 2008-12-12 16:04:56 -05:00
Wilson Snyder 77405ddded Add toggle coverage 2008-12-12 15:34:02 -05:00
Wilson Snyder 6b46da0240 Create /*verilator coverage_on/off*/ instead of coverage_module_off.
This allows finer grained bracketing of sections of interest.
Convert tracing_on/off to use the same general scheme.
2008-12-11 16:01:41 -05:00
Wilson Snyder 0815812546 Internals: Flip state of FileLine warning array, in prep for next change 2008-12-11 15:23:44 -05:00
Wilson Snyder 0fed1d34d1 Add /*verilator coverage_module_off*/ 2008-12-10 17:10:03 -05:00
Wilson Snyder a1e091cff7 Internals: Last commit showed that V3LinkLevel is mostly redundant with V3LinkCells 2008-12-09 21:05:47 -05:00
Wilson Snyder adebc99e49 Fix certain generate-if cells causing clone error. 2008-12-09 20:59:22 -05:00
Wilson Snyder d3d1291d5a Fix line coverage of public functions.
Line coverage now aggregates by hierarchy automatically.
Previously this would be done inside SystemPerl, which was slower.
2008-12-05 10:54:14 -05:00
Wilson Snyder de61015e08 Internal: V3Order should only use user4 for short period to support future clock gating 2008-12-03 10:27:56 -05:00
Wilson Snyder 9d856ec1bf Fix SystemC 2.2 deprecated warnings about sensitive() and sc_start(). 2008-12-03 10:11:28 -05:00
Wilson Snyder ad19d32a66 Fix SystemC 2.2 deprecated warnings about sensitive() and sc_start(). 2008-12-02 15:33:49 -05:00
Wilson Snyder 5bdb8674ed Internals: Rename AstNode::userp to user1p for easier searching
and to disambiguate from the vertex/edge-> userp.
2008-11-25 09:03:49 -05:00
Wilson Snyder 5563c9666c Internals: Smaller AstNode to save space/time 2008-11-25 08:10:41 -05:00
Wilson Snyder 30ad20be52 Internals: Eliminate user5 for smaller AstNode/better runtime 2008-11-25 07:57:02 -05:00
Wilson Snyder 314c9de845 Make test_regress now places each test result in unique obj_dir 2008-11-24 21:38:45 -05:00
Wilson Snyder 41dbfc9e1c Support posedge of bit-selected signals, bug45. 2008-11-22 21:10:20 -05:00
Wilson Snyder b07dd622fa Commentary: Debugging and some astgen code cleanup.
No functional change.
2008-11-22 17:37:20 -05:00
Wilson Snyder 6ad21b3b3b Internals: Move V3Const to user4 to reduce future collisions 2008-11-22 17:27:55 -05:00
Wilson Snyder a242c1019d Internal speedups: Skip iterator for Termop or VarRefs.
Fix AstUCFunc being mis-labeled as a Termop.
2008-11-22 15:28:29 -05:00
Wilson Snyder c595d67311 Speed up Verilator itself by prefetching pointer-chase 2008-11-22 14:59:22 -05:00
Wilson Snyder 8b77379e2c Internal coding: Assert that user#() don't overlap.
Any use of a user() must now be declared, generally in the Visitor class with
    AstUser#InUse   arbitrary_object
This lets the code track if there's another request for the same user(),
preventing nasty hard to debug cases where they overlap.  This will also
call user#ClearTree(), so a bunch of those were removed, though many
extranious ones still remain.
2008-11-21 15:50:33 -05:00
Wilson Snyder 7ad29c6329 Test driver: Add benchmark option 2008-11-21 14:38:12 -05:00
Wilson Snyder 14756fa131 Internals: Make graph sorting usable in other visitors, in prep for future
changes.  No functional change.
2008-11-20 09:04:29 -05:00
Wilson Snyder ddbfc176b6 Internals: Create AstNodeSelItem in prep for future commits.
No real functional change, outside of minor debug dump differences.
2008-11-20 07:55:54 -05:00
Wilson Snyder ab668b066f Internal cleanup: no functional change.
Add cloneTree to each node type so cast not required after use.
Standardize declaring common AstNode functions via a macro.
2008-11-19 20:15:05 -05:00
Wilson Snyder a4bcb3de4a Test driver: Use __ to prevent conflicts between similar named tests 2008-11-19 16:44:51 -05:00
Wilson Snyder 211894cb3e Fix arrayed variables under function not compiling, bug44. 2008-11-19 09:43:03 -05:00
Wilson Snyder 7565b1f4f2 Allow test driver to support tests with longer sim_time 2008-11-18 19:37:26 -05:00
Wilson Snyder b75ff3652c Fix internal signal names containing control characters (broke in 3.680).
Internally this means for signal names use __0{xdigit}{xdigit} and avoid
__0 in other cases.
2008-11-17 21:02:10 -05:00
Wilson Snyder 13f6c5a934 Fix --output-split-cfuncs to also split trace code. 2008-11-17 17:13:57 -05:00
Wilson Snyder 2e0f6e2b13 Optimize two-level shift and and/or trees. 2008-11-17 11:36:01 -05:00
Wilson Snyder c5d41ee2d9 Optimize constants up across sub expressions 2008-11-17 10:40:58 -05:00
Wilson Snyder 5f70c1aa68 Add debug dumps of V3Hash state 2008-11-16 20:39:49 -05:00
Wilson Snyder d2105ba390 Commentary 2008-11-16 20:30:22 -05:00
Wilson Snyder e46e7bbf99 Fix 'bad select range' warning missing some cases, bug43. 2008-11-12 20:54:58 -05:00
Wilson Snyder 4eeeb72dd5 Version bump 2008-11-12 15:32:22 -05:00
Wilson Snyder adefa45fb4 After module, clear m_modp as not relevant any longer 2008-11-12 15:32:09 -05:00
Wilson Snyder cfc06ab2a7 Fix tests to work with binary SpCoverage files 2008-11-12 15:29:44 -05:00
Wilson Snyder f3a4752799 Fix MSVC compile error; bug42. 2008-11-05 10:52:23 -05:00
Wilson Snyder 3d788b4b93 Fix "Missing coverage in PSL" due to "cover property $stop" statements.
"cover property" reported hierarchy now includes named begin blocks.
2008-11-05 10:23:03 -05:00
Wilson Snyder 5d2675e38a Repair of last 2 checkins; dots in wrong place when 2 level deep inline 2008-11-05 09:14:49 -05:00
Wilson Snyder 288d7bd9dc Commentary 2008-11-05 08:55:52 -05:00
Wilson Snyder 3e8cf26c1a Fix coverage hierarchy being backwards with inlining. 2008-11-04 17:19:59 -05:00
Wilson Snyder ce212722ad Fix 'for' under 'generate-for' causing error; bug38. 2008-10-28 21:38:01 -04:00
Wilson Snyder 5c127daeb4 Fix wrong version for some changes; docs only 2008-10-28 21:09:45 -04:00
Wilson Snyder e49fc945df Fix GCC 4.3 compile error; bug35 2008-10-15 10:49:05 -04:00
Wilson Snyder 384807ebbd Ignore SystemVerilog timeunit and timeprecision 2008-10-14 14:49:54 -04:00
Wilson Snyder ac619ef3d8 Include Verilog file's directory name in coverage reports. 2008-10-14 14:27:11 -04:00
Wilson Snyder a348bd3458 Add unique and parallel case 2008-10-10 19:02:27 -04:00
Wilson Snyder bcc7045fc9 Version bump 2008-10-08 17:08:47 -04:00
Wilson Snyder 3b1929259a Support negative bit indexes.
Allow arbitrary characters in symbols (to make '-' work.)
Final merge from negative_lsb branch.
2008-10-06 09:59:22 -04:00
Wilson Snyder cdd6ea8e60 Fix genvars causing link error when using --public. 2008-09-30 08:58:07 -04:00
Wilson Snyder 4b8927af75 Expand environment variables in -f input files. 2008-09-29 15:51:45 -04:00
Wilson Snyder 0fba25c1b3 Commentary 2008-09-29 15:07:27 -04:00
Wilson Snyder f19ba9d54d Support negative bit indexes.
Tracing negative indexes requires latest Verilog-Perl and SystemPerl.
(Merged from negative_lsb branch.)
2008-09-24 07:43:08 -04:00
Wilson Snyder 8e9a0121ac Update test driver.pl: Allow -j auto determination, make logfile, don't require cd 2008-09-23 10:02:31 -04:00
Wilson Snyder bd6e8d808c Report error if port declaration is missing; bug32. 2008-09-23 09:35:00 -04:00
Wilson Snyder 11b9a631d4 Remove mis-committed debug print 2008-09-22 20:10:10 -04:00
Wilson Snyder f197dd29cb Suppress width warnings between constant strings and wider vectors. 2008-09-22 19:36:08 -04:00
Wilson Snyder daf7f42138 Version bump 2008-09-19 17:23:15 -04:00
Wilson Snyder dd487d4184 Fix t_psl_basic_cover test for new SystemPerl package 2008-09-19 08:00:02 -04:00
Wilson Snyder d90071637d SystemC uint64_t pins are now the default instead of sc_bv<64>.
Use --no-pins64 for backward compatibility.
2008-09-18 09:20:16 -04:00
Wilson Snyder d8efae2aba Rename t_bitsel_loop to t_select_loop to match other tests 2008-09-18 08:05:38 -04:00
Wilson Snyder 22543f3e19 Support arbitrary characters in identifiers and tracing. 2008-09-17 22:22:46 -04:00
Wilson Snyder 6aaef67e73 Fix test_verilated running under ncsim 2008-09-17 20:58:01 -04:00
Wilson Snyder 82a934d6fb Fix missing define to pass coverage down 2008-09-17 11:11:24 -04:00
Wilson Snyder eca6f2ca05 Increase bison max depth to prevent parse error 2008-09-17 11:11:09 -04:00
Wilson Snyder ef69f36403 More renames of asInt/toUInt where deemed correct 2008-09-04 11:03:46 -04:00
Wilson Snyder 99cf981c2f Support coverage under SystemPerl 1.285 and newer. 2008-09-04 09:43:53 -04:00
Wilson Snyder fc7a449f6d Rename asInt/asQuad to indicate signed/unsigned.
Internal code rename, no function change.
2008-09-03 17:40:01 -04:00
Wilson Snyder b7fafdafaa Fix never-true compiler warning [John Sanguinetti] 2008-08-22 17:32:29 -04:00
Wilson Snyder 8e180cfcde make install doesn't need source code 2008-08-20 16:05:24 -04:00
Wilson Snyder 4770fd39d2 Fix stack overflow on large ? : trees. 2008-08-20 15:59:10 -04:00
Wilson Snyder df107628c6 Fix default clocking syntax; covers go outside the block 2008-08-06 17:51:36 -04:00
Wilson Snyder 3463080a71 Fix extra evaluation of pure combo blocks in SystemC output. 2008-08-06 17:09:33 -04:00
Wilson Snyder 500dc2170f Support SystemVerilog "cover property" statements. 2008-08-06 12:52:39 -04:00
Wilson Snyder a76ae67a81 Add bisonpre for simplifing grammar and cleaning output 2008-08-06 12:35:34 -04:00
Wilson Snyder 1d091e49e1 Add VL_TIME_MULTIPLIER to allow sub-timeunit time printing 2008-08-05 14:45:20 -04:00
Wilson Snyder 2b63219cc6 Add IMPERFECTSCH warning, disabled by default. 2008-08-05 13:41:53 -04:00
Wilson Snyder f1b7762bef Add by-design and by-module subtotals to verilator_profcfunc. 2008-08-05 09:59:15 -04:00
Wilson Snyder 043ad86482 When warnings are disabled on signals that are flattened out, disable
the warnings on the signal(s) that replace it.
2008-08-01 15:30:17 -04:00
Wilson Snyder 74ca9578ed VERILATOR_BIN envvar should override adding _dbg to program name 2008-07-25 16:30:18 -04:00
Wilson Snyder d499161446 Fix typo in CASEWITHX 2008-07-23 08:58:48 -04:00
Wilson Snyder 34e8de56bc Version bump 2008-07-23 07:51:32 -04:00
Wilson Snyder 8a7864ebaa Add --Wfuture-, for improving forward compatibility. 2008-07-22 14:27:34 -04:00
Wilson Snyder 9e5fb5467f Add CASEZWITHX lint warning and if disabled fix handling of casez with Xs. 2008-07-22 13:07:19 -04:00
Wilson Snyder fb34bf7222 Fix lvalue errors with public functions; bug25. 2008-07-22 11:15:28 -04:00
Wilson Snyder 4591f35b7c Add --autoflush option 2008-07-16 14:06:08 -04:00
Wilson Snyder f0a06182ca Add --x-assign=fast, and make it the default. 2008-07-16 13:31:21 -04:00
Wilson Snyder d9e47a6293 Add WIDTH warning to etc file descriptors. 2008-07-14 17:15:26 -04:00
Wilson Snyder a555f87705 Fix missing verilator.1 during install. Bug#20. [Holger Wachtler] 2008-07-14 13:41:00 -04:00
Wilson Snyder 826b997166 Add . 2008-07-14 13:16:05 -04:00
Wilson Snyder d34bc6f304 Fix missing config_reg.h error when non-author .git repository 2008-07-14 10:48:57 -04:00
Wilson Snyder 5771ea48ef Fix IMPURE errors due to X-assignment temporary variables. 2008-07-14 10:42:58 -04:00
Wilson Snyder a4f3199427 Add informational warning when -Og is used 2008-07-02 06:48:50 -04:00
Wilson Snyder e6a43fc127 Fix verilator_includer not being installed into where verilated.mk.in expects 2008-07-01 16:10:09 -04:00
Wilson Snyder 701bd38d01 Add support for , . Bug14. 2008-07-01 14:15:10 -04:00
Wilson Snyder 1a8c8bec0d Rework $display/$write to go via new VL_WRITE function instead of
converting to pure C printf call.  This makes the resulting code smaller,
and allows sharing code with future $sprintf support.
2008-06-30 14:31:58 -04:00
Wilson Snyder 20aa21d4b6 Replace stdio.h and stdarg.h with C++ versions 2008-06-30 13:11:25 -04:00
Wilson Snyder 8c6adeb85a Internals: Convert to use common string convert routine 2008-06-30 07:10:23 -04:00
Wilson Snyder 09b7ba1317 Internal rework, no functionality change.
Rework V3EmitC to use a little template language for code to output,
similar to emitVerilog() functions.  Change all emitOperator() to
emitC(), elimate emitWordForm().
2008-06-29 20:02:24 -04:00
Wilson Snyder 0703843ac1 Support , . 2008-06-27 20:04:20 -04:00
Wilson Snyder d962dfe48c One or two digit octal escapes are legal 2008-06-27 17:52:45 -04:00
Wilson Snyder d6884db439 Support . 2008-06-27 11:36:25 -04:00
Wilson Snyder fdcbedef8f Add support 2008-06-27 08:45:05 -04:00
Wilson Snyder 8afd19648f Support 2008-06-26 08:52:02 -04:00
Wilson Snyder 3017f12238 Version bump 2008-06-25 07:50:32 -04:00
Wilson Snyder 23ee0342c6 Fix Makefile to find headers/libraries under prefix. 2008-06-24 14:50:34 -04:00
Wilson Snyder 499f98a51c Fix leading/trailing mixed whitespace 2008-06-12 12:03:47 -04:00
Wilson Snyder 3073db4e81 Add configure check that C++ is working 2008-06-11 21:00:42 -04:00
Wilson Snyder 5703377a5f Fix tracing missing changes on undriven public wires. 2008-06-11 20:33:53 -04:00
Wilson Snyder b85aa872cc Make install now installs verilator_includer and verilator_profcfunc. 2008-06-11 15:13:41 -04:00
Wilson Snyder 5a1a5a7d97 Ignore "// verilator" comments alone on endif lines. 2008-06-11 13:09:36 -04:00
Wilson Snyder 52912c6329 Convert repository to git from svn.
- Change .cvsignore to .gitignore
- Remove Id metacomments
- Cleanup whitespace at end of lines
2008-06-09 21:25:10 -04:00
Wilson Snyder 056f72f27f Fix grammar error exposed with Verilog-Perl rev 55458 ++ -- fix
git-svn-id: file://localhost/svn/verilator/trunk/verilator@1072 77ca24e4-aefa-0310-84f0-b9a241c72d87
2008-06-05 20:49:52 +00:00
Wilson Snyder bb038e86a2 Preproc: Fix error when macro call has commas in concatenate.
git-svn-id: file://localhost/svn/verilator/trunk/verilator@1071 77ca24e4-aefa-0310-84f0-b9a241c72d87
2008-06-04 15:39:44 +00:00
Wilson Snyder cc6c71eb37 Preproc: Fix syntax error when include defname is ifdefed.
git-svn-id: file://localhost/svn/verilator/trunk/verilator@1070 77ca24e4-aefa-0310-84f0-b9a241c72d87
2008-06-04 14:45:32 +00:00
Wilson Snyder de4358f8d8 Preproc: Fix syntax error when include defname is ifdefed.
git-svn-id: file://localhost/svn/verilator/trunk/verilator@1069 77ca24e4-aefa-0310-84f0-b9a241c72d87
2008-06-04 14:44:59 +00:00
Wilson Snyder d6e9c72424 Fix compile errors under Fedora 9, GCC 4.3.0.
git-svn-id: file://localhost/svn/verilator/trunk/verilator@1068 77ca24e4-aefa-0310-84f0-b9a241c72d87
2008-05-28 19:58:18 +00:00
Wilson Snyder 96608fb18d Fix typo in Changes file
git-svn-id: file://localhost/svn/verilator/trunk/verilator@1064 77ca24e4-aefa-0310-84f0-b9a241c72d87
2008-05-08 16:37:19 +00:00
Wilson Snyder 280b826d6d Fix makefile tar.gz rule
git-svn-id: file://localhost/svn/verilator/trunk/verilator@1061 77ca24e4-aefa-0310-84f0-b9a241c72d87
2008-05-08 16:34:15 +00:00
Wilson Snyder 538d3d46f4 Fix t_dist_manifest when entering/leaving directory
git-svn-id: file://localhost/svn/verilator/trunk/verilator@1060 77ca24e4-aefa-0310-84f0-b9a241c72d87
2008-05-08 15:18:42 +00:00
Wilson Snyder 66b8ec8935 Version bump
git-svn-id: file://localhost/svn/verilator/trunk/verilator@1059 77ca24e4-aefa-0310-84f0-b9a241c72d87
2008-05-08 14:38:43 +00:00
Wilson Snyder 4f30025aa0 Add test that manifest (tar file) contains all files in repository
git-svn-id: file://localhost/svn/verilator/trunk/verilator@1058 77ca24e4-aefa-0310-84f0-b9a241c72d87
2008-05-08 14:38:07 +00:00
Wilson Snyder faad36a3ef Fix missing bisonfix in kit
git-svn-id: file://localhost/svn/verilator/trunk/verilator@1057 77ca24e4-aefa-0310-84f0-b9a241c72d87
2008-05-08 12:50:17 +00:00
Wilson Snyder 0b461599d1 Change makefile's maintainer-dist to use release script
git-svn-id: file://localhost/svn/verilator/trunk/verilator@1056 77ca24e4-aefa-0310-84f0-b9a241c72d87
2008-05-07 18:32:00 +00:00
775 changed files with 18690 additions and 5590 deletions
+2 -1
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@@ -1,3 +1,4 @@
*~
*.old
*.gz
*.gz.uu
@@ -7,7 +8,7 @@
*.1
*.tmp
*.tex
Makefile
/Makefile
README
config.cache
config.status
+169 -3
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@@ -3,6 +3,174 @@ Revision history for Verilator
The contributors that suggested a given feature are shown in []. [by ...]
indicates the contributor was also the author of the fix; Thanks!
* Verilator 3.702 2009/03/28
*** Add --pins-bv option to use sc_bv for all ports. [Brian Small]
*** Add SYSTEMPERL_INCLUDE envvar to assist RPM builds. [Chitlesh Goorah]
**** Report errors when duplicate labels are used, bug72. [Vasu Kandadi]
**** Fix the SC_MODULE name() to not include __PVT__. [Bob Fredieu]
* Verilator 3.701 2009/02/26
** Support repeat and forever statements. [Jeremy Bennett]
*** Add --debugi-<srcfile> option, for internal debugging. [Dennis Muhlestein]
**** Fix compile issues with GCC 4.3, bug47. [Lane Brooks]
**** Fix VL_RANDom to better randomize bits. [Art Stamness]
**** Fix error messages to consistently go to stderr. [Jeremy Bennett]
**** Fix left associativity for ?: operators.
* Verilator 3.700 2009/01/08
** Add limited support for tristate inouts. Written by Lane Brooks,
under support by Ubixum Inc. This allows common pad ring and
tristate-mux structures to be Verilated. See the documentation for
more information on supported constructs.
** Add --coverage_toggle for toggle coverage analysis.
Running coverage now requires SystemPerl 1.301 or newer.
*** Add /*verilator coverage_on/_off */ to bracket coverage regions.
*** Optimize two-level shift and and/or trees, +23% on one test.
*** Support posedge of bit-selected signals, bug45. [Rodney Sinclair]
*** Line coverage now aggregates by hierarchy automatically.
Previously this would be done inside SystemPerl, which was slower.
**** Minor performance improvements of Verilator compiler runtime.
**** Coverage of each parametarized module is counted separately. [Bob Fredieu]
**** Fix creating parameterized modules when no parameter values are changed.
**** Fix certain generate-if cells causing "clone" error. [Stephane Laurent]
**** Fix line coverage of public functions. [Soon Koh]
**** Fix SystemC 2.2 deprecated warnings about sensitive() and sc_start().
**** Fix arrayed variables under function not compiling, bug44. [Ralf Karge]
**** Fix --output-split-cfuncs to also split trace code. [Niranjan Prabhu]
**** Fix 'bad select range' warning missing some cases, bug43. [Lane Brooks]
**** Fix internal signal names containing control characters (broke in 3.680).
**** Fix compile error on Ubuntu 8.10. [Christopher Boumenot]
**** Fix internal error on "output x; reg x = y;".
**** Fix wrong result for read of delayed FSM signal, bug46. [Rodney Sinclair]
* Verilator 3.681 2008/11/12
*** Add SystemVerilog unique and priority case.
**** Include Verilog file's directory name in coverage reports.
**** Fix 'for' under 'generate-for' causing error; bug38. [Rafael Shirakawa]
**** Fix coverage hierarchy being backwards with inlining. [Vasu Arasanipalai]
**** Fix GCC 4.3 compile error; bug35. [Lane Brooks]
**** Fix MSVC compile error; bug42. [John Stroebel]
* Verilator 3.680 2008/10/08
** Support negative bit indexes. [Stephane Laurent]
Tracing negative indexes requires latest Verilog-Perl and SystemPerl.
*** Suppress width warnings between constant strings and wider vectors.
[Rodney Sinclair]
**** Ignore SystemVerilog timeunit and timeprecision.
**** Expand environment variables in -f input files. [Lawrence Butcher]
**** Report error if port declaration is missing; bug32. [Guy-Armand Kamendje]
**** Fix genvars causing link error when using --public. [Chris Candler]
* Verilator 3.671 2008/09/19
** SystemC uint64_t pins are now the default instead of sc_bv<64>.
Use --no-pins64 for backward compatibility.
*** Support SystemVerilog "cover property" statements.
*** When warnings are disabled on signals that are flattened out, disable
the warnings on the signal(s) that replace it.
*** Add by-design and by-module subtotals to verilator_profcfunc.
*** Fix extra evaluation of pure combo blocks in SystemC output.
**** Add IMPERFECTSCH warning, disabled by default.
**** Support coverage under SystemPerl 1.285 and newer.
**** Fix stack overflow on large ? : trees. [John Sanguinetti]
**** Support arbitrary characters in identifiers. [Stephane Laurent]
* Verilator 3.670 2008/07/23
** Add --x-assign=fast option, and make it the default.
This chooses performance over reset debugging. See the manual.
** Add --autoflush, for flushing streams after $display. [Steve Tong]
** Add CASEWITHX lint warning and if disabled fix handling of casez with Xs.
*** Add $feof, $fgetc, $fgets, $fflush, $fscanf, $sscanf. [Holger Waechtler]
*** Add $stime. [Holger Waechtler]
*** Add $random.
*** Add --Wfuture-, for improving forward compatibility.
**** Fix verilator_includer not being installed properly. [Holger Waechtler]
**** Fix IMPURE errors due to X-assignment temporary variables. [Steve Tong]
**** Fix "lvalue" errors with public functions; bug25. [CY Wang]
**** Add WIDTH warning to $fopen etc file descriptors.
**** Internal changes to how $displays get compiled and executed.
* Verilator 3.665 2008/06/25
**** Ignore "// verilator" comments alone on endif lines. [Rodney Sinclair]
**** "Make install" now installs verilator_includer and verilator_profcfunc.
**** Fix tracing missing changes on undriven public wires. [Rodney Sinclair]
**** Fix syntax error when "`include `defname" is ifdefed. [John Dickol]
**** Fix error when macro call has commas in concatenate. [John Dickol]
**** Fix compile errors under Fedora 9, GCC 4.3.0. [by Jeremy Bennett]
**** Fix Makefile to find headers/libraries under prefix. [by Holger Waechtler]
* Verilator 3.664 2008/05/08
**** Fix missing file in kit.
* Verilator 3.663 2008/05/07
**** Add DESTDIR to Makefiles to assist RPM construction. [Gunter Dannoritzer]
@@ -1232,12 +1400,10 @@ of input ports exists for tracing.
**** First code written.
----------------------------------------------------------------------
$Id$
----------------------------------------------------------------------
This uses outline mode in Emacs. See C-h m [M-x describe-mode].
Copyright 2001-2008 by Wilson Snyder. This program is free software;
Copyright 2001-2009 by Wilson Snyder. This program is free software;
you can redistribute it and/or modify it under the terms of either the GNU
General Public License or the Perl Artistic License.
+28
View File
@@ -0,0 +1,28 @@
^CVS/
/CVS/
\.git/
\.svn/
\.(bak|old)/
\.(bak|old)$
\bMakefile$
\.tar\.
.*\.tgz
.*\.log
.*\.tmp
.*\.tex
.*\.key
.*\.vcd
/obj_dir/
/obj_dbg/
/obj_opt/
/INCA_libs/
/cov_work/
/logs/
Makefile
src/Makefile_obj
include/verilated.mk
config.cache
config.status
verilator_bin.*
autom4te\.cache/
nodist/
+50 -29
View File
@@ -1,24 +1,23 @@
# $Id$
#*****************************************************************************
# DESCRIPTION: Verilator top level: Makefile pre-configure version
#
# This file is part of Verilator.
#
#
# This file is part of Verilator.
#
# Author: Wilson Snyder <[email protected]>
#
#
# Code available from: http://www.veripool.org/verilator
#
#
#*****************************************************************************
#
# Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
#
# Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# General Public License or the Perl Artistic License.
#
#
# Verilator is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
#
#****************************************************************************/
#
# make all to compile and build Verilator.
@@ -38,7 +37,7 @@
# source and built the program without creating any other files,
# `make distclean' should leave only the files that were in the
# distribution.
#
#
# make maintainer-clean
# Delete everything from the current directory that can be
# reconstructed with this Makefile. This typically includes
@@ -62,7 +61,7 @@ TEXI2DVI = texi2dvi
PERL = @PERL@
# Destination prefix for RPMs
DESTDIR =
DESTDIR =
#### Don't edit: You're much better using configure switches to set these
prefix = @prefix@
@@ -101,26 +100,34 @@ DISTDEP = info Makefile
# Files to distribute.
DISTBIN = $(wildcard bin/verilator-*)
DISTFILES_INC = $(INFOS) .cvsignore COPYING *.in *.ac \
DISTFILES_INC = $(INFOS) .gitignore COPYING *.in *.ac \
Changes README TODO \
MANIFEST.SKIP \
bin/* \
install-sh configure mkinstalldirs *.texi \
include/verilated.[chv]* \
include/verilatedos.[chv]* \
include/*.in \
src/.cvsignore src/*.in src/*.cpp src/*.[chly] src/astgen src/flexfix \
src/*.pl \
test_*/.cvsignore test_*/Makefile* test_*/*.cpp \
include/.*ignore \
.*attributes */.*attributes */*/.*attributes \
src/.*ignore src/*.in src/*.cpp src/*.[chly] src/astgen src/bisonpre src/*fix \
src/*.pl src/*.pod \
test_*/.*ignore test_*/Makefile* test_*/*.cpp \
test_*/*.pl test_*/*.v test_*/*.vc test_*/vlint \
test_verilated/vgen*.pl \
test_regress/t/*.v* \
test_regress/t/*.pl \
test_regress/t/*.cpp \
test_regress/t/*.h \
test_regress/t/*.dat \
test_regress/t/*.mem \
test_regress/t/*.out \
test_regress/t/*.pl \
test_regress/t/*.v* \
verilator.* \
INST_PROJ_FILES = \
bin/verilator \
bin/verilator_includer \
bin/verilator_profcfunc \
include/verilated.[chv]* \
include/verilated.mk \
include/verilatedos.[chv]* \
@@ -131,8 +138,10 @@ INST_PROJ_BIN_FILES = \
DISTFILES := $(DISTFILES_INC)
VL_INST_MAN_FILES = verilator.1
all: all_nomsg msg_test
all_nomsg: verilator_exe
all_nomsg: verilator_exe $(VL_INST_MAN_FILES)
.PHONY:verilator_exe
verilator_exe verilator_bin verilator_bin_dbg:
@@ -203,7 +212,7 @@ verilator.pdf: bin/verilator $(DISTCONFIG)
mv verilator2.tex verilator.tex
pdflatex verilator.tex
pdflatex verilator.tex
-rm -f verilator.toc verilator.aux verilator.idx
-rm -f verilator.toc verilator.aux verilator.idx verilator.out
INSTALL: install.texi
$(MAKEINFO) -I$(srcdir) $(srcdir)/install.texi --output=$@ \
@@ -214,14 +223,20 @@ README: readme.texi
--no-headers --no-validate
# See uninstall also
VL_INST_BIN_FILES = verilator verilator_bin verilator_bin_dbg
VL_INST_BIN_FILES = verilator verilator_bin verilator_bin_dbg \
verilator_includer verilator_profcfunc
# Some scripts go into both the search path and pkgdatadir,
# so they can be found by the user, and under $VERILATOR_ROOT.
installbin:
$(SHELL) ${srcdir}/mkinstalldirs $(DESTDIR)$(bindir)
( cd bin ; $(INSTALL_PROGRAM) verilator $(DESTDIR)$(bindir)/verilator )
( cd bin ; $(INSTALL_PROGRAM) verilator_includer $(DESTDIR)$(bindir)/verilator_includer )
( cd bin ; $(INSTALL_PROGRAM) verilator_profcfunc $(DESTDIR)$(bindir)/verilator_profcfunc )
( $(INSTALL_PROGRAM) verilator_bin $(DESTDIR)$(bindir)/verilator_bin )
( $(INSTALL_PROGRAM) verilator_bin_dbg $(DESTDIR)$(bindir)/verilator_bin_dbg )
$(SHELL) ${srcdir}/mkinstalldirs $(DESTDIR)$(pkgdatadir)/bin
( cd bin ; $(INSTALL_PROGRAM) verilator_includer $(DESTDIR)$(pkgdatadir)/bin/verilator_includer )
VL_INST_MAN_FILES = verilator.1
installman:
$(SHELL) ${srcdir}/mkinstalldirs $(DESTDIR)$(mandir)/man1
for p in $(VL_INST_MAN_FILES) ; do \
@@ -231,7 +246,6 @@ installman:
installdata:
$(SHELL) ${srcdir}/mkinstalldirs $(DESTDIR)$(pkgdatadir)/examples
cp -r include $(DESTDIR)$(pkgdatadir)
cp -r src $(DESTDIR)$(pkgdatadir)
cp -r test_c $(DESTDIR)$(pkgdatadir)/examples
cp -r test_sc $(DESTDIR)$(pkgdatadir)/examples
cp -r test_sp $(DESTDIR)$(pkgdatadir)/examples
@@ -253,8 +267,8 @@ install-project: dist
for p in verilator.1 ; do \
$(INSTALL_PROGRAM) -m 0666 $$p $(DIRPROJECT_PREFIX)/man/man1/$$p; \
done
$(INST_PROJ_CVS) $(DISTNAME).tar.gz $(DIRPROJECT)/hw/utils/verilator/verilator.tgz
rm $(DISTNAME).tar.gz
$(INST_PROJ_CVS) $(DISTNAME).tgz $(DIRPROJECT)/hw/utils/verilator/verilator.tgz
rm $(DISTNAME).tgz
install-project-quick:
@echo "Install-project-quick (no strip) to $(DIRPROJECT)"
@@ -315,7 +329,7 @@ clean mostlyclean distclean maintainer-clean maintainer-copy::
done
clean mostlyclean distclean maintainer-clean::
rm -f $(SCRIPTS) *.tmp
rm -f $(SCRIPTS) *.tmp
rm -f *.aux *.cp *.cps *.dvi *.fn *.fns *.ky *.kys *.log
rm -f *.pg *.pgs *.toc *.tp *.tps *.vr *.vrs *.idx
rm -f *.ev *.evs *.ov *.ovs *.cv *.cvs *.ma *.mas
@@ -331,6 +345,13 @@ TAGFILES=${srcdir}/*/*.cpp ${srcdir}/*/*.h ${srcdir}/*/[a-z]*.in \
TAGS: $(TAGFILES)
etags $(TAGFILES)
######################################################################
# Test targets
dist-file-list:
@echo "begin-dist-file-list:"; # Scripts look for this
@echo $(wildcard $(DISTFILES))
@echo "end-dist-file-list:"; # Scripts look for this
######################################################################
# Distributions
@@ -358,14 +379,14 @@ dist: $(DISTDEP) maintainer-copy
chmod -R a+r $(DISTNAME)
tar chf $(DISTNAME).tar $(DISTNAME)
gzip --force --best $(DISTNAME).tar
mv $(DISTNAME).tar.gz $(DISTNAME).tgz
rm -fr $(DISTNAME)
maintainer-diff:
svnorcvs diff $(DISTTAGNAME)
preexist:
test ! -r ~/src/kits/$(DISTNAME).tar.gz
svnorcvs nexists $(DISTTAGNAME)
maintainer-dist: preexist dist tag
cp *.gz ~/backpack
cp *.gz ~/src/kits
svnorcvs release $(DISTNAME).tgz
+10 -10
View File
@@ -1,13 +1,12 @@
// $Id$
// DESCRIPTION: Verilator: List of To Do issues.
//
// Copyright 2004-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2004-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
Features:
Finish 3.400 new ordering fixes
Finish 3.400 new ordering fixes
Latch optimizations {Need here}
Task I/Os connecting to non-simple variables.
Fix nested casez statements expanding into to huge C++. [JeanPaul Vanitegem]
@@ -50,11 +49,12 @@ Testing:
Usability:
Better reporting of unopt problems, including what lines of code
Report more errors (all of them?) before exiting [Eugene Weber]
Report more errors (all of them?) before exiting [Eugene Weber]
Internal Code:
Eliminate the AstNUser* passed to all visitors; its only needed in V3Width,
and removing it will speed up and simplify all the other code.
V3Graph should be templated container type, taking in Vertex + Edge types
Performance:
Constant propagation
@@ -69,7 +69,7 @@ Performance:
Multithreaded execution
Bit-multiply for faster bit swapping and a=b[1,3,2] random bit reorderings.
Move _last sets and all other combo logic inside master
if() that triggers on all possible sense items
if() that triggers on all possible sense items
Rewrite and combine V3Life, V3Subst
If block temp only ever set in one place to constant, propagate it
Used in t_mem for array delayed assignments
@@ -139,15 +139,15 @@ Selectable SystemC types based on widths (see notes below)
c) a conditional whose possible values are (a) or (b)
2) One can lose that fact that a node is a tristate node. This happens
if a tristate node is assigned to a 'standard' node, or is used on
if a tristate node is assigned to a 'standard' node, or is used on
RHS of a conditional. The following infer tristate signals:
a) inout <SIGNAL>
b) tri <SIGNAL>
a) inout <SIGNAL>
b) tri <SIGNAL>
c) assigning to 'Z' (maybe through a conditional)
Note: tristate-ness of an output port determined only by
statements in the module (not the instances it calls)
4) Tristate variables can't be multidimensional arrays
5) Only check tristate contention between modules (not within!)
5) Only check tristate contention between modules (not within!)
6) Only simple compares with 'Z' are allowed (===)
+346 -95
View File
@@ -1,10 +1,9 @@
: # -*-Mode: perl;-*- use perl, wherever it is
eval 'exec perl -wS $0 ${1+"$@"}'
if 0;
# $Id$
######################################################################
#
# Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
# Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# General Public License or the Perl Artistic License.
#
@@ -84,7 +83,6 @@ run ($vcmd);
#----------------------------------------------------------------------
sub usage {
print '$Revision$$Date$ ', "\n";
pod2usage(-exitstatus=>2, -verbose=>2);
}
@@ -102,8 +100,8 @@ sub verilator_bin {
my $bin = "";
# Use VERILATOR_ROOT if defined, else assume verilator_bin is in the search path
$bin .= $ENV{VERILATOR_ROOT}."/" if defined($ENV{VERILATOR_ROOT});
$bin .= ($ENV{VERILATOR_BIN}||"verilator_bin");
if ($Debug) { $bin = "${bin}_dbg"; }
$bin .= ($ENV{VERILATOR_BIN}
|| ($Debug ? "verilator_bin_dbg" : "verilator_bin"));
return $bin;
}
@@ -179,15 +177,19 @@ descriptions in the next sections for more information.
{file.c/cc/cpp} Optional C++ files to link in
--assert Enable all assertions
--autoflush Flush streams after all $displays
--bin <filename> Override Verilator binary
--cc Create C++ output
--compiler <compiler-name> Tune for specified C++ compiler
--coverage Enable all coverage
--coverage-line Enable line coverage
--coverage-toggle Enable toggle coverage
--coverage-user Enable PSL/SVL user coverage
-D<var>[=<value>] Set preprocessor define
--debug Enable debugging
--debug-check Enable debugging assertions
--debugi <level> Enable debugging at a specified level
--debugi-<srcfile> <level> Enable debugging a source file at a level
--dump-tree Enable dumping .tree files
-E Preprocess, but do not compile
--error-limit <value> Abort after this number of errors
@@ -203,13 +205,14 @@ descriptions in the next sections for more information.
--MP Create phony dependency targets
--Mdir <directory> Name of output object directory
--mod-prefix <topname> Name to prepend to lower classes
--no-pins64 Don't use uint64_t's for 33-64 bit sigs
--no-skip-identical Disable skipping identical output
-O0 Disable optimizations
-O3 High performance optimizations
-O<optimization-letter> Selectable optimizations
--output-split <bytes> Split .cpp files into pieces
--output-split-cfuncs <statements> Split .ccp functions
--pins64 Use uint64_t's for 33-64 bit sigs
--pins-bv <bits> Specify types for top level ports
--prefix <topname> Name of top level class
--profile-cfuncs Name functions for profiling
--private Debugging; see docs
@@ -225,6 +228,7 @@ descriptions in the next sections for more information.
--underline-zero Zero signals with leading _'s
-v <filename> Verilog library
-Werror-<message> Convert warning to error
-Wfuture-<message> Disable unknown message warnings
-Wno-<message> Disable warning
-x-assign <mode> Initially assign Xs to this value
-y <dir> Directory to search for modules
@@ -241,7 +245,7 @@ descriptions in the next sections for more information.
Specifies the Verilog file containing the top module to be Verilated.
=item {file.c/cc/cpp}
=item {file.c/.cc/.cpp/.cxx}
Specifies optional C++ files to be linked in with the Verilog code. If any
C++ files are specified in this way, Verilator will include a make rule
@@ -254,6 +258,14 @@ linking with make rules you write yourself.
Enable all assertions, includes enabling the --psl flag. (If psl is not
desired, but other assertions are, use --assert --nopsl.)
See also --x-assign; setting "--x-assign unique" may be desirable.
=item --autoflush
After every $display or $fdisplay, flush the output stream. This insures
that messages will appear immediately but may reduce performance. Defaults
off, which will buffer output as provided by the normal C stdio calls.
=item --bin I<filename>
Rarely needed. Override the default filename for Verilator itself. When a
@@ -288,7 +300,8 @@ functions to avoid error C1061.
=item --coverage
Enables all forms of coverage, alias for --coverage-line, --coverage-user
Enables all forms of coverage, alias for "--coverage-line --coverage-toggle
--coverage-user".
=item --coverage-line
@@ -300,22 +313,48 @@ Coverage. At each such branch a unique counter is incremented. At the end
of a test, the counters along with the filename and line number
corresponding to each counter are written into logs/coverage.pl.
After running multiple tests, the vcoverage utility (from the SystemPerl
package) is executed. Vcoverage reads the logs/coverage.pl file(s), and
creates an annotated source code listing showing code coverage details.
Verilator automatically disables coverage of branches that have a $stop in
them, as it is assumed $stop branches contain an error check that should
not occur. A /*verilator coverage_block_off*/ comment will perform a
similar function on any code in that block or below.
similar function on any code in that block or below, or /*verilator
coverage_on/coverage_off*/ will disable coverage around lines of code.
Note Verilator may over-count combinatorial (non-clocked) blocks when those
blocks receive signals which have had the UNOPTFLAT warning disabled; for
most accurate results do not disable this warning when using coverage.
For an example, after running 'make test' in the Verilator distribution,
see the test_sp/logs/coverage_source directory. Grep for lines starting
with '%' to see what lines Verilator believes need more coverage.
=item --coverage-toggle
Specifies signal toggle coverage analysis code should be inserted.
Every bit of every signal in a module has a counter inserted. The counter
will increment on every edge change of the corresponding bit.
Signals that are part of tasks or begin/end blocks are considered local
variables and are not covered. Signals that begin with underscores, are
integers, or are very wide (>256 bits total storage across all dimensions)
are also not covered.
Hierarchy is compressed, such that if a module is instantiated multiple
times, coverage will be summed for that bit across ALL instantiations of
that module with the same parameter set. A module instantiated with
different parameter values is considered a different module, and will get
counted separately.
Verilator makes a minimally-intelligent decision about what clock domain
the signal goes to, and only looks for edges in that clock domain. This
means that edges may be ignored if it is known that the edge could never be
seen by the receiving logic. This algorithm may improve in the future.
The net result is coverage may be lower than what would be seen by looking
at traces, but the coverage is a more accurate representation of the
quality of stimulus into the design.
There may be edges counted near time zero while the model stabilizes. It's
a good practice to zero all coverage just before releasing reset to prevent
counting such behavior.
A /*verilator coverage_off/on */ comment pair can be used around signals
that do not need toggle analysis, such as RAMs and register files.
=item --coverage-user
@@ -339,6 +378,12 @@ internal assertions, debugging messages, and intermediate form dump files.
Rarely needed. Enable internal debugging assertion checks, without
changing debug verbosity. Enabled automatically when --debug specified.
=item --debugi <level>
=item --debugi-<srcfile> <level>
Rarely needed - for developer use. Set internal debugging level globally
or on the specified source file to the specified level.
=item --dump-tree
Rarely needed. Enable writing .tree debug files. This is enabled with
@@ -413,6 +458,10 @@ be placed in this directory. If not specified, "obj_dir" is used.
Specifies the name to prepend to all lower level classes. Defaults to
the same as --prefix.
=item --no-pins64
Backward compatible alias for "--pins-bv 33".
=item --no-skip-identical
Rarely needed. Disables skipping execution of Verilator if all source
@@ -439,25 +488,34 @@ mappings of optimizations to -O letters.
Enables splitting the output .cpp/.sp files into multiple outputs. When a
C++ file exceeds the specified number of operations, a new file will be
created. In addition, any slow routines will be placed into __Slow files.
This accelerates compilation by as optimization can be disabled on the slow
routines, and the remaining files can be compiled on parallel machines.
Using --output-split should have only a trivial impact on performance.
With GCC 3.3 on a 2GHz Opteron, --output-split 20000 will result in
splitting into approximately one-minute-compile chunks.
created at the next function boundary. In addition, any slow routines will
be placed into __Slow files. This accelerates compilation by as
optimization can be disabled on the slow routines, and the remaining files
can be compiled on parallel machines. Using --output-split should have
only a trivial impact on performance. With GCC 3.3 on a 2GHz Opteron,
--output-split 20000 will result in splitting into approximately
one-minute-compile chunks.
=item --output-split-cfuncs I<statements>
Enables splitting functions in the output .cpp/.sp files into multiple
functions. When a generated function exceeds the specified number of
operations, a new function will be created. With --output-split, this will
enable GCC to compile faster, at a small loss in performance that increases
with smaller statement values.
enable GCC to compile faster, at a small loss in performance that gets
worse with decreasing split values. Note that this option is stronger than
--output-split in the sense that --output-split will not split inside a
function.
=item --pins64
Specifies SystemC outputs of 33-64 bits wide should use uint64_t instead of
the backward-compatible default of sc_bv's.
Backward compatible alias for "--pins-bv 65". Note that's a 65, not a 64.
=item --pins-bv I<width>
Specifies SystemC outputs of greater than or equal to I<width> bits wide
should use sc_bv's instead of uint32/uint64_t's. The default is "--pins-bv
65". Versions before Verilator 3.671 defaulted to "--pins-bv 33". The
more sc_bv is used, the worse for performance.
=item --prefix I<topname>
@@ -518,9 +576,13 @@ designs with only one top.
=item --trace
Adds waveform tracing code to the model, this will create additional
{prefix}__Trace*.cpp files you will need to add to your Makefiles, if
you're not using the ones generated for you.
Adds waveform tracing code to the model. Verilator will generate
additional {prefix}__Trace*.cpp files that will need to be compiled. In
addition Sp.cpp (for SystemC traces) or SpTraceVcdC.c (for C++ only) from
the SystemPerl kit's src directory must be compiled and linked in. If
using the Verilator generated Makefiles, these will be added as source
targets for you. If you're not using the Verilator makefiles, you will
need to add these to your Makefile manually.
Having tracing compiled in may result in some small performance losses,
even when waveforms are not turned on during model execution.
@@ -545,6 +607,14 @@ Convert the specified warning message into a error message. This is
generally to discourage users from violating important site-wide rules, for
example C<-Werror-NOUNOPTFLAT>.
=item -Wfuture-I<message>
Suppress unknown Verilator comments or warning messages with the given
message code. This is used to allow code written with pragmas for a later
version of Verilator to run under a older version; add -Wfuture- arguments
for each message code or comment that the new version supports which the
older version does not support.
=item -Wno-I<message>
Disable the specified warning message.
@@ -552,26 +622,40 @@ Disable the specified warning message.
=item -Wno-lint
Disable all lint related warning messages. This is equivelent to
"-Wno-CASEINCOMPLETE -Wno-CASEOVERLAP -Wno-CASEX -Wno-CMPCONST
-Wno-IMPLICIT -Wno-UNDRIVEN -Wno-UNSIGNED -Wno-UNUSED -Wno-VARHIDDEN
-Wno-WIDTH".
"-Wno-CASEINCOMPLETE -Wno-CASEOVERLAP -Wno-CASEX -Wno-CASEWITHX
-Wno-CMPCONST -Wno-IMPLICIT -Wno-UNDRIVEN -Wno-UNSIGNED -Wno-UNUSED
-Wno-VARHIDDEN -Wno-WIDTH".
It is strongly recommended you cleanup your code rather than using this
option, it is only intended to be use when running test-cases of code
received from third parties.
=item -Wwarn-I<message>
Enables the specified warning message.
=item -x-assign 0
=item -x-assign 1
=item -x-assign unique (default)
=item -x-assign fast (default)
=item -x-assign unique
Controls the two-state value that is replaced when an assignment to X is
encountered. -x-assign=0 converts all Xs to 0s, this is the fastest.
-x-assign=1 converts all Xs to 1s, this is nearly as fast, but more likely
to find reset bugs as active high logic will fire. The default,
-x-assign=func will call a function to determine the value, this allows
randomization of all Xs and is the slowest, but safest.
encountered. -x-assign=fast, the default, converts all Xs to whatever is
best for performance. -x-assign=0 converts all Xs to 0s, and is also fast.
-x-assign=1 converts all Xs to 1s, this is nearly as fast as 0, but more
likely to find reset bugs as active high logic will fire. -x-assign=unique
will call a function to determine the value, this allows randomization of
all Xs to find reset bugs and is the slowest, but safest for finding reset
bugs in code.
If using -x-assign unique, you may want to seed your random number
generator such that each regression run gets a different randomization
sequence. Use the system's srand48() or for Windows srand() function to do
this. You'll probably also want to print any seeds selected, and code to
enable rerunning with that same seed so you can reproduce bugs.
=back
@@ -696,7 +780,7 @@ This is an example similar to the above, but using SystemPerl.
Vour* top;
top = new Vour("top"); // SP_CELL (top, Vour);
top->clk(clk); // SP_PIN (top, clk, clk);
while (!Verilated::gotFinish()) { sc_start(1); }
while (!Verilated::gotFinish()) { sc_start(1, SC_NS); }
exit(0);
}
EOF
@@ -745,10 +829,10 @@ the test_sp directory in the distribution for an example.
=head1 BENCHMARKING & OPTIMIZATION
For best performance, run Verilator with the "-O3 -x-assign=0 --noassert"
flags. The -O3 flag will require longer compile times, and -x-assign=0 may
increase the risk of reset bugs in trade for performance; see the above
documentation for these flags.
For best performance, run Verilator with the "-O3 -x-assign=fast
--noassert" flags. The -O3 flag will require longer compile times, and
-x-assign=fast may increase the risk of reset bugs in trade for
performance; see the above documentation for these flags.
Minor Verilog code changes can also give big wins. You should not have any
UNOPTFLAT warnings from Verilator. Fixing these warnings can result in
@@ -869,10 +953,18 @@ building the SystemC model.
=item SYSTEMPERL
Specifies the directory containing the Verilog-Perl distribution kit. This
is used to find the Verilog-Perl library and include files. If not
Specifies the directory containing the SystemPerl distribution kit. This
is used to find the SystemPerl library and include files. If not
specified, it will come from a default optionally specified at configure
time (before Verilator was compiled).
time (before Verilator was compiled). See also SYSTEMPERL_INCLUDE.
=item SYSTEMPERL_INCLUDE
Specifies the directory containing the Verilog-Perl include .cpp files,
from the src/ directory of the SystemPerl kit. If not specified, it will
be computed from the SYSTEMPERL environment variable if it is set, and if
SYSTEMPERL is not set SYSTEMPERL_INCLUDE will come from a default
optionally specified at configure time (before Verilator was compiled).
=item VCS_HOME
@@ -915,7 +1007,7 @@ example:
unsigned int main_time = 0; // Current simulation time
double sc_time_stamp () { // Called by $time in Verilog
return main_time;
return main_time;
}
int main() {
@@ -953,11 +1045,10 @@ Verilator will convert the top level module to a SC_MODULE. This module
will plug directly into a SystemC netlist.
The SC_MODULE gets the same pinout as the Verilog module, with the
following type conversions: Pins of a single bit become bool, unless they
are marked with `systemc_clock, in which case they become sc_clock's (for
SystemC 1.2, not needed in SystemC 2.0). Pins 2-32 bits wide become
uint32_t's. Pins 33-64 bits wide become sc_bv's or uint64_t's depending on
the -pins64 switch. Wider pins become sc_bv's.
following type conversions: Pins of a single bit become bool. Pins 2-32
bits wide become uint32_t's. Pins 33-64 bits wide become sc_bv's or
uint64_t's depending on the --no-pins64 switch. Wider pins become sc_bv's.
(Uints simulate the fastest so are used where possible.)
Lower modules are not pure SystemC code. This is a feature, as using the
SystemC pin interconnect scheme everywhere would reduce performance by an
@@ -1018,11 +1109,13 @@ including function call-like preprocessor defines.
Verilator supports ==? and !=? operators, $bits, $countones, $error,
$fatal, $info, $isunknown, $onehot, $onehot0, $warning, always_comb,
always_ff, always_latch, do-while, and final.
always_ff, always_latch, do-while, final, priority case/if, and unique
case/if.
It also supports .name and .* interconnection.
Verilator partially supports assert.
Verilator partially supports concurrent assert and cover statements; see
the enclosed coverage tests for the syntax which is allowed.
=head1 SUGAR/PSL SUPPORT
@@ -1063,6 +1156,10 @@ formally prove the directive to be true, or failing that, will insert the
appropriate code to detect failing cases at runtime and print an "Assertion
failed" error message.
Verilator likewise also asserts any "unique" or "priority" SystemVerilog
keywords on case statements. However, "unique if" and "priority if" are
currently simply ignored.
=head1 LANGUAGE EXTENSIONS
The following additional constructs are the extensions Verilator supports
@@ -1184,15 +1281,27 @@ The Verilog code returns to the last language mode specified with
=item /*verilator clock_enable*/
Experimental use only. Used after a signal declaration to indicate the
signal is used to gate a clock, and the user takes responsibility for
insuring there are no races related to it. (Typically by adding a latch,
and running static timing analysis.) This will cause the clock gate to be
ignored in the scheduling algorithm, improving performance.
Used after a signal declaration to indicate the signal is used to gate a
clock, and the user takes responsibility for insuring there are no races
related to it. (Typically by adding a latch, and running static timing
analysis.) This will cause the clock gate to be ignored in the scheduling
algorithm, improving performance.
=item /*verilator coverage_block_off*/
Specifies the entire begin/end block should be ignored for coverage analysis.
Specifies the entire begin/end block should be ignored for coverage
analysis purposes.
=item /*verilator coverage_off*/
Specifies that following lines of code should have coverage disabled.
Often used to ignore an entire module for coverage analysis purposes.
=item /*verilator coverage_on*/
Specifies that following lines of code should have coverage reenabled (if
appropriate --coverage flags are passed) after being disabled earlier with
/*verilator coverage_off*/.
=item /*verilator inline_module*/
@@ -1213,6 +1322,7 @@ this to the signal causing a false loop may clear up the problem.
IE, with the following
reg splitme /* verilator isolate_assignments*/;
// Note the placement of the semicolon above
always @* begin
if (....) begin
splitme = ....;
@@ -1296,10 +1406,9 @@ Wide variables over 64 bits cannot be function returns, to avoid exposing
complexities. However, wide variables can be input/outputs; they will be
passed as references to an array of 32 bit numbers.
This feature is still somewhat experimental. Generally, only the values of
stored state (flops) should be written, as the model will NOT notice
changes made to variables in these functions. (Same as when a signal is
declared public.)
Generally, only the values of stored state (flops) should be written, as
the model will NOT notice changes made to variables in these functions.
(Same as when a signal is declared public.)
=item /*verilator public_flat*/ (variable)
@@ -1320,7 +1429,9 @@ using the --public switch.
=item /*verilator sc_clock*/
Used after a input declaration to indicate the signal should be declared in
SystemC as a sc_clock instead of a bool.
SystemC as a sc_clock instead of a bool. This was needed in SystemC 1.1
and 1.2 only; versions 2.0 and later do not require clock pins to be
sc_clocks and this is no longer needed.
=item /*verilator tracing_off*/
@@ -1417,9 +1528,25 @@ all variables to one at startup finds most problems.
=head2 Tri/Inout
As a 2 state compiler, tristate and inouts are not supported.
Traditionally only chip "cores" are Verilated, the pad rings have been
written by hand in C++.
Verilator converts some simple tristate structures into two state. An assignment
of the form:
inout driver;
wire driver = (enable) ? output_value : 1'bz;
Will be converted to
input driver__in; // Value being driven in from "external" drivers
output driver__en; // True if driven from this module
output driver__enout; // Value being driven from this module
Pullup, pulldown, bufif0, bufif1, notif0, notif1 are also supported.
External logic will be needed to combine these signals with any external
drivers.
Tristate drivers are not supported inside functions and tasks; a inout
there will be considered a two state variable that is read and written
instead of a four state variable.
=head2 Functions & Tasks
@@ -1523,18 +1650,27 @@ while, wire, xnor, xor
Generally supported.
=item priority if, unique if
Priority and unique if's are treated as normal ifs and not asserted to be
full nor unique.
=item specify specparam
All specify blocks and timing checks are ignored.
=item timeunit, timeprecision
All timing control statements are ignored.
=item uwire
Verilator does not perform warning checking on uwires, it treats the uwire
keyword as if it were the normal wire keyword.
=item $bits, $countones, $error, $fatal, $finish, $info, $isunknown,
$onehot, $onehot0, $readmemb, $readmemh, $signed, $stop, $time, $unsigned,
$warning.
$onehot, $onehot0, $readmemb, $readmemh, $signed, $stime, $stop, $time,
$unsigned, $warning.
Generally supported.
@@ -1552,7 +1688,7 @@ them with a $write with the appropriate format specifier.
The rarely used optional parameter to $finish and $stop is ignored.
=item $fopen, $fclose, $fdisplay, $fwrite
=item $fopen, $fclose, $fdisplay, $feof, $fflush, $fgetc, $fgets, $fscanf, $fwrite
File descriptors passed to the file PLI calls must be file descriptors, not
MCDs, which includes the mode parameter to $fopen being mandatory.
@@ -1562,11 +1698,22 @@ are 32 bits while FILE*s may be 64 bits, the descriptor must be stored in a
reg [63:0] rather than an integer. The define `verilator_file_descriptor in
verilated.v can be used to hide this difference.
=item $fscanf, $sscanf
Only integer formats are supported; %e, %f, %m, %r, %v, and %z are not
supported.
=item $fullskew, $hold, $nochange, $period, $recovery, $recrem, $removal,
$setup, $setuphold, $skew, $timeskew, $width
All specify blocks and timing checks are ignored.
=item $random
$random does not support the optional argument to set the seed. Use the
srand function in C to accomplish this, and note there is only one random
number generator (not one per module).
=item $readmemb, $readmemh
Read memory commands should work properly. Note Verilator and the Verilog
@@ -1651,6 +1798,16 @@ L<http://www.sunburst-design.com/papers/CummingsSNUG1999Boston_FullParallelCase_
Ignoring this warning will only suppress the lint check, it will simulate
correctly.
=item CASEWITHX
Warns that a case statement contains a constant with a C<x>. Verilator is
two-state so interpret such items as always false. Note a common error is
to use a C<X> in a case or casez statement item; often what the user
instead insteaded is to use a casez with C<?>.
Ignoring this warning will only suppress the lint check, it will simulate
correctly.
=item CMPCONST
Warns that you are comparing a value in a way that will always be constant.
@@ -1684,6 +1841,13 @@ additional ones.)
Ignoring this warning may make Verilator simulations differ from other
simulators.
=item IMPERFECTSCH
Warns that the scheduling of the model is not absolutely perfect, and some
manual code edits may result in faster performance. This warning defaults
to off, and must be turned on explicitly before the top module statement is
processed.
=item IMPLICIT
Warns that a wire is being implicitly declared (it is a single bit wide
@@ -1970,9 +2134,9 @@ Visual C++ Version 7 or newer, but this is not tested by the author.
=item Can you provide binaries?
Verilator is available as a RPM for SuSE and perhaps other systems; this is
done by porters and may slightly lag the primary distribution. If there
isn't a binary build for your distribution, how about you set one up?
Verilator is available as a RPM for SuSE, Redhat and perhaps other systems;
this is done by porters and may slightly lag the primary distribution. If
there isn't a binary build for your distribution, how about you set one up?
Please contact the authors for assistance.
Note people sometimes request binaries when they are having problems with
@@ -2012,7 +2176,7 @@ using --debug), see if your machine is paging; most likely you need to run
it on a machine with more memory. Verilator is a full 64 bit application
and may use more than 4GB, but about 1GB is the maximum typically needed.
=item How do I generate waveforms (traces) in C++ or SystemC?
=item How do I generate waveforms (traces) in C++?
See the next question for tracing in SystemPerl mode.
@@ -2031,7 +2195,7 @@ distribution.
You also need to compile SpTraceVcdC.cpp and add it to your link. This is
done for you if using the Verilator --exe flag.
=item How do I generate waveforms (traces) in SystemPerl?
=item How do I generate waveforms (traces) in SystemC/SystemPerl?
Add the --trace switch to Verilator, and make sure the SystemPerl package
is installed.
@@ -2041,12 +2205,49 @@ create a SpTraceFile object as you would create a normal SystemC trace
file. For an example, see the call to SpTraceFile in the
test_sp/sc_main.cpp file of the distribution.
Alternatively you may use the C++ trace mechanism described in the previous
question, however the timescale and timeprecision will not inherited from
your SystemC settings.
=item How do I view waveforms (traces)?
Verilator makes standard VCD (Value Change Dump) files. They are viewable
with the public domain Dinotrace or GtkWave programs, or any of the many
commercial offerings.
=item How do I reduce the size of large waveform (trace) files?
First, instead of calling SpTraceVcdCFile->open at the beginning of time,
delay calling it until the time stamp where you want to tracing to begin.
Likewise you can also call SpTraceVcdCFile->open before the end of time
(perhaps a short period after you detect a verification error.)
Next, add /*verilator tracing_off*/ to any very low level modules you never
want to trace (such as perhaps library cells). Finally, use the
--trace-depth option to limit the depth of tracing, for example
--trace-depth 1 to see only the top level signals.
Also be sure you write your trace files to a local disk, instead of to a
network disk. Network disks are generally far slower.
=item How do I do coverage analysis?
Verilator supports both block (line) coverage and user inserted functional
coverage. First, run verilator with the --coverage option. If you're
using your own makefile, compile the model with the GCC flag
-DSP_COVERAGE_ENABLE (if using Verilator's, it will do this for you.)
Run your tests in different directories. Each test will create a
logs/coverage.pl file.
After running all of your tests, the vcoverage utility (from the SystemPerl
package) is executed. Vcoverage reads the logs/coverage.pl file(s), and
creates an annotated source code listing showing code coverage details.
For an example, after running 'make test' in the Verilator distribution,
see the test_sp/logs/coverage_source directory. Grep for lines starting
with '%' to see what lines Verilator believes need more coverage.
=item Where is the translate_off command? (How do I ignore a construct?)
Translate on/off pragmas are generally a bad idea, as it's easy to have
@@ -2127,11 +2328,49 @@ uses one large symbol table, as that results in 2-3 less assembly
instructions for each signal access. This makes the execution time 10-15%
faster, but can result in more compilations when something changes.
=item How do I access functions/tasks in C?
Write a Verilog function or task with input/outputs that match what you
want to call in with C. Then mark that function public.
Verilog inputs of one bit become C++ bool inputs. Inputs 32 bits or
smaller become C uint32_t inputs, 64-32 bits become C uint64_t inputs, and
wider signals become arrays of 32 bits. Outputs are passed as references
to bool, uint32_t, uint64_t or uint32_t[] arrays.
Signals wider than 64 bits are passed as an array of 32-bit uint32_t's.
Thus to read bits 31:0, access signal[0], and for bits 63:32, access
signal[1]. Unused bits (for example bit numbers 65-96 of a 65 bit vector)
will always be zero. if you change the value you must make sure to pack
zeros in the unused bits or core-dumps may result. (Because Verilator
strips array bound checks where it believes them to be unnecessary.)
In the SYSTEMC example above, if you had in our.v:
task publicSetBool;
// verilator public
input in_bool;
var_bool = in_bool;
endtask
From the sc_main.cpp file, you'd then:
#include "Vour.h"
#include "Vour_our.h"
top->v->publicSetBool(value);
See additional notes under the /*verilator public*/ section.
=item How do I access signals in C?
First, declare the signals you will be accessing with a /*verilator
public*/ comment before the closing semicolon. Then scope into the C++
class to read the value of the signal, as you would any other member variable.
The best thing is to make a Verilator public task or function accessor that
can read or write that signal, as described in the previous FAQ. This will
allow Verilator to better optimize the model.
If you really want raw access to the signals, declare the signals you will
be accessing with a /*verilator public*/ comment before the closing
semicolon. Then scope into the C++ class to read the value of the signal,
as you would any other member variable.
Signals are the smallest of 8 bit chars, 16 bit shorts, 32 bit longs, or 64
bit long longs that fits the width of the signal. Generally, you can use
@@ -2147,13 +2386,14 @@ strips array bound checks where it believes them to be unnecessary.)
In the SYSTEMC example above, if you had in our.v:
input clk /*verilator public*/;
input clk /*verilator public*/;
// Note the placement of the semicolon above
From the sc_main.cpp file, you'd then:
#include "Vour.h"
#include "Vour_our.h"
cout << "clock is " << top->v.clk << endl;
cout << "clock is " << top->v->clk << endl;
In this example, clk is a bool you can read or set as any other variable.
The value of normal signals may be set, though clocks shouldn't be changed
@@ -2202,7 +2442,10 @@ outputs. Now, the following should fail:
cd test_regress
t/t_BUG.pl
Finally, Mail the bug report to C<[email protected]>.
Finally, report the bug using the bug tracker at
L<http://www.veripool.org/verilator>. The bug will become publicly
visible; if this is unacceptable, mail the bug report to
C<[email protected]>.
=head1 HISTORY
@@ -2237,27 +2480,35 @@ faster than many popular commercial simulators.
Many people have provided ideas and other assistance with Verilator.
The major corporate sponsors of Verilator, by providing funds or equipment
grants, are Compaq Corporation, Digital Equipment Corporation, Maker
Communications, Sun Microsystems, Nauticus Networks, and SiCortex.
grants include Compaq Corporation, Digital Equipment Corporation, Intel
Corporation, Maker Communications, MicroTune Inc., Sun Microsystems,
Nauticus Networks, and SiCortex Inc.
The people who have contributed code or other major functionality are Paul
Wasson, Duane Galbi, and Wilson Snyder. Major testers include Jeff Dutton,
Ralf Karge, David Hewson, Wim Michiels, and Gene Weber.
The people who have contributed code or other major functionality are Lane
Brooks, Duane Galbi, Paul Wasson, and Wilson Snyder. Major testers include
Jeff Dutton, Ralf Karge, David Hewson, Wim Michiels, and Gene Weber.
Some of the people who have provided ideas and feedback for Verilator
include Hans Van Antwerpen, Jens Arm, David Black, Gregg Bouchard, Chris
Boumenot, John Brownlee, Lauren Carlson, Robert A. Clark, John Deroo, Danny
Ding, Jeff Dutton, Eugen Fekete, Sam Gladstone, Thomas Hawkins, Mike Kagen,
Ralf Karge, Dan Katz, Sol Katzman, Gernot Koch, Steve Kolecki, Steve Lang,
Charlie Lind, Dan Lussier, Fred Ma, Wim Michiels, John Murphy, Richard
Myers, Paul Nitza, Lisa Noack, Renga Sundararajan, Shawn Wang, Greg Waters,
Eugene Weber, Leon Wildman, and Mat Zeno.
include David Addison, Hans Van Antwerpen, Vasu Arasanipalai, Jens Arm,
Jeremy Bennett, David Black, Gregg Bouchard, Chris Boumenot, Bryan Brady,
Lane Brooks, John Brownlee, Lauren Carlson, Robert A. Clark, Allan
Cochrane, Gunter Dannoritzer, Bernard Deadman, John Deroo, John Dickol,
Danny Ding, Jeff Dutton, Robert Farrell, Eugen Fekete, Sam Gladstone,
Thomas Hawkins, David Hewson, Jae Hossell, Ben Jackson, Mike Kagen,
Patricio Kaplan, Ralf Karge, Dan Katz, Sol Katzman, Jonathan Kimmitt,
Gernot Koch, Steve Kolecki, Steve Lang, Stephane Laurent, Charlie Lind, Dan
Lussier, Fred Ma, Wim Michiels, John Murphy, Richard Myers, Paul Nitza,
Lisa Noack, Mark Nodine, Niranjan Prabhu, Oleg Rodionov, Mike Shinkarovsky,
Rafael Shirakawa, Rodney Sinclair, John Stroebel, Emerson Suguimoto, Renga
Sundararajan, Stefan Thiede, Steve Tong, Holger Waechtler, Shawn Wang, Greg
Waters, Eugene Weber, Leon Wildman, Gerald Williams, Johan Wouters, and
Ding Xiaoliang.
=head1 DISTRIBUTION
The latest version is available from L<http://www.veripool.org/>.
Copyright 2003-2008 by Wilson Snyder. Verilator is free software; you can
Copyright 2003-2009 by Wilson Snyder. Verilator is free software; you can
redistribute it and/or modify it under the terms of either the GNU Lesser
General Public License or the Perl Artistic License.
+14 -20
View File
@@ -1,19 +1,7 @@
: # -*-Mode: perl;-*- use perl, wherever it is
eval 'exec perl -wS $0 ${1+"$@"}'
if 0;
# $Id$
######################################################################
#
# Copyright 2005-2008 by Wilson Snyder <[email protected]>. This
# program is free software; you can redistribute it and/or modify it under
# the terms of either the GNU Lesser General Public License or the Perl
# Artistic License.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# See copyright, etc in below POD section.
######################################################################
require 5.006_001;
@@ -33,14 +21,16 @@ use vars qw ($Debug);
$Debug = 0;
my $Opt_A;
my $Opt_B;
my $Opt_Lineno = 1;
autoflush STDOUT 1;
autoflush STDERR 1;
Getopt::Long::config ("no_auto_abbrev");
if (! GetOptions (
"help" => \&usage,
"debug" => \&debug,
"<>" => \&parameter,
)) {
"help" => \&usage,
"debug" => \&debug,
"<>" => \&parameter,
"lineno!" => \$Opt_Lineno,
)) {
die "%Error: Bad usage, try 'verilator_difftree --help'\n";
}
@@ -106,6 +96,7 @@ sub filter {
next if $line =~ / This=/;
$line =~ s/0x[a-f0-9]+/0x/g;
$line =~ s/<e[0-9]+\#?>/<e>/g;
$line =~ s/{\d+}/{}/g if !$Opt_Lineno;
print $f2 $line;
}
$f1->close;
@@ -115,7 +106,6 @@ sub filter {
#----------------------------------------------------------------------
sub usage {
print '$Id$ ', "\n";
pod2usage(-verbose=>2, -exitval => 2);
exit (1);
}
@@ -130,7 +120,7 @@ sub parameter {
$Opt_A = $param;
} elsif (!defined $Opt_B) {
$Opt_B = $param;
} else {
} else {
die "%Error: Unknown parameter: $param\n";
}
}
@@ -174,13 +164,17 @@ directories, ignoring irrelevant pointer differences.
Displays this message and program version and exits.
=item --nolineno
Do not show differences in line numbering.
=back
=head1 DISTRIBUTION
The latest version is available from L<http://www.veripool.org/verilator>.
Copyright 2005-2008 by Wilson Snyder. This package is free software; you
Copyright 2005-2009 by Wilson Snyder. This package is free software; you
can redistribute it and/or modify it under the terms of either the GNU
Lesser General Public License or the Perl Artistic License.
+1 -2
View File
@@ -1,10 +1,9 @@
: # -*-Mode: perl;-*- use perl, wherever it is
eval 'exec perl -wS $0 ${1+"$@"}'
if 0;
# $Id$
# DESCRIPTION: Print include statements for each ARGV
#
# Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
# Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# General Public License or the Perl Artistic License.
######################################################################
+45 -28
View File
@@ -1,19 +1,7 @@
: # -*-Mode: perl;-*- use perl, wherever it is
eval 'exec perl -wS $0 ${1+"$@"}'
if 0;
# $Id$
######################################################################
#
# Copyright 2007-2008 by Wilson Snyder <[email protected]>. This
# program is free software; you can redistribute it and/or modify it under
# the terms of either the GNU Lesser General Public License or the Perl
# Artistic License.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# See copyright, etc in below POD section.
######################################################################
require 5.006_001;
@@ -21,6 +9,7 @@ use warnings;
use Getopt::Long;
use IO::File;
use Pod::Usage;
eval { use Data::Dumper; $Data::Dumper::Indent = 1; }; # Debug, ok if missing
use strict;
use vars qw ($Debug);
@@ -50,7 +39,6 @@ profcfunc($Opt_File);
#----------------------------------------------------------------------
sub usage {
print '$Id$ ', "\n";
pod2usage(-verbose=>2, -exitval => 2);
exit (1);
}
@@ -63,7 +51,7 @@ sub parameter {
my $param = shift;
if (!defined $Opt_File) {
$Opt_File = $param;
} else {
} else {
die "%Error: Unknown parameter: $param\n";
}
}
@@ -78,7 +66,8 @@ sub profcfunc {
my %funcs;
while (defined (my $line=$fh->getline())) {
if ($line =~ /^\s*([0-9.]+)\s+[0-9.]+\s+([0-9.]+)\s+([0-9.]+)\s+.*\s+(\S+)\s*$/) {
# %time cumesec selfsec calls {stuff} name
if ($line =~ /^\s*([0-9.]+)\s+[0-9.]+\s+([0-9.]+)\s+([0-9.]+)\s+[^a-zA-Z_]*([a-zA-Z_].*)$/) {
my $pct=$1; my $sec=$2; my $calls=$3; my $func=$4;
$funcs{$func}{pct} += $pct;
$funcs{$func}{sec} += $sec;
@@ -88,47 +77,75 @@ sub profcfunc {
$fh->close;
# Find modules
my %pointer_mods;
my %verilated_mods;
foreach my $func (keys %funcs) {
if ($func =~ /(.*)::_eval\(.*__Syms.*\)$/) {
if ($func =~ /(.*)::_eval\(([a-zA-Z_0-9]+__Syms).*\)$/) {
$verilated_mods{$1} = qr/^$1/;
$pointer_mods{$2} = $1;
}
}
#print Dumper(\%pointer_mods, \%verilated_mods);
# Resort by Verilog name
my %vfuncs;
my %groups;
foreach my $func (keys %funcs) {
my $pct = $funcs{$func}{pct};
my $vfunc = $func;
my $design;
if ($func =~ /\(([a-zA-Z_0-9]+__Syms)/) {
$design = $pointer_mods{$1};
}
foreach my $vde (keys %verilated_mods) {
last if $design;
if ($func =~ /$verilated_mods{$vde}/) {
$design=$vde;
last;
}
}
if ($vfunc =~ /__PROF__([a-zA-Z_0-9]+)__([0-9]+)\(/) {
if ($vfunc =~ /__PROF__([a-zA-Z_0-9]+)__l?([0-9]+)\(/) {
$vfunc = sprintf("VBlock %s:%d", $1, $2);
$groups{"Verilog Blocks under $design"} += $funcs{$func}{pct};
$groups{type}{"Verilog Blocks under $design"} += $pct;
$groups{design}{$design} += $pct;
$groups{module}{$1} += $pct;
} else {
if ($design) {
$vfunc = sprintf("VCommon %s", $func);
$groups{"Common code under $design"} += $funcs{$func}{pct};
$groups{type}{"Common code under $design"} += $pct;
$groups{design}{$design} += $pct;
$groups{module}{$design." common code"} += $pct;
} else {
$vfunc = sprintf("C++ %s", $func);
$groups{'C++'} += $funcs{$func}{pct};
$groups{type}{'C++'} += $pct;
$groups{design}{'C++'} += $pct;
$groups{module}{'C++'} += $pct;
}
}
$vfuncs{$vfunc} = $funcs{$func};
}
print("Overall summary:\n");
print(" % time\n");
foreach (sort (keys %groups)) {
printf(" %6.2f In all %s\n", $groups{$_}, $_);
}
print("\n");
foreach my $type qw(type design module) {
my $missing = 100;
foreach (sort (keys %{$groups{$type}})) {
$missing -= $groups{$type}{$_};
}
if ($missing) {
$groups{$type}{"\377Unaccounted for/rounding error"} = $missing;
}
print("Overall summary by $type:\n");
printf(" %-6s %s\n","% time",$type);
foreach my $what (sort (keys %{$groups{$type}})) {
(my $pwhat = $what) =~ s/^\377//; # Just used to establish sort order
printf(" %6.2f %s\n", $groups{$type}{$what}, $pwhat);
}
print("\n");
}
print("Verilog code profile:\n");
print(" These are split into three categories:\n");
@@ -191,7 +208,7 @@ Displays this message and program version and exits.
The latest version is available from L<http://www.veripool.org/>.
Copyright 2007-2008 by Wilson Snyder. This package is free software; you
Copyright 2007-2009 by Wilson Snyder. This package is free software; you
can redistribute it and/or modify it under the terms of either the GNU
Lesser General Public License or the Perl Artistic License.
+15 -4
View File
@@ -1,10 +1,8 @@
dnl $Id$
dnl DESCRIPTION: Process this file with autoconf to produce a configure script.
dnl Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
dnl Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
dnl redistribute it and/or modify it under the terms of either the GNU
dnl General Public License or the Perl Artistic License.
AC_REVISION($Revision$)dnl
AC_INIT(src/Verilator.cpp)
AC_CONFIG_HEADER(src/config_build.h)
@@ -15,11 +13,24 @@ AC_ARG_ENABLE(defenv,
CFG_WITH_DEFENV=yes)
AC_SUBST(CFG_WITH_DEFENV)
dnl Checks for programs.
dnl Compiler flags
CXX=g++
CFLAGS=-I${includedir}
CPPFLAGS=-I${includedir}
CXXFLAGS=-I${includedir}
LDFLAGS=-L${libdir}
dnl Checks for programs.
AC_PROG_CC
AC_PROG_CXX
AC_PROG_INSTALL
AC_LANG_PUSH(C++)
AC_MSG_CHECKING([that C++ compiler can compile simple program])
AC_TRY_RUN([int main() { return 0; }],
AC_MSG_RESULT(yes),
AC_MSG_RESULT(no);AC_MSG_ERROR([a working C++ compiler is required]))
AC_PATH_PROG(PERL,perl)
if test "x$PERL" = "x" ; then
AC_MSG_ERROR([Cannot find "perl" in your PATH, please install it])
+490 -98
View File
@@ -1,7 +1,7 @@
// $Id$ -*- C++ -*-
// -*- C++ -*-
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// Lesser General Public License or the Perl Artistic License.
//
@@ -9,7 +9,7 @@
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
// GNU General Public License for more details.
//
//
//=========================================================================
///
/// \file
@@ -23,8 +23,7 @@
//=========================================================================
#include "verilated.h"
#include <string.h>
#include <ctype.h>
#include <cctype>
#define VL_VALUE_STRING_MAX_WIDTH 1024 ///< Max static char array for VL_VALUE_STRING
@@ -74,29 +73,49 @@ void vl_fatal (const char* filename, int linenum, const char* hier, const char*
IData VL_RAND32() {
#if defined(_WIN32) && !defined(__CYGWIN__)
// Windows doesn't have lrand48(), although Cygwin does.
return (rand()<<16) | rand();
return (rand()<<16) ^ rand();
#else
return (lrand48()<<16) | lrand48();
return (lrand48()<<16) ^ lrand48();
#endif
}
IData VL_RAND_RESET_I(int outBits) {
IData VL_RANDOM_I(int obits) {
return VL_RAND32() & VL_MASK_I(obits);
}
QData VL_RANDOM_Q(int obits) {
QData data = ((QData)VL_RAND32()<<VL_ULL(32)) | (QData)VL_RAND32();
return data & VL_MASK_Q(obits);
}
WDataOutP VL_RANDOM_W(int obits, WDataOutP outwp) {
for (int i=0; i<VL_WORDS_I(obits); i++) {
if (i<(VL_WORDS_I(obits)-1)) {
outwp[i] = VL_RAND32();
} else {
outwp[i] = VL_RAND32() & VL_MASK_I(obits);
}
}
return outwp;
}
IData VL_RAND_RESET_I(int obits) {
if (Verilated::randReset()==0) return 0;
IData data = ~0;
if (Verilated::randReset()!=1) { // if 2, randomize
data = VL_RAND32();
data = VL_RANDOM_I(obits);
}
if (outBits<32) data &= VL_MASK_I(outBits);
if (obits<32) data &= VL_MASK_I(obits);
return data;
}
QData VL_RAND_RESET_Q(int outBits) {
QData VL_RAND_RESET_Q(int obits) {
if (Verilated::randReset()==0) return 0;
QData data = VL_ULL(~0);
if (Verilated::randReset()!=1) { // if 2, randomize
data = ((QData)VL_RAND32()<<VL_ULL(32)) | (QData)VL_RAND32();
data = VL_RANDOM_Q(obits);
}
if (outBits<64) data &= VL_MASK_Q(outBits);
if (obits<64) data &= VL_MASK_Q(obits);
return data;
}
@@ -119,94 +138,368 @@ WDataOutP VL_ZERO_RESET_W(int obits, WDataOutP outwp) {
//===========================================================================
// Formatting
const char* VL_VALUE_FORMATTED_Q(int obits, char fmt, bool drop0, QData ld) {
// Convert value into %b/%o/%x/%s/%u/%d formatted string
// Note uses a single buffer; presumes only one call per printf
static VL_THREAD char str[VL_VALUE_STRING_MAX_WIDTH];
char* strp = &str[0];
int lsb=obits-1;
if (drop0) while (lsb && !VL_BITISSET_Q(ld,lsb)) lsb--;
switch (fmt) {
case 'd':
sprintf(str,"%lld",(vlsint64_t)(VL_EXTENDS_QQ(obits,obits,ld)));
return str;
case 'u':
sprintf(str,"%llu",ld);
return str;
case 's':
for (; lsb>=0; lsb--) {
lsb = (lsb / 8) * 8; // Next digit
IData charval = (ld>>VL_BITBIT_Q(lsb)) & 0xff;
*strp++ = (charval==0)?' ':charval;
// Do a va_arg returning a quad, assuming input argument is anything less than wide
#define _VL_VA_ARG_Q(ap, bits) (((bits) <= VL_WORDSIZE) ? va_arg(ap,IData) : va_arg(ap,QData))
void _vl_vsformat(string& output, const char* formatp, va_list ap) {
// Format a Verilog $write style format into the output list
// The format must be pre-processed (and lower cased) by Verilator
// Arguments are in "width, arg-value (or WDataIn* if wide)" form
//
// Note uses a single buffer internally; presumes only one usage per printf
// Note also assumes variables < 64 are not wide, this assumption is
// sometimes not true in low-level routines written here in verilated.cpp
static VL_THREAD char tmp[VL_VALUE_STRING_MAX_WIDTH];
bool inPct = false;
bool widthSet = false;
int width = 0;
const char* pos = formatp;
for (; *pos; ++pos) {
if (!inPct && pos[0]=='%') {
inPct = true;
widthSet = false;
width = 0;
} else if (!inPct) { // Normal text
// Fast-forward to next escape and add to output
const char *ep = pos;
while (ep[0] && ep[0]!='%') ep++;
if (ep != pos) {
output += string(pos, ep-pos);
pos += ep-pos-1;
}
} else { // Format character
inPct = false;
char fmt = pos[0];
switch (fmt) {
case '0': case '1': case '2': case '3': case '4':
case '5': case '6': case '7': case '8': case '9':
inPct = true; // Get more digits
widthSet = true;
width = width*10 + (fmt - '0');
break;
case '%':
output += '%';
break;
case 'S': { // "C" string
const char* cstrp = va_arg(ap, const char*);
output += cstrp;
break;
}
default: {
// Deal with all read-and-print somethings
const int lbits = va_arg(ap, int);
QData ld = 0;
WDataInP lwp;
if (lbits <= VL_QUADSIZE) {
WData qlwp[2];
ld = _VL_VA_ARG_Q(ap, lbits);
VL_SET_WQ(qlwp,ld);
lwp = qlwp;
} else {
lwp = va_arg(ap,WDataInP);
ld = lwp[0];
if (fmt == 'u' || fmt == 'd') fmt = 'x'; // Not supported, but show something
}
int lsb=lbits-1;
if (widthSet && width==0) while (lsb && !VL_BITISSET_W(lwp,lsb)) lsb--;
switch (fmt) {
case 'c': {
IData charval = ld & 0xff;
output += charval;
break;
}
case 's':
for (; lsb>=0; lsb--) {
lsb = (lsb / 8) * 8; // Next digit
IData charval = (lwp[VL_BITWORD_I(lsb)]>>VL_BITBIT_I(lsb)) & 0xff;
output += (charval==0)?' ':charval;
}
break;
case 'd': { // Signed decimal
int digits=sprintf(tmp,"%lld",(vlsint64_t)(VL_EXTENDS_QQ(lbits,lbits,ld)));
int needmore = width-digits;
if (needmore>0) output.append(needmore,' '); // Pre-pad spaces
output += tmp;
break;
}
case 'u': { // Unsigned decimal
int digits=sprintf(tmp,"%llu",ld);
int needmore = width-digits;
if (needmore>0) output.append(needmore,' '); // Pre-pad spaces
output += tmp;
break;
}
case 't': { // Time
int digits;
if (VL_TIME_MULTIPLIER==1) {
digits=sprintf(tmp,"%llu",ld);
} else if (VL_TIME_MULTIPLIER==1000) {
digits=sprintf(tmp,"%llu.%03llu",
(QData)(ld/VL_TIME_MULTIPLIER),
(QData)(ld%VL_TIME_MULTIPLIER));
} else {
vl_fatal(__FILE__,__LINE__,"","%%Error: Unsupported VL_TIME_MULTIPLIER");
}
int needmore = width-digits;
if (needmore>0) output.append(needmore,' '); // Pre-pad spaces
output += tmp;
break;
}
case 'b':
for (; lsb>=0; lsb--) {
output += ((lwp[VL_BITWORD_I(lsb)]>>VL_BITBIT_I(lsb)) & 1) + '0';
}
break;
case 'o':
for (; lsb>=0; lsb--) {
lsb = (lsb / 3) * 3; // Next digit
// Octal numbers may span more than one wide word,
// so we need to grab each bit separately and check for overrun
// Octal is rare, so we'll do it a slow simple way
output += ('0'
+ ((VL_BITISSETLIMIT_W(lwp, lbits, lsb+0)) ? 1 : 0)
+ ((VL_BITISSETLIMIT_W(lwp, lbits, lsb+1)) ? 2 : 0)
+ ((VL_BITISSETLIMIT_W(lwp, lbits, lsb+2)) ? 4 : 0));
}
break;
case 'x':
for (; lsb>=0; lsb--) {
lsb = (lsb / 4) * 4; // Next digit
IData charval = (lwp[VL_BITWORD_I(lsb)]>>VL_BITBIT_I(lsb)) & 0xf;
output += "0123456789abcdef"[charval];
}
break;
default:
string msg = string("%%Error: Unknown _vl_vsformat code: ")+pos[0]+"\n";
vl_fatal(__FILE__,__LINE__,"",msg.c_str());
break;
} // switch
}
} // switch
}
*strp++ = '\0';
return str;
case 'b':
for (; lsb>=0; lsb--) {
*strp++ = ((ld>>VL_BITBIT_Q(lsb)) & 1) + '0';
}
*strp++ = '\0';
return str;
case 'o':
for (; lsb>=0; lsb--) {
lsb = (lsb / 3) * 3; // Next digit
*strp++ = ((ld>>VL_BITBIT_Q(lsb)) & 7) + '0';
}
*strp++ = '\0';
return str;
default:
for (; lsb>=0; lsb--) {
lsb = (lsb / 4) * 4; // Next digit
IData charval = (ld>>VL_BITBIT_Q(lsb)) & 0xf;
*strp++ = (charval + ((charval < 10) ? '0':('a'-10)));
}
*strp++ = '\0';
return str;
}
*strp++ = '\0';
return str;
}
const char* VL_VALUE_FORMATTED_W(int obits, char fmt, bool drop0, WDataInP lwp) {
// Convert value into %b/%o/%x/%s/%u/%d formatted string
// Note uses a single buffer; presumes only one call per printf
static VL_THREAD char str[VL_VALUE_STRING_MAX_WIDTH];
char* strp = &str[0];
int lsb=obits-1;
if (drop0) while (lsb && !VL_BITISSET_W(lwp,lsb)) lsb--;
switch (fmt) {
case 's':
for (; lsb>=0; lsb--) {
lsb = (lsb / 8) * 8; // Next digit
IData charval = (lwp[VL_BITWORD_I(lsb)]>>VL_BITBIT_I(lsb)) & 0xff;
*strp++ = (charval==0)?' ':charval;
}
*strp++ = '\0';
return str;
case 'b':
for (; lsb>=0; lsb--) {
*strp++ = ((lwp[VL_BITWORD_I(lsb)]>>VL_BITBIT_I(lsb)) & 1) + '0';
}
*strp++ = '\0';
return str;
case 'o':
for (; lsb>=0; lsb--) {
lsb = (lsb / 3) * 3; // Next digit
*strp++ = ((lwp[VL_BITWORD_I(lsb)]>>VL_BITBIT_I(lsb)) & 7) + '0';
}
*strp++ = '\0';
return str;
default:
for (; lsb>=0; lsb--) {
lsb = (lsb / 4) * 4; // Next digit
IData charval = (lwp[VL_BITWORD_I(lsb)]>>VL_BITBIT_I(lsb)) & 0xf;
*strp++ = (charval + ((charval < 10) ? '0':('a'-10)));
}
*strp++ = '\0';
return str;
static inline bool _vl_vsss_eof(FILE* fp, int& floc) {
return fp ? feof(fp) : (floc<0);
}
static inline void _vl_vsss_advance(FILE* fp, int& floc) {
if (fp) fgetc(fp);
else floc -= 8;
}
static inline int _vl_vsss_peek(FILE* fp, int& floc, WDataInP fromp) {
// Get a character without advancing
if (fp) {
int data = fgetc(fp);
if (data == EOF) return EOF;
ungetc(data,fp);
return data;
} else {
if (floc < 0) return EOF;
floc = floc & ~7; // Align to closest character
int data = (fromp[VL_BITWORD_I(floc)] >> VL_BITBIT_I(floc)) & 0xff;
return data;
}
*strp++ = '\0';
return str;
}
static inline void _vl_vsss_skipspace(FILE* fp, int& floc, WDataInP fromp) {
while (1) {
int c = _vl_vsss_peek(fp, floc, fromp);
if (c==EOF || !isspace(c)) return;
_vl_vsss_advance(fp, floc);
}
}
static inline void _vl_vsss_read(FILE* fp, int& floc, WDataInP fromp,
char* tmpp, const char* acceptp) {
// Read into tmp, consisting of characters from acceptp list
char* cp = tmpp;
while (1) {
int c = _vl_vsss_peek(fp, floc, fromp);
if (c==EOF || isspace(c)) break;
if (acceptp!=NULL // String - allow anything
&& NULL==strchr(acceptp, c)) break;
if (acceptp!=NULL) c = tolower(c); // Non-strings we'll simplify
*cp++ = c;
_vl_vsss_advance(fp, floc);
}
*cp++ = '\0';
//VL_PRINTF("\t_read got='%s'\n", tmpp);
}
static inline void _vl_vsss_setbit(WDataOutP owp, int obits, int lsb, int nbits, IData ld) {
for (; nbits && lsb<obits; nbits--, lsb++, ld>>=1) {
VL_ASSIGNBIT_WI(0, lsb, owp, ld & 1);
}
}
IData _vl_vsscanf(FILE* fp, // If a fscanf
int fbits, WDataInP fromp, // Else if a sscanf
const char* formatp, va_list ap) {
// Read a Verilog $sscanf/$fscanf style format into the output list
// The format must be pre-processed (and lower cased) by Verilator
// Arguments are in "width, arg-value (or WDataIn* if wide)" form
static VL_THREAD char tmp[VL_VALUE_STRING_MAX_WIDTH];
int floc = fbits - 1;
IData got = 0;
bool inPct = false;
const char* pos = formatp;
for (; *pos && !_vl_vsss_eof(fp,floc); ++pos) {
//VL_PRINTF("_vlscan fmt='%c' floc=%d file='%c'\n", pos[0], floc, _vl_vsss_peek(fp,floc,fromp));
if (!inPct && pos[0]=='%') {
inPct = true;
} else if (!inPct && isspace(pos[0])) { // Format spaces
while (isspace(pos[1])) pos++;
_vl_vsss_skipspace(fp,floc,fromp);
} else if (!inPct) { // Expected Format
_vl_vsss_skipspace(fp,floc,fromp);
int c = _vl_vsss_peek(fp,floc,fromp);
if (c != pos[0]) goto done;
else _vl_vsss_advance(fp,floc);
} else { // Format character
// Skip loading spaces
inPct = false;
char fmt = pos[0];
switch (fmt) {
case '%': {
int c = _vl_vsss_peek(fp,floc,fromp);
if (c != '%') goto done;
else _vl_vsss_advance(fp,floc);
break;
}
default: {
// Deal with all read-and-scan somethings
// Note LSBs are preserved if there's an overflow
const int obits = va_arg(ap, int);
int lsb = 0;
WData qowp[2];
WDataOutP owp = qowp;
if (obits > VL_QUADSIZE) {
owp = va_arg(ap,WDataOutP);
}
for (int i=0; i<VL_WORDS_I(obits); i++) owp[i] = 0;
switch (fmt) {
case 'c': {
int c = _vl_vsss_peek(fp,floc,fromp);
if (c==EOF) goto done;
else _vl_vsss_advance(fp,floc);
owp[0] = c;
break;
}
case 's': {
_vl_vsss_skipspace(fp,floc,fromp);
_vl_vsss_read(fp,floc,fromp, tmp, NULL);
if (!tmp[0]) goto done;
int pos = strlen(tmp)-1;
for (int i=0; i<obits && pos>=0; pos--) {
_vl_vsss_setbit(owp,obits,lsb, 8, tmp[pos]); lsb+=8;
}
break;
}
case 'd': { // Signed decimal
_vl_vsss_skipspace(fp,floc,fromp);
_vl_vsss_read(fp,floc,fromp, tmp, "0123456789+-xz?_");
if (!tmp[0]) goto done;
vlsint64_t ld;
sscanf(tmp,"%lld",&ld);
VL_SET_WQ(owp,ld);
break;
}
case 't': // FALLTHRU // Time
case 'u': { // Unsigned decimal
_vl_vsss_skipspace(fp,floc,fromp);
_vl_vsss_read(fp,floc,fromp, tmp, "0123456789+-xz?_");
if (!tmp[0]) goto done;
QData ld;
sscanf(tmp,"%llu",&ld);
VL_SET_WQ(owp,ld);
break;
}
case 'b': {
_vl_vsss_skipspace(fp,floc,fromp);
_vl_vsss_read(fp,floc,fromp, tmp, "01xz?_");
if (!tmp[0]) goto done;
int pos = strlen(tmp)-1;
for (int i=0; i<obits && pos>=0; pos--) {
switch(tmp[pos]) {
case 'x': case 'z': case '?': //FALLTHRU
case '0': lsb++; break;
case '1': _vl_vsss_setbit(owp,obits,lsb, 1, 1); lsb++; break;
case '_': break;
}
}
break;
}
case 'o': {
_vl_vsss_skipspace(fp,floc,fromp);
_vl_vsss_read(fp,floc,fromp, tmp, "01234567xz?_");
if (!tmp[0]) goto done;
int pos = strlen(tmp)-1;
for (int i=0; i<obits && pos>=0; pos--) {
switch(tmp[pos]) {
case 'x': case 'z': case '?': //FALLTHRU
case '0': lsb+=3; break;
case '1': _vl_vsss_setbit(owp,obits,lsb, 3, 1); lsb+=3; break;
case '2': _vl_vsss_setbit(owp,obits,lsb, 3, 2); lsb+=3; break;
case '3': _vl_vsss_setbit(owp,obits,lsb, 3, 3); lsb+=3; break;
case '4': _vl_vsss_setbit(owp,obits,lsb, 3, 4); lsb+=3; break;
case '5': _vl_vsss_setbit(owp,obits,lsb, 3, 5); lsb+=3; break;
case '6': _vl_vsss_setbit(owp,obits,lsb, 3, 6); lsb+=3; break;
case '7': _vl_vsss_setbit(owp,obits,lsb, 3, 7); lsb+=3; break;
case '_': break;
}
}
break;
}
case 'x': {
_vl_vsss_skipspace(fp,floc,fromp);
_vl_vsss_read(fp,floc,fromp, tmp, "0123456789abcdefxz?_");
if (!tmp[0]) goto done;
int pos = strlen(tmp)-1;
for (int i=0; i<obits && pos>=0; pos--) {
switch(tmp[pos]) {
case 'x': case 'z': case '?': //FALLTHRU
case '0': lsb+=4; break;
case '1': _vl_vsss_setbit(owp,obits,lsb, 4, 1); lsb+=4; break;
case '2': _vl_vsss_setbit(owp,obits,lsb, 4, 2); lsb+=4; break;
case '3': _vl_vsss_setbit(owp,obits,lsb, 4, 3); lsb+=4; break;
case '4': _vl_vsss_setbit(owp,obits,lsb, 4, 4); lsb+=4; break;
case '5': _vl_vsss_setbit(owp,obits,lsb, 4, 5); lsb+=4; break;
case '6': _vl_vsss_setbit(owp,obits,lsb, 4, 6); lsb+=4; break;
case '7': _vl_vsss_setbit(owp,obits,lsb, 4, 7); lsb+=4; break;
case '8': _vl_vsss_setbit(owp,obits,lsb, 4, 8); lsb+=4; break;
case '9': _vl_vsss_setbit(owp,obits,lsb, 4, 9); lsb+=4; break;
case 'a': _vl_vsss_setbit(owp,obits,lsb, 4, 10); lsb+=4; break;
case 'b': _vl_vsss_setbit(owp,obits,lsb, 4, 11); lsb+=4; break;
case 'c': _vl_vsss_setbit(owp,obits,lsb, 4, 12); lsb+=4; break;
case 'd': _vl_vsss_setbit(owp,obits,lsb, 4, 13); lsb+=4; break;
case 'e': _vl_vsss_setbit(owp,obits,lsb, 4, 14); lsb+=4; break;
case 'f': _vl_vsss_setbit(owp,obits,lsb, 4, 15); lsb+=4; break;
case '_': break;
}
}
break;
}
default:
string msg = string("%%Error: Unknown _vl_vsscanf code: ")+pos[0]+"\n";
vl_fatal(__FILE__,__LINE__,"",msg.c_str());
break;
} // switch
got++;
// Reload data if non-wide (if wide, we put it in the right place directly)
if (obits <= VL_BYTESIZE) {
CData* p = va_arg(ap,CData*); *p = owp[0];
} else if (obits <= VL_SHORTSIZE) {
SData* p = va_arg(ap,SData*); *p = owp[0];
} else if (obits <= VL_WORDSIZE) {
IData* p = va_arg(ap,IData*); *p = owp[0];
} else if (obits <= VL_QUADSIZE) {
QData* p = va_arg(ap,QData*); *p = VL_SET_QW(owp);
}
}
} // switch
}
}
done:
return got;
}
//===========================================================================
@@ -228,6 +521,44 @@ void _VL_VINT_TO_STRING(int obits, char* destoutp, WDataInP sourcep) {
while (isspace(*(destp-1)) && destp>destoutp) *--destp = '\0'; // Drop trailing spaces
}
void _VL_STRING_TO_VINT(int obits, void* destp, int srclen, const char* srcp) {
// Convert C string to Verilog format
int bytes = VL_BYTES_I(obits);
char* op = ((char*)(destp));
if (srclen > bytes) srclen = bytes; // Don't overflow destination
int i;
for (i=0; i<srclen; i++) { *op++ = srcp[srclen-1-i]; }
for (; i<bytes; i++) { *op++ = 0; }
}
IData VL_FGETS_IXQ(int obits, void* destp, QData fpq) {
FILE* fp = VL_CVT_Q_FP(fpq);
if (VL_UNLIKELY(!fp)) return 0;
// The string needs to be padded with 0's in unused spaces in front of
// any read data. This means we can't know in what location the first
// character will finally live, so we need to copy. Yuk.
IData bytes = VL_BYTES_I(obits);
char buffer[VL_TO_STRING_MAX_WORDS*VL_WORDSIZE+1];
// V3Emit has static check that bytes < VL_TO_STRING_MAX_WORDS, but be safe
if (VL_UNLIKELY(bytes > VL_TO_STRING_MAX_WORDS*VL_WORDSIZE)) {
vl_fatal(__FILE__,__LINE__,"","Internal: fgets buffer overrun");
}
// We don't use fgets, as we must read \0s.
IData got = 0;
char* cp = buffer;
while (got < bytes) {
int c = getc(fp);
if (c==EOF) break;
*cp++ = c; got++;
if (c=='\n') break;
}
_VL_STRING_TO_VINT(obits, destp, got, buffer);
return got;
}
QData VL_FOPEN_QI(QData filename, IData mode) {
IData fnw[2]; VL_SET_WQ(fnw, filename);
return VL_FOPEN_WI(2, fnw, mode);
@@ -240,6 +571,67 @@ QData VL_FOPEN_WI(int fnwords, WDataInP filenamep, IData mode) {
return VL_CVT_FP_Q(fopen(filenamez,modez));
}
void VL_WRITEF(const char* formatp, ...) {
va_list ap;
va_start(ap,formatp);
string output;
_vl_vsformat(output, formatp, ap);
va_end(ap);
// Users can redefine VL_PRINTF if they wish.
VL_PRINTF("%s", output.c_str());
}
void VL_FWRITEF(QData fpq, const char* formatp, ...) {
FILE* fp = VL_CVT_Q_FP(fpq);
if (VL_UNLIKELY(!fp)) return;
va_list ap;
va_start(ap,formatp);
string output;
_vl_vsformat(output, formatp, ap);
va_end(ap);
fputs(output.c_str(), fp);
}
IData VL_FSCANF_IX(QData fpq, const char* formatp, ...) {
FILE* fp = VL_CVT_Q_FP(fpq);
if (VL_UNLIKELY(!fp)) return 0;
va_list ap;
va_start(ap,formatp);
IData got = _vl_vsscanf(fp, 0, NULL, formatp, ap);
va_end(ap);
return got;
}
IData VL_SSCANF_IIX(int lbits, IData ld, const char* formatp, ...) {
IData fnw[2]; VL_SET_WI(fnw, ld);
va_list ap;
va_start(ap,formatp);
IData got = _vl_vsscanf(NULL, lbits, fnw, formatp, ap);
va_end(ap);
return got;
}
IData VL_SSCANF_IQX(int lbits, QData ld, const char* formatp, ...) {
IData fnw[2]; VL_SET_WQ(fnw, ld);
va_list ap;
va_start(ap,formatp);
IData got = _vl_vsscanf(NULL, lbits, fnw, formatp, ap);
va_end(ap);
return got;
}
IData VL_SSCANF_IWX(int lbits, WDataInP lwp, const char* formatp, ...) {
va_list ap;
va_start(ap,formatp);
IData got = _vl_vsscanf(NULL, lbits, lwp, formatp, ap);
va_end(ap);
return got;
}
void VL_READMEM_Q(bool hex, int width, int depth, int array_lsb, int,
QData ofilename, void* memp, IData start, IData end) {
IData fnw[2]; VL_SET_WQ(fnw, ofilename);
@@ -276,7 +668,7 @@ void VL_READMEM_W(bool hex, int width, int depth, int array_lsb, int fnwords,
else if (c=='\t' || c==' ' || c=='\r' || c=='\f') { if (innum) reading_addr=false; innum=false; }
// Skip // comments and detect /* comments
else if (ignore_to_cmt && lastc=='*' && c=='/') {
ignore_to_cmt = false; if (innum) reading_addr=false; innum=false;
ignore_to_cmt = false; if (innum) reading_addr=false; innum=false;
} else if (!ignore_to_eol && !ignore_to_cmt) {
if (lastc=='/' && c=='*') { ignore_to_cmt = true; }
else if (lastc=='/' && c=='/') { ignore_to_eol = true; }
@@ -355,7 +747,7 @@ const char* Verilated::catName(const char* n1, const char* n2) {
// Used by symbol table creation to make module names
static char* strp = NULL;
static int len = -1;
int newlen = strlen(n1)+strlen(n2)+2;
int newlen = strlen(n1)+strlen(n2)+2;
if (newlen > len) {
if (strp) delete [] strp;
strp = new char[newlen];
+81 -56
View File
@@ -1,7 +1,7 @@
// $Id$ -*- C++ -*-
// -*- C++ -*-
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// Lesser General Public License or the Perl Artistic License.
//
@@ -9,7 +9,7 @@
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
// GNU General Public License for more details.
//
//
//*************************************************************************
///
/// \file
@@ -29,11 +29,11 @@
#include "verilatedos.h"
#include <assert.h>
#include <stdarg.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <cassert>
#include <cstdarg>
#include <cstdio>
#include <cstdlib>
#include <cstring>
#include <iostream>
using namespace std;
@@ -129,7 +129,7 @@ struct Verilated {
// Extern Vars
// Below two are used as bool, but having as uint32_t avoids conversion time
private:
static int s_randReset; ///< Random reset: 0=all 0s, 1=all 1s, 2=random
static int s_randReset; ///< Random reset: 0=all 0s, 1=all 1s, 2=random
static int s_debug; ///< See accessors... only when VL_DEBUG set
static bool s_calcUnusedSigs; ///< Waves file on, need all signals calculated
static bool s_gotFinish; ///< A $finish statement executed
@@ -152,7 +152,7 @@ public:
#endif
/// Internal: Create a new module name by concatenating two strings
static const char* catName(const char* n1, const char* n2); // Returns new'ed data
/// Enable calculation of unused signals
/// Enable calculation of unused signals
static void calcUnusedSigs(bool flag) { s_calcUnusedSigs=flag; }
static bool calcUnusedSigs() { return s_calcUnusedSigs; } ///< Return calcUnusedSigs value
/// Did the simulation $finish?
@@ -165,7 +165,7 @@ public:
/// Enable/disable assertions
static void assertOn(bool flag) { s_assertOn=flag; }
static bool assertOn() { return s_assertOn; }
};
};
//=========================================================================
// Extern functions -- User may override -- See verilated.cpp
@@ -179,21 +179,21 @@ extern void vl_fatal (const char* filename, int linenum, const char* hier,
const char* msg);
//=========================================================================
// Extern functions -- Init time only, so slow is fine
// Extern functions -- Slow path
extern IData VL_RANDOM_I(int obits); ///< Randomize a signal
extern QData VL_RANDOM_Q(int obits); ///< Randomize a signal
extern WDataOutP VL_RANDOM_W(int obits, WDataOutP outwp); ///< Randomize a signal
/// Init time only, so slow is fine
extern IData VL_RAND_RESET_I(int obits); ///< Random reset a signal
extern QData VL_RAND_RESET_Q(int obits); ///< Random reset a signal
extern WDataOutP VL_RAND_RESET_W(int obits, WDataOutP outwp); ///< Random reset a signal
extern WDataOutP VL_ZERO_RESET_W(int obits, WDataOutP outwp); ///< Zero reset a signal
/// Return string with formated Verilog value
extern const char* VL_VALUE_FORMATTED_W(int obits, char fmt, bool drop0, WDataInP lwp);
extern const char* VL_VALUE_FORMATTED_Q(int obits, char fmt, bool drop0, QData ld);
inline const char* VL_VALUE_FORMATTED_I(int obits, char fmt, bool drop0, IData ld) {
return VL_VALUE_FORMATTED_Q(obits,fmt,drop0,ld);
}
/// File I/O
extern IData VL_FGETS_IXQ(int sbits, void* strgp, QData fpq);
extern QData VL_FOPEN_WI(int fnwords, WDataInP ofilename, IData mode);
extern QData VL_FOPEN_QI(QData ofilename, IData mode);
inline QData VL_FOPEN_II(IData ofilename, IData mode) { return VL_FOPEN_QI(ofilename,mode); }
@@ -206,6 +206,14 @@ inline void VL_READMEM_I(bool hex, int width, int depth, int array_lsb, int fnwo
IData ofilename, void* memp, IData start, IData end) {
VL_READMEM_Q(hex, width,depth,array_lsb,fnwords, ofilename,memp,start,end); }
extern void VL_WRITEF(const char* formatp, ...);
extern void VL_FWRITEF(QData fpq, const char* formatp, ...);
extern IData VL_FSCANF_IX(QData fpq, const char* formatp, ...);
extern IData VL_SSCANF_IIX(int lbits, IData ld, const char* formatp, ...);
extern IData VL_SSCANF_IQX(int lbits, QData ld, const char* formatp, ...);
extern IData VL_SSCANF_IWX(int lbits, WDataInP lwp, const char* formatp, ...);
//=========================================================================
// Base macros
@@ -213,9 +221,12 @@ inline void VL_READMEM_I(bool hex, int width, int depth, int array_lsb, int fnwo
#define VL_BITISSET_I(data,bit) (data & (VL_UL(1)<<VL_BITBIT_I(bit)))
#define VL_BITISSET_Q(data,bit) (data & (VL_ULL(1)<<VL_BITBIT_Q(bit)))
#define VL_BITISSET_W(data,bit) (data[VL_BITWORD_I(bit)] & (VL_UL(1)<<VL_BITBIT_I(bit)))
#define VL_BITISSETLIMIT_W(data,width,bit) (((bit)<(width)) && data[VL_BITWORD_I(bit)] & (VL_UL(1)<<VL_BITBIT_I(bit)))
/// Create two 32-bit words from quadword
#define VL_SET_WQ(decl,data) { decl[0]=(data); decl[1]=((data)>>VL_WORDSIZE); }
#define VL_SET_WQ(owp,data) { owp[0]=(data); owp[1]=((data)>>VL_WORDSIZE); }
#define VL_SET_WI(owp,data) { owp[0]=(data); owp[1]=0; }
#define VL_SET_QW(lwp) ( ((QData)(lwp[0])) | ((QData)(lwp[1])<<((QData)(VL_WORDSIZE)) ))
// Use a union to avoid cast-to-different-size warnings
/// Return FILE* from QData
@@ -236,7 +247,7 @@ static inline QData VL_EXTENDSIGN_Q(int lbits, QData lhs) { return (-((lhs)&(VL
// Debugging prints
static inline void _VL_DEBUG_PRINT_W(int lbits, WDataInP iwp) {
printf(" Data: w%d: ", lbits);
printf(" Data: w%d: ", lbits);
for (int i=VL_WORDS_I(lbits)-1; i>=0; i--) { printf("%08x ",iwp[i]); }
printf("\n");
}
@@ -244,13 +255,17 @@ static inline void _VL_DEBUG_PRINT_W(int lbits, WDataInP iwp) {
//=========================================================================
// Pli macros
#ifndef VL_TIME_MULTIPLIER
# define VL_TIME_MULTIPLIER 1
#endif
/// Return current simulation time
#if defined(SYSTEMC_VERSION) && (SYSTEMC_VERSION>20011000)
# define VL_TIME_I(ign) ((IData)sc_time_stamp().to_default_time_units())
# define VL_TIME_Q(ign) ((QData)sc_time_stamp().to_default_time_units())
# define VL_TIME_I(ign) ((IData)(sc_time_stamp().to_default_time_units()*VL_TIME_MULTIPLIER))
# define VL_TIME_Q(ign) ((QData)(sc_time_stamp().to_default_time_units()*VL_TIME_MULTIPLIER))
#else
# define VL_TIME_I(ign) ((IData)sc_time_stamp())
# define VL_TIME_Q(ign) ((QData)sc_time_stamp())
# define VL_TIME_I(ign) ((IData)(sc_time_stamp()*VL_TIME_MULTIPLIER))
# define VL_TIME_Q(ign) ((QData)(sc_time_stamp()*VL_TIME_MULTIPLIER))
extern double sc_time_stamp();
#endif
@@ -344,35 +359,45 @@ static inline void VL_ASSIGNBIT_WO(int, int bit, WDataOutP owp, IData) {
//===================================================================
// SYSTEMC OPERATORS
// Copying verilog format to/from systemc integers and bit vectors.
#define VL_ASSIGN_IS(obits,vvar,svar) { (vvar) = VL_CLEAN_II((obits),(obits),(svar).read()); }
#define VL_ASSIGN_SI(obits,svar,vvar) { (svar).write(vvar); }
// Copying verilog format to systemc integers and bit vectors.
#define VL_ASSIGN_ISI(obits,vvar,svar) { (vvar) = VL_CLEAN_II((obits),(obits),(svar).read()); }
#define VL_ASSIGN_QSQ(obits,vvar,svar) { (vvar) = VL_CLEAN_QQ((obits),(obits),(svar).read()); }
#define VL_ASSIGN_ISW(obits,od,svar) { \
od = (svar.read().get_word(0)) & VL_MASK_I(obits); \
}
#define VL_ASSIGN_QSW(obits,od,svar) { \
od = (((QData)svar.read().get_word(1))<<VL_WORDSIZE | svar.read().get_word(0)) \
& VL_MASK_Q(obits); \
}
#define VL_ASSIGN_WSW(obits,owp,svar) { \
int words = VL_WORDS_I(obits); \
for (int i=0; i < words; i++) owp[i] = svar.read().get_word(i); \
owp[words-1] &= VL_MASK_I(obits); \
}
// Copying verilog format from systemc integers and bit vectors.
#define VL_ASSIGN_SII(obits,svar,vvar) { (svar).write(vvar); }
#define VL_ASSIGN_SQQ(obits,svar,vvar) { (svar).write(vvar); }
#define VL_ASSIGN_SQ(obits,svar,rd) { \
#define VL_ASSIGN_SWI(obits,svar,rd) { \
sc_bv<obits> _bvtemp; \
_bvtemp.set_word(0,rd); \
svar.write(_bvtemp); \
}
#define VL_ASSIGN_SWQ(obits,svar,rd) { \
sc_bv<obits> _bvtemp; \
_bvtemp.set_word(0,rd); \
_bvtemp.set_word(1,rd>>VL_WORDSIZE); \
svar.write(_bvtemp); \
}
#define VL_ASSIGN_QS(obits,od,svar) { \
od = (((QData)svar.read().get_word(1))<<VL_WORDSIZE | svar.read().get_word(0)) \
& VL_MASK_Q(obits); \
}
#define VL_ASSIGN_SW(obits,svar,rwp) { \
#define VL_ASSIGN_SWW(obits,svar,rwp) { \
sc_bv<obits> _bvtemp; \
for (int i=0; i < VL_WORDS_I(obits); i++) _bvtemp.set_word(i,rwp[i]); \
svar.write(_bvtemp); \
}
#define VL_ASSIGN_WS(obits,owp,svar) { \
int words = VL_WORDS_I(obits); \
for (int i=0; i < words; i++) owp[i] = svar.read().get_word(i); \
owp[words-1] &= VL_MASK_I(obits); \
}
//===================================================================
// Extending sizes
@@ -878,7 +903,7 @@ static inline IData VL_POW_III(int, int, int rbits, IData lhs, IData rhs) {
return out;
}
#define VL_POW_QQI(obits,lbits,rbits,lhs,rhs) VL_POW_QQQ(obits,lbits,rbits,lhs,rhs)
#define VL_POW_QQI(obits,lbits,rbits,lhs,rhs) VL_POW_QQQ(obits,lbits,rbits,lhs,rhs)
static inline QData VL_POW_QQQ(int, int, int rbits, QData lhs, QData rhs) {
if (lhs==0) return 0;
@@ -896,23 +921,23 @@ static inline QData VL_POW_QQQ(int, int, int rbits, QData lhs, QData rhs) {
// INTERNAL: Stuff LHS bit 0++ into OUTPUT at specified offset
// ld may be "dirty", output is clean
static inline void _VL_INSERT_II(int, CData& lhsr, IData ld, int hbit, int lbit) {
static inline void _VL_INSERT_II(int, CData& lhsr, IData ld, int hbit, int lbit) {
IData insmask = (VL_MASK_I(hbit-lbit+1))<<lbit;
lhsr = (lhsr & ~insmask) | ((ld<<lbit) & insmask);
}
static inline void _VL_INSERT_II(int, SData& lhsr, IData ld, int hbit, int lbit) {
static inline void _VL_INSERT_II(int, SData& lhsr, IData ld, int hbit, int lbit) {
IData insmask = (VL_MASK_I(hbit-lbit+1))<<lbit;
lhsr = (lhsr & ~insmask) | ((ld<<lbit) & insmask);
}
static inline void _VL_INSERT_II(int, IData& lhsr, IData ld, int hbit, int lbit) {
static inline void _VL_INSERT_II(int, IData& lhsr, IData ld, int hbit, int lbit) {
IData insmask = (VL_MASK_I(hbit-lbit+1))<<lbit;
lhsr = (lhsr & ~insmask) | ((ld<<lbit) & insmask);
}
static inline void _VL_INSERT_QQ(int, QData& lhsr, QData ld, int hbit, int lbit) {
static inline void _VL_INSERT_QQ(int, QData& lhsr, QData ld, int hbit, int lbit) {
QData insmask = (VL_MASK_Q(hbit-lbit+1))<<lbit;
lhsr = (lhsr & ~insmask) | ((ld<<lbit) & insmask);
}
static inline void _VL_INSERT_WI(int, WDataOutP owp, IData ld, int hbit, int lbit) {
static inline void _VL_INSERT_WI(int, WDataOutP owp, IData ld, int hbit, int lbit) {
int hoffset = VL_BITBIT_I(hbit);
int loffset = VL_BITBIT_I(lbit);
if (hoffset==VL_SIZEBITS_I && loffset==0) {
@@ -937,7 +962,7 @@ static inline void _VL_INSERT_WI(int, WDataOutP owp, IData ld, int hbit, int lbi
// INTERNAL: Stuff large LHS bit 0++ into OUTPUT at specified offset
// lwp may be "dirty"
static inline void _VL_INSERT_WW(int, WDataOutP owp, WDataInP lwp, int hbit, int lbit) {
static inline void _VL_INSERT_WW(int, WDataOutP owp, WDataInP lwp, int hbit, int lbit) {
int hoffset = hbit & VL_SIZEBITS_I;
int loffset = lbit & VL_SIZEBITS_I;
int lword = VL_BITWORD_I(lbit);
@@ -983,7 +1008,7 @@ static inline void _VL_INSERT_WW(int, WDataOutP owp, WDataInP lwp, int hbit, int
}
}
static inline void _VL_INSERT_WQ(int obits, WDataOutP owp, QData ld, int hbit, int lbit) {
static inline void _VL_INSERT_WQ(int obits, WDataOutP owp, QData ld, int hbit, int lbit) {
WData lwp[2]; VL_SET_WQ(lwp,ld);
_VL_INSERT_WW(obits,owp,lwp,hbit,lbit);
}
@@ -1263,7 +1288,7 @@ static inline QData VL_SEL_QWII(int, int lbits, int, int, WDataInP lwp, IData ls
static inline WDataOutP VL_SEL_WWII(int obits,int lbits,int,int,WDataOutP owp,WDataInP lwp, IData lsb, IData width) {
int msb = lsb+width-1;
int word_shift = VL_BITWORD_I(lsb);
if (msb>lbits) { // Outside bounds,
if (msb>lbits) { // Outside bounds,
for (int i=0; i<VL_WORDS_I(obits)-1; i++) owp[i] = ~0;
owp[VL_WORDS_I(obits)-1] = VL_MASK_I(obits);
} else if (VL_BITBIT_I(lsb)==0) {
@@ -1360,32 +1385,32 @@ static inline WDataOutP VL_CONST_W_3X(int obits, WDataOutP o,
o[0]=d0; o[1]=d1; o[2]=d2;
_END(obits,3); }
#define VL_HAVE_CONST_W_4X
static inline WDataOutP VL_CONST_W_4X(int obits, WDataOutP o,
static inline WDataOutP VL_CONST_W_4X(int obits, WDataOutP o,
I d3,I d2,I d1,I d0) {
o[0]=d0; o[1]=d1; o[2]=d2; o[3]=d3;
_END(obits,4); }
#define VL_HAVE_CONST_W_5X
static inline WDataOutP VL_CONST_W_5X(int obits, WDataOutP o,
static inline WDataOutP VL_CONST_W_5X(int obits, WDataOutP o,
I d4,I d3,I d2,I d1,I d0) {
o[0]=d0; o[1]=d1; o[2]=d2; o[3]=d3; o[4]=d4;
_END(obits,5); }
#define VL_HAVE_CONST_W_6X
static inline WDataOutP VL_CONST_W_6X(int obits, WDataOutP o,
static inline WDataOutP VL_CONST_W_6X(int obits, WDataOutP o,
I d5,I d4,I d3,I d2,I d1,I d0) {
o[0]=d0; o[1]=d1; o[2]=d2; o[3]=d3; o[4]=d4; o[5]=d5;
_END(obits,6); }
#define VL_HAVE_CONST_W_7X
static inline WDataOutP VL_CONST_W_7X(int obits, WDataOutP o,
static inline WDataOutP VL_CONST_W_7X(int obits, WDataOutP o,
I d6,I d5,I d4,I d3,I d2,I d1,I d0) {
o[0]=d0; o[1]=d1; o[2]=d2; o[3]=d3; o[4]=d4; o[5]=d5; o[6]=d6;
_END(obits,7); }
#define VL_HAVE_CONST_W_8X
static inline WDataOutP VL_CONST_W_8X(int obits, WDataOutP o,
static inline WDataOutP VL_CONST_W_8X(int obits, WDataOutP o,
I d7,I d6,I d5,I d4,I d3,I d2,I d1,I d0) {
o[0]=d0; o[1]=d1; o[2]=d2; o[3]=d3; o[4]=d4; o[5]=d5; o[6]=d6; o[7]=d7;
_END(obits,8); }
#define VL_HAVE_CONST_W_9X
static inline WDataOutP VL_CONST_W_9X(int obits, WDataOutP o,
static inline WDataOutP VL_CONST_W_9X(int obits, WDataOutP o,
I d8,
I d7,I d6,I d5,I d4,I d3,I d2,I d1,I d0) {
o[0]=d0; o[1]=d1; o[2]=d2; o[3]=d3; o[4]=d4; o[5]=d5; o[6]=d6; o[7]=d7;
+12 -11
View File
@@ -1,8 +1,8 @@
# $Id$ -*- Makefile -*-
# -*- Makefile -*-
######################################################################
# DESCRIPTION: Makefile commands for all verilated target files
#
# Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
# Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# Lesser General Public License or the Perl Artistic License.
######################################################################
@@ -28,6 +28,7 @@ VK_CPPFLAGS_ALWAYS += \
-I$(VERILATOR_ROOT)/include \
-DVL_PRINTF=printf \
-DVM_TRACE=$(VM_TRACE) \
-DVM_COVERAGE=$(VM_COVERAGE) \
ifeq ($(VERILATOR_AUTHOR_SITE),1) # Local... Else don't burden users
VK_CPPFLAGS_WALL += -Wall \
@@ -44,7 +45,7 @@ CPPFLAGS += -I. $(VK_CPPFLAGS_ALWAYS) $(VK_CPPFLAGS_WALL)
VPATH += ..
VPATH += $(VERILATOR_ROOT)/include
#OPT = -ggdb -DPRINTINITSTR -DDETECTCHANGE
#OPT = -ggdb -DPRINTINITSTR -DDETECTCHANGE
#OPT = -ggdb -DPRINTINITSTR
CPPFLAGS += $(OPT)
@@ -59,11 +60,11 @@ LDFLAGS += $(USER_LDFLAGS)
# See the benchmarking section of bin/verilator.
# Support class optimizations. This includes the tracing and symbol table.
# SystemC takes minutes to optimize, thus it is off by default.
#OPT_SLOW =
#OPT_SLOW =
# Fast path optimizations. Most time is spent in these classes.
#OPT_FAST = -O2 -fstrict-aliasing
#OPT_FAST = -O
#OPT_FAST =
#OPT_FAST =
#######################################################################
##### Aggregates
@@ -88,8 +89,8 @@ endif
##### SystemPerl builds
ifeq ($(VM_SP),1)
CPPFLAGS += -I$(SYSTEMPERL)/src -DSYSTEMPERL
VPATH += $(SYSTEMPERL)/src
CPPFLAGS += -I$(SYSTEMPERL_INCLUDE) -DSYSTEMPERL
VPATH += $(SYSTEMPERL_INCLUDE)
LIBS += -lm -lstdc++
VK_CLASSES_SP = $(addsuffix .sp, $(VM_CLASSES))
@@ -109,8 +110,8 @@ endif
ifeq ($(VM_SC),1)
LIBS += -lm -lstdc++
ifeq ($(VM_TRACE),1)
CPPFLAGS += -I$(SYSTEMPERL)/src
VPATH += $(SYSTEMPERL)/src
CPPFLAGS += -I$(SYSTEMPERL_INCLUDE)
VPATH += $(SYSTEMPERL_INCLUDE)
endif
endif
@@ -120,8 +121,8 @@ endif
ifeq ($(VM_PCLI),1)
LIBS += -lm -lstdc++
ifeq ($(VM_TRACE),1)
CPPFLAGS += -I$(SYSTEMPERL)/src
VPATH += $(SYSTEMPERL)/src
CPPFLAGS += -I$(SYSTEMPERL_INCLUDE)
VPATH += $(SYSTEMPERL_INCLUDE)
endif
endif
+4 -4
View File
@@ -1,11 +1,11 @@
// $Id$ -*- C++ -*-
// -*- C++ -*-
//*************************************************************************
//
// Code available from: http://www.veripool.org/verilator
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// Lesser General Public License or the Perl Artistic License.
//
@@ -13,7 +13,7 @@
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
// GNU General Public License for more details.
//
//
//=========================================================================
//
// DESCRIPTION: Verilator: Include in verilog files to hide verilator defines
@@ -25,7 +25,7 @@
`ifdef verilator `else
`define coverage_block_off
`endif
// Hide file descriptor difference
`ifdef verilator
`define verilator_file_descriptor reg [63:0]
+14 -10
View File
@@ -1,7 +1,7 @@
// $Id$ -*- C++ -*-
// -*- C++ -*-
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// Lesser General Public License or the Perl Artistic License.
//
@@ -9,7 +9,7 @@
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
// GNU General Public License for more details.
//
//
//*************************************************************************
///
/// \file
@@ -84,36 +84,40 @@ typedef unsigned char vluint8_t; ///< 8-bit unsigned type
typedef unsigned short int vluint16_t; ///< 16-bit unsigned type
typedef long vlsint32_t; ///< 32-bit signed type
typedef unsigned long vluint32_t; ///< 32-bit unsigned type
typedef long long vlsint64_t; ///< 64-bit signed type
typedef long long vlsint64_t; ///< 64-bit signed type
typedef unsigned long long vluint64_t; ///< 64-bit unsigned type
#elif defined(_WIN32) && !defined(__MINGW32__)
#elif defined(_WIN32) && defined(_MSC_VER)
typedef unsigned char uint8_t; ///< 8-bit unsigned type (backward compatibility)
typedef unsigned short int uint16_t; ///< 16-bit unsigned type (backward compatibility)
typedef unsigned long uint32_t; ///< 32-bit unsigned type (backward compatibility)
typedef unsigned int uint32_t; ///< 32-bit unsigned type (backward compatibility)
typedef unsigned char vluint8_t; ///< 8-bit unsigned type
typedef unsigned short int vluint16_t; ///< 16-bit unsigned type
typedef int vlsint32_t; ///< 32-bit signed type
typedef int vlsint32_t; ///< 32-bit signed type
typedef unsigned int vluint32_t; ///< 32-bit unsigned type
typedef __int64 vlsint64_t; ///< 64-bit signed type
typedef __int64 vlsint64_t; ///< 64-bit signed type
typedef unsigned __int64 vluint64_t; ///< 64-bit unsigned type
#else // Linux or compliant Unix flavors, -m64
# include <stdint.h> // Linux and most flavors
# include <inttypes.h> // Solaris
typedef uint8_t vluint8_t; ///< 32-bit unsigned type
typedef uint16_t vluint16_t; ///< 32-bit unsigned type
typedef int vlsint32_t; ///< 32-bit signed type
typedef int vlsint32_t; ///< 32-bit signed type
typedef uint32_t vluint32_t; ///< 32-bit signed type
typedef long long vlsint64_t; ///< 64-bit signed type
typedef long long vlsint64_t; ///< 64-bit signed type
typedef unsigned long long vluint64_t; ///< 64-bit unsigned type
#endif
//=========================================================================
// Integer size macros
#define VL_BYTESIZE 8 ///< Bits in a byte
#define VL_SHORTSIZE 16 ///< Bits in a short
#define VL_WORDSIZE 32 ///< Bits in a word
#define VL_QUADSIZE 64 ///< Bits in a quadword
#define VL_WORDSIZE_LOG2 5 ///< log2(VL_WORDSIZE)
/// Bytes this number of bits needs (1 bit=1 byte)
#define VL_BYTES_I(nbits) (((nbits)+(VL_BYTESIZE-1))/VL_BYTESIZE)
/// Words this number of bits needs (1 bit=1 word)
#define VL_WORDS_I(nbits) (((nbits)+(VL_WORDSIZE-1))/VL_WORDSIZE)
+1 -1
View File
@@ -115,7 +115,7 @@ fi
if [ x"$dir_arg" != x ]; then
dst=$src
src=""
if [ -d $dst ]; then
instcmd=:
else
-2
View File
@@ -4,8 +4,6 @@
# Created: 1993-05-16
# Public domain
# $Id:$
errstatus=0
for file
+73
View File
@@ -0,0 +1,73 @@
#!/usr/bin/perl -w
######################################################################
#
# Copyright 2007-2009 by Wilson Snyder.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of either the GNU General Public License or the
# Perl Artistic License.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the Perl Artistic License
# along with this module; see the file COPYING. If not, see
# www.cpan.org
#
######################################################################
# DESCRIPTION: Diff bison files
use IO::File;
use strict;
my $Debug;
diff($ARGV[0],$ARGV[1]);
sub diff {
my $a=shift;
my $b=shift;
my $ta = "/tmp/bisondiff.$$.a";
my $tb = "/tmp/bisondiff.$$.b";
prep($a,$ta);
prep($b,$tb);
system("diff -u -w $ta $tb");
}
sub prep {
my $filename = shift;
my $wfilename = shift;
my $fh = IO::File->new("<$filename") or die "%Error: $! $filename";
my $fho = IO::File->new(">$wfilename") or die "%Error: $! writing $wfilename";
my %declared;
my %used;
my $body = 0;
my $rule = "";
my $skip = 1;
while (defined(my $line = $fh->getline)) {
if ($skip == 1) {
next if $line !~ /%token/;
$skip = 2;
}
# %type<foo>
$line =~ s/^(%\S+)<(\S+)>/$1/;
# rule<foo>
$line =~ s/^([a-zA-Z0-9_]+)<\S+>:/$1:/;
# Productions
$line =~ s/[ \t]{[^}]*?}/\t{}/g;
$fho->print($line);
}
}
# Local Variables:
# compile-command: "./bisondiff $WUP/Verilog/Parser/VParseBison.y ../src/verilog.y"
# End:
+7 -8
View File
@@ -1,22 +1,21 @@
#!/usr/bin/perl -w
#$Id$
######################################################################
#
# Copyright 2007-2008 by Wilson Snyder.
# Copyright 2007-2009 by Wilson Snyder.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of either the GNU General Public License or the
# Perl Artistic License.
#
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
#
# You should have received a copy of the Perl Artistic License
# along with this module; see the file COPYING. If not, see
# www.cpan.org
#
#
######################################################################
# DESCRIPTION: Debugging of bison output
@@ -43,8 +42,8 @@ foreach my $line (<STDIN>) {
$rule .= $line;
if ($line =~ m!^\s*;\s*$!) {
#print "Rule: $rule\n";
($rule =~ /^([a-zA-Z0-9_]+):(.*)$/) or die "%Error: No rule name: $1\n";
my $rulename = $1; my $preaction = $2;
($rule =~ /^([a-zA-Z0-9_]+)(<\S+>)?:(.*)$/) or die "%Error: No rule name: $1\n";
my $rulename = $1; my $preaction = $3;
$declared{$rulename} = $lineno;
$preaction =~ s/\{[^\}]*\}/ /g;
#print "RULEN $rulename PA $preaction\n" if $Debug;
@@ -63,5 +62,5 @@ foreach my $line (<STDIN>) {
}
# Local Variables:
# compile-command: "./bisonreader < verilog.y"
# compile-command: "./bisonreader < ../src/verilog.y"
# End:
+3 -16
View File
@@ -1,17 +1,5 @@
#!/usr/bin/perl -w
# $Id$
######################################################################
#
# Copyright 2005-2008 by Wilson Snyder <[email protected]>. This
# program is free software; you can redistribute it and/or modify it under
# the terms of either the GNU Lesser General Public License or the Perl
# Artistic License.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# See copyright, etc in below POD section.
######################################################################
require 5.006_001;
@@ -50,7 +38,6 @@ cwrite ("graph_export.cpp");
#----------------------------------------------------------------------
sub usage {
print '$Id$ ', "\n";
pod2usage(-verbose=>2, -exitval => 2);
exit (1);
}
@@ -120,7 +107,7 @@ sub cwrite {
foreach my $edge (@Edges) {
$fh->printf(" new V3GraphEdge(gp, %s, %s, %s, %s);\n",
$edge->{from}, $edge->{to},
$edge->{weight}, $edge->{cutable}?"true":"false");
$edge->{weight}, $edge->{cutable}?"true":"false");
}
$fh->print("}\n");
}
@@ -156,7 +143,7 @@ Displays this message and program version and exits.
=head1 DISTRIBUTION
Copyright 2005-2008 by Wilson Snyder. This package is free software; you
Copyright 2005-2009 by Wilson Snyder. This package is free software; you
can redistribute it and/or modify it under the terms of either the GNU
Lesser General Public License or the Perl Artistic License.
+3 -16
View File
@@ -1,17 +1,5 @@
#!/usr/bin/perl -w
# $Id$
######################################################################
#
# Copyright 2005-2008 by Wilson Snyder <[email protected]>. This
# program is free software; you can redistribute it and/or modify it under
# the terms of either the GNU Lesser General Public License or the Perl
# Artistic License.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# See copyright, etc in below POD section.
######################################################################
require 5.006_001;
@@ -55,7 +43,6 @@ dotwrite();
#----------------------------------------------------------------------
sub usage {
print '$Id$ ', "\n";
pod2usage(-verbose=>2, -exitval => 2);
exit (1);
}
@@ -175,7 +162,7 @@ __END__
=head1 NAME
dot_pruner -
dot_pruner -
=head1 SYNOPSIS
@@ -197,7 +184,7 @@ Displays this message and program version and exits.
=head1 DISTRIBUTION
Copyright 2005-2008 by Wilson Snyder. This package is free software; you
Copyright 2005-2009 by Wilson Snyder. This package is free software; you
can redistribute it and/or modify it under the terms of either the GNU
Lesser General Public License or the Perl Artistic License.
+58
View File
@@ -0,0 +1,58 @@
#!/usr/bin/perl -w
# See copyright, etc in below POD section.
######################################################################
require 5.006_001;
use strict;
#======================================================================
# main
delete $ENV{MODULE_VERSION};
_setup_modules();
module('add','cadence_verif');
exec('iccr',@ARGV);
#######################################################################
# Modules package
sub _setup_modules {
# Load the 'module' command into the environment
my $init = "/sicortex/$ENV{DIRPROJECT_ARCH}/lib/Modules/default/init/perl";
(-f $init) or die "%Error: Script not found: $init,";
require $init;
}
#######################################################################
__END__
=pod
=head1 NAME
invoke_iccr - Invoke tool under "modules" command
=head1 SYNOPSIS
invoke_iccr {ncv arguments}
=head1 DESCRIPTION
=head1 DISTRIBUTION
Copyright 2007-2009 by Wilson Snyder. This package is free software; you
can redistribute it and/or modify it under the terms of either the GNU
Lesser General Public License or the Perl Artistic License.
=head1 AUTHORS
Wilson Snyder <[email protected]>
=head1 SEE ALSO
=cut
######################################################################
### Local Variables:
### compile-command: "./invoke_iccr -help"
### End:
+2 -14
View File
@@ -1,17 +1,5 @@
#!/usr/bin/perl -w
# $Id$
######################################################################
#
# Copyright 2007-2008 by Wilson Snyder <[email protected]>. This
# program is free software; you can redistribute it and/or modify it under
# the terms of either the GNU Lesser General Public License or the Perl
# Artistic License.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# See copyright, etc in below POD section.
######################################################################
require 5.006_001;
@@ -52,7 +40,7 @@ invoke_ncverilog - Invoke tool under "modules" command
=head1 DISTRIBUTION
Copyright 2007-2008 by Wilson Snyder. This package is free software; you
Copyright 2007-2009 by Wilson Snyder. This package is free software; you
can redistribute it and/or modify it under the terms of either the GNU
Lesser General Public License or the Perl Artistic License.
+4
View File
@@ -0,0 +1,4 @@
export GLIBCPP_FORCE_NEW=1
compile with -DVL_LEAK_CHECKS
valgrind --tool=memcheck --leak-check=yes /home/wsnyder/src/verilator/v4/verilator/verilator_bin_dbg -MMD --bin /home/wsnyder/src/verilator/v4/verilator/verilator_bin_dbg --cc -f /home/wsnyder/src/verilator/v4/verilator/test_c/../test_v/input.vc top.v --no-skip-identical 2>&1 | tee ~/d/aa
valgrind --tool=memcheck --leak-check=yes /home/wsnyder/src/verilator/v4/verilator/verilator_bin_dbg -MMD --bin /home/wsnyder/src/verilator/v4/verilator/verilator_bin_dbg --cc /home/wsnyder/src/verilator/v4/verilator/test_regress/t/t_case_huge.v --no-skip-identical -I/home/wsnyder/src/verilator/v4/verilator/test_regress/t 2>&1 | tee ~/d/aa
+4 -17
View File
@@ -1,17 +1,5 @@
#!/usr/bin/perl -w
# $Id$
######################################################################
#
# Copyright 2005-2008 by Wilson Snyder <[email protected]>. This
# program is free software; you can redistribute it and/or modify it under
# the terms of either the GNU Lesser General Public License or the Perl
# Artistic License.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# See copyright, etc in below POD section.
######################################################################
require 5.006_001;
@@ -52,7 +40,6 @@ print '(query-replace-regexp "(\\([0-9a-z_]+\\))" "\\1" nil nil nil)',"\n";
#----------------------------------------------------------------------
sub usage {
print '$Id$ ', "\n";
pod2usage(-verbose=>2, -exitval => 2);
exit (1);
}
@@ -292,7 +279,7 @@ sub p_var {
}
p "\t";
{
local $Avoid_Hex=1;
local $Avoid_Hex=1;
t1;
}
p "\t";
@@ -322,7 +309,7 @@ __END__
=head1 NAME
vtree_importer -
vtree_importer -
=head1 SYNOPSIS
@@ -344,7 +331,7 @@ Displays this message and program version and exits.
=head1 DISTRIBUTION
Copyright 2005-2008 by Wilson Snyder. This package is free software; you
Copyright 2005-2009 by Wilson Snyder. This package is free software; you
can redistribute it and/or modify it under the terms of either the GNU
Lesser General Public License or the Perl Artistic License.
+15 -15
View File
@@ -1,6 +1,5 @@
\input texinfo @c -*-texinfo-*-
@c %**start of header
$c $Id$
@setfilename readme.info
@settitle Verilator Installation
@c %**end of header
@@ -15,19 +14,19 @@ $c $Id$
This is the Verilator Package.
@menu
* Copyright::
* Description::
* Obtaining Distribution::
* Directory Structure::
* Supported Systems::
* Installation::
* Limitations::
* Copyright::
* Description::
* Obtaining Distribution::
* Directory Structure::
* Supported Systems::
* Installation::
* Limitations::
@end menu
@node Copyright, Description, Top, Top
@section Copyright
This package is Copyright 2003-2008 by Wilson Snyder @email{wsnyder@@wsnyder.org}.
This package is Copyright 2003-2009 by Wilson Snyder @email{wsnyder@@wsnyder.org}.
You may distribute under the terms of either the GNU General Public License
or the Artistic License, as specified in the Perl README file.
@@ -56,11 +55,11 @@ The resulting executable will perform the actual simulation.
@node Obtaining Distribution, Directory Structure, Description, Top
@section Obtaining Distribution
The latest version is available at
The latest version is available at
@uref{http://www.veripool.org/verilator}
Download the latest package from that site, and decompress.
@samp{gunzip verilator_version.tar.gz ; tar xvf verilator_version.tar}
@samp{tar xvzf verilator_version.tgz}
@node Directory Structure, Supported Systems, Obtaining Distribution, Top
@section Directory Structure
@@ -117,8 +116,9 @@ If you will be using SystemC, download and install Verilog-Perl,
If you will be using SystemC, download and install System-Perl,
@url{http://search.cpan.org/search?module=SystemC::Netlist}. Note
you'll need to set a @samp{SYSTEMPERL} environment variable to point
to the downloaded kit (not the installed files.) Also, make sure to
do a @code{make sc_patch}.
to the downloaded kit. Optionally also set @samp{SYSTEMPERL_INCLUDE}
to point to the installed headers. Also, make sure to do a @code{make
sc_patch}.
@item
@code{cd} to the Verilator directory containing this README.
@@ -129,8 +129,8 @@ Type @samp{./configure} to configure Verilator for your system.
If you are configuring Verilator to be part of a RPM or other
distribution package system, you may want to use the --enable-defenv
configure flag. This will take the current value of VERILATOR_ROOT,
SYSTEMC, SYSTEMC_ARCH, and SYSTEMPERL and build them as defaults into
the executable.
SYSTEMC, SYSTEMC_ARCH, SYSTEMPERL, and SYSTEMPERL_INCLUDE and build
them as defaults into the executable.
@item
Type @samp{make} to compile Verilator.
+1
View File
@@ -1,3 +1,4 @@
*~
*.old
config_build.h
Makefile
+70
View File
@@ -0,0 +1,70 @@
=pod
=head1 NAME
Verilator Source Code Notes
=head1 INTRODUCTION
See also the Verilator internals presentation at http://www.veripool.org.
=head1 VISITOR FUNCTIONS
=head2 Passing Variables
There's three ways data is passed between visitor functions.
1. A visitor-class member variable. This is generally for passing "parent"
information down to children. m_modp is a common example. It's set to
NULL in the constructor, where that node (AstModule visitor) sets it, then
the children are iterated, then it's cleared. Children under an AstModule
will see it set, while nodes elsewhere will see it clear. If there can be
nested items (for example an AstFor under an AstFor) the variable needs to
be save-set-restored in the AstFor visitor, otherwise exiting the lower for
will loose the upper for's setting.
2. User() attributes. Each node has 4 ->user() number or ->userp() pointer
utility values (a common technique lifted from graph traversal packages).
A visitor first clears the one it wants to use by calling
AstNode::user#ClearTree(), then it can mark any node's user() with whatever
data it wants. Readers just call nodep->user(), but may need to cast
appropriately, so you'll often see nodep->userp()->castSOMETYPE(). At the
top of each visitor are comments describing how the user() stuff applies to
that visitor class. For example:
// NODE STATE
// Cleared entire netlist
// AstModule::user1p() // bool. True to inline this module
This says that at the AstNetlist user1ClearTree() is called. Each
AstModule's is user1() is used to indicate if we're going to inline it.
These comments are important to make sure a user#() on a given AstNode type
is never being used for two different purposes.
Note that calling user#ClearTree is fast, it doesn't walk the tree, so it's
ok to call fairly often. For example, it's commonly called on every
module.
3. Parameters can be passed between the visitors in close to the "normal"
function caller to callee way. This is the second "vup" parameter that is
ignored on most of the visitor functions. V3Width does this, but it proved
more messy than the above and is deprecated. (V3Width was nearly the first
module written. Someday this scheme may be removed, as it slows the
program down to have to pass vup everywhere.)
=head1 DEBUGGING WITH GDB
The test_regress/driver.pl script accepts --gdb to start Verilator under
gdb.
To break at a specific edit number which changed a node (presumably to find
what made a <e####> line in the tree dumps):
watch AstNode::s_editCntGbl==####
=head1 DISTRIBUTION
Copyright 2008-2009 by Wilson Snyder. This program is free software; you
can redistribute it and/or modify it under the terms of either the GNU
General Public License or the Perl Artistic License.
+9 -5
View File
@@ -1,4 +1,4 @@
# $Id$ */
# -*- Makefile -*-
#*****************************************************************************
#
# DESCRIPTION: Verilator: Makefile for verilog source
@@ -7,7 +7,7 @@
#
#*****************************************************************************
#
# Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
# Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# General Public License or the Perl Artistic License.
#
@@ -40,12 +40,16 @@ export OBJCACHE_HOSTS := $(shell rschedule --no-allow-reserved --similar hostnam
endif
ifeq ($(OBJCACHE_HOSTS),)
export OBJCACHE :=
export OBJCACHE :=
else
export OBJCACHE_JOBS := -j $(shell objcache --jobs "$(OBJCACHE_HOSTS)")
export OBJCACHE := @objcache --read --write
endif
UNDER_GIT = $(wildcard ../.git)
#*********************************************************************
obj_opt:
mkdir $@
obj_dbg:
@@ -71,10 +75,10 @@ dbg: ../verilator_bin_dbg
prefiles::
ifeq ($(VERILATOR_AUTHOR_SITE),1) # Local... Else don't burden users
ifneq ($(UNDER_GIT),) # If local git tree... Else don't burden users
prefiles:: config_rev.h
# This output goes into srcdir, as we need to distribute it as part of the kit.
config_rev.h: config_rev.pl .svn/entries
config_rev.h: config_rev.pl ../.git/index
$(PERL) config_rev.pl . >$@
endif
+27 -19
View File
@@ -1,4 +1,4 @@
# $Id$ -*- Makefile -*-
# -*- Makefile -*-
#*****************************************************************************
#
# DESCRIPTION: Verilator: Makefile for verilog source
@@ -7,7 +7,7 @@
#
#*****************************************************************************
#
# Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
# Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
# redistribute it and/or modify it under the terms of either the GNU
# General Public License or the Perl Artistic License.
#
@@ -23,14 +23,14 @@
srcdir = ..
incdir = ../../include
PERL = @PERL@
# Programs
CC = @CC@
CXX = @CXX@
LINK = @CXX@
LDFLAGS += @LDFLAGS@
CFG_WITH_DEFENV = @CFG_WITH_DEFENV@
LEX = @LEX@
LFLAGS = -d
PERL = @PERL@
YACC = @YACC@
prefix = @prefix@
@@ -41,6 +41,11 @@ datarootdir = @datarootdir@
# Generally ${prefix}/share/verilator
pkgdatadir = @pkgdatadir@
# Compile options
CFG_WITH_DEFENV = @CFG_WITH_DEFENV@
CPPFLAGSNOWALL += @CPPFLAGS@
LDFLAGS += @LDFLAGS@
#### End of system configuration section. ####
VPATH += . $(srcdir)
@@ -59,17 +64,12 @@ COPT = -ggdb -DVL_DEBUG
endif
#################
LEX = @LEX@
LFLAGS = -d
YACC = @YACC@
YFLAGS = -y -d -v
#LIBS += -ldl
#CCMALLOC = /usr/local/lib/ccmalloc-gcc.o -lccmalloc -ldl
LIBS = -lm -lfl
CPPFLAGSNOWALL = -MMD
CPPFLAGSNOWALL += -MMD
CPPFLAGSNOWALL += -I. -I$(srcdir) -I$(incdir)
CPPFLAGSNOWALL += -DYYDEBUG # Required to get nice error messages
#CPPFLAGSNOWALL += -DVL_LEAK_CHECKS # If running valgrind or other hunting tool
@@ -81,12 +81,19 @@ CPPFLAGS += -W -Wall -Wno-unused-parameter -Wno-char-subscripts -Werror
#CPPFLAGS += -pedantic-errors
endif
ifneq ($(SYSTEMPERL),) # Intuit SYSTEMPERL_INCLUDE as it's new
SYSTEMPERL_INCLUDE ?= $(SYSTEMPERL)/src
#else if set, leave as-is.
#else if SYSTEMPERL="" don't set _INCLUDE so source will figure it out
endif
# Allow RPM builds to specify hardcoded data directories
# To do this:
ifeq ($(CFG_WITH_DEFENV),yes)
CPPFLAGS += -DDEFENV_SYSTEMC=\"$(SYSTEMC)\"
CPPFLAGS += -DDEFENV_SYSTEMC_ARCH=\"$(SYSTEMC_ARCH)\"
CPPFLAGS += -DDEFENV_SYSTEMPERL=\"$(SYSTEMPERL)\"
CPPFLAGS += -DDEFENV_SYSTEMPERL_INCLUDE=\"$(SYSTEMPERL_INCLUDE)\"
ifeq ($(VERILATOR_ROOT),) # Use what we're given, or intuit
CPPFLAGS += -DDEFENV_VERILATOR_ROOT=\"$(pkgdatadir)\"
else
@@ -97,6 +104,7 @@ endif
HEADERS = $(wildcard V*.h v*.h)
ASTGEN = $(srcdir)/astgen
BISONPRE = $(srcdir)/bisonpre
######################################################################
#### Top level
@@ -135,10 +143,12 @@ RAW_OBJS = \
V3Cast.o \
V3Changed.o \
V3Clean.o \
V3ClkGater.o \
V3Clock.o \
V3Combine.o \
V3Const__gen.o \
V3Coverage.o \
V3CoverageJoin.o \
V3Dead.o \
V3Delayed.o \
V3Depth.o \
@@ -190,6 +200,7 @@ RAW_OBJS = \
V3Task.o \
V3Trace.o \
V3TraceDecl.o \
V3Tristate.o \
V3Unknown.o \
V3Unroll.o \
V3Width.o \
@@ -225,7 +236,7 @@ V3Number_test: V3Number_test.o
#### Modules
%__gen.cpp: %.cpp $(ASTGEN)
%__gen.cpp: %.cpp $(ASTGEN) V3Ast.h V3AstNodes.h
$(PERL) $(ASTGEN) -I$(srcdir) $*.cpp
%.o: %.cpp
@@ -253,11 +264,9 @@ V3Ast__gen_classes.h : $(ASTGEN) V3Ast.h V3AstNodes.h
y.tab.h: y.tab.c
# Have only one output file in this rule to prevent parallel make issues
y.tab.c: verilog.y $(HEADERS)
y.tab.c: verilog.y $(HEADERS) bisonpre
@echo "If you get errors from verilog.y below, try upgrading bison to version 1.875 or newer."
${YACC} ${YFLAGS} $<
mv y.tab.c y_pregen.tab.c && $(PERL) $(srcdir)/bisonfix < y_pregen.tab.c > y.tab.c
mv y.tab.h y_pregen.tab.h && $(PERL) $(srcdir)/bisonfix < y_pregen.tab.h > y.tab.h
$(PERL) $(BISONPRE) --yacc ${YACC} -d -v -o y.tab.c $<
V3Lexer_pregen.yy.cpp: verilog.l y.tab.h $(HEADERS)
${LEX} ${LFLAGS} -o$@ $<
@@ -278,4 +287,3 @@ DEPS := $(wildcard *.d)
ifneq ($(DEPS),)
include $(DEPS)
endif
+64 -28
View File
@@ -1,4 +1,3 @@
// $Id$
//*************************************************************************
// DESCRIPTION: Verilator: Break always into sensitivity active domains
//
@@ -8,7 +7,7 @@
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
@@ -19,7 +18,7 @@
//
//*************************************************************************
// V3Active's Transformations:
//
//
// Note this can be called multiple times.
// Create a IACTIVE(initial), SACTIVE(combo)
// ALWAYS: Remove any-edges from sense list
@@ -33,8 +32,8 @@
#include "config_build.h"
#include "verilatedos.h"
#include <stdio.h>
#include <stdarg.h>
#include <cstdio>
#include <cstdarg>
#include <unistd.h>
#include <map>
#include <algorithm>
@@ -44,6 +43,7 @@
#include "V3Active.h"
#include "V3Ast.h"
#include "V3EmitCBase.h"
#include "V3Const.h"
//***** See below for main transformation engine
@@ -52,7 +52,11 @@
class ActiveBaseVisitor : public AstNVisitor {
protected:
//int debug() { return 9; }
static int debug() {
static int level = -1;
if (VL_UNLIKELY(level < 0)) level = v3Global.opt.debugSrcLevel(__FILE__);
return level;
}
};
class ActiveNamer : public ActiveBaseVisitor {
@@ -78,8 +82,8 @@ private:
// Don't clear scopep, the namer persists beyond this visit
}
virtual void visit(AstSenTree* nodep, AstNUser*) {
// Sort sensitivity list
nodep->sortSenses();
// Simplify sensitivity list
V3Const::constifyTreeExpensive(nodep);
}
// Empty visitors, speed things up
virtual void visit(AstNodeStmt* nodep, AstNUser*) { }
@@ -130,7 +134,7 @@ public:
found:
// Not found, form a new one
if (!activep) {
AstSenTree* newsenp = sensesp->cloneTree(false)->castSenTree();
AstSenTree* newsenp = sensesp->cloneTree(false);
activep = new AstActive(fl, "sequent", newsenp);
activep->sensesStorep(activep->sensesp());
UINFO(8," New ACTIVE "<<activep<<endl);
@@ -186,10 +190,15 @@ public:
class ActiveVisitor : public ActiveBaseVisitor {
private:
// NODE STATE
// Each call to V3Const::constify
// AstNode::user4() Used by V3Const::constify, called below
// STATE
ActiveNamer m_namer; // Tracking of active names
AstCFunc* m_scopeFinalp; // Final function for this scope
AstAlways* m_alwaysp; // Under always
bool m_itemCombo; // Found a SenItem combo
bool m_itemSequent; // Found a SenItem sequential
// VISITORS
virtual void visit(AstScope* nodep, AstNUser*) {
@@ -224,6 +233,13 @@ private:
nodep->unlinkFrBack();
wantactivep->addStmtsp(nodep);
}
virtual void visit(AstCoverToggle* nodep, AstNUser*) {
// Relink to CACTIVE, unless already under it
UINFO(4," COVERTOGGLE "<<nodep<<endl);
AstActive* wantactivep = m_namer.getCActive(nodep->fileline());
nodep->unlinkFrBack();
wantactivep->addStmtsp(nodep);
}
virtual void visit(AstFinal* nodep, AstNUser*) {
// Relink to CFUNC for the final
UINFO(4," FINAL "<<nodep<<endl);
@@ -246,6 +262,7 @@ private:
nodep->deleteTree(); nodep = NULL;
}
// METHODS
virtual void visit(AstAlways* nodep, AstNUser*) {
// Move always to appropriate ACTIVE based on its sense list
UINFO(4," ALW "<<nodep<<endl);
@@ -256,7 +273,10 @@ private:
nodep->unlinkFrBack()->deleteTree(); nodep=NULL;
return;
}
if (nodep->sensesp() && nodep->sensesp()->sensesp() && nodep->sensesp()->sensesp()->isNever()) {
if (nodep->sensesp()
&& nodep->sensesp()->sensesp()
&& nodep->sensesp()->sensesp()->castSenItem()
&& nodep->sensesp()->sensesp()->castSenItem()->isNever()) {
// Never executing. Kill it.
if (nodep->sensesp()->sensesp()->nextp()) nodep->v3fatalSrc("Never senitem should be alone, else the never should be eliminated.");
nodep->unlinkFrBack()->deleteTree(); nodep=NULL;
@@ -264,24 +284,14 @@ private:
}
// Read sensitivitues
bool combo = false;
bool sequent = false;
if (nodep->sensesp()) {
for (AstSenItem* nextp, *senp = nodep->sensesp()->sensesp(); senp; senp=nextp) {
nextp = senp->nextp()->castSenItem();
if (senp->edgeType() == AstEdgeType::ANYEDGE) {
combo = true;
// Delete the sensitivity
// We'll add it as a generic COMBO SenItem in a moment.
senp->unlinkFrBack()->deleteTree(); senp=NULL;
} else if (senp->varrefp()) {
if (senp->varrefp()->width()>1) senp->v3error("Unsupported: Non-single bit wide signal pos/negedge sensitivity: "
<<senp->varrefp()->prettyName());
sequent = true;
senp->varrefp()->varp()->usedClock(true);
}
}
}
m_alwaysp = nodep;
m_itemCombo = false;
m_itemSequent = false;
nodep->sensesp()->iterateAndNext(*this);
m_alwaysp = NULL;
bool combo = m_itemCombo;
bool sequent = m_itemSequent;
if (!combo && !sequent) combo=true; // If no list, Verilog 2000: always @ (*)
#ifndef NEW_ORDERING
if (combo && sequent) {
@@ -320,6 +330,29 @@ private:
ActiveDlyVisitor dlyvisitor (nodep);
}
}
virtual void visit(AstSenGate* nodep, AstNUser*) {
AstSenItem* subitemp = nodep->sensesp();
if (subitemp->edgeType() != AstEdgeType::ANYEDGE
&& subitemp->edgeType() != AstEdgeType::POSEDGE
&& subitemp->edgeType() != AstEdgeType::NEGEDGE) {
nodep->v3fatalSrc("Strange activity type under SenGate");
}
nodep->iterateChildren(*this);
}
virtual void visit(AstSenItem* nodep, AstNUser*) {
if (nodep->edgeType() == AstEdgeType::ANYEDGE) {
m_itemCombo = true;
// Delete the sensitivity
// We'll add it as a generic COMBO SenItem in a moment.
nodep->unlinkFrBack()->deleteTree(); nodep=NULL;
} else if (nodep->varrefp()) {
// V3LinkResolve should have cleaned most of these up
if (nodep->varrefp()->width()>1) nodep->v3error("Unsupported: Non-single bit wide signal pos/negedge sensitivity: "
<<nodep->varrefp()->prettyName());
m_itemSequent = true;
nodep->varrefp()->varp()->usedClock(true);
}
}
// Empty visitors, speed things up
virtual void visit(AstNodeMath* nodep, AstNUser*) {}
@@ -332,6 +365,9 @@ public:
// CONSTUCTORS
ActiveVisitor(AstNode* nodep) {
m_scopeFinalp = NULL;
m_alwaysp = NULL;
m_itemCombo = false;
m_itemSequent = false;
nodep->accept(*this);
}
virtual ~ActiveVisitor() {}
+2 -2
View File
@@ -1,4 +1,4 @@
// $Id$ //-*- C++ -*-
// -*- C++ -*-
//*************************************************************************
// DESCRIPTION: Verilator: Break always into sensitivity block domains
//
@@ -8,7 +8,7 @@
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
+20 -9
View File
@@ -1,4 +1,3 @@
// $Id$
//*************************************************************************
// DESCRIPTION: Verilator: Break always into sensitivity active domains
//
@@ -8,7 +7,7 @@
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
@@ -19,7 +18,7 @@
//
//*************************************************************************
// V3Active's Transformations:
//
//
// Note this can be called multiple times.
// Across all ACTIVES
// SenTrees are now under each ACTIVE statement, we want them global:
@@ -30,8 +29,8 @@
#include "config_build.h"
#include "verilatedos.h"
#include <stdio.h>
#include <stdarg.h>
#include <cstdio>
#include <cstdarg>
#include <unistd.h>
#include <algorithm>
#include <vector>
@@ -40,6 +39,7 @@
#include "V3ActiveTop.h"
#include "V3Ast.h"
#include "V3SenTree.h"
#include "V3Const.h"
//######################################################################
// Active class functions
@@ -49,10 +49,20 @@ private:
// NODE STATE
// Entire netlist
// AstNode::user() bool. True if processed
// Each call to V3Const::constify
// AstNode::user4() Used by V3Const::constify, called below
AstUser1InUse m_inuser1;
// STATE
AstTopScope* m_topscopep; // Top scope for adding sentrees under
SenTreeFinder m_finder; // Find global sentree's and add them
//int debug() { return 9; }
// METHODS
static int debug() {
static int level = -1;
if (VL_UNLIKELY(level < 0)) level = v3Global.opt.debugSrcLevel(__FILE__);
return level;
}
// VISITORS
virtual void visit(AstTopScope* nodep, AstNUser*) {
@@ -71,8 +81,10 @@ private:
UINFO(4," ACTIVE "<<nodep<<endl);
AstSenTree* sensesp = nodep->sensesp();
if (!sensesp) nodep->v3fatalSrc("NULL");
sensesp->sortSenses(); // Remove duplicate clocks and such
if (sensesp->sensesp() && sensesp->sensesp()->isNever()) {
V3Const::constifyTreeExpensive(nodep); // Remove duplicate clocks and such
if (sensesp->sensesp()
&& sensesp->sensesp()->castSenItem()
&& sensesp->sensesp()->castSenItem()->isNever()) {
// Never executing. Kill it.
if (sensesp->sensesp()->nextp()) nodep->v3fatalSrc("Never senitem should be alone, else the never should be eliminated.");
nodep->unlinkFrBack()->deleteTree(); nodep=NULL;
@@ -134,7 +146,6 @@ public:
// CONSTUCTORS
ActiveTopVisitor(AstNetlist* nodep) {
m_topscopep = NULL;
AstNode::userClearTree();
nodep->accept(*this);
}
virtual ~ActiveTopVisitor() {}
+2 -2
View File
@@ -1,4 +1,4 @@
// $Id$ //-*- C++ -*-
// -*- C++ -*-
//*************************************************************************
// DESCRIPTION: Verilator: Break always into sensitivity block domains
//
@@ -8,7 +8,7 @@
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
+29 -12
View File
@@ -1,4 +1,3 @@
// $Id$
//*************************************************************************
// DESCRIPTION: Verilator: Collect and print statistics
//
@@ -8,7 +7,7 @@
//
//*************************************************************************
//
// Copyright 2005-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2005-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
@@ -21,8 +20,8 @@
#include "config_build.h"
#include "verilatedos.h"
#include <stdio.h>
#include <stdarg.h>
#include <cstdio>
#include <cstdarg>
#include <unistd.h>
#include <map>
#include <iomanip>
@@ -41,9 +40,11 @@ private:
// NODE STATE/TYPES
// Cleared on netlist
// AstNode::user() -> bool. True if processed
AstUser1InUse m_inuser1;
// STATE
AstModule* m_modp; // Last module
AstBegin* m_beginp; // Last begin
V3Double0 m_statAsCover; // Statistic tracking
V3Double0 m_statAsPsl; // Statistic tracking
V3Double0 m_statAsFull; // Statistic tracking
@@ -101,19 +102,21 @@ private:
return bodysp;
}
void newPslAssertion(AstNode* nodep, AstNode* propp, AstSenTree* sentreep, const string& message) {
void newPslAssertion(AstNode* nodep, AstNode* propp, AstSenTree* sentreep,
AstNode* stmtsp, const string& message) {
propp->unlinkFrBack();
sentreep->unlinkFrBack();
if (stmtsp) stmtsp->unlinkFrBack();
//
AstNode* bodysp = NULL;
bool selfDestruct = false;
bool selfDestruct = false;
if (AstPslCover* snodep = nodep->castPslCover()) {
if (!v3Global.opt.coverageUser()) {
selfDestruct = true;
} else {
// V3Coverage assigned us a bucket to increment.
AstCoverInc* covincp = snodep->coverincp()->castCoverInc();
if (!covincp) snodep->v3fatalSrc("Missing coverage in PSL");
if (!covincp) snodep->v3fatalSrc("Missing AstCoverInc under assertion");
covincp->unlinkFrBack();
if (message!="") covincp->declp()->comment(message);
bodysp = covincp;
@@ -127,6 +130,7 @@ private:
} else {
nodep->v3fatalSrc("Unknown node type");
}
if (stmtsp) bodysp = bodysp->addNext(stmtsp);
AstIf* ifp = new AstIf (nodep->fileline(), propp, bodysp, NULL);
bodysp = ifp;
if (nodep->castPslAssert()) ifp->branchPred(AstBranchPred::UNLIKELY);
@@ -172,8 +176,8 @@ private:
// VISITORS //========== Case assertions
virtual void visit(AstCase* nodep, AstNUser*) {
nodep->iterateChildren(*this);
if (!nodep->user()) {
nodep->user(true);
if (!nodep->user1()) {
nodep->user1(true);
bool has_default=false;
for (AstCaseItem* itemp = nodep->itemsp(); itemp; itemp=itemp->nextp()->castCaseItem()) {
if (itemp->isDefault()) has_default=true;
@@ -233,12 +237,15 @@ private:
virtual void visit(AstPslCover* nodep, AstNUser*) {
nodep->iterateChildren(*this);
newPslAssertion(nodep, nodep->propp(), nodep->sentreep(), nodep->name()); nodep=NULL;
if (m_beginp && nodep->name() == "") nodep->name(m_beginp->name());
newPslAssertion(nodep, nodep->propp(), nodep->sentreep(),
nodep->stmtsp(), nodep->name()); nodep=NULL;
m_statAsCover++;
}
virtual void visit(AstPslAssert* nodep, AstNUser*) {
nodep->iterateChildren(*this);
newPslAssertion(nodep, nodep->propp(), nodep->sentreep(), nodep->name()); nodep=NULL;
newPslAssertion(nodep, nodep->propp(), nodep->sentreep(),
NULL, nodep->name()); nodep=NULL;
m_statAsPsl++;
}
virtual void visit(AstVAssert* nodep, AstNUser*) {
@@ -254,6 +261,16 @@ private:
// Reset defaults
m_modp = NULL;
}
virtual void visit(AstBegin* nodep, AstNUser*) {
// This code is needed rather than a visitor in V3Begin,
// because V3Assert is called before V3Begin
AstBegin* lastp = m_beginp;
{
m_beginp = nodep;
nodep->iterateChildren(*this);
}
m_beginp = lastp;
}
// VISITORS //========== Temporal Layer
@@ -269,9 +286,9 @@ private:
public:
// CONSTRUCTORS
AssertVisitor(AstNetlist* nodep) {
m_beginp = NULL;
m_modp = NULL;
// Process
AstNode::userClearTree(); // userp() used on entire tree
nodep->accept(*this);
}
virtual ~AssertVisitor() {
+2 -2
View File
@@ -1,4 +1,4 @@
// $Id$ //-*- C++ -*-
// -*- C++ -*-
//*************************************************************************
// DESCRIPTION: Verilator: Assertion expansion
//
@@ -8,7 +8,7 @@
//
//*************************************************************************
//
// Copyright 2005-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2005-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
+48 -19
View File
@@ -1,4 +1,3 @@
// $Id$
//*************************************************************************
// DESCRIPTION: Verilator: Collect and print statistics
//
@@ -8,7 +7,7 @@
//
//*************************************************************************
//
// Copyright 2005-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2005-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
@@ -24,8 +23,8 @@
#include "config_build.h"
#include "verilatedos.h"
#include <stdio.h>
#include <stdarg.h>
#include <cstdio>
#include <cstdarg>
#include <unistd.h>
#include <map>
#include <iomanip>
@@ -45,22 +44,33 @@ private:
// NODE STATE/TYPES
// STATE
// Reset each module:
AstSenItem* m_seniDefaultp; // Default sensitivity (from AstDefClock)
AstNodeSenItem* m_seniDefaultp; // Default sensitivity (from AstDefClock)
// Reset each assertion:
AstSenItem* m_senip; // Last sensitivity
int debug() { return 0; }
AstNodeSenItem* m_senip; // Last sensitivity
// METHODS
static int debug() {
static int level = -1;
if (VL_UNLIKELY(level < 0)) level = v3Global.opt.debugSrcLevel(__FILE__);
return level;
}
AstSenTree* newSenTree(AstNode* nodep) {
// Create sentree based on clocked or default clock
// Return NULL for always
AstSenTree* newp = NULL;
AstSenItem* senip = m_senip ? m_senip : m_seniDefaultp;
if (senip) newp = new AstSenTree(nodep->fileline(), senip->cloneTree(true));
if (!senip) nodep->v3error("Unsupported: Unclocked assertion");
AstNodeSenItem* senip = m_senip ? m_senip : m_seniDefaultp;
if (!senip) {
nodep->v3error("Unsupported: Unclocked assertion");
newp = new AstSenTree(nodep->fileline(), NULL);
} else {
newp = new AstSenTree(nodep->fileline(), senip->cloneTree(true));
}
return newp;
}
void clearAssertInfo() {
m_senip = NULL;
}
// VISITORS //========== Statements
virtual void visit(AstPslDefClock* nodep, AstNUser*) {
@@ -71,28 +81,47 @@ private:
nodep->unlinkFrBack();
pushDeletep(nodep); nodep=NULL;
}
virtual void visit(AstClocking* nodep, AstNUser*) {
UINFO(8," CLOCKING"<<nodep<<endl);
// Store the new default clock, reset on new module
m_seniDefaultp = nodep->sensesp();
// Trash it, keeping children
if (nodep->bodysp()) {
nodep->replaceWith(nodep->bodysp()->unlinkFrBack());
} else {
nodep->unlinkFrBack();
}
pushDeletep(nodep); nodep=NULL;
}
virtual void visit(AstPslCover* nodep, AstNUser*) {
// Prep
m_senip = NULL;
if (nodep->sentreep()) return; // Already processed
clearAssertInfo();
nodep->iterateChildren(*this);
nodep->sentreep(newSenTree(nodep));
m_senip = NULL;
clearAssertInfo();
}
virtual void visit(AstPslAssert* nodep, AstNUser*) {
// Prep
m_senip = NULL;
if (nodep->sentreep()) return; // Already processed
clearAssertInfo();
nodep->iterateChildren(*this);
nodep->sentreep(newSenTree(nodep));
m_senip = NULL;
clearAssertInfo();
}
virtual void visit(AstPslClocked* nodep, AstNUser*) {
nodep->iterateChildren(*this);
if (m_senip) {
nodep->v3error("Unsupported: Only one PSL clock allowed per assertion\n");
}
// Unlink and just keep a pointer to it, convert to sentree as needed
// Block is the new expression to evaluate
AstNode* blockp = nodep->propp()->unlinkFrBack();
if (nodep->disablep()) {
blockp = new AstAnd(nodep->disablep()->fileline(),
new AstNot(nodep->disablep()->fileline(),
nodep->disablep()->unlinkFrBack()),
blockp);
}
// Unlink and just keep a pointer to it, convert to sentree as needed
m_senip = nodep->sensesp();
nodep->replaceWith(blockp);
pushDeletep(nodep); nodep=NULL;
@@ -109,8 +138,8 @@ private:
public:
// CONSTRUCTORS
AssertPreVisitor(AstNetlist* nodep) {
m_senip = NULL;
m_seniDefaultp = NULL;
clearAssertInfo();
// Process
nodep->accept(*this);
}
+2 -2
View File
@@ -1,4 +1,4 @@
// $Id$ //-*- C++ -*-
// -*- C++ -*-
//*************************************************************************
// DESCRIPTION: Verilator: Assertion pre-expansion
//
@@ -8,7 +8,7 @@
//
//*************************************************************************
//
// Copyright 2005-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2005-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
+128 -67
View File
@@ -1,4 +1,3 @@
// $Id$
//*************************************************************************
// DESCRIPTION: Verilator: Ast node structures
//
@@ -8,7 +7,7 @@
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
@@ -19,8 +18,8 @@
//
//*************************************************************************
#include <stdio.h>
#include <stdarg.h>
#include <cstdio>
#include <cstdarg>
#include <fstream>
#include <iomanip>
#include <memory>
@@ -40,11 +39,15 @@ vluint64_t AstNode::s_editCntLast=0;
// along with each userp, and thus by bumping this count we can make it look
// as if we iterated across the entire tree to set all the userp's to null.
int AstNode::s_cloneCntGbl=0;
int AstNode::s_userCntGbl=0;
int AstNode::s_user2CntGbl=0;
int AstNode::s_user3CntGbl=0;
int AstNode::s_user4CntGbl=0;
int AstNode::s_user5CntGbl=0;
uint32_t AstUser1InUse::s_userCntGbl=0; // Hot cache line, leave adjacent
uint32_t AstUser2InUse::s_userCntGbl=0; // Hot cache line, leave adjacent
uint32_t AstUser3InUse::s_userCntGbl=0; // Hot cache line, leave adjacent
uint32_t AstUser4InUse::s_userCntGbl=0; // Hot cache line, leave adjacent
bool AstUser1InUse::s_userBusy=false;
bool AstUser2InUse::s_userBusy=false;
bool AstUser3InUse::s_userBusy=false;
bool AstUser4InUse::s_userBusy=false;
//######################################################################
// V3AstType
@@ -71,32 +74,55 @@ void AstNode::init() {
m_signed = false;
m_width = 0;
m_widthMin = 0;
m_userp = NULL;
m_userCnt = 0;
m_user1p = NULL;
m_user1Cnt = 0;
m_user2p = NULL;
m_user2Cnt = 0;
m_user3p = NULL;
m_user3Cnt = 0;
m_user4p = NULL;
m_user4Cnt = 0;
m_user5p = NULL;
m_user5Cnt = 0;
}
string AstNode::encodeName(const string& namein) {
string name2 = namein;
string out;
for (string::iterator pos = name2.begin(); pos != name2.end(); pos++) {
if (pos[0]=='_' && pos[1]=='_') {
out += "__ULUL_";
pos++;
} else {
const char* start = name2.c_str();
for (const char* pos = start; *pos; pos++) {
if ((pos==start) ? isalpha(pos[0]) // digits can't lead identifiers
: isalnum(pos[0])) {
out += pos[0];
} else if (pos[0]=='_') {
if (pos[1]=='_') {
out += "_"; out += "__05F"; // hex(_) = 0x5F
pos++;
} else {
out += pos[0];
}
} else if (pos[0]=='.') {
out += "__DOT__";
} else if (pos[0]=='[') {
out += "__BRA__";
} else if (pos[0]==']') {
out += "__KET__";
} else {
// Need the leading 0 so this will never collide with
// a user identifier nor a temp we create in Verilator.
char hex[10]; sprintf(hex,"%02X",pos[0]);
out += "__0"; out += hex;
}
}
return out;
}
string AstNode::encodeNumber(vlsint64_t num) {
if (num < 0) {
return "__02D"+cvtToStr(-num); // 2D=-
} else {
return cvtToStr(num);
}
}
string AstNode::shortName() const {
string pretty = name();
string::size_type pos;
@@ -117,19 +143,38 @@ string AstNode::dedotName(const string& namein) {
}
string AstNode::prettyName(const string& namein) {
string pretty = namein;
string::size_type pos;
while ((pos=pretty.find("__BRA__")) != string::npos) {
pretty.replace(pos, 7, "[");
}
while ((pos=pretty.find("__KET__")) != string::npos) {
pretty.replace(pos, 7, "]");
}
while ((pos=pretty.find("__PVT__")) != string::npos) {
pretty.replace(pos, 7, "");
}
while ((pos=pretty.find("__ULUL_")) != string::npos) {
pretty.replace(pos, 7, "");
string pretty;
string name2 = namein;
pretty = "";
for (const char* pos = name2.c_str(); *pos; ) {
if (0==strncmp(pos,"__BRA__",7)) {
pretty += "[";
pos += 7;
}
else if (0==strncmp(pos,"__KET__",7)) {
pretty += "]";
pos += 7;
}
else if (0==strncmp(pos,"__DOT__",7)) {
pretty += ".";
pos += 7;
}
else if (0==strncmp(pos,"__PVT__",7)) {
pretty += "";
pos += 7;
}
else if (pos[0]=='_' && pos[1]=='_' && pos[2]=='0'
&& isxdigit(pos[3]) && isxdigit(pos[4])) {
char value = 0;
value += 16*(isdigit(pos[3]) ? (pos[3]-'0') : (tolower(pos[3])-'a'+10));
value += (isdigit(pos[4]) ? (pos[4]-'0') : (tolower(pos[4])-'a'+10));
pretty += value;
pos += 5;
}
else {
pretty += pos[0];
pos++;
}
}
return AstNode::dedotName(pretty);
}
@@ -255,8 +300,8 @@ void AstNode::addNextHere(AstNode* newp) {
void AstNode::setOp1p(AstNode* newp) {
UASSERT(newp,"Null item passed to setOp1p\n");
UDEBUGONLY(if (m_op1p) this->v3fatalSrc("Adding to non-empty, non-list op1"););
UDEBUGONLY(if (newp->m_backp) newp->v3fatalSrc("Adding already linked node"););
UDEBUGONLY(if (newp->m_nextp) newp->v3fatalSrc("Adding list to non-list op1"););
UDEBUGONLY(if (newp->m_backp) newp->v3fatalSrc("Adding already linked node"););
UDEBUGONLY(if (newp->m_nextp) newp->v3fatalSrc("Adding list to non-list op1"););
this->debugTreeChange("-setOp1pThs: ", __LINE__, false);
newp->debugTreeChange("-setOp1pNew: ", __LINE__, true);
m_op1p = newp;
@@ -268,8 +313,8 @@ void AstNode::setOp1p(AstNode* newp) {
void AstNode::setOp2p(AstNode* newp) {
UASSERT(newp,"Null item passed to setOp2p\n");
UDEBUGONLY(if (m_op2p) this->v3fatalSrc("Adding to non-empty, non-list op2"););
UDEBUGONLY(if (newp->m_backp) newp->v3fatalSrc("Adding already linked node"););
UDEBUGONLY(if (newp->m_nextp) newp->v3fatalSrc("Adding list to non-list op2"););
UDEBUGONLY(if (newp->m_backp) newp->v3fatalSrc("Adding already linked node"););
UDEBUGONLY(if (newp->m_nextp) newp->v3fatalSrc("Adding list to non-list op2"););
this->debugTreeChange("-setOp2pThs: ", __LINE__, false);
newp->debugTreeChange("-setOp2pNew: ", __LINE__, true);
m_op2p = newp;
@@ -281,8 +326,8 @@ void AstNode::setOp2p(AstNode* newp) {
void AstNode::setOp3p(AstNode* newp) {
UASSERT(newp,"Null item passed to setOp3p\n");
UDEBUGONLY(if (m_op3p) this->v3fatalSrc("Adding to non-empty, non-list op3"););
UDEBUGONLY(if (newp->m_backp) newp->v3fatalSrc("Adding already linked node"););
UDEBUGONLY(if (newp->m_nextp) newp->v3fatalSrc("Adding list to non-list op3"););
UDEBUGONLY(if (newp->m_backp) newp->v3fatalSrc("Adding already linked node"););
UDEBUGONLY(if (newp->m_nextp) newp->v3fatalSrc("Adding list to non-list op3"););
this->debugTreeChange("-setOp3pThs: ", __LINE__, false);
newp->debugTreeChange("-setOp3pNew: ", __LINE__, true);
m_op3p = newp;
@@ -294,8 +339,8 @@ void AstNode::setOp3p(AstNode* newp) {
void AstNode::setOp4p(AstNode* newp) {
UASSERT(newp,"Null item passed to setOp4p\n");
UDEBUGONLY(if (m_op4p) this->v3fatalSrc("Adding to non-empty, non-list op4"););
UDEBUGONLY(if (newp->m_backp) newp->v3fatalSrc("Adding already linked node"););
UDEBUGONLY(if (newp->m_nextp) newp->v3fatalSrc("Adding list to non-list op4"););
UDEBUGONLY(if (newp->m_backp) newp->v3fatalSrc("Adding already linked node"););
UDEBUGONLY(if (newp->m_nextp) newp->v3fatalSrc("Adding list to non-list op4"););
this->debugTreeChange("-setOp4pThs: ", __LINE__, false);
newp->debugTreeChange("-setOp4pNew: ", __LINE__, true);
m_op4p = newp;
@@ -631,11 +676,38 @@ void AstNode::operator delete(void* objp, size_t size) {
// Iterators
void AstNode::iterateChildren(AstNVisitor& v, AstNUser* vup) {
// This is a very hot function
if (!this) return;
m_op1p->iterateAndNext(v, vup);
m_op2p->iterateAndNext(v, vup);
m_op3p->iterateAndNext(v, vup);
m_op4p->iterateAndNext(v, vup);
ASTNODE_PREFETCH(m_op1p);
ASTNODE_PREFETCH(m_op2p);
ASTNODE_PREFETCH(m_op3p);
ASTNODE_PREFETCH(m_op4p);
// if () not needed since iterateAndNext accepts null this, but faster with it.
if (m_op1p) m_op1p->iterateAndNext(v, vup);
if (m_op2p) m_op2p->iterateAndNext(v, vup);
if (m_op3p) m_op3p->iterateAndNext(v, vup);
if (m_op4p) m_op4p->iterateAndNext(v, vup);
}
void AstNode::iterateAndNext(AstNVisitor& v, AstNUser* vup) {
// This is a very hot function
// IMPORTANT: If you replace a node that's the target of this iterator,
// then the NEW node will be iterated on next, it isn't skipped!
// if (!this) return; // Part of for()
for (AstNode* nodep=this; nodep;) {
AstNode* niterp = nodep;
ASTNODE_PREFETCH(nodep->m_nextp);
niterp->m_iterpp = &niterp;
niterp->accept(v, vup);
// accept may do a replaceNode and change niterp on us...
if (!niterp) return;
niterp->m_iterpp = NULL;
if (niterp!=nodep) { // Edited it
nodep = niterp;
} else { // Same node, just loop
nodep = niterp->m_nextp;
}
}
}
void AstNode::iterateListBackwards(AstNVisitor& v, AstNUser* vup) {
@@ -644,7 +716,7 @@ void AstNode::iterateListBackwards(AstNVisitor& v, AstNUser* vup) {
while (nodep->m_nextp) nodep=nodep->m_nextp;
while (nodep) {
// Edits not supported: nodep->m_iterpp = &nodep;
nodep->accept(v, vup);
nodep->accept(v, vup);
if (nodep->backp()->m_nextp == nodep) nodep=nodep->backp();
else nodep = NULL; // else: backp points up the tree.
}
@@ -658,31 +730,12 @@ void AstNode::iterateChildrenBackwards(AstNVisitor& v, AstNUser* vup) {
this->op4p()->iterateListBackwards(v,vup);
}
void AstNode::iterateAndNext(AstNVisitor& v, AstNUser* vup) {
// IMPORTANT: If you replace a node that's the target of this iterator,
// then the NEW node will be iterated on next, it isn't skipped!
// if (!this) return; // Part of for()
for (AstNode* nodep=this; nodep;) {
AstNode* niterp = nodep;
niterp->m_iterpp = &niterp;
niterp->accept(v, vup);
// accept may do a replaceNode and change niterp on us...
if (!niterp) return;
niterp->m_iterpp = NULL;
if (niterp!=nodep) { // Edited it
nodep = niterp;
} else { // Same node, just loop
nodep = niterp->m_nextp;
}
}
}
void AstNode::iterateAndNextIgnoreEdit(AstNVisitor& v, AstNUser* vup) {
// Keep following the current list even if edits change it
if (!this) return;
for (AstNode* nodep=this; nodep; ) {
AstNode* nnextp = nodep->m_nextp;
nodep->accept(v, vup);
nodep->accept(v, vup);
nodep = nnextp;
}
}
@@ -747,6 +800,11 @@ void AstNode::checkTreeIter(AstNode* backp) {
if (backp != this->backp()) {
this->v3fatalSrc("Back node inconsistent");
}
if (castNodeTermop() || castNodeVarRef()) {
// Termops have a short-circuited iterateChildren, so check usage
if (op1p()||op2p()||op3p()||op4p())
this->v3fatalSrc("Terminal operation with non-terminals");
}
if (op1p()) op1p()->checkTreeIterList(this);
if (op2p()) op2p()->checkTreeIterList(this);
if (op3p()) op3p()->checkTreeIterList(this);
@@ -789,7 +847,10 @@ void AstNode::dumpPtrs(ostream& os) {
if (op2p()) os<<" op2p="<<(void*)op2p();
if (op3p()) os<<" op3p="<<(void*)op3p();
if (op4p()) os<<" op4p="<<(void*)op4p();
if (userp()) os<<" user="<<(void*)userp();
if (user1p()) os<<" user1p="<<(void*)user1p();
if (user2p()) os<<" user2p="<<(void*)user2p();
if (user3p()) os<<" user3p="<<(void*)user3p();
if (user4p()) os<<" user4p="<<(void*)user4p();
if (m_iterpp) {
os<<" iterpp="<<(void*)m_iterpp;
os<<"*="<<(void*)*m_iterpp;
@@ -825,7 +886,7 @@ void AstNode::dumpTreeFile(const string& filename, bool append) {
if (logsp->fail()) v3fatalSrc("Can't write "<<filename);
*logsp<<"Tree Dump from <e"<<dec<<editCountLast()<<">";
*logsp<<" to <e"<<dec<<editCountGbl()<<">"<<endl;
if (editCountGbl()==editCountLast() && 1) { // Off, as messes up tree diffing
if (editCountGbl()==editCountLast()) {
*logsp<<endl;
*logsp<<"No changes since last dump!\n";
} else {
@@ -844,7 +905,7 @@ void AstNode::dumpTreeFile(const string& filename, bool append) {
editCountSetLast();
}
void AstNode::v3errorEnd(ostringstream& str) {
void AstNode::v3errorEnd(ostringstream& str) const {
if (this && m_fileline) {
ostringstream nsstr;
nsstr<<str.str();
+207 -78
View File
@@ -1,4 +1,4 @@
// $Id$ //-*- C++ -*-
// -*- C++ -*-
//*************************************************************************
// DESCRIPTION: Verilator: Ast node structure
//
@@ -8,7 +8,7 @@
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
@@ -79,14 +79,21 @@ public:
enum en {
NORMAL,
TRACE_INIT,
TRACE_INIT_SUB,
TRACE_FULL,
TRACE_CHANGE
TRACE_FULL_SUB,
TRACE_CHANGE,
TRACE_CHANGE_SUB
};
enum en m_e;
inline AstCFuncType () {};
inline AstCFuncType (en _e) : m_e(_e) {};
explicit inline AstCFuncType (int _e) : m_e(static_cast<en>(_e)) {};
operator en () const { return m_e; };
// METHODS
bool isTrace() const { return (m_e==TRACE_INIT || m_e==TRACE_INIT_SUB
|| m_e==TRACE_FULL || m_e==TRACE_FULL_SUB
|| m_e==TRACE_CHANGE || m_e==TRACE_CHANGE_SUB); }
};
inline bool operator== (AstCFuncType lhs, AstCFuncType rhs) { return (lhs.m_e == rhs.m_e); }
inline bool operator== (AstCFuncType lhs, AstCFuncType::en rhs) { return (lhs.m_e == rhs); }
@@ -98,7 +105,7 @@ class AstEdgeType {
public:
// REMEMBER to edit the strings below too
enum en {
// These must be in general -> most specific order, as we sort by it in AstSenTree::sortSenses()
// These must be in general -> most specific order, as we sort by it in V3Const::visit AstSenTre
ILLEGAL,
// Involving a variable
ANYEDGE, // Default for sensitivities; rip them out
@@ -142,8 +149,8 @@ public:
};
const char* verilogKwd() const {
static const char* names[] = {
"%E-edge", "", "[both]", "posedge", "negedge", "[high]","[low]",
"/*AS*/","[initial]","[settle]","[never]"
"%E-edge", "[any]", "[both]", "posedge", "negedge", "[high]","[low]",
"*","[initial]","[settle]","[never]"
};
return names[m_e];
};
@@ -197,7 +204,8 @@ public:
TRIWIRE,
BLOCKTEMP,
MODULETEMP,
STMTTEMP
STMTTEMP,
XTEMP
};
enum en m_e;
inline AstVarType () {};
@@ -209,7 +217,7 @@ public:
"?","GPARAM","LPARAM","GENVAR",
"INTEGER","INPUT","OUTPUT","INOUT",
"SUPPLY0","SUPPLY1","WIRE","IMPLICIT","REG","TRIWIRE",
"BLOCKTEMP","MODULETEMP","STMTTEMP"};
"BLOCKTEMP","MODULETEMP","STMTTEMP","XTEMP"};
return names[m_e];};
};
inline bool operator== (AstVarType lhs, AstVarType rhs) { return (lhs.m_e == rhs.m_e); }
@@ -250,6 +258,25 @@ public:
//######################################################################
class AstCaseType {
public:
enum en {
CASE,
CASEX,
CASEZ
};
enum en m_e;
inline AstCaseType () {};
inline AstCaseType (en _e) : m_e(_e) {};
explicit inline AstCaseType (int _e) : m_e(static_cast<en>(_e)) {};
operator en () const { return m_e; };
};
inline bool operator== (AstCaseType lhs, AstCaseType rhs) { return (lhs.m_e == rhs.m_e); }
inline bool operator== (AstCaseType lhs, AstCaseType::en rhs) { return (lhs.m_e == rhs); }
inline bool operator== (AstCaseType::en lhs, AstCaseType rhs) { return (lhs == rhs.m_e); }
//######################################################################
class AstDisplayType {
public:
enum en {
@@ -335,6 +362,83 @@ struct AstNUser {
}
};
//######################################################################
// AstUserResource - Generic pointer base class for tracking usage of user()
//
// Where AstNode->user2() is going to be used, for example, you write:
//
// AstUser2InUse m_userres;
//
// This will clear the tree, and prevent another visitor from clobering
// user2. When the member goes out of scope it will be automagically
// freed up.
class AstUserInUseBase {
protected:
static void allocate(uint32_t& cntGblRef, bool& userBusyRef) {
// Perhaps there's still a AstUserInUse in scope for this?
UASSERT_STATIC(!userBusyRef, "Conflicting user use; AstUser*InUse request when under another AstUserInUse");
userBusyRef = true;
clearcnt(cntGblRef, userBusyRef);
}
static void free(uint32_t& cntGblRef, bool& userBusyRef) {
UASSERT_STATIC(userBusyRef, "Free of User*() not under AstUserInUse");
clearcnt(cntGblRef, userBusyRef); // Includes a checkUse for us
userBusyRef = false;
}
static void clearcnt(uint32_t& cntGblRef, bool& userBusyRef) {
UASSERT_STATIC(userBusyRef, "Clear of User*() not under AstUserInUse");
// If this really fires and is real (after 2^32 edits???)
// we could just walk the tree and clear manually
++cntGblRef;
UASSERT_STATIC(cntGblRef, "User*() overflowed!");
}
};
// For each user() declare the in use structure
// We let AstNode peek into here, because when under low optimization even
// an accessor would be way too slow.
class AstUser1InUse : AstUserInUseBase {
protected:
friend class AstNode;
static uint32_t s_userCntGbl; // Count of which usage of userp() this is
static bool s_userBusy; // Count is in use
public:
AstUser1InUse() { allocate(s_userCntGbl/*ref*/, s_userBusy/*ref*/); }
~AstUser1InUse() { free (s_userCntGbl/*ref*/, s_userBusy/*ref*/); }
static void clear() { clearcnt(s_userCntGbl/*ref*/, s_userBusy/*ref*/); }
};
class AstUser2InUse : AstUserInUseBase {
protected:
friend class AstNode;
static uint32_t s_userCntGbl; // Count of which usage of userp() this is
static bool s_userBusy; // Count is in use
public:
AstUser2InUse() { allocate(s_userCntGbl/*ref*/, s_userBusy/*ref*/); }
~AstUser2InUse() { free (s_userCntGbl/*ref*/, s_userBusy/*ref*/); }
static void clear() { clearcnt(s_userCntGbl/*ref*/, s_userBusy/*ref*/); }
};
class AstUser3InUse : AstUserInUseBase {
protected:
friend class AstNode;
static uint32_t s_userCntGbl; // Count of which usage of userp() this is
static bool s_userBusy; // Count is in use
public:
AstUser3InUse() { allocate(s_userCntGbl/*ref*/, s_userBusy/*ref*/); }
~AstUser3InUse() { free (s_userCntGbl/*ref*/, s_userBusy/*ref*/); }
static void clear() { clearcnt(s_userCntGbl/*ref*/, s_userBusy/*ref*/); }
};
class AstUser4InUse : AstUserInUseBase {
protected:
friend class AstNode;
static uint32_t s_userCntGbl; // Count of which usage of userp() this is
static bool s_userBusy; // Count is in use
public:
AstUser4InUse() { allocate(s_userCntGbl/*ref*/, s_userBusy/*ref*/); }
~AstUser4InUse() { free (s_userCntGbl/*ref*/, s_userBusy/*ref*/); }
static void clear() { clearcnt(s_userCntGbl/*ref*/, s_userBusy/*ref*/); }
};
//######################################################################
// AstNVisitor -- Allows new functions to be called on each node
// type without changing the base classes. See "Modern C++ Design".
@@ -402,6 +506,7 @@ public:
uint32_t hshval() const { return m_both & M24; }
// OPERATORS
inline bool operator== (const V3Hash& rh) const { return m_both==rh.m_both; };
inline bool operator!= (const V3Hash& rh) const { return m_both!=rh.m_both; };
inline bool operator< (const V3Hash& rh) const { return m_both<rh.m_both; };
// CREATORS
class Illegal {}; // for creator type-overload selection
@@ -415,13 +520,7 @@ public:
// Creating from raw data (sameHash functions)
V3Hash() { setBoth(1,0); }
V3Hash(uint32_t val) { setBoth(1,val); }
V3Hash(void* vp) {
// It's just a hash, so we can shove a 64 bit pointer into a 32 bit bucket
// On 32 bit systems, lower is always 0, but who cares?
union { void* up; struct {uint32_t upper; uint32_t lower;} l;} u;
u.l.upper=0; u.l.lower=0; u.up=vp;
setBoth(1,u.l.upper^u.l.lower);
}
V3Hash(void* vp) { setBoth(1,cvtToHash(vp)); }
V3Hash(const string& name);
V3Hash(V3Hash lh, V3Hash rh) {
setBoth(1,lh.hshval()*31+rh.hshval());
@@ -432,45 +531,46 @@ ostream& operator<<(ostream& os, V3Hash rhs);
//######################################################################
// AstNode -- Base type of all Ast types
// Prefetch a node.
// The if() makes it faster, even though prefetch won't fault on null pointers
#define ASTNODE_PREFETCH(nodep) \
{ if (nodep) { VL_PREFETCH_RD(&(nodep->m_nextp)); VL_PREFETCH_RD(&(nodep->m_iterpp)); }}
class AstNode {
private:
// v ASTNODE_PREFETCH depends on below ordering of members
AstNode* m_nextp; // Next peer in the parent's list
AstNode* m_backp; // Node that points to this one (via next/op1/op2/...)
AstNode* m_headtailp; // When at begin/end of list, the opposite end of the list
AstNode* m_op1p; // Generic pointer 1
AstNode* m_op2p; // Generic pointer 2
AstNode* m_op3p; // Generic pointer 3
AstNode* m_op4p; // Generic pointer 4
AstNode** m_iterpp; // Pointer to node iterating on, change it if we replace this node.
// ^ ASTNODE_PREFETCH depends on above ordering of members
AstNode* m_clonep; // Pointer to clone of/ source of this module (for *LAST* cloneTree() ONLY)
int m_cloneCnt; // Mark of when userp was set
static int s_cloneCntGbl; // Count of which userp is set
AstNode* m_headtailp; // When at begin/end of list, the opposite end of the list
FileLine* m_fileline; // Where it was declared
vluint64_t m_editCount; // When it was last edited
static vluint64_t s_editCntGbl; // Global edit counter
static vluint64_t s_editCntLast;// Global edit counter, last value for printing * near node #s
AstNode* m_clonep; // Pointer to clone of/ source of this module (for *LAST* cloneTree() ONLY)
int m_cloneCnt; // Mark of when userp was set
static int s_cloneCntGbl; // Count of which userp is set
// Attributes
bool m_signed; // Node is signed
int m_width; // Bit width of operation
int m_widthMin; // If unsized, bitwidth of minimum implementation
AstNUser* m_userp; // Pointer to any information the user iteration routine wants
int m_userCnt; // Mark of when userp was set
static int s_userCntGbl; // Count of which userp is set
// This member ordering both allows 64 bit alignment and puts associated data together
AstNUser* m_user1p; // Pointer to any information the user iteration routine wants
uint32_t m_user1Cnt; // Mark of when userp was set
uint32_t m_user2Cnt; // Mark of when userp was set
AstNUser* m_user2p; // Pointer to any information the user iteration routine wants
int m_user2Cnt; // Mark of when userp was set
static int s_user2CntGbl; // Count of which userp is set
AstNUser* m_user3p; // Pointer to any information the user iteration routine wants
int m_user3Cnt; // Mark of when userp was set
static int s_user3CntGbl; // Count of which userp is set
uint32_t m_user3Cnt; // Mark of when userp was set
uint32_t m_user4Cnt; // Mark of when userp was set
AstNUser* m_user4p; // Pointer to any information the user iteration routine wants
int m_user4Cnt; // Mark of when userp was set
static int s_user4CntGbl; // Count of which userp is set
AstNUser* m_user5p; // Pointer to any information the user iteration routine wants
int m_user5Cnt; // Mark of when userp was set
static int s_user5CntGbl; // Count of which userp is set
// METHODS
void op1p(AstNode* nodep) { m_op1p = nodep; if (nodep) nodep->m_backp = this; }
@@ -494,7 +594,7 @@ protected:
// CONSTUCTORS
AstNode() {init(); }
AstNode(FileLine* fileline) {init(); m_fileline = fileline; }
virtual AstNode* clone() = 0; // Generally, cloneTree/cloneNode is what you want
virtual AstNode* clone() = 0; // Generally, cloneTree is what you want instead
virtual void cloneRelink() {}
void cloneRelinkTree();
@@ -559,6 +659,7 @@ public:
static string dedotName(const string& namein); // Name with dots removed
static string prettyName(const string& namein); // Name for printing out to the user
static string encodeName(const string& namein); // Encode user name into internal C representation
static string encodeNumber(vlsint64_t numin); // Encode number into internal C representation
string prettyName() const { return prettyName(name()); }
FileLine* fileline() const { return m_fileline; }
int width() const { return m_width; }
@@ -577,34 +678,42 @@ public:
bool isQuad() const { return (width()>VL_WORDSIZE && width()<=VL_QUADSIZE); }
bool isWide() const { return (width()>VL_QUADSIZE); }
int user() const { return userp()->castInt(); }
AstNUser* userp() const { return ((m_userCnt==s_userCntGbl)?m_userp:NULL); }
void userp(void* userp) { m_userp=(AstNUser*)(userp); m_userCnt=s_userCntGbl; }
void user(int val) { userp(AstNUser::fromInt(val)); }
static void userClearTree() { s_userCntGbl++; UASSERT_STATIC(s_userCntGbl,"Rollover"); } // Clear userp()'s across the entire tree
AstNUser* user1p() const {
// Slows things down measurably, so disabled by default
//UASSERT_STATIC(AstUser1InUse::s_userBusy, "userp set w/o busy");
return ((m_user1Cnt==AstUser1InUse::s_userCntGbl)?m_user1p:NULL);
}
void user1p(void* userp) { m_user1p=(AstNUser*)(userp); m_user1Cnt=AstUser1InUse::s_userCntGbl; }
int user1() const { return user1p()->castInt(); }
void user1(int val) { user1p(AstNUser::fromInt(val)); }
static void user1ClearTree() { AstUser1InUse::clear(); } // Clear userp()'s across the entire tree
AstNUser* user2p() const {
//UASSERT_STATIC(AstUser2InUse::s_userBusy, "user2p set w/o busy");
return ((m_user2Cnt==AstUser2InUse::s_userCntGbl)?m_user2p:NULL); }
void user2p(void* userp) { m_user2p=(AstNUser*)(userp); m_user2Cnt=AstUser2InUse::s_userCntGbl; }
int user2() const { return user2p()->castInt(); }
AstNUser* user2p() const { return ((m_user2Cnt==s_user2CntGbl)?m_user2p:NULL); }
void user2p(void* userp) { m_user2p=(AstNUser*)(userp); m_user2Cnt=s_user2CntGbl; }
void user2(int val) { user2p(AstNUser::fromInt(val)); }
static void user2ClearTree() { s_user2CntGbl++; } // Clear userp()'s across the entire tree
static void user2ClearTree() { AstUser2InUse::clear(); }
AstNUser* user3p() const {
//UASSERT_STATIC(AstUser3InUse::s_userBusy, "user3p set w/o busy");
return ((m_user3Cnt==AstUser3InUse::s_userCntGbl)?m_user3p:NULL); }
void user3p(void* userp) { m_user3p=(AstNUser*)(userp); m_user3Cnt=AstUser3InUse::s_userCntGbl; }
int user3() const { return user3p()->castInt(); }
AstNUser* user3p() const { return ((m_user3Cnt==s_user3CntGbl)?m_user3p:NULL); }
void user3p(void* userp) { m_user3p=(AstNUser*)(userp); m_user3Cnt=s_user3CntGbl; }
void user3(int val) { user3p(AstNUser::fromInt(val)); }
static void user3ClearTree() { s_user3CntGbl++; } // Clear userp()'s across the entire tree
static void user3ClearTree() { AstUser3InUse::clear(); }
AstNUser* user4p() const {
//UASSERT_STATIC(AstUser4InUse::s_userBusy, "user4p set w/o busy");
return ((m_user4Cnt==AstUser4InUse::s_userCntGbl)?m_user4p:NULL); }
void user4p(void* userp) { m_user4p=(AstNUser*)(userp); m_user4Cnt=AstUser4InUse::s_userCntGbl; }
int user4() const { return user4p()->castInt(); }
AstNUser* user4p() const { return ((m_user4Cnt==s_user4CntGbl)?m_user4p:NULL); }
void user4p(void* userp) { m_user4p=(AstNUser*)(userp); m_user4Cnt=s_user4CntGbl; }
void user4(int val) { user4p(AstNUser::fromInt(val)); }
static void user4ClearTree() { s_user4CntGbl++; } // Clear userp()'s across the entire tree
int user5() const { return user5p()->castInt(); }
AstNUser* user5p() const { return ((m_user5Cnt==s_user5CntGbl)?m_user5p:NULL); }
void user5p(void* userp) { m_user5p=(AstNUser*)(userp); m_user5Cnt=s_user5CntGbl; }
void user5(int val) { user5p(AstNUser::fromInt(val)); }
static void user5ClearTree() { s_user5CntGbl++; } // Clear userp()'s across the entire tree
static void user4ClearTree() { AstUser4InUse::clear(); }
vluint64_t editCount() const { return m_editCount; }
void editCountInc() { m_editCount = s_editCntGbl++; }
void editCountInc() { m_editCount = ++s_editCntGbl; }
static vluint64_t editCountLast() { return s_editCntLast; }
static vluint64_t editCountGbl() { return s_editCntGbl; }
static void editCountSetLast() { s_editCntLast = editCountGbl(); }
@@ -622,7 +731,7 @@ public:
AstNode* addNextNull(AstNode* newp); // Returns this, adds to end of list, NULL is OK
void addNextHere(AstNode* newp); // Adds after speced node
void replaceWith(AstNode* newp); // Replace current node in tree with new node
void v3errorEnd(ostringstream& str);
void v3errorEnd(ostringstream& str) const;
virtual void dump(ostream& str=cout);
AstNode* unlinkFrBack(AstNRelinker* linkerp=NULL); // Unlink this from whoever points to it.
AstNode* unlinkFrBackWithNext(AstNRelinker* linkerp=NULL); // Unlink this from whoever points to it, keep entire next list with unlinked node
@@ -651,7 +760,6 @@ public:
virtual bool same(AstNode* otherp) const { return true; }
virtual bool maybePointedTo() const { return false; } // Another AstNode* may have a pointer into this node, other then normal front/back/etc.
virtual bool broken() const { return false; }
virtual bool emitWordForm() { return false; }
// INVOKERS
virtual void accept(AstNVisitor& v, AstNUser* vup=NULL) = 0;
@@ -675,14 +783,18 @@ inline void AstNRelinker::relink(AstNode* newp) { newp->AstNode::relink(this); }
//######################################################################
//=== AstNode* : Derived generic node types
#define ASTNODE_BASE_FUNCS(name) \
virtual ~Ast ##name() {} \
Ast ##name * cloneTree(bool cloneNext) { return AstNode::cloneTree(cloneNext)->cast ##name(); }
struct AstNodeMath : public AstNode {
// Math -- anything that's part of an expression tree
AstNodeMath(FileLine* fl)
: AstNode(fl) {}
virtual ~AstNodeMath() {}
ASTNODE_BASE_FUNCS(NodeMath)
// METHODS
virtual string emitVerilog() = 0; /// Format string for verilog writing; see V3EmitV
virtual string emitOperator() = 0;
virtual string emitC() = 0;
virtual string emitSimpleOperator() { return ""; }
virtual bool cleanOut() = 0; // True if output has extra upper bits zero
};
@@ -691,7 +803,10 @@ struct AstNodeTermop : public AstNodeMath {
// Terminal operator -- a operator with no "inputs"
AstNodeTermop(FileLine* fl)
: AstNodeMath(fl) {}
virtual ~AstNodeTermop() {}
ASTNODE_BASE_FUNCS(NodeTermop)
// Know no children, and hot function, so skip iterator for speed
// See checkTreeIter also that asserts no children
void iterateChildren(AstNVisitor& v, AstNUser* vup=NULL) { }
};
struct AstNodeUniop : public AstNodeMath {
@@ -700,7 +815,7 @@ struct AstNodeUniop : public AstNodeMath {
: AstNodeMath(fl) {
if (lhsp) widthSignedFrom(lhsp);
setOp1p(lhsp); }
virtual ~AstNodeUniop() {}
ASTNODE_BASE_FUNCS(NodeUniop)
AstNode* lhsp() const { return op1p()->castNode(); }
// METHODS
virtual void numberOperate(V3Number& out, const V3Number& lhs) = 0; // Set out to evaluation of a AstConst'ed lhs
@@ -716,7 +831,7 @@ struct AstNodeBiop : public AstNodeMath {
AstNodeBiop(FileLine* fl, AstNode* lhs, AstNode* rhs)
: AstNodeMath(fl) {
setOp1p(lhs); setOp2p(rhs); }
virtual ~AstNodeBiop() {}
ASTNODE_BASE_FUNCS(NodeBiop)
AstNode* lhsp() const { return op1p()->castNode(); }
AstNode* rhsp() const { return op2p()->castNode(); }
void lhsp(AstNode* nodep) { return setOp1p(nodep); }
@@ -738,7 +853,7 @@ struct AstNodeTriop : public AstNodeMath {
AstNodeTriop(FileLine* fl, AstNode* lhs, AstNode* rhs, AstNode* ths)
: AstNodeMath(fl) {
setOp1p(lhs); setOp2p(rhs); setOp3p(ths); }
virtual ~AstNodeTriop() {}
ASTNODE_BASE_FUNCS(NodeTriop)
AstNode* lhsp() const { return op1p()->castNode(); }
AstNode* rhsp() const { return op2p()->castNode(); }
AstNode* thsp() const { return op3p()->castNode(); }
@@ -762,14 +877,14 @@ struct AstNodeBiCom : public AstNodeBiop {
// Binary math with commutative properties
AstNodeBiCom(FileLine* fl, AstNode* lhs, AstNode* rhs)
: AstNodeBiop(fl, lhs, rhs) {}
virtual ~AstNodeBiCom() {}
ASTNODE_BASE_FUNCS(NodeBiCom)
};
struct AstNodeBiComAsv : public AstNodeBiCom {
// Binary math with commutative & associative properties
AstNodeBiComAsv(FileLine* fl, AstNode* lhs, AstNode* rhs)
: AstNodeBiCom(fl, lhs, rhs) {}
virtual ~AstNodeBiComAsv() {}
ASTNODE_BASE_FUNCS(NodeBiComAsv)
};
struct AstNodeCond : public AstNodeTriop {
AstNodeCond(FileLine* fl, AstNode* condp, AstNode* expr1p, AstNode* expr2p)
@@ -777,14 +892,14 @@ struct AstNodeCond : public AstNodeTriop {
if (expr1p) widthSignedFrom(expr1p);
else if (expr2p) widthSignedFrom(expr2p);
}
virtual ~AstNodeCond() {}
ASTNODE_BASE_FUNCS(NodeCond)
virtual void numberOperate(V3Number& out, const V3Number& lhs, const V3Number& rhs, const V3Number& ths) {
if (lhs.isNeqZero()) out.opAssign(rhs); else out.opAssign(ths); }
AstNode* condp() const { return op1p()->castNode(); } // op1 = Condition
AstNode* expr1p() const { return op2p()->castNode(); } // op2 = If true...
AstNode* expr2p() const { return op3p()->castNode(); } // op3 = If false...
virtual string emitVerilog() { return "%k(%l %k? %r %k: %t)"; }
virtual string emitOperator() { return "VL_COND"; }
virtual string emitC() { return "VL_COND_%nq%lq%rq%tq(%nw,%lw,%rw,%tw, %P, %li, %ri, %ti)"; }
virtual bool cleanOut() { return false; } // clean if e1 & e2 clean
virtual bool cleanLhs() { return true; }
virtual bool cleanRhs() { return false; } virtual bool cleanThs() { return false; } // Propagates up
@@ -798,7 +913,7 @@ struct AstNodePreSel : public AstNode {
AstNodePreSel(FileLine* fl, AstNode* lhs, AstNode* rhs, AstNode* ths)
: AstNode(fl) {
setOp1p(lhs); setOp2p(rhs); setNOp3p(ths); }
virtual ~AstNodePreSel() {}
ASTNODE_BASE_FUNCS(NodePreSel)
AstNode* lhsp() const { return op1p()->castNode(); }
AstNode* rhsp() const { return op2p()->castNode(); }
AstNode* thsp() const { return op3p()->castNode(); }
@@ -814,7 +929,7 @@ struct AstNodeStmt : public AstNode {
// Statement -- anything that's directly under a function
AstNodeStmt(FileLine* fl)
: AstNode(fl) {}
virtual ~AstNodeStmt() {}
ASTNODE_BASE_FUNCS(NodeStmt)
// METHODS
};
@@ -824,7 +939,7 @@ struct AstNodeAssign : public AstNodeStmt {
setOp1p(rhsp); setOp2p(lhsp);
if (lhsp) widthSignedFrom(lhsp);
}
virtual ~AstNodeAssign() {}
ASTNODE_BASE_FUNCS(NodeAssign)
virtual AstNode* cloneType(AstNode* lhsp, AstNode* rhsp)=0; // Clone single node, just get same type back.
// So iteration hits the RHS which is "earlier" in execution order, it's op1, not op2
AstNode* rhsp() const { return op1p()->castNode(); } // op1 = Assign from
@@ -843,7 +958,7 @@ struct AstNodeFor : public AstNodeStmt {
: AstNodeStmt(fileline) {
addNOp1p(initsp); setOp2p(condp); addNOp3p(incsp); addNOp4p(bodysp);
}
virtual ~AstNodeFor() {}
ASTNODE_BASE_FUNCS(NodeFor)
AstNode* initsp() const { return op1p()->castNode(); } // op1= initial statements
AstNode* condp() const { return op2p()->castNode(); } // op2= condition to continue
AstNode* incsp() const { return op3p()->castNode(); } // op3= increment statements
@@ -863,7 +978,7 @@ public:
: AstNodeStmt(fl) {
setOp1p(condp); addNOp2p(ifsp); addNOp3p(elsesp);
}
virtual ~AstNodeIf() {}
ASTNODE_BASE_FUNCS(NodeIf)
AstNode* condp() const { return op1p(); } // op1 = condition
AstNode* ifsp() const { return op2p(); } // op2 = list of true statements
AstNode* elsesp() const { return op3p(); } // op3 = list of false statements
@@ -883,7 +998,7 @@ struct AstNodeCase : public AstNodeStmt {
: AstNodeStmt(fl) {
setOp1p(exprp); addNOp2p(casesp);
}
virtual ~AstNodeCase() {}
ASTNODE_BASE_FUNCS(NodeCase)
virtual int instrCount() const { return instrCountBranch(); }
AstNode* exprp() const { return op1p()->castNode(); } // op1 = case condition <expression>
AstCaseItem* itemsp() const { return op2p()->castCaseItem(); } // op2 = list of case expressions
@@ -892,8 +1007,19 @@ struct AstNodeCase : public AstNodeStmt {
void addNotParallelp(AstNode* nodep) { setOp3p(nodep); }
};
struct AstNodeSenItem : public AstNode {
// An AstSenItem or AstSenGate
AstNodeSenItem(FileLine* fl) : AstNode(fl) {}
ASTNODE_BASE_FUNCS(NodeSenItem)
virtual bool isClocked() const = 0;
virtual bool isCombo() const = 0;
virtual bool isInitial() const = 0;
virtual bool isSettle() const = 0;
virtual bool isNever() const = 0;
};
class AstNodeVarRef : public AstNodeMath {
// A AstVarRef or AstVarXRef
// An AstVarRef or AstVarXRef
private:
bool m_lvalue; // Left hand side assignment
AstVar* m_varp; // [AfterLink] Pointer to variable itself
@@ -912,7 +1038,7 @@ public:
// May have varp==NULL
if (m_varp) widthSignedFrom((AstNode*)m_varp);
}
virtual ~AstNodeVarRef() {}
ASTNODE_BASE_FUNCS(NodeVarRef)
virtual bool broken() const;
virtual int instrCount() const { return widthInstrs(); }
virtual void cloneRelink();
@@ -928,6 +1054,9 @@ public:
void hiername(const string& hn) { m_hiername = hn; }
bool hierThis() const { return m_hierThis; }
void hierThis(bool flag) { m_hierThis = flag; }
// Know no children, and hot function, so skip iterator for speed
// See checkTreeIter also that asserts no children
void iterateChildren(AstNVisitor& v, AstNUser* vup=NULL) { }
};
class AstNodePli : public AstNodeStmt {
@@ -936,7 +1065,7 @@ public:
AstNodePli(FileLine* fl, const string& text, AstNode* exprsp)
: AstNodeStmt(fl), m_text(text) {
addNOp1p(exprsp); }
virtual ~AstNodePli() {}
ASTNODE_BASE_FUNCS(NodePli)
virtual string name() const { return m_text; }
virtual int instrCount() const { return instrCountPli(); }
void exprsp(AstNode* nodep) { addOp1p(nodep); } // op1 = Expressions to output
@@ -955,7 +1084,7 @@ public:
: AstNode(fileline) {
m_text = textp; // Copy it
}
virtual ~AstNodeText() {}
ASTNODE_BASE_FUNCS(NodeText)
const string& text() const { return m_text; }
virtual V3Hash sameHash() const { return V3Hash(text()); }
virtual bool same(AstNode* samep) const {
@@ -985,7 +1114,7 @@ public:
, m_name(name), m_taskPublic(false) {
addNOp3p(stmtsp);
}
virtual ~AstNodeFTask() {}
ASTNODE_BASE_FUNCS(NodeFTask)
virtual void dump(ostream& str=cout);
virtual string name() const { return m_name; } // * = Var name
virtual bool maybePointedTo() const { return true; }
@@ -1009,9 +1138,9 @@ public:
AstNodeFTaskRef(FileLine* fl, AstNode* namep, AstNode* pinsp)
:AstNode(fl)
, m_taskp(NULL) {
setOp1p(namep); addNOp2p(pinsp);
setOp1p(namep); addNOp2p(pinsp);
}
virtual ~AstNodeFTaskRef() {}
ASTNODE_BASE_FUNCS(NodeFTaskRef)
virtual bool broken() const { return m_taskp && !m_taskp->brokeExists(); }
virtual void cloneRelink() { if (m_taskp && m_taskp->clonep()) {
m_taskp = m_taskp->clonep()->castNodeFTask();
+26 -100
View File
@@ -1,4 +1,3 @@
// $Id$
//*************************************************************************
// DESCRIPTION: Verilator: Ast node structures
//
@@ -8,7 +7,7 @@
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
@@ -21,8 +20,8 @@
#include "config_build.h"
#include "verilatedos.h"
#include <stdio.h>
#include <stdarg.h>
#include <cstdio>
#include <cstdarg>
#include <fstream>
#include <iomanip>
#include <vector>
@@ -44,19 +43,19 @@ void AstNodeVarRef::cloneRelink() {
}
int AstNodeSel::bitConst() const {
AstConst* constp=bitp()->castConst(); return (constp?constp->asInt():0);
AstConst* constp=bitp()->castConst(); return (constp?constp->toSInt():0);
}
bool AstVar::isSigPublic() const {
return (m_sigPublic || (v3Global.opt.allPublic() && !isTemp()));
return (m_sigPublic || (v3Global.opt.allPublic() && !isTemp() && !isGenVar()));
}
bool AstVar::isScQuad() const {
return (isSc()&&isQuad()&&v3Global.opt.pins64());
return (isSc() && isQuad() && !isScBv());
}
bool AstVar::isScWide() const {
return (isWide() || isSc()&&isQuad()&&!v3Global.opt.pins64());
bool AstVar::isScBv() const {
return (isSc() && width() >= v3Global.opt.pinsBv());
}
void AstVar::combineType(AstVarType type) {
@@ -109,7 +108,7 @@ string AstVar::cType() const {
return "bool";
} else if (widthMin() <= VL_WORDSIZE) {
return "uint32_t";
} else if (isScWide()) {
} else if (isWide()) {
return "uint32_t"; // []'s added later
} else {
return "uint64_t";
@@ -117,12 +116,12 @@ string AstVar::cType() const {
}
string AstVar::scType() const {
if (widthMin() == 1) {
if (isScBv()) {
return (string("sc_bv<")+cvtToStr(widthMin())+"> "); // Keep the space so don't get >>
} else if (widthMin() == 1) {
return "bool";
} else if (widthMin() <= VL_WORDSIZE) {
return "uint32_t";
} else if (isScWide()) {
return (string("sc_bv<")+cvtToStr(widthMin())+"> "); // Keep the space so don't get >>
} else {
return "uint64_t";
}
@@ -164,113 +163,30 @@ string AstScope::nameDotless() const {
return dotless;
}
struct AstSenItemCmp {
inline bool operator () (const AstSenItem* lhsp, const AstSenItem* rhsp) const {
// Looks visually better if we keep sorted by name
if (lhsp->edgeType() < rhsp->edgeType()) return true;
if (lhsp->edgeType() > rhsp->edgeType()) return false;
if (!lhsp->varrefp() && rhsp->varrefp()) return true;
if ( lhsp->varrefp() && !rhsp->varrefp()) return false;
if (lhsp->varrefp() && rhsp->varrefp()) {
if (lhsp->varrefp()->name() < rhsp->varrefp()->name()) return true;
if (lhsp->varrefp()->name() > rhsp->varrefp()->name()) return false;
// But might be same name with different scopes
if (lhsp->varrefp()->varScopep() < rhsp->varrefp()->varScopep()) return true;
if (lhsp->varrefp()->varScopep() > rhsp->varrefp()->varScopep()) return false;
}
return false;
}
};
void AstSenTree::sortSenses() {
// Sort the sensitivity names so "posedge a or b" and "posedge b or a" end up together.
// Also, remove duplicate assignments, and fold POS&NEGs into ANYEDGEs
//cout<<endl; this->dumpTree(cout,"ssin: ");
AstSenItem* nextp;
// Make things a little faster; check first if we need a sort
for (AstSenItem* senp = sensesp(); senp; senp=senp->nextp()->castSenItem()) {
nextp=senp->nextp()->castSenItem();
AstSenItemCmp cmp;
if (nextp && !cmp(senp, nextp)) {
// Something's out of order, sort it
senp = NULL;
vector<AstSenItem*> vec;
for (AstSenItem* senp = sensesp(); senp; senp=senp->nextp()->castSenItem()) {
vec.push_back(senp);
}
sort(vec.begin(), vec.end(), AstSenItemCmp());
for (vector<AstSenItem*>::iterator it=vec.begin(); it!=vec.end(); ++it) {
(*it)->unlinkFrBack();
}
for (vector<AstSenItem*>::iterator it=vec.begin(); it!=vec.end(); ++it) {
this->addSensesp(*it);
}
break;
}
}
// Pass2, remove dup edges
for (AstSenItem* senp = sensesp(); senp; senp=nextp) {
nextp=senp->nextp()->castSenItem();
AstSenItem* cmpp = nextp;
if (cmpp
&& ((senp->varrefp() && cmpp->varrefp() && senp->varrefp()->sameTree(cmpp->varrefp()))
|| (!senp->varrefp() && !cmpp->varrefp()))) {
// We've sorted in the order ANY, BOTH, POS, NEG, so we don't need to try opposite orders
if (( senp->edgeType()==AstEdgeType::ANYEDGE) // ANY or {BOTH|POS|NEG} -> ANY
|| (senp->edgeType()==AstEdgeType::BOTHEDGE) // BOTH or {POS|NEG} -> BOTH
|| (senp->edgeType()==AstEdgeType::POSEDGE // POS or NEG -> BOTH
&& cmpp->edgeType()==AstEdgeType::NEGEDGE)
|| (senp->edgeType()==cmpp->edgeType()) // Identical edges
) {
// Fix edge of old node
if (senp->edgeType()==AstEdgeType::POSEDGE
&& cmpp->edgeType()==AstEdgeType::NEGEDGE)
senp->edgeType(AstEdgeType::BOTHEDGE);
// Remove redundant node
cmpp->unlinkFrBack()->deleteTree(); cmpp=NULL;
// Try to collapse again
nextp=senp;
}
}
}
// Pass3, remove nevers
if (sensesp()->nextp()) { // Else only one never, can't remove it
for (AstSenItem* senp = sensesp(); senp; senp=nextp) {
nextp=senp->nextp()->castSenItem();
if (senp->isNever()) {
senp->unlinkFrBack()->deleteTree(); senp=NULL;
}
}
}
//this->dumpTree(cout,"ssou: ");
}
bool AstSenTree::hasClocked() {
if (!sensesp()) this->v3fatalSrc("SENTREE without any SENITEMs under it");
for (AstSenItem* senp = sensesp(); senp; senp=senp->nextp()->castSenItem()) {
for (AstNodeSenItem* senp = sensesp(); senp; senp=senp->nextp()->castNodeSenItem()) {
if (senp->isClocked()) return true;
}
return false;
}
bool AstSenTree::hasSettle() {
if (!sensesp()) this->v3fatalSrc("SENTREE without any SENITEMs under it");
for (AstSenItem* senp = sensesp(); senp; senp=senp->nextp()->castSenItem()) {
for (AstNodeSenItem* senp = sensesp(); senp; senp=senp->nextp()->castNodeSenItem()) {
if (senp->isSettle()) return true;
}
return false;
}
bool AstSenTree::hasInitial() {
if (!sensesp()) this->v3fatalSrc("SENTREE without any SENITEMs under it");
for (AstSenItem* senp = sensesp(); senp; senp=senp->nextp()->castSenItem()) {
for (AstNodeSenItem* senp = sensesp(); senp; senp=senp->nextp()->castNodeSenItem()) {
if (senp->isInitial()) return true;
}
return false;
}
bool AstSenTree::hasCombo() {
if (!sensesp()) this->v3fatalSrc("SENTREE without any SENITEMs under it");
for (AstSenItem* senp = sensesp(); senp; senp=senp->nextp()->castSenItem()) {
for (AstNodeSenItem* senp = sensesp(); senp; senp=senp->nextp()->castNodeSenItem()) {
if (senp->isCombo()) return true;
}
return false;
@@ -393,6 +309,12 @@ void AstNodeFTask::dump(ostream& str) {
}
void AstCoverDecl::dump(ostream& str) {
this->AstNode::dump(str);
if (this->dataDeclNullp()) {
str<<" -> ";
this->dataDeclNullp()->dump(str);
} else {
if (binNum()) { str<<" bin"<<dec<<binNum(); }
}
}
void AstCoverInc::dump(ostream& str) {
this->AstNode::dump(str);
@@ -418,3 +340,7 @@ void AstCCall::dump(ostream& str) {
funcp()->dump(str);
}
}
void AstCFunc::dump(ostream& str) {
this->AstNode::dump(str);
if (slow()) str<<" [SLOW]";
}
+560 -766
View File
File diff suppressed because it is too large Load Diff
+51 -6
View File
@@ -1,4 +1,3 @@
// $Id$
//*************************************************************************
// DESCRIPTION: Verilator: Removal of named begin blocks
//
@@ -8,7 +7,7 @@
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
@@ -19,7 +18,7 @@
//
//*************************************************************************
// V3Begin's Transformations:
//
//
// Each module:
// Look for BEGINs
// BEGIN(VAR...) -> VAR ... {renamed}
@@ -29,8 +28,8 @@
#include "config_build.h"
#include "verilatedos.h"
#include <stdio.h>
#include <stdarg.h>
#include <cstdio>
#include <cstdarg>
#include <unistd.h>
#include <algorithm>
#include <vector>
@@ -48,11 +47,19 @@ private:
AstModule* m_modp; // Current module
AstNodeFTask* m_ftaskp; // Current function/task
string m_beginScope; // Name of begin blocks above us
//int debug() { return 9; }
int m_repeatNum; // Repeat counter
// METHODS
static int debug() {
static int level = -1;
if (VL_UNLIKELY(level < 0)) level = v3Global.opt.debugSrcLevel(__FILE__);
return level;
}
// VISITORS
virtual void visit(AstModule* nodep, AstNUser*) {
m_modp = nodep;
m_repeatNum = 0;
nodep->iterateChildren(*this);
m_modp = NULL;
}
@@ -131,6 +138,38 @@ private:
nodep->replaceWith(newp);
nodep->deleteTree(); nodep=NULL;
}
virtual void visit(AstRepeat* nodep, AstNUser*) {
// So later optimizations don't need to deal with them,
// REPEAT(count,body) -> loop=count,WHILE(loop>0) { body, loop-- }
// Note var can be signed or unsigned based on original number.
AstNode* countp = nodep->countp()->unlinkFrBackWithNext();
string name = string("__Vrepeat")+cvtToStr(m_repeatNum++);
AstVar* varp = new AstVar(nodep->fileline(), AstVarType::BLOCKTEMP, name,
new AstRange(nodep->fileline(), countp->width()-1, 0));
m_modp->addStmtp(varp);
AstNode* initsp = new AstAssign(nodep->fileline(), new AstVarRef(nodep->fileline(), varp, true),
countp);
AstNode* decp = new AstAssign(nodep->fileline(), new AstVarRef(nodep->fileline(), varp, true),
new AstSub(nodep->fileline(), new AstVarRef(nodep->fileline(), varp, false),
new AstConst(nodep->fileline(), 1)));
AstNode* condp;
if (countp->isSigned()) {
condp = new AstGtS(nodep->fileline(), new AstVarRef(nodep->fileline(), varp, false),
new AstConst(nodep->fileline(), 0));
} else {
condp = new AstGt (nodep->fileline(), new AstVarRef(nodep->fileline(), varp, false),
new AstConst(nodep->fileline(), 0));
}
AstNode* bodysp = nodep->bodysp(); if (bodysp) bodysp->unlinkFrBackWithNext();
bodysp = bodysp->addNext(decp);
AstNode* newp = new AstWhile(nodep->fileline(),
condp,
bodysp);
initsp = initsp->addNext(newp);
newp = initsp;
nodep->replaceWith(newp);
nodep->deleteTree(); nodep=NULL;
}
virtual void visit(AstScopeName* nodep, AstNUser*) {
// If there's a %m in the display text, we add a special node that will contain the name()
// Similar code in V3Inline
@@ -143,6 +182,11 @@ private:
}
nodep->iterateChildren(*this);
}
virtual void visit(AstCoverDecl* nodep, AstNUser*) {
// Don't need to fix path in coverage statements, they're not under
// any BEGINs, but V3Coverage adds them all under the module itself.
nodep->iterateChildren(*this);
}
virtual void visit(AstNode* nodep, AstNUser*) {
nodep->iterateChildren(*this);
}
@@ -151,6 +195,7 @@ public:
BeginVisitor(AstNetlist* nodep) {
m_modp = NULL;
m_ftaskp = NULL;
m_repeatNum = 0;
nodep->accept(*this);
}
virtual ~BeginVisitor() {}
+2 -2
View File
@@ -1,4 +1,4 @@
// $Id$ //-*- C++ -*-
// -*- C++ -*-
//*************************************************************************
// DESCRIPTION: Verilator: Removal of named begin blocks
//
@@ -8,7 +8,7 @@
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
+9 -5
View File
@@ -1,4 +1,3 @@
// $Id$
//*************************************************************************
// DESCRIPTION: Verilator: Branch prediction
//
@@ -8,7 +7,7 @@
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
@@ -27,8 +26,8 @@
#include "config_build.h"
#include "verilatedos.h"
#include <stdio.h>
#include <stdarg.h>
#include <cstdio>
#include <cstdarg>
#include <unistd.h>
#include <map>
@@ -44,9 +43,14 @@ private:
// STATE
int m_likely; // Excuses for branch likely taken
int m_unlikely; // Excuses for branch likely not taken
//int debug() { return 9; }
// METHODS
static int debug() {
static int level = -1;
if (VL_UNLIKELY(level < 0)) level = v3Global.opt.debugSrcLevel(__FILE__);
return level;
}
void reset() {
m_likely = false;
m_unlikely = false;
+2 -2
View File
@@ -1,4 +1,4 @@
// $Id$ //-*- C++ -*-
// -*- C++ -*-
//*************************************************************************
// DESCRIPTION: Verilator: Branch prediction
//
@@ -8,7 +8,7 @@
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
+7 -8
View File
@@ -1,4 +1,3 @@
// $Id$
//*************************************************************************
// DESCRIPTION: Verilator: Find broken links in tree
//
@@ -8,7 +7,7 @@
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
@@ -19,7 +18,7 @@
//
//*************************************************************************
// V3Broken's Transformations:
//
//
// Entire netlist
// Mark all nodes
// Check all links point to marked nodes
@@ -28,8 +27,8 @@
#include "config_build.h"
#include "verilatedos.h"
#include <stdio.h>
#include <stdarg.h>
#include <cstdio>
#include <cstdarg>
#include <unistd.h>
#include <algorithm>
#include <map>
@@ -130,9 +129,9 @@ public:
// Use only AstNode::dump instead of the virtual one, as there
// may be varp() and other cross links that are bad.
if (debug()) {
cout<<"%Error: LeakedNode"<<(it->first->backp()?"Back: ":": ");
((AstNode*)(it->first))->AstNode::dump(cout);
cout<<endl;
cerr<<"%Error: LeakedNode"<<(it->first->backp()?"Back: ":": ");
((AstNode*)(it->first))->AstNode::dump(cerr);
cerr<<endl;
V3Error::incErrors();
}
it->second |= FLAG_LEAKED;
+2 -2
View File
@@ -1,4 +1,4 @@
// $Id$ //-*- C++ -*-
// -*- C++ -*-
//*************************************************************************
// DESCRIPTION: Verilator: Find broken links in tree
//
@@ -8,7 +8,7 @@
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
+67 -29
View File
@@ -1,4 +1,3 @@
// $Id$
//*************************************************************************
// DESCRIPTION: Verilator: Break case statements up and add Unknown assigns
//
@@ -8,7 +7,7 @@
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
@@ -19,7 +18,7 @@
//
//*************************************************************************
// V3Case's Transformations:
//
//
// Each module:
// TBD: Eliminate tristates by adding __in, __inen, __en wires in parallel
// Need __en in changed list if a signal is on the LHS of a assign
@@ -40,8 +39,8 @@
#include "config_build.h"
#include "verilatedos.h"
#include <stdio.h>
#include <stdarg.h>
#include <cstdio>
#include <cstdarg>
#include <unistd.h>
#include <algorithm>
@@ -59,7 +58,12 @@
class CaseLintVisitor : public AstNVisitor {
private:
AstNodeCase* m_caseExprp; // Under a CASE value node, if so the relevant case statement
//int debug() { return 9; }
static int debug() {
static int level = -1;
if (VL_UNLIKELY(level < 0)) level = v3Global.opt.debugSrcLevel(__FILE__);
return level;
}
virtual void visit(AstNodeCase* nodep, AstNUser*) {
// Detect multiple defaults
@@ -74,7 +78,7 @@ private:
}
// Check for X/Z in non-casex statements
if (!nodep->castCase() || !nodep->castCase()->casex()) {
{
m_caseExprp = nodep;
nodep->exprp()->accept(*this);
for (AstCaseItem* itemp = nodep->itemsp(); itemp; itemp=itemp->nextp()->castCaseItem()) {
@@ -84,11 +88,18 @@ private:
}
}
virtual void visit(AstConst* nodep, AstNUser*) {
// See also neverItem
if (m_caseExprp && nodep->num().isFourState()) {
if (m_caseExprp->castGenCase()) {
nodep->v3error("Use of x/? constant in generate case statement, (no such thing as 'generate casez')");
} else if (m_caseExprp->castCase() && m_caseExprp->castCase()->casex()) {
// Don't sweat it, we already complained about casex in general
} else if (m_caseExprp->castCase() && m_caseExprp->castCase()->casez()) {
if (nodep->num().isUnknown()) {
nodep->v3warn(CASEWITHX, "Use of x constant in casez statement, (perhaps intended ?/z in constant)");
}
} else {
nodep->v3error("Use of x/? constant in case statement, (perhaps intended casex/casez)");
nodep->v3warn(CASEWITHX, "Use of x/? constant in case statement, (perhaps intended casex/casez)");
}
}
}
@@ -112,6 +123,7 @@ private:
// NODE STATE
// Cleared each Case
// AstIf::user3() -> bool. Set true to indicate clone not needed
AstUser3InUse m_inuser3;
// STATE
V3Double0 m_statCaseFast; // Statistic tracking
@@ -123,9 +135,13 @@ private:
int m_caseNoOverlapsAllCovered; // Proven to be synopsys parallel_case compliant
AstNode* m_valueItem[1<<CASE_OVERLAP_WIDTH]; // For each possible value, the case branch we need
//int debug() { return 9; }
// METHODS
static int debug() {
static int level = -1;
if (VL_UNLIKELY(level < 0)) level = v3Global.opt.debugSrcLevel(__FILE__);
return level;
}
bool isCaseTreeFast(AstCase* nodep) {
int width = 0;
m_caseItems = 0;
@@ -153,20 +169,24 @@ private:
//if (debug()>=9) icondp->dumpTree(cout," caseitem: ");
AstConst* iconstp = icondp->castConst();
if (!iconstp) nodep->v3fatalSrc("above 'can't parse' should have caught this\n");
V3Number nummask (itemp->fileline(), iconstp->width());
nummask.opBitsNonX(iconstp->num());
uint32_t mask = nummask.asInt();
V3Number numval (itemp->fileline(), iconstp->width());
numval.opBitsOne(iconstp->num());
uint32_t val = numval.asInt();
for (uint32_t i=0; i<(1UL<<m_caseWidth); i++) {
if ((i & mask) == val) {
if (!m_valueItem[i]) {
m_valueItem[i] = itemp;
} else if (!itemp->ignoreOverlap() && !bitched) {
itemp->v3warn(CASEOVERLAP,"Case values overlap (example pattern 0x"<<hex<<i<<")");
bitched = true;
m_caseNoOverlapsAllCovered = false;
if (neverItem(nodep, iconstp)) {
// X in casez can't ever be executed
} else {
V3Number nummask (itemp->fileline(), iconstp->width());
nummask.opBitsNonX(iconstp->num());
uint32_t mask = nummask.toUInt();
V3Number numval (itemp->fileline(), iconstp->width());
numval.opBitsOne(iconstp->num());
uint32_t val = numval.toUInt();
for (uint32_t i=0; i<(1UL<<m_caseWidth); i++) {
if ((i & mask) == val) {
if (!m_valueItem[i]) {
m_valueItem[i] = itemp;
} else if (!itemp->ignoreOverlap() && !bitched) {
itemp->v3warn(CASEOVERLAP,"Case values overlap (example pattern 0x"<<hex<<i<<")");
bitched = true;
m_caseNoOverlapsAllCovered = false;
}
}
}
}
@@ -235,7 +255,7 @@ private:
// new AstConst(cexprp->fileline(), nummask));
AstNode* and1p = new AstSel(cexprp->fileline(), cexprp->cloneTree(false),
msb, 1);
AstNode* eqp = new AstNeq(cexprp->fileline(),
AstNode* eqp = new AstNeq(cexprp->fileline(),
new AstConst(cexprp->fileline(), 0),
and1p);
AstIf* ifp = new AstIf(cexprp->fileline(), eqp, tree1p, tree0p);
@@ -293,19 +313,26 @@ private:
for (AstNode* icondp = itemp->condsp(); icondp!=NULL; icondp=icondNextp) {
icondNextp = icondp->nextp();
icondp->unlinkFrBack();
AstNode* and1p;
AstNode* and2p;
AstConst* iconstp = icondp->castConst();
if (iconstp && iconstp->num().isFourState()
&& nodep->casex()) {
if (iconstp && neverItem(nodep, iconstp)) {
// X in casez can't ever be executed
icondp->deleteTree(); icondp=NULL; iconstp=NULL;
// For simplicity, make expression that is not equal, and let later
// optimizations remove it
and1p = new AstConst(itemp->fileline(), V3Number(itemp->fileline(),1,0));
and2p = new AstConst(itemp->fileline(), V3Number(itemp->fileline(),1,1));
} else if (iconstp && iconstp->num().isFourState()
&& (nodep->casex() || nodep->casez())) {
V3Number nummask (itemp->fileline(), iconstp->width());
nummask.opBitsNonX(iconstp->num());
V3Number numval (itemp->fileline(), iconstp->width());
numval.opBitsOne(iconstp->num());
and1p = new AstAnd(itemp->fileline(), cexprp->cloneTree(false),
new AstConst(itemp->fileline(), nummask));
and2p = new AstAnd(itemp->fileline(),
and2p = new AstAnd(itemp->fileline(),
new AstConst(itemp->fileline(), numval),
new AstConst(itemp->fileline(), nummask));
icondp->deleteTree(); icondp=NULL; iconstp=NULL;
@@ -395,6 +422,17 @@ private:
}
}
bool neverItem(AstCase* casep, AstConst* itemp) {
// Xs in case or casez are impossible due to two state simulations
if (casep->casex()) {
} else if (casep->casez()) {
if (itemp->num().isUnknown()) return true;
} else {
if (itemp->num().isFourState()) return true;
}
return false;
}
// VISITORS
virtual void visit(AstCase* nodep, AstNUser*) {
V3Case::caseLint(nodep);
+2 -2
View File
@@ -1,4 +1,4 @@
// $Id$ //-*- C++ -*-
// -*- C++ -*-
//*************************************************************************
// DESCRIPTION: Verilator: Break case statements up and add Unknown assigns
//
@@ -8,7 +8,7 @@
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
+24 -20
View File
@@ -1,4 +1,3 @@
// $Id$
//*************************************************************************
// DESCRIPTION: Verilator: Add C++ casts across expression size changes
//
@@ -8,7 +7,7 @@
//
//*************************************************************************
//
// Copyright 2004-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2004-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
@@ -19,7 +18,7 @@
//
//*************************************************************************
// V3Cast's Transformations:
//
//
// Each module:
// For each math operator, if above operator requires 32 bits,
// and this isn't, cast to 32 bits.
@@ -44,8 +43,8 @@
#include "config_build.h"
#include "verilatedos.h"
#include <stdio.h>
#include <stdarg.h>
#include <cstdio>
#include <cstdarg>
#include <unistd.h>
#include <algorithm>
@@ -61,11 +60,17 @@ private:
// NODE STATE
// Entire netlist:
// AstNode::user() // bool. Indicates node is of known size
AstUser1InUse m_inuser1;
// STATE
//int debug() { return 9; }
// METHODS
static int debug() {
static int level = -1;
if (VL_UNLIKELY(level < 0)) level = v3Global.opt.debugSrcLevel(__FILE__);
return level;
}
void insertCast(AstNode* nodep, int needsize) { // We'll insert ABOVE passed node
UINFO(4," NeedCast "<<nodep<<endl);
AstNRelinker relinkHandle;
@@ -77,7 +82,7 @@ private:
//if (debug()>8) castp->dumpTree(cout,"-castins: ");
//
insureLower32Cast(castp);
nodep->user(1); // Now must be of known size
nodep->user1(1); // Now must be of known size
}
int castSize (AstNode* nodep) {
if (nodep->isQuad()) return VL_QUADSIZE;
@@ -87,7 +92,7 @@ private:
}
void insureCast(AstNode* nodep) {
if (castSize(nodep->backp()) != castSize(nodep)
|| !nodep->user()) {
|| !nodep->user1()) {
insertCast(nodep, castSize(nodep->backp()));
}
}
@@ -105,21 +110,21 @@ private:
// VISITORS
virtual void visit(AstNodeUniop* nodep, AstNUser*) {
nodep->iterateChildren(*this);
nodep->user(nodep->lhsp()->user());
nodep->user1(nodep->lhsp()->user1());
if (nodep->sizeMattersLhs()) insureCast(nodep->lhsp());
}
virtual void visit(AstNodeBiop* nodep, AstNUser*) {
nodep->iterateChildren(*this);
nodep->user(nodep->lhsp()->user()
| nodep->rhsp()->user());
nodep->user1(nodep->lhsp()->user1()
| nodep->rhsp()->user1());
if (nodep->sizeMattersLhs()) insureCast(nodep->lhsp());
if (nodep->sizeMattersRhs()) insureCast(nodep->rhsp());
}
virtual void visit(AstNodeTriop* nodep, AstNUser*) {
nodep->iterateChildren(*this);
nodep->user(nodep->lhsp()->user()
| nodep->rhsp()->user()
| nodep->thsp()->user());
nodep->user1(nodep->lhsp()->user1()
| nodep->rhsp()->user1()
| nodep->thsp()->user1());
if (nodep->sizeMattersLhs()) insureCast(nodep->lhsp());
if (nodep->sizeMattersRhs()) insureCast(nodep->rhsp());
if (nodep->sizeMattersThs()) insureCast(nodep->thsp());
@@ -127,11 +132,11 @@ private:
virtual void visit(AstCast* nodep, AstNUser*) {
nodep->iterateChildren(*this);
insureLower32Cast(nodep);
nodep->user(1);
nodep->user1(1);
}
virtual void visit(AstUnaryMin* nodep, AstNUser*) {
nodep->iterateChildren(*this);
nodep->user(nodep->lhsp()->user());
nodep->user1(nodep->lhsp()->user1());
if (nodep->lhsp()->widthMin()==1) {
// We want to avoid a GCC "converting of negative value" warning
// from our expansion of
@@ -148,16 +153,16 @@ private:
&& nodep->backp()->width()
&& castSize(nodep) != castSize(nodep->varp())) {
// Cast vars to IData first, else below has upper bits wrongly set
// CData x=3; out = (QData)(x<<30);
// CData x=3; out = (QData)(x<<30);
insertCast (nodep, castSize(nodep));
}
nodep->user(1);
nodep->user1(1);
}
virtual void visit(AstConst* nodep, AstNUser*) {
// Constants are of unknown size if smaller than 33 bits, becase
// we're too lazy to wrap every constant in the universe in
// ((IData)#).
nodep->user(nodep->isQuad() || nodep->isWide());
nodep->user1(nodep->isQuad() || nodep->isWide());
}
// NOPs
@@ -172,7 +177,6 @@ private:
public:
// CONSTUCTORS
CastVisitor(AstNetlist* nodep) {
AstNode::userClearTree();
nodep->accept(*this);
}
virtual ~CastVisitor() {}
+2 -2
View File
@@ -1,4 +1,4 @@
// $Id$ //-*- C++ -*-
// -*- C++ -*-
//*************************************************************************
// DESCRIPTION: Verilator: Add C++ casts across expression size changes
//
@@ -8,7 +8,7 @@
//
//*************************************************************************
//
// Copyright 2004-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2004-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
+17 -10
View File
@@ -1,4 +1,3 @@
// $Id$
//*************************************************************************
// DESCRIPTION: Verilator: Add temporaries, such as for changed nodes
//
@@ -8,7 +7,7 @@
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
@@ -19,7 +18,7 @@
//
//*************************************************************************
// V3Changed's Transformations:
//
//
// Each module:
// Each combo block
// For each variable that comes from combo block and is generated AFTER a usage
@@ -33,8 +32,8 @@
#include "config_build.h"
#include "verilatedos.h"
#include <stdio.h>
#include <stdarg.h>
#include <cstdio>
#include <cstdarg>
#include <unistd.h>
#include <algorithm>
#include <set>
@@ -51,19 +50,27 @@ class ChangedVisitor : public AstNVisitor {
private:
// NODE STATE
// Entire netlist:
// AstVarScope::user() -> bool. True indicates processed
// AstVarScope::user1() -> bool. True indicates processed
AstUser1InUse m_inuser1;
// STATE
AstModule* m_topModp; // Top module
AstScope* m_scopetopp; // Scope under TOPSCOPE
AstCFunc* m_chgFuncp; // Change function we're building
//int debug() { return 9; }
// METHODS
static int debug() {
static int level = -1;
if (VL_UNLIKELY(level < 0)) level = v3Global.opt.debugSrcLevel(__FILE__);
return level;
}
void genChangeDet(AstVarScope* vscp) {
#ifdef NEW_ORDERING
vscp->v3fatalSrc("Not applicable\n");
#endif
AstVar* varp = vscp->varp();
vscp->v3warn(IMPERFECTSCH,"Imperfect scheduling of variable: "<<vscp);
if (varp->arraysp()) {
vscp->v3error("Unsupported: Can't detect changes on arrayed variable (probably with UNOPTFLAT warning suppressed): "<<varp->prettyName());
} else {
@@ -101,7 +108,7 @@ private:
virtual void visit(AstTopScope* nodep, AstNUser*) {
UINFO(4," TS "<<nodep<<endl);
// Clearing
AstNode::userClearTree();
AstNode::user1ClearTree();
// Create the change detection function
AstScope* scopep = nodep->scopep();
if (!scopep) nodep->v3fatalSrc("No scope found on top level, perhaps you have no statements?\n");
@@ -120,8 +127,8 @@ private:
virtual void visit(AstVarScope* nodep, AstNUser*) {
if (nodep->isCircular()) {
UINFO(8," CIRC "<<nodep<<endl);
if (!nodep->user()) {
nodep->user(true);
if (!nodep->user1()) {
nodep->user1(true);
genChangeDet(nodep);
}
}
+2 -2
View File
@@ -1,4 +1,4 @@
// $Id$ //-*- C++ -*-
// -*- C++ -*-
//*************************************************************************
// DESCRIPTION: Verilator: Pre C-Emit stage changes
//
@@ -8,7 +8,7 @@
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
+18 -13
View File
@@ -1,4 +1,3 @@
// $Id$
//*************************************************************************
// DESCRIPTION: Verilator: Add temporaries, such as for clean nodes
//
@@ -8,7 +7,7 @@
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
@@ -19,7 +18,7 @@
//
//*************************************************************************
// V3Clean's Transformations:
//
//
// Each module:
// For each math operator, if it requires a clean operand,
// and the operand is dirty, insert a CLEAN node.
@@ -30,8 +29,8 @@
#include "config_build.h"
#include "verilatedos.h"
#include <stdio.h>
#include <stdarg.h>
#include <cstdio>
#include <cstdarg>
#include <unistd.h>
#include <algorithm>
@@ -48,15 +47,22 @@ private:
// Entire netlist:
// AstNode::user() -> CleanState. For this node, 0==UNKNOWN
// AstNode::user2() -> bool. True indicates minWidth has been propagated
AstUser1InUse m_inuser1;
AstUser2InUse m_inuser2;
// TYPES
enum CleanState { UNKNOWN, CLEAN, DIRTY };
// STATE
AstModule* m_modp;
//int debug() { return 9; }
// ENUMS
enum CleanState { UNKNOWN, CLEAN, DIRTY };
// METHODS
static int debug() {
static int level = -1;
if (VL_UNLIKELY(level < 0)) level = v3Global.opt.debugSrcLevel(__FILE__);
return level;
}
// Width resetting
int cppWidth(AstNode* nodep) {
if (nodep->width()<=VL_WORDSIZE) return VL_WORDSIZE;
@@ -79,10 +85,10 @@ private:
// Store the clean state in the userp on each node
void setCleanState(AstNode* nodep, CleanState clean) {
nodep->user(clean);
nodep->user1(clean);
}
CleanState getCleanState(AstNode* nodep) {
return ((CleanState)nodep->user());
return ((CleanState)nodep->user1());
}
bool isClean(AstNode* nodep) {
CleanState clstate = getCleanState(nodep);
@@ -156,6 +162,7 @@ private:
virtual void visit(AstModule* nodep, AstNUser*) {
m_modp = nodep;
nodep->iterateChildren(*this);
m_modp = NULL;
}
virtual void visit(AstNodeUniop* nodep, AstNUser*) {
nodep->iterateChildren(*this);
@@ -257,8 +264,6 @@ public:
CleanVisitor() {}
virtual ~CleanVisitor() {}
void main(AstNetlist* nodep) {
AstNode::userClearTree(); // userp() used on entire tree
AstNode::user2ClearTree(); // userp() used on entire tree
nodep->accept(*this);
}
};
+2 -2
View File
@@ -1,4 +1,4 @@
// $Id$ //-*- C++ -*-
// -*- C++ -*-
//*************************************************************************
// DESCRIPTION: Verilator: Pre C-Emit stage changes
//
@@ -8,7 +8,7 @@
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
+917
View File
@@ -0,0 +1,917 @@
// -*- C++ -*-
//*************************************************************************
// DESCRIPTION: Verilator: Break always into sensitivity active domains
//
// Code available from: http://www.veripool.org/verilator
//
// AUTHORS: Wilson Snyder with Paul Wasson, Duane Gabli
//
//*************************************************************************
//
// Copyright 2008-2008 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
// Verilator is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
// GNU General Public License for more details.
//
//*************************************************************************
// V3ClkGater's Transformations:
//
// Look for clock gaters
// Note there's overlap between this process and V3Split's
// ALWAYS: Build graph
// IF: Form vertex pointing to any IFs or ALWAYS above
// VARREF: Form vertex pointing to IFs it is under
// ASSIGN: If under normal assignment, disable optimization
// FUTURE OPTIMIZE: If signal is set to itself, consider that OK for gating.
// !splitable: Mark all VARREFs in this statement as comming from it
// Optimize graph so if signal is referenced under multiple IF branches it moves up
// Make ALWAYS for each new gating term, and move statements there
//*************************************************************************
#include "config_build.h"
#include "verilatedos.h"
#include <cstdio>
#include <cstdarg>
#include <unistd.h>
#include <map>
#include <algorithm>
#include <vector>
#include "V3Global.h"
#include "V3Ast.h"
#include "V3Stats.h"
#include "V3Graph.h"
#include "V3ClkGater.h"
//######################################################################
// Base for debug
class GaterBaseVisitor : public AstNVisitor {
protected:
static int debug() {
static int level = -1;
if (VL_UNLIKELY(level < 0)) level = v3Global.opt.debugSrcLevel(__FILE__);
return level;
}
};
//######################################################################
// Support classes
class GaterVarVertex;
class GaterVertex : public V3GraphVertex {
static uint32_t s_rankNum;
public:
GaterVertex(V3Graph* graphp)
: V3GraphVertex(graphp) {
s_rankNum++; rank(s_rankNum);
}
virtual ~GaterVertex() {}
virtual int typeNum() const = 0;
static void clearRank() { s_rankNum=0; }
virtual int sortCmp(const V3GraphVertex* rhsp) const;
};
uint32_t GaterVertex::s_rankNum = 0;
class GaterHeadVertex : public GaterVertex {
public:
GaterHeadVertex(V3Graph* graphp)
: GaterVertex(graphp) {}
virtual ~GaterHeadVertex() {}
virtual int typeNum() const { return __LINE__; } // C++ typeof() equivelent
virtual string name() const { return "*HEAD*"; }
virtual string dotColor() const { return "green"; }
};
class GaterPliVertex : public GaterVertex {
public:
GaterPliVertex(V3Graph* graphp)
: GaterVertex(graphp) {}
virtual ~GaterPliVertex() {}
virtual int typeNum() const { return __LINE__; } // C++ typeof() equivelent
virtual string name() const { return "*PLI*"; }
virtual string dotColor() const { return "red"; }
};
class GaterIfVertex : public GaterVertex {
AstNodeIf* m_nodep;
public:
AstNodeIf* nodep() const { return m_nodep; }
GaterIfVertex(V3Graph* graphp, AstNodeIf* nodep)
: GaterVertex(graphp), m_nodep(nodep) { }
virtual ~GaterIfVertex() {}
virtual int typeNum() const { return __LINE__; } // C++ typeof() equivelent
virtual string name() const { return cvtToStr((void*)m_nodep)+" {"+cvtToStr(m_nodep->fileline()->lineno())+"}"; }
};
class GaterVarVertex : public GaterVertex {
AstVarScope* m_nodep;
public:
AstVarScope* nodep() const { return m_nodep; }
GaterVarVertex(V3Graph* graphp, AstVarScope* nodep)
: GaterVertex(graphp), m_nodep(nodep) { }
virtual ~GaterVarVertex() {}
virtual int typeNum() const { return __LINE__; } // C++ typeof() equivelent
virtual string name() const { return nodep()->name(); }
virtual string dotColor() const { return "skyblue"; }
};
//######################################################################
// Edge types
class GaterEdge : public V3GraphEdge {
uint32_t m_ifelse; // True branch of if
public:
// These are used as shift amounts into node's user()
#define VU_DEFINE enum VarUsage { VU_NONE=0, VU_IF=1, VU_ELSE=2, VU_PLI=4, VU_MADE=8}
VU_DEFINE;
uint32_t ifelse() const { return m_ifelse; }
bool ifelseTrue() const { return m_ifelse & VU_IF; }
bool ifelseFalse() const { return m_ifelse & VU_ELSE; }
bool ifelseBoth() const { return ifelseTrue() && ifelseFalse(); }
GaterEdge(V3Graph* graphp, V3GraphVertex* fromp, V3GraphVertex* top, uint32_t ifelse)
: V3GraphEdge(graphp, fromp, top, 10, false), m_ifelse(ifelse) {}
virtual ~GaterEdge() {}
virtual string dotColor() const { return ((ifelse() & VU_PLI) ? "red"
: (ifelseBoth() ? "blue"
: (ifelseTrue() ? "green"
: "darkgreen"))); }
virtual int sortCmp(const V3GraphEdge* rEdgep) const {
// Our master sort sorts by edges first, so we don't want to
// consider the upstream vertex::sortCmp when sorting by edges.
// We do want to order by something though; rank works
if (fromp()->rank() < rEdgep->fromp()->rank()) return -1;
if (fromp()->rank() > rEdgep->fromp()->rank()) return 1;
// If same, resolve by ifelse
const GaterEdge* crEdgep = static_cast<const GaterEdge*>(rEdgep);
if (m_ifelse < crEdgep->m_ifelse) return -1;
if (m_ifelse > crEdgep->m_ifelse) return 1;
return 0;
}
};
int GaterVertex::sortCmp(const V3GraphVertex* rhsp) const {
const GaterVertex* crhsp = static_cast<const GaterVertex*>(rhsp);
// We really only care about ordering Var's together, but...
// First put same type together
if (typeNum() < crhsp->typeNum()) return -1;
if (typeNum() > crhsp->typeNum()) return 1;
// If variable, group by same input fanin
// (know they're the same type based on above compare)
if (dynamic_cast<const GaterVarVertex*>(this)) {
// We've already sorted by edges, so just see if same tree
// If this gets too slow, we could compute a hash up front
V3GraphEdge* lEdgep = this->inBeginp();
V3GraphEdge* rEdgep = rhsp->inBeginp();
while (lEdgep && rEdgep) {
const GaterEdge* clEdgep = static_cast<const GaterEdge*>(lEdgep);
const GaterEdge* crEdgep = static_cast<const GaterEdge*>(rEdgep);
if (lEdgep->fromp()->rank() < rEdgep->fromp()->rank()) return -1;
if (lEdgep->fromp()->rank() > rEdgep->fromp()->rank()) return 1;
if (clEdgep->ifelse() < crEdgep->ifelse()) return -1;
if (clEdgep->ifelse() > crEdgep->ifelse()) return 1;
lEdgep = lEdgep->inNextp();
rEdgep = rEdgep->inNextp();
}
if (!lEdgep && !rEdgep) return 0;
return lEdgep ? -1 : 1;
}
// Finally by rank of this vertex
if (rank() < rhsp->rank()) return -1;
if (rank() > rhsp->rank()) return 1;
return 0;
}
//######################################################################
// Check for non-simple gating equations
class GaterCondVisitor : public GaterBaseVisitor {
private:
// RETURN STATE
bool m_isSimple; // Set false when we know it isn't simple
// METHODS
inline void okIterate(AstNode* nodep) {
if (m_isSimple) nodep->iterateChildren(*this);
}
// VISITORS
virtual void visit(AstOr* nodep, AstNUser*) { okIterate(nodep); }
virtual void visit(AstAnd* nodep, AstNUser*) { okIterate(nodep); }
virtual void visit(AstNot* nodep, AstNUser*) { okIterate(nodep); }
virtual void visit(AstLogOr* nodep, AstNUser*) { okIterate(nodep); }
virtual void visit(AstLogAnd* nodep, AstNUser*) { okIterate(nodep); }
virtual void visit(AstLogNot* nodep, AstNUser*) { okIterate(nodep); }
virtual void visit(AstVarRef* nodep, AstNUser*) { okIterate(nodep); }
// Other possibilities are equals, etc
// But, we don't want to get too complicated or it will take too much
// effort to calculate the gater
virtual void visit(AstNode* nodep, AstNUser*) {
m_isSimple = false;
//nodep->iterateChildren(*this);
}
public:
// CONSTUCTORS
GaterCondVisitor(AstNode* nodep) {
m_isSimple = true;
nodep->accept(*this);
}
virtual ~GaterCondVisitor() {}
// PUBLIC METHODS
bool isSimple() const { return m_isSimple; }
};
//######################################################################
// Check for non-simple gating equations
class GaterBodyVisitor : public GaterBaseVisitor {
// NODE STATE
// Input state
// AstVarScope::user2p() -> AstAlways* moving this variable to
enum State {
// This is used as a bitmask
STATE_UNKNOWN=0,
STATE_KEEP=1, // Seen a variable we need, keep this statement
STATE_DELETE=2 // Seen a variable we need, delete this statement
// 3=keep & delete
};
bool m_original; // Deleting original statements, vs deleting new var statements
AstNode* m_exprp; // New gater expression we are building
bool m_cloning; // Clone this object 0=not sure yet, 1=do
uint32_t m_state; // Parsing state
// VISITORS
virtual void visit(AstVarRef* nodep, AstNUser*) {
if (nodep->lvalue()) {
AstVarScope* vscp = nodep->varScopep();
if (vscp->user2p()->castNode() == m_exprp) {
// This variable's block needs to move to the new always
if (m_original) {
UINFO(9," VARREF delete in old: "<<nodep<<endl);
m_state |= STATE_DELETE;
} else {
UINFO(9," VARREF stays in new: "<<nodep<<endl);
m_state |= STATE_KEEP;
}
} else {
if (m_original) {
UINFO(9," VARREF other stays in old\n");
m_state |= STATE_KEEP;
} else {
UINFO(9," VARREF other delete in new\n");
m_state |= STATE_DELETE;
}
}
}
}
//virtual void visit(AstNodeIf* nodep, AstNUser*) { ... }
// Not needed, it's the same handling as any other statement. Cool, huh?
// (We may get empty IFs but the constant propagater will rip them up for us)
virtual void visit(AstNodeStmt* nodep, AstNUser*) {
uint32_t oldstate = m_state;
// Find if children want to delete this or not.
// Note children may bicker, and want to both keep and delete (branches on a if)
uint32_t childstate;
{
m_state = STATE_UNKNOWN;
nodep->iterateChildren(*this);
childstate = m_state;
}
m_state = oldstate;
UINFO(9," Did state="<<childstate<<" "<<nodep<<endl);
// Indeterminate (statement with no lvalue), so keep only in original
if (childstate == STATE_UNKNOWN) {
if (m_original) childstate |= STATE_KEEP;
else childstate |= STATE_DELETE;
}
if ((childstate & STATE_DELETE) && !(childstate & STATE_KEEP)) {
nodep->unlinkFrBack()->deleteTree(); nodep=NULL;
// Pass upwards we did delete
m_state |= STATE_DELETE;
} else {
// Pass upwards we must keep
m_state |= STATE_KEEP;
}
}
virtual void visit(AstNode* nodep, AstNUser*) {
nodep->iterateChildren(*this);
}
public:
// CONSTUCTORS
GaterBodyVisitor(AstAlways* nodep, AstNode* exprp, bool original) {
m_exprp = exprp;
m_original = original;
m_state = STATE_UNKNOWN;
if (debug()>=9) nodep->dumpTree(cout," GateBodyIn: ");
nodep->bodysp()->iterateAndNext(*this);
if (debug()>=9) nodep->dumpTree(cout," GateBodyOut: ");
// If there's no statements we shouldn't have had a resulting graph
// vertex asking for this creation
}
virtual ~GaterBodyVisitor() {}
};
//######################################################################
// Create clock gaters
class GaterVisitor : public GaterBaseVisitor {
// NODE STATE
// Cleared on Always
// AstVarScope::user1p() -> GaterVarVertex*
// AstAlways::user4() -> bool. True indicates processed
// Cleared on each new Always
// AstVarScope::user2p() -> AstAlways* moving this variable to
AstUser1InUse m_inuser1;
AstUser2InUse m_inuser2;
AstUser4InUse m_inuser4;
// GRAPH STATE
// Cleared on simplify
// Vertex::user() -> VarUsage: Mark of which if/else edges are hit
// TYPES
VU_DEFINE;
enum MiscConsts {
IF_DEPTH_MAX = 4, // IFs deep we bother to analyze
DOMAINS_MAX = 32 // Clock domains before avoiding O(N^2) blowup
};
// MEMBERS
string m_nonopt; // Reason block is not optimizable
V3Double0 m_statGaters; // Statistic tracking
V3Double0 m_statBits; // Statistic tracking
bool m_directlyUnderAlw; // Immediately under Always or If
int m_ifDepth; // Depth of IF statements
int m_numIfs; // Number of IF statements
V3Graph m_graph; // Scoreboard of var usages/dependencies
GaterPliVertex* m_pliVertexp; // Element specifying PLI ordering
GaterHeadVertex* m_headVertexp; // Top vertex
V3GraphVertex* m_aboveVertexp; // Vertex above this point in tree
uint32_t m_aboveTrue; // Vertex above this point is true branch
AstVarScope* m_stmtVscp; // Current statement had variable assigned
bool m_stmtInPli; // Current statement has PLI
// METHODS
void nonOptimizable(AstNode* nodep, const char* reasonp) {
if (m_nonopt=="") {
UINFO(9," Nonopt: "<<reasonp<<": "<<nodep<<endl);
m_nonopt = reasonp;
}
}
void scoreboardPli(AstNode* nodep) {
// Order all PLI statements with other PLI statements
// This insures $display's and such remain in proper order
// We don't prevent splitting out other non-pli statements, however,
// because it is common to have $uasserts sprinkled about.
if (!m_pliVertexp) {
m_pliVertexp = new GaterPliVertex(&m_graph);
}
if (m_stmtVscp) { // Already saw a variable, be sure to mark it!
GaterVarVertex* varVtxp = (GaterVarVertex*)(m_stmtVscp->user1p());
new GaterEdge(&m_graph, m_pliVertexp, varVtxp, VU_PLI);
}
m_stmtInPli = true; // Mark all followon variables too
}
// METHODS -- GRAPH stuff
void simplifyGraph() {
if (debug()>=9) m_graph.dumpDotFilePrefixed("gater_init", false);
// We now have all PLI variables with edges FROM the pli vertex
simplifyPli();
if (debug()>=9) m_graph.dumpDotFilePrefixed("gater_pli", false);
// Any vertex that points along both true & false path to variable
// can be simplfied so parent points to that vertex. Any vertex
// that points to a (great...) grandparent of a variable can just
// point to the edge.
m_graph.userClearVertices(); // user() will contain VarUsage
simplifyIfElseRecurse(m_headVertexp);
if (debug()>=9) m_graph.dumpDotFilePrefixed("gater_ifelse", false);
m_graph.userClearVertices(); // user() will contain VarUsage
simplifyGrandRecurse(m_headVertexp, 1);
if (debug()>=9) m_graph.dumpDotFilePrefixed("gater_grand", false);
simplifyRemoveUngated(m_headVertexp);
// Give all signals with same gating term same color
graphColorSameFeeder();
if (debug()>=9) m_graph.dumpDotFilePrefixed("gater_done", false);
}
void simplifyPli() {
// For now, we'll not gate any logic with PLI lvariables in it. In
// the future we may move PLI statements. One way to do so is to
// all below pli VARs to go IfVertex -> PliVertex -> VarVertex then
// they all must get colored the same. There may be a lot of
// duplicated edges to the PLI; they'll need cleanup. All of the
// later optimizations need to deal, and the GaterBodyVisitor needs
// to know how to move them.
if (m_pliVertexp) {
// Follow PLI out edges to find all relevant variables
for (V3GraphEdge* nextp,* edgep = m_pliVertexp->outBeginp(); edgep; edgep = nextp) {
nextp = edgep->outNextp(); // We may edit the list
if (GaterVarVertex* vVxp = dynamic_cast<GaterVarVertex*>(edgep->top())) {
vVxp->unlinkDelete(&m_graph); vVxp=NULL; edgep=NULL;
} else {
m_graph.dump();
v3fatalSrc("PLI vertex points to non-signal");
}
}
m_pliVertexp->unlinkDelete(&m_graph); m_pliVertexp = NULL;
}
}
void simplifyIfElseRecurse(V3GraphVertex* vertexp) {
// From bottom-up, propagate duplicate IF/ELSE branches to grandparent
for (V3GraphEdge* edgep = vertexp->outBeginp(); edgep; edgep=edgep->outNextp()) {
simplifyIfElseRecurse(edgep->top());
}
//UINFO(9,"IERecurse "<<vertexp<<endl);
if (dynamic_cast<GaterIfVertex*>(vertexp)) {
// Clear indications
for (V3GraphEdge* edgep = vertexp->outBeginp(); edgep; edgep=edgep->outNextp()) {
edgep->top()->user(VU_NONE);
}
// Mark nodes on to/from side
for (V3GraphEdge* edgep = vertexp->outBeginp(); edgep; edgep=edgep->outNextp()) {
V3GraphVertex* toVxp = edgep->top();
GaterEdge* cedgep = static_cast<GaterEdge*>(edgep);
// We may mark this twice in one pass - if so it's duplicated; no worries
if (cedgep->ifelseTrue()) toVxp->user(toVxp->user() | VU_IF);
if (cedgep->ifelseFalse()) toVxp->user(toVxp->user() | VU_ELSE);
//UINFO(9," mark "<<edgep<<" "<<toVxp<<endl);
}
// Any with both IF & ELSE mark get removal mark, and new parent edge
for (V3GraphEdge* nextp,* edgep = vertexp->outBeginp(); edgep; edgep = nextp) {
nextp = edgep->outNextp(); // We may edit the list
V3GraphVertex* toVxp = edgep->top();
//UINFO(9," to "<<toVxp->user()<<" "<<toVxp<<endl);
if ((toVxp->user() & VU_IF) && (toVxp->user() & VU_ELSE)) {
edgep->unlinkDelete(); edgep = NULL;
if (!(toVxp->user() & VU_MADE)) { // Make an edge only once
toVxp->user(toVxp->user() | VU_MADE);
GaterEdge* inedgep = static_cast<GaterEdge*>(vertexp->inBeginp());
V3GraphVertex* grandparent = inedgep->fromp();
new GaterEdge(&m_graph, grandparent, toVxp, inedgep->ifelse());
}
}
}
}
}
void simplifyGrandRecurse(V3GraphVertex* vertexp, uint32_t depth) {
// From top-down delete any vars that grandparents source
// IE A -> B -> C -> VAR
// \----------^
//UINFO(9,"GRecurse "<<depth<<" "<<vertexp<<endl);
// Mark all variables to be swept
for (V3GraphEdge *nextp, *edgep = vertexp->outBeginp(); edgep; edgep=nextp) {
nextp = edgep->outNextp(); // We may edit the list
if (GaterVarVertex* toVxp = dynamic_cast<GaterVarVertex*>(edgep->top())) {
if (toVxp->user() && toVxp->user() < depth) {
// A recursion "above" us marked it,
// Remove this edge, it's redundant with the upper edge
edgep->unlinkDelete(); edgep=NULL;
} else {
GaterEdge* cedgep = static_cast<GaterEdge*>(edgep);
if (cedgep->ifelseBoth()) {
toVxp->user(depth);
}
}
}
}
// Recurse
for (V3GraphEdge* edgep = vertexp->outBeginp(); edgep; edgep=edgep->outNextp()) {
simplifyGrandRecurse(edgep->top(), depth+1);
}
// Clean our marks
for (V3GraphEdge* edgep = vertexp->outBeginp(); edgep; edgep=edgep->outNextp()) {
V3GraphVertex* toVxp = edgep->top();
if (toVxp->user() && toVxp->user() < depth) { // A recursion "above" us marked it; don't mess with it
} else {
toVxp->user(0); // We marked it originally, so unmark now
}
}
// Delete any If nodes with no children
// Last, as want bottom-up cleanup
for (V3GraphEdge *nextp, *edgep = vertexp->outBeginp(); edgep; edgep=nextp) {
nextp = edgep->outNextp(); // We may edit the list
if (GaterIfVertex* toVxp = dynamic_cast<GaterIfVertex*>(edgep->top())) {
if (!toVxp->outBeginp()) {
if (!nextp || nextp->top() != edgep->top()) { // Else next would disappear; we'll do it next loop
toVxp->unlinkDelete(&m_graph); toVxp=NULL; edgep=NULL;
}
}
}
}
}
void simplifyRemoveUngated(V3GraphVertex* vertexp) {
// Remove variables that are ungated
// At this point, any variable under the head is ungated
for (V3GraphEdge *nextp, *edgep = vertexp->outBeginp(); edgep; edgep=nextp) {
nextp = edgep->outNextp(); // We may edit the list
if (GaterVarVertex* toVxp = dynamic_cast<GaterVarVertex*>(edgep->top())) {
if (!nextp || nextp->top() != edgep->top()) { // Else next would disappear; we'll do it next loop
toVxp->unlinkDelete(&m_graph); toVxp=NULL; edgep=NULL;
}
}
}
}
void graphColorSameFeeder() {
// Assign same color to all destination vertices that have same
// subgraph feeding into them
// (I.E. all "from" nodes are common within each color)
// We could hash, but instead it's faster to sort edges, so we know
// the same edge list is always adjacent. The result is a
// O(vertices*edges) loop, but we'd need that to hash too.
if (debug()>9) { cout<<"PreColor:\n"; m_graph.dump(); }
m_graph.sortEdges();
// Now sort vertices, so same inbound edge set ends up adjacent
m_graph.sortVertices();
// Now walk and assign colors; same color is adjacent
m_graph.clearColors();
m_graph.userClearEdges(); // Used by newExprFromGraph
uint32_t color = 1;
GaterVarVertex* lastVxp = NULL;
for (V3GraphVertex* vertexp = m_graph.verticesBeginp(); vertexp; vertexp=vertexp->verticesNextp()) {
if (GaterVarVertex* vVxp = dynamic_cast<GaterVarVertex*>(vertexp)) {
if (!vVxp->inBeginp()) {
// At this point, any variable not linked is an error
// (It should have at least landed under the Head node)
vVxp->nodep()->v3fatalSrc("Variable became stranded in clk gate detection\n");
}
if (!lastVxp || vVxp->sortCmp(lastVxp)) {
// Different sources for this new node
color++;
}
vVxp->color(color);
lastVxp = vVxp;
}
}
if (debug()>9) { cout<<"PostColor:\n"; m_graph.dump(); }
}
AstNode* newExprFromGraph(GaterVarVertex* vertexp) {
// Recurse backwards, then form equation on return path
// We could use user()!=0, but zeroing it is slow, so instead we'll mark with a generation
// We get equations like "a | (!a & b)" which obviously could be reduced here,
// instead out of generality, there's a V3Const::matchOrAndNot that'll clean it up
static uint32_t s_generation = 0;
++s_generation;
nafgMarkRecurse(vertexp, s_generation);
AstNode* nodep = nafgCreateRecurse(m_headVertexp, s_generation);
if (debug()>=9) nodep->dumpTree(cout," GateExpr: ");
return nodep;
}
void nafgMarkRecurse(V3GraphVertex* vertexp, uint32_t generation) {
// Backwards mark user() on the path we recurse
//UINFO(9," nafgMark: v "<<(void*)(vertexp)<<" "<<vertexp->name()<<endl);
for (V3GraphEdge* edgep = vertexp->inBeginp(); edgep; edgep = edgep->inNextp()) {
//UINFO(9," nafgMark: "<<(void*)(edgep)<<" "<<edgep->name()<<endl);
edgep->user(generation);
nafgMarkRecurse(edgep->fromp(), generation);
}
}
AstNode* nafgCreateRecurse(V3GraphVertex* vertexp, uint32_t generation) {
// Forewards follow user() marked previously and build tree
AstNode* nodep = NULL;
// OR across all edges found at this level
//UINFO(9," nafgEnter: v "<<(void*)(vertexp)<<" "<<vertexp->name()<<endl);
for (V3GraphEdge* edgep = vertexp->outBeginp(); edgep; edgep = edgep->outNextp()) {
if (edgep->user() == generation) {
GaterEdge* cedgep = static_cast<GaterEdge*>(edgep);
AstNode* eqnp = NULL;
//UINFO(9," nafgFollow: "<<(void*)(edgep)<<" "<<edgep->name()<<endl);
if (dynamic_cast<GaterHeadVertex*>(edgep->fromp())) {
// Just OR in all lower terms
eqnp = nafgCreateRecurse(edgep->top(), generation);
} else if (GaterIfVertex* cVxp = dynamic_cast<GaterIfVertex*>(edgep->fromp())) {
// Edges from IFs represent a real IF branch in the equation tree
//UINFO(9," ifver "<<(void*)(edgep)<<" cc"<<edgep->dotColor()<<endl);
eqnp = cVxp->nodep()->condp()->cloneTree(true);
if (eqnp && cedgep->ifelseFalse()) {
eqnp = new AstNot(eqnp->fileline(),eqnp);
}
// We need to AND this term onto whatever was found below it
AstNode* belowp = nafgCreateRecurse(edgep->top(), generation);
if (belowp) eqnp = new AstAnd(eqnp->fileline(),eqnp,belowp);
}
// Top level we could choose to make multiple gaters, or ORs under the gater
// Right now we'll put OR lower down and let other optimizations deal
if (nodep) nodep = new AstOr(eqnp->fileline(),nodep,eqnp);
else nodep = eqnp;
//if (debug()>=9) nodep->dumpTree(cout," followExpr: ");
}
}
//UINFO(9," nafgExit: "<<(void*)(vertexp)<<" "<<vertexp->name()<<endl);
return nodep;
}
void newAlwaysTrees(AstAlways* nodep) {
// Across all variables we're moving
uint32_t lastColor = 0;
AstNode* lastExprp = NULL;
for (V3GraphVertex* vertexp = m_graph.verticesBeginp(); vertexp; vertexp=vertexp->verticesNextp()) {
if (GaterVarVertex* vVxp = dynamic_cast<GaterVarVertex*>(vertexp)) {
if (!lastExprp || lastColor != vVxp->color()) {
lastColor = vVxp->color();
// Create the block we've just finished
if (lastExprp) newAlwaysTree(nodep, lastExprp); // Duplicate below
// New expression for this color
lastExprp = newExprFromGraph(vVxp);
}
// Mark variable to move
if (vVxp->nodep()->user2p()) vVxp->nodep()->v3fatalSrc("One variable got marked under two gaters");
vVxp->nodep()->user2p(lastExprp);
m_statBits += vVxp->nodep()->width(); // Moving a wide bus counts more!
// There shouldn't be two possibilities we want to
// move to, IE {A,B} <= Z because we marked such
// things as unoptimizable
}
}
// Create the final block we've just finished
if (lastExprp) newAlwaysTree(nodep, lastExprp); // Duplicate above
}
void newAlwaysTree(AstAlways* nodep, AstNode* exprp) {
// Create new always with specified gating expression
// Relevant vars are already marked with user2p
// Should we put the gater under the always itself,
// or make a new signal?
// New signal: May cause replicated logic until we can combine
// Need way to toggle signal on complicated pos/negedge
// Under Always: More complicated, may not propagate logic with gateer
// Untill we get better gate optimization, we'll go this route.
//#define GATER_NOP
#ifdef GATER_NOP
// For testing only, don't clock gate but still make new always
AstSenTree* sensesp = nodep->sensesp()->cloneTree(true);
#else
// Make a SenGate
AstSenItem* oldsenitemsp = nodep->sensesp()->sensesp()->castSenItem();
if (!oldsenitemsp) nodep->v3fatalSrc("SenTree doesn't have any SenItem under it");
AstSenTree* sensesp = new AstSenTree(nodep->fileline(),
new AstSenGate(nodep->fileline(),
oldsenitemsp->cloneTree(true),
exprp));
#endif
// Make new body; note clone will preserve user2p() indicating moving vars
AstNode* bodyp = nodep->bodysp()->cloneTree(true);
AstAlways* alwp = new AstAlways(nodep->fileline(),
sensesp,
bodyp);
alwp->user4(1); // No need to process the new always again!
nodep->addNextHere(alwp);
// Blow moved statements from old body
GaterBodyVisitor(nodep,exprp,true);
// Blow old statements from new body
GaterBodyVisitor(alwp,exprp,false);
m_statGaters++;
if (debug()>=9) alwp->dumpTree(cout," new: ");
}
// VISITORS
virtual void visit(AstAlways* nodep, AstNUser*) {
if (debug()>=9) cout<<endl<<endl<<endl;
UINFO(5, "Gater: ALWAYS: "<<nodep<<endl);
if (nodep->user4()) return;
nodep->user4(1);
clear();
if (debug()>=9) nodep->dumpTree(cout," Alwin: ");
// Look for constructs we can't optimize
// Form graph with Vertices at each IF, and each Variable
m_aboveTrue = VU_IF | VU_ELSE;
iterateChildrenAlw(nodep, true);
// Other reasons to not optimize
if (!m_numIfs) nonOptimizable(nodep, "No if statements");
// Something to optimize, oh my!
if (m_nonopt!="") {
UINFO(5, " Gater non-opt: "<<m_nonopt<<endl);
} else {
// Process it
simplifyGraph();
// See how much moves
uint32_t lastColor = 0;
for (V3GraphVertex* vertexp = m_graph.verticesBeginp(); vertexp; vertexp=vertexp->verticesNextp()) {
if (GaterVarVertex* vVxp = dynamic_cast<GaterVarVertex*>(vertexp)) {
if (lastColor < vVxp->color()) {
lastColor = vVxp->color();
}
}
}
if (lastColor == 0) { // Nothing we moved!
nonOptimizable(nodep, "Nothing moved");
}
else if (lastColor > DOMAINS_MAX) {
// Our move algorithm is fairly slow and if we're splitting
// up too much it'll get really nasty. It's probably a bad
// move for performance to split too much, anyhow, as the
// number of gaters will result in calling many small c functions.
nonOptimizable(nodep, "Too much moved");
}
if (m_nonopt=="") {
newAlwaysTrees(nodep);
if (debug()>=9) nodep->dumpTree(cout," Gaterout: ");
}
}
UINFO(5, " Gater done"<<endl);
}
virtual void visit(AstVarRef* nodep, AstNUser*) {
if (nodep->lvalue()) {
AstVarScope* vscp = nodep->varScopep();
if (nodep->varp()->isSigPublic()) {
// Public signals shouldn't be changed, pli code might be messing with them
scoreboardPli(nodep);
}
// If another lvalue in this node, give up optimizing.
// We could just not optimize this variable, but we've already marked the
// other variable as optimizable, so we can instead pretend it's a PLI node.
if (m_stmtVscp) {
UINFO(5, " Multiple lvalues in one statement: "<<nodep<<endl);
scoreboardPli(nodep); // This will set m_stmtInPli
}
m_stmtVscp = vscp;
// Find, or make new Vertex
GaterVarVertex* vertexp = (GaterVarVertex*)(vscp->user1p());
if (!vertexp) {
vertexp = new GaterVarVertex(&m_graph, vscp);
vscp->user1p(vertexp);
}
new GaterEdge(&m_graph, m_aboveVertexp, vertexp, m_aboveTrue);
if (m_stmtInPli) {
new GaterEdge(&m_graph, m_pliVertexp, vertexp, VU_PLI);
}
}
}
virtual void visit(AstNodeIf* nodep, AstNUser*) {
m_ifDepth++;
bool allowGater = m_directlyUnderAlw && m_ifDepth <= IF_DEPTH_MAX;
if (allowGater) {
GaterCondVisitor condVisitor(nodep->condp());
if (!condVisitor.isSimple()) {
// Don't clear optimization, simply drop this IF as part of the gating
UINFO(5," IFnon-simple-condition: "<<nodep<<endl);
allowGater = false;
}
}
if (!allowGater) {
// IF burried under something complicated
iterateChildrenAlw(nodep, true);
} else {
UINFO(5, " IF: "<<nodep<<endl);
m_numIfs++;
// Recurse to next level of if.
V3GraphVertex* lastabovep = m_aboveVertexp;
uint32_t lasttrue = m_aboveTrue;
GaterIfVertex* vertexp = new GaterIfVertex(&m_graph, nodep);
new GaterEdge(&m_graph, m_aboveVertexp, vertexp, m_aboveTrue);
{
nodep->condp()->iterateAndNext(*this); // directlyUnder stays as-is
}
{
m_aboveVertexp = vertexp; // Vars will point at this edge
m_aboveTrue = VU_IF;
nodep->ifsp()->iterateAndNext(*this); // directlyUnder stays as-is (true)
}
{
m_aboveVertexp = vertexp; // Vars will point at this edge
m_aboveTrue = VU_ELSE;
nodep->elsesp()->iterateAndNext(*this); // directlyUnder stays as-is (true)
}
m_aboveVertexp = lastabovep;
m_aboveTrue = lasttrue;
}
m_ifDepth--;
}
virtual void visit(AstAssignDly* nodep, AstNUser*) {
// iterateChildrenAlw will detect this is a statement for us
iterateChildrenAlw(nodep, false);
}
virtual void visit(AstNodeAssign* nodep, AstNUser*) {
// Note NOT AssignDly; handled above, We'll just mark this block as
// not optimizable.
//
// A future alternative is to look for any lvalues that are also
// variables in the sensitivity list, or rvalues in this block. If
// any hit, disable optimization. Unlikely to be useful (For loops
// being an exception, but they're already unrolled.)
nonOptimizable(nodep, "Non-delayed assignment");
// No reason to iterate.
}
virtual void visit(AstSenItem* nodep, AstNUser*) {
if (!nodep->isClocked()) {
nonOptimizable(nodep, "Non-clocked sensitivity");
}
iterateChildrenAlw(nodep, false);
}
//--------------------
virtual void visit(AstNode* nodep, AstNUser*) {
if (m_nonopt=="") { // Else accelerate
iterateChildrenAlw(nodep, false);
}
}
inline void iterateChildrenAlw(AstNode* nodep, bool under) {
// **** USE THIS INSTEAD OF iterateChildren!
// Note If visitor doesn't call here; does it its own way
bool lastdua = m_directlyUnderAlw;
AstVarScope* lastvscp = m_stmtVscp;
bool lastpli = m_stmtInPli;
m_directlyUnderAlw = under;
if (nodep->castNodeStmt()) { // Restored below
UINFO(9," Stmt: "<<nodep<<endl);
m_stmtVscp = NULL;
m_stmtInPli = false;
}
if (!nodep->isSplittable()) {
// May also be a new statement (above if); if so we mark it immediately
UINFO(9," NotSplittable "<<nodep<<endl);
scoreboardPli(nodep);
}
{
nodep->iterateChildren(*this);
}
m_directlyUnderAlw = lastdua;
if (nodep->castNodeStmt()) { // Reset what set above; else propagate up to above statement
m_stmtVscp = lastvscp;
m_stmtInPli = lastpli;
}
}
public:
// CONSTUCTORS
GaterVisitor(AstNode* nodep) {
// AstAlways visitor does the real work, so most zeroing needs to be in clear()
clear();
nodep->accept(*this);
}
void clear() {
m_nonopt = "";
m_directlyUnderAlw = false;
m_ifDepth = 0;
m_numIfs = 0;
AstNode::user1ClearTree();
AstNode::user2ClearTree();
// Prepare graph
m_graph.clear();
GaterVertex::clearRank();
m_pliVertexp = NULL;
m_headVertexp = new GaterHeadVertex(&m_graph);
m_aboveVertexp = m_headVertexp;
m_aboveTrue = false;
m_stmtVscp = NULL;
m_stmtInPli = false;
}
virtual ~GaterVisitor() {
V3Stats::addStat("Optimizations, Gaters inserted", m_statGaters);
V3Stats::addStat("Optimizations, Gaters impacted bits", m_statBits);
}
};
//######################################################################
// Active class functions
void V3ClkGater::clkGaterAll(AstNetlist* nodep) {
UINFO(2,__FUNCTION__<<": "<<endl);
// While the gater does well at some modules, it seems to slow down many others
UINFO(5,"ClkGater is disabled due to performance issues\n");
//GaterVisitor visitor (nodep);
}
+36
View File
@@ -0,0 +1,36 @@
// -*- C++ -*-
//*************************************************************************
// DESCRIPTION: Verilator: Break always into clock gated blocks
//
// Code available from: http://www.veripool.org/verilator
//
// AUTHORS: Wilson Snyder with Paul Wasson, Duane Gabli
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
// Verilator is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
// GNU General Public License for more details.
//
//*************************************************************************
#ifndef _V3CLKGATER_H_
#define _V3CLKGATER_H_ 1
#include "config_build.h"
#include "verilatedos.h"
#include "V3Error.h"
#include "V3Ast.h"
//============================================================================
class V3ClkGater {
public:
static void clkGaterAll(AstNetlist* nodep);
};
#endif // Guard
+99 -61
View File
@@ -1,4 +1,3 @@
// $Id$
//*************************************************************************
// DESCRIPTION: Verilator: Clocking POS/NEGEDGE insertion
//
@@ -8,7 +7,7 @@
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
@@ -19,7 +18,7 @@
//
//*************************************************************************
// V3Clock's Transformations:
//
//
// Top Scope:
// Check created ACTIVEs
// Compress adjacent ACTIVEs with same sensitivity list
@@ -34,8 +33,8 @@
#include "config_build.h"
#include "verilatedos.h"
#include <stdio.h>
#include <stdarg.h>
#include <cstdio>
#include <cstdarg>
#include <unistd.h>
#include <algorithm>
@@ -51,8 +50,10 @@ class ClockVisitor : public AstNVisitor {
private:
// NODE STATE
// Cleared each Module:
// AstVarScope::userp() -> AstVarScope*. Temporary signal that was created.
// AstVarScope::user1p() -> AstVarScope*. Temporary signal that was created.
// AstVarScope::user2p() -> AstVarScope*. Temporary signal for change detects
AstUser1InUse m_inuser1;
AstUser2InUse m_inuser2;
// TYPES
enum { DOUBLE_OR_RATE = 10 }; // How many | per ||, Determined experimentally as best
@@ -70,11 +71,16 @@ private:
AstSenTree* m_lastSenp; // Last sensitivity match, so we can detect duplicates.
AstIf* m_lastIfp; // Last sensitivity if active to add more under
int m_stableNum; // Number of each untilstable
//int debug() { return 9; }
// METHODS
static int debug() {
static int level = -1;
if (VL_UNLIKELY(level < 0)) level = v3Global.opt.debugSrcLevel(__FILE__);
return level;
}
AstVarScope* getCreateLastClk(AstVarScope* vscp) {
if (vscp->userp()) return ((AstVarScope*)vscp->userp());
if (vscp->user1p()) return ((AstVarScope*)vscp->user1p());
AstVar* varp = vscp->varp();
if (varp->width()!=1) varp->v3error("Unsupported: Clock edge on non-single bit signal: "<<varp->prettyName());
string newvarname = ((string)"__Vclklast__"+vscp->scopep()->nameDotless()+"__"+varp->shortName());
@@ -83,7 +89,7 @@ private:
newvarp->width(1,1);
m_modp->addStmtp(newvarp);
AstVarScope* newvscp = new AstVarScope(vscp->fileline(), m_scopep, newvarp);
vscp->userp(newvscp);
vscp->user1p(newvscp);
m_scopep->addVarp(newvscp);
// At bottom, assign them
AstAssign* finalp
@@ -107,48 +113,66 @@ private:
m_scopep->addVarp(newvscp);
return newvscp;
}
AstNode* createSenseEquation(AstSenTree* nodep) {
AstNode* createSenItemEquation(AstSenItem* nodep) {
// We know the var is clean, and one bit, so we use binary ops
// for speed instead of logical ops.
// POSEDGE: var & ~var_last
// NEGEDGE: ~var & var_last
// BOTHEDGE: var ^ var_last
// HIGHEDGE: var
// LOWEDGE: ~var
AstNode* newp = NULL;
AstVarScope* clkvscp = nodep->varrefp()->varScopep();
if (nodep->edgeType()==AstEdgeType::POSEDGE) {
AstVarScope* lastVscp = getCreateLastClk(clkvscp);
newp = new AstAnd(nodep->fileline(),
new AstVarRef(nodep->fileline(),
nodep->varrefp()->varScopep(), false),
new AstNot(nodep->fileline(),
new AstVarRef(nodep->fileline(),
lastVscp, false)));
} else if (nodep->edgeType()==AstEdgeType::NEGEDGE) {
AstVarScope* lastVscp = getCreateLastClk(clkvscp);
newp = new AstAnd(nodep->fileline(),
new AstNot(nodep->fileline(),
new AstVarRef(nodep->fileline(),
nodep->varrefp()->varScopep(), false)),
new AstVarRef(nodep->fileline(), lastVscp, false));
} else if (nodep->edgeType()==AstEdgeType::BOTHEDGE) {
AstVarScope* lastVscp = getCreateLastClk(clkvscp);
newp = new AstXor(nodep->fileline(),
new AstVarRef(nodep->fileline(),
nodep->varrefp()->varScopep(), false),
new AstVarRef(nodep->fileline(), lastVscp, false));
} else if (nodep->edgeType()==AstEdgeType::HIGHEDGE) {
newp = new AstVarRef(nodep->fileline(),
clkvscp, false);
} else if (nodep->edgeType()==AstEdgeType::LOWEDGE) {
newp = new AstNot(nodep->fileline(),
new AstVarRef(nodep->fileline(),
clkvscp, false));
} else {
nodep->v3fatalSrc("Bad edge type");
}
return newp;
}
AstNode* createSenGateEquation(AstSenGate* nodep) {
AstNode* newp = new AstAnd(nodep->fileline(),
createSenseEquation(nodep->sensesp()),
nodep->rhsp()->cloneTree(true));
return newp;
}
AstNode* createSenseEquation(AstNodeSenItem* nodesp) {
// Nodep may be a list of elements; we need to walk it
AstNode* senEqnp = NULL;
for (AstSenItem* senp = nodep->sensesp(); senp; senp=senp->nextp()->castSenItem()) {
// We know the var is clean, and one bit, so we use binary ops
// for speed instead of logical ops.
// POSEDGE: var & ~var_last
// NEGEDGE: ~var & var_last
// BOTHEDGE: var ^ var_last
// HIGHEDGE: var
// LOWEDGE: ~var
AstVarScope* lastVscp = senp->varrefp()->varScopep()->userp()->castNode()->castVarScope();
for (AstNodeSenItem* senp = nodesp; senp; senp=senp->nextp()->castNodeSenItem()) {
AstNode* senOnep = NULL;
if (senp->edgeType()==AstEdgeType::POSEDGE) {
if (!lastVscp) senp->v3fatalSrc("No last var ptr?\n");
senOnep = new AstAnd(senp->fileline(),
new AstVarRef(senp->fileline(),
senp->varrefp()->varScopep(), false),
new AstNot(senp->fileline(),
new AstVarRef(senp->fileline(),
lastVscp, false)));
} else if (senp->edgeType()==AstEdgeType::NEGEDGE) {
if (!lastVscp) senp->v3fatalSrc("No last var ptr?\n");
senOnep = new AstAnd(senp->fileline(),
new AstNot(senp->fileline(),
new AstVarRef(senp->fileline(),
senp->varrefp()->varScopep(), false)),
new AstVarRef(senp->fileline(), lastVscp, false));
} else if (senp->edgeType()==AstEdgeType::BOTHEDGE) {
if (!lastVscp) senp->v3fatalSrc("No last var ptr?\n");
senOnep = new AstXor(senp->fileline(),
new AstVarRef(senp->fileline(),
senp->varrefp()->varScopep(), false),
new AstVarRef(senp->fileline(), lastVscp, false));
} else if (senp->edgeType()==AstEdgeType::HIGHEDGE) {
senOnep = new AstVarRef(senp->fileline(),
senp->varrefp()->varScopep(), false);
} else if (senp->edgeType()==AstEdgeType::LOWEDGE) {
senOnep = new AstNot(senp->fileline(),
new AstVarRef(senp->fileline(),
senp->varrefp()->varScopep(), false));
if (AstSenItem* itemp = senp->castSenItem()) {
senOnep = createSenItemEquation(itemp);
} else if (AstSenGate* itemp = senp->castSenGate()) {
senOnep = createSenGateEquation(itemp);
} else {
senp->v3fatalSrc("Bad edge type");
senp->v3fatalSrc("Strange node under sentree");
}
if (senEqnp) {
// Add new OR to the sensitivity list equation
@@ -160,14 +184,7 @@ private:
return senEqnp;
}
AstIf* makeActiveIf(AstSenTree* sensesp) {
for (AstSenItem* senp = sensesp->sensesp(); senp; senp=senp->nextp()->castSenItem()) {
if (senp->edgeType() != AstEdgeType::HIGHEDGE
&& senp->varrefp()) {
AstVarScope* oldvscp = senp->varrefp()->varScopep();
getCreateLastClk(oldvscp);
}
}
AstNode* senEqnp = createSenseEquation(sensesp);
AstNode* senEqnp = createSenseEquation(sensesp->sensesp());
if (!senEqnp) sensesp->v3fatalSrc("No sense equation, shouldn't be in sequent activation.");
AstIf* newifp = new AstIf (sensesp->fileline(),
senEqnp, NULL, NULL);
@@ -184,8 +201,8 @@ private:
m_topScopep=nodep;
m_scopep = nodep->scopep();
if (!m_scopep) nodep->v3fatalSrc("No scope found on top level, perhaps you have no statements?\n");
//VV***** We reset all userp()
AstNode::userClearTree();
//VV***** We reset all user1p()
AstNode::user1ClearTree();
// Make top functions
{
AstCFunc* funcp = new AstCFunc(nodep->fileline(), "_eval", m_scopep);
@@ -245,12 +262,13 @@ private:
//UINFO(4," MOD "<<nodep<<endl);
m_modp = nodep;
m_stableNum = 0;
nodep->iterateChildren(*this);
nodep->iterateChildren(*this);
m_modp= NULL;
}
virtual void visit(AstScope* nodep, AstNUser*) {
//UINFO(4," SCOPE "<<nodep<<endl);
m_scopep = nodep;
nodep->iterateChildren(*this);
nodep->iterateChildren(*this);
if (AstNode* movep = nodep->finalClksp()) {
if (!m_topScopep) nodep->v3fatalSrc("Final clocks under non-top scope");
movep->unlinkFrBackWithNext();
@@ -278,6 +296,26 @@ private:
}
nodep->deleteTree(); nodep = NULL;
}
virtual void visit(AstCoverToggle* nodep, AstNUser*) {
//nodep->dumpTree(cout,"ct:");
//COVERTOGGLE(INC, ORIG, CHANGE) ->
// IF(ORIG ^ CHANGE) { INC; CHANGE = ORIG; }
AstNode* incp = nodep->incp()->unlinkFrBack();
AstNode* origp = nodep->origp()->unlinkFrBack();
AstNode* changep = nodep->changep()->unlinkFrBack();
AstIf* newp = new AstIf(nodep->fileline(),
new AstXor(nodep->fileline(),
origp,
changep),
incp, NULL);
// We could add another IF to detect posedges, and only increment if so.
// It's another whole branch though verus a potential memory miss.
// We'll go with the miss.
newp->addIfsp(new AstAssign(nodep->fileline(),
changep->cloneTree(false),
origp->cloneTree(false)));
nodep->replaceWith(newp); nodep->deleteTree(); nodep=NULL;
}
virtual void visit(AstInitial* nodep, AstNUser*) {
AstNode* cmtp = new AstComment(nodep->fileline(), nodep->typeName());
nodep->replaceWith(cmtp);
@@ -416,7 +454,7 @@ private:
new AstConst(fl, 1)));
preUntilp->addNext(new AstAssign(fl, new AstVarRef(fl, countVarp, true),
new AstConst(fl, 0)));
// Add stable variables & preinits
AstNode* setChglastp = NULL;
for (AstVarRef* varrefp = nodep->stablesp(); varrefp; varrefp=varrefp->nextp()->castVarRef()) {
+2 -2
View File
@@ -1,4 +1,4 @@
// $Id$ //-*- C++ -*-
// -*- C++ -*-
//*************************************************************************
// DESCRIPTION: Verilator: Clocking POS/NEGEDGE insertion
//
@@ -8,7 +8,7 @@
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
+26 -15
View File
@@ -1,4 +1,3 @@
// $Id$
//*************************************************************************
// DESCRIPTION: Verilator: Combine common code into functions
//
@@ -8,7 +7,7 @@
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
@@ -19,7 +18,7 @@
//
//*************************************************************************
// V3Combine's Transformations:
//
//
// For every function that we spit out
// Examine code to find largest common blocks
// Hash each node depth first
@@ -32,13 +31,13 @@
// Make new function
// Move common block to function
// Replace each common block ref with funccall
//
//
//*************************************************************************
#include "config_build.h"
#include "verilatedos.h"
#include <stdio.h>
#include <stdarg.h>
#include <cstdio>
#include <cstdarg>
#include <unistd.h>
#include <algorithm>
#include <vector>
@@ -59,8 +58,14 @@
class CombBaseVisitor : public AstNVisitor {
protected:
// STATE
//int debug() { return 9; }
// METHODS
static int debug() {
static int level = -1;
if (VL_UNLIKELY(level < 0)) level = v3Global.opt.debugSrcLevel(__FILE__);
return level;
}
virtual ~CombBaseVisitor() {}
//***** optimization levels
@@ -175,6 +180,9 @@ private:
// AstCFunc::user3p() -> AstCFunc*, If set, replace ccalls to this func with new func
// AstNodeStmt::user3() -> AstNode*. True if to ignore this cell
// AstNodeStmt::user4() -> V3Hashed::V3Hash. Hash value of this node (hash of 0 is illegal)
AstUser1InUse m_inuser1;
AstUser3InUse m_inuser3;
//AstUser4InUse part of V3Hashed
// STATE
typedef enum {STATE_IDLE, STATE_HASH, STATE_DUP} CombineState;
@@ -187,7 +195,7 @@ private:
int m_modNFuncs; // Number of functions made
AstNode* m_walkLast1p; // Final node that is the same in duplicate list
AstNode* m_walkLast2p; // Final node that is the same in duplicate list
V3Hashed m_hashed; // Hash for every node
V3Hashed m_hashed; // Hash for every node in module
// METHODS
void hashStatement(AstNode* nodep) {
@@ -280,7 +288,7 @@ private:
if (node1p==node2p) continue;
//
// We need to mark iteration to prevent matching code inside code (abab matching in ababab)
AstNode::userClearTree(); // userp() used on entire tree
AstNode::user1ClearTree(); // user1p() used on entire tree
m_walkLast1p = NULL;
m_walkLast2p = NULL;
int depth = walkDupCodeNext(node1p, node2p, 1);
@@ -306,7 +314,7 @@ private:
int walkDupCodeNext(AstNode* node1p, AstNode* node2p, int level) {
// Find number of common statements between the two node1p_nextp's...
if (node1p->userp() || node2p->userp()) return 0; // Already iterated
if (node1p->user1p() || node2p->user1p()) return 0; // Already iterated
if (node1p->user3p() || node2p->user3p()) return 0; // Already merged
if (!m_hashed.sameNodes(node1p,node2p)) return 0; // walk of tree has same comparison
V3Hash hashval(node1p->user4p());
@@ -314,8 +322,8 @@ private:
//UINFO(9," wdup2 "<<level<<" "<<V3Hash(node2p->user4p())<<" "<<node2p<<endl);
m_walkLast1p = node1p;
m_walkLast2p = node2p;
node1p->user(true);
node2p->user(true);
node1p->user1(true);
node2p->user1(true);
if (node1p->nextp() && node2p->nextp()) {
return hashval.depth()+walkDupCodeNext(node1p->nextp(), node2p->nextp(), level+1);
}
@@ -379,8 +387,7 @@ private:
// Track all callers of each function
m_call.main(nodep);
//
AstNode::user3ClearTree(); // userp() used on entire tree
//In V3Hashed AstNode::user4ClearTree(); // userp() used on entire tree
//In V3Hashed AstNode::user4ClearTree(); // user4p() used on entire tree
// Iterate modules backwards, in bottom-up order.
// Required so that a module instantiating another can benefit from collapsing.
nodep->iterateChildrenBackwards(*this);
@@ -392,8 +399,11 @@ private:
m_hashed.clear();
// Compute hash of all statement trees in the function
m_state = STATE_HASH;
nodep->iterateChildren(*this);
nodep->iterateChildren(*this);
m_state = STATE_IDLE;
if (debug()>=9) {
m_hashed.dumpFilePrefixed("combine");
}
// Walk the hashes removing empty functions
if (emptyFunctionDeletion()) {
walkEmptyFuncs();
@@ -408,6 +418,7 @@ private:
nodep->iterateChildren(*this);
m_state = STATE_IDLE;
}
m_modp = NULL;
}
virtual void visit(AstCFunc* nodep, AstNUser*) {
m_funcp = nodep;
+2 -2
View File
@@ -1,4 +1,4 @@
// $Id$ //-*- C++ -*-
// -*- C++ -*-
//*************************************************************************
// DESCRIPTION: Verilator: Combine common code into functions
//
@@ -8,7 +8,7 @@
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
+387 -50
View File
@@ -1,4 +1,3 @@
// $Id$
//*************************************************************************
// DESCRIPTION: Verilator: Constant folding
//
@@ -8,7 +7,7 @@
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
@@ -27,10 +26,11 @@
#include "config_build.h"
#include "verilatedos.h"
#include <stdio.h>
#include <stdarg.h>
#include <cstdio>
#include <cstdarg>
#include <unistd.h>
#include <map>
#include <algorithm>
#include "V3Global.h"
#include "V3Const.h"
@@ -44,11 +44,11 @@
class ConstVarMarkVisitor : public AstNVisitor {
// NODE STATE
// AstVar::userp -> bool, Var marked, 0=not set yet
// AstVar::user4p -> bool, Var marked, 0=not set yet
private:
// VISITORS
virtual void visit(AstVarRef* nodep, AstNUser*) {
if (nodep->varp()) nodep->varp()->user(1);
if (nodep->varp()) nodep->varp()->user4(1);
}
virtual void visit(AstNode* nodep, AstNUser*) {
nodep->iterateChildren(*this);
@@ -56,7 +56,7 @@ private:
public:
// CONSTUCTORS
ConstVarMarkVisitor(AstNode* nodep) {
AstNode::userClearTree();
AstNode::user4ClearTree(); // Check marked InUse before we're called
nodep->iterateAndNext(*this, NULL);
}
virtual ~ConstVarMarkVisitor() {}
@@ -64,13 +64,13 @@ public:
class ConstVarFindVisitor : public AstNVisitor {
// NODE STATE
// AstVar::userp -> bool, input from ConstVarMarkVisitor
// AstVar::user4p -> bool, input from ConstVarMarkVisitor
// MEMBERS
bool m_found;
private:
// VISITORS
virtual void visit(AstVarRef* nodep, AstNUser*) {
if (nodep->varp() && nodep->varp()->user()) m_found = true;
if (nodep->varp() && nodep->varp()->user4()) m_found = true;
}
virtual void visit(AstNode* nodep, AstNUser*) {
nodep->iterateChildren(*this);
@@ -92,9 +92,9 @@ public:
class ConstVisitor : public AstNVisitor {
private:
// NODE STATE
// ** only when m_warn is set. If state is needed other times,
// ** only when m_warn/m_expensive is set. If state is needed other times,
// ** must track down everywhere V3Const is called and make sure no overlaps.
// AstVar::userp -> Used by ConstVarMarkVisitor/ConstVarFindVisitor
// AstVar::user4p -> Used by ConstVarMarkVisitor/ConstVarFindVisitor
// STATE
bool m_params; // If true, propogate parameterized and true numbers only
@@ -102,11 +102,17 @@ private:
bool m_wremove; // Inside scope, no assignw removal
bool m_warn; // Output warnings
bool m_cpp; // C++ conversions only
AstModule* m_modp; // Current module
bool m_expensive; // Enable computationally expensive optimizations
AstModule* m_modp; // Current module
AstNode* m_scopep; // Current scope
//int debug() { return 9; }
// METHODS
static int debug() {
static int level = -1;
if (VL_UNLIKELY(level < 0)) level = v3Global.opt.debugSrcLevel(__FILE__);
return level;
}
bool operandConst (AstNode* nodep) {
return (nodep->castConst());
}
@@ -133,18 +139,103 @@ private:
if (rnodep->width() != bnodep->width()) return false;
return operandsSame(bnodep->lhsp(), rnodep->lhsp());
}
bool operandAsvLUp (AstNode* nodep) {
// BIASV(BIASV(CONSTll,lr),r) -> BIASV(CONSTll,BIASV(lr,r))
//
// Example of how this is useful:
// BIASV(BIASV(CONSTa,b...),BIASV(CONSTc,d...)) // hits operandAsvUp
// BIASV(CONSTa,BIASV(b...,BIASV(CONSTc,d...))) // hits operandAsvUp
// BIASV(CONSTa,BIASV(CONSTc,BIASV(c...,d...))) // hits operandAsvConst
// BIASV(BIASV(CONSTa,CONSTc),BIASV(c...,d...))) // hits normal constant propagation
// BIASV(CONST_a_c,BIASV(c...,d...)))
//
// Idea for the future: All BiComAsvs could be lists, sorted by if they're constant
AstNodeBiComAsv* bnodep = nodep->castNodeBiComAsv();
if (!bnodep) return false;
AstNodeBiComAsv* lnodep = bnodep->lhsp()->castNodeBiComAsv();
if (!lnodep) return false;
if (lnodep->type() != bnodep->type()) return false;
if (lnodep->width() != bnodep->width()) return false;
return lnodep->lhsp()->castConst();
}
bool operandAsvRUp (AstNode* nodep) {
// BIASV(l,BIASV(CONSTrl,rr)) -> BIASV(CONSTrl,BIASV(l,rr))
AstNodeBiComAsv* bnodep = nodep->castNodeBiComAsv();
if (!bnodep) return false;
AstNodeBiComAsv* rnodep = bnodep->rhsp()->castNodeBiComAsv();
if (!rnodep) return false;
if (rnodep->type() != bnodep->type()) return false;
if (rnodep->width() != bnodep->width()) return false;
return rnodep->lhsp()->castConst();
}
static bool operandAndOrSame(AstNode* nodep) {
AstNodeBiop* np = nodep->castNodeBiop();
AstNodeBiop* lp = np->lhsp()->castNodeBiop();
AstNodeBiop* rp = np->rhsp()->castNodeBiop();
return (lp && rp
&& lp->width()==rp->width()
&& lp->type()==rp->type()
&& operandsSame(lp->lhsp(),rp->lhsp()));
}
static bool matchOrAndNot(AstNodeBiop* nodep) {
// AstOr{$a, AstAnd{AstNot{$b}, $c}} if $a.width1, $a==$b => AstOr{$a,$c}
// Someday we'll sort the biops completely and this can be simplified
// This often results from our simplified clock generation:
// if (rst) ... else if (enable)... -> OR(rst,AND(!rst,enable))
AstNode* ap;
AstNodeBiop* andp;
if (nodep->lhsp()->castAnd()) { andp=nodep->lhsp()->castAnd(); ap=nodep->rhsp(); }
else if (nodep->rhsp()->castAnd()) { andp=nodep->rhsp()->castAnd(); ap=nodep->lhsp(); }
else return false;
AstNodeUniop* notp;
AstNode* cp;
if (andp->lhsp()->castNot()) { notp=andp->lhsp()->castNot(); cp=andp->rhsp(); }
else if (andp->rhsp()->castNot()) { notp=andp->rhsp()->castNot(); cp=andp->lhsp(); }
else return false;
AstNode* bp = notp->lhsp();
if (!operandsSame(ap, bp)) return false;
// Do it
cp->unlinkFrBack();
andp->unlinkFrBack()->deleteTree(); andp=NULL; notp=NULL;
// Replace whichever branch is now dangling
if (nodep->rhsp()) nodep->lhsp(cp);
else nodep->rhsp(cp);
return true;
}
static bool operandShiftSame(AstNode* nodep) {
AstNodeBiop* np = nodep->castNodeBiop();
{
AstShiftL* lp = np->lhsp()->castShiftL();
AstShiftL* rp = np->rhsp()->castShiftL();
if (lp && rp) {
return (lp->width() == rp->width()
&& lp->lhsp()->width() == rp->lhsp()->width()
&& operandsSame(lp->rhsp(), rp->rhsp()));
}
}
{
AstShiftR* lp = np->lhsp()->castShiftR();
AstShiftR* rp = np->rhsp()->castShiftR();
if (lp && rp) {
return (lp->width() == rp->width()
&& lp->lhsp()->width() == rp->lhsp()->width()
&& operandsSame(lp->rhsp(), rp->rhsp()));
}
}
return false;
}
bool operandHugeShiftL(AstNodeBiop* nodep) {
return (nodep->rhsp()->castConst()
&& nodep->rhsp()->castConst()->asInt() >= (uint32_t)(nodep->width()));
&& nodep->rhsp()->castConst()->toUInt() >= (uint32_t)(nodep->width()));
}
bool operandHugeShiftR(AstNodeBiop* nodep) {
return (nodep->rhsp()->castConst()
&& nodep->rhsp()->castConst()->asInt() >= (uint32_t)(nodep->lhsp()->width()));
&& nodep->rhsp()->castConst()->toUInt() >= (uint32_t)(nodep->lhsp()->width()));
}
bool operandIsTwo(AstNode* nodep) {
return (nodep->castConst()
&& nodep->width() <= VL_QUADSIZE
&& nodep->castConst()->asQuad()==2);
&& nodep->width() <= VL_QUADSIZE
&& nodep->castConst()->toUQuad()==2);
}
bool operandIsTwostate(AstNode* nodep) {
return (nodep->castConst()
@@ -181,7 +272,7 @@ private:
return (nodep->rhsp()->castConst()
&& nodep->fromp()->castNodeVarRef()
&& !nodep->fromp()->castNodeVarRef()->lvalue()
&& ((int)(nodep->rhsp()->castConst()->asInt())
&& ((int)(nodep->rhsp()->castConst()->toUInt())
>= nodep->fromp()->castNodeVarRef()->varp()->widthWords()));
}
bool operandSelFull(AstSel* nodep) {
@@ -216,15 +307,19 @@ private:
bool warnSelect(AstSel* nodep) {
AstNode* basefromp = AstArraySel::baseFromp(nodep->fromp());
if (AstNodeVarRef* varrefp = basefromp->castNodeVarRef()) {
AstVar* varp = varrefp->varp();
if (m_warn
&& nodep->lsbp()->castConst()
&& nodep->widthp()->castConst()
&& (!varrefp->varp()->rangep() || varrefp->varp()->msb()) // else it's non-resolvable parameterized
&& ( ( (nodep->msbConst() > varrefp->varp()->msb())
|| (nodep->lsbConst() > varrefp->varp()->msb())))) {
&& (!varp->rangep() || varp->msb()) // else it's non-resolvable parameterized
&& ( ( (nodep->msbConst() > varp->msbMaxSelect())
|| (nodep->lsbConst() > varp->msbMaxSelect())))) {
// See also warning in V3Width
nodep->v3error("Selection index out of range: "
<<nodep->msbConst()<<":"<<nodep->lsbConst()
<<" outside "<<varrefp->varp()->msb()<<":0");
<<" outside "<<varp->msbMaxSelect()<<":0"
<<(varp->lsb()>=0 ? ""
:" (adjusted +"+cvtToStr(-varp->lsb())+" to account for negative lsb)"));
}
}
return false; // Not a transform, so NOP
@@ -365,6 +460,66 @@ private:
if (rp->lhsp()->castConst() && rp->rhsp()->castConst()) replaceConst(rp);
//nodep->dumpTree(cout, " repAsvConst_new: ");
}
void replaceAsvLUp (AstNodeBiop* nodep) {
// BIASV(BIASV(CONSTll,lr),r) -> BIASV(CONSTll,BIASV(lr,r))
AstNodeBiop* lp = nodep->lhsp()->unlinkFrBack()->castNodeBiop();
AstNode* llp = lp->lhsp()->unlinkFrBack();
AstNode* lrp = lp->rhsp()->unlinkFrBack();
AstNode* rp = nodep->rhsp()->unlinkFrBack();
nodep->lhsp(llp);
nodep->rhsp(lp);
lp->lhsp(lrp);
lp->rhsp(rp);
//nodep->dumpTree(cout, " repAsvLUp_new: ");
}
void replaceAsvRUp (AstNodeBiop* nodep) {
// BIASV(l,BIASV(CONSTrl,rr)) -> BIASV(CONSTrl,BIASV(l,rr))
AstNode* lp = nodep->lhsp()->unlinkFrBack();
AstNodeBiop* rp = nodep->rhsp()->unlinkFrBack()->castNodeBiop();
AstNode* rlp = rp->lhsp()->unlinkFrBack();
AstNode* rrp = rp->rhsp()->unlinkFrBack();
nodep->lhsp(rlp);
nodep->rhsp(rp);
rp->lhsp(lp);
rp->rhsp(rrp);
//nodep->dumpTree(cout, " repAsvRUp_new: ");
}
void replaceAndOr (AstNodeBiop* nodep) {
// Or(And(CONSTll,lr),And(CONSTrl==ll,rr)) -> And(CONSTll,Or(lr,rr))
// (Or/And may also be reversed)
AstNodeBiop* lp = nodep->lhsp()->unlinkFrBack()->castNodeBiop();
AstNode* llp = lp->lhsp()->unlinkFrBack();
AstNode* lrp = lp->rhsp()->unlinkFrBack();
AstNodeBiop* rp = nodep->rhsp()->unlinkFrBack()->castNodeBiop();
AstNode* rlp = rp->lhsp()->unlinkFrBack();
AstNode* rrp = rp->rhsp()->unlinkFrBack();
nodep->replaceWith(lp);
lp->lhsp(llp);
lp->rhsp(nodep);
nodep->lhsp(lrp);
nodep->rhsp(rrp);
rp->deleteTree();
rlp->deleteTree();
//nodep->dumpTree(cout, " repAndOr_new: ");
}
void replaceShiftSame (AstNodeBiop* nodep) {
// Or(Shift(ll,CONSTlr),Shift(rl,CONSTrr==lr)) -> Shift(Or(ll,rl),CONSTlr)
// (Or/And may also be reversed)
AstNodeBiop* lp = nodep->lhsp()->unlinkFrBack()->castNodeBiop();
AstNode* llp = lp->lhsp()->unlinkFrBack();
AstNode* lrp = lp->rhsp()->unlinkFrBack();
AstNodeBiop* rp = nodep->rhsp()->unlinkFrBack()->castNodeBiop();
AstNode* rlp = rp->lhsp()->unlinkFrBack();
AstNode* rrp = rp->rhsp()->unlinkFrBack();
nodep->replaceWith(lp);
lp->lhsp(nodep);
lp->rhsp(lrp);
nodep->lhsp(llp);
nodep->rhsp(rlp);
rp->deleteTree();
rrp->deleteTree();
//nodep->dumpTree(cout, " repShiftSame_new: ");
}
void replaceExtend (AstNode* nodep, AstNode* arg0p) {
// -> EXTEND(nodep)
// like a AstExtend{$rhsp}, but we need to set the width correctly from base node
@@ -412,7 +567,7 @@ private:
AstNode* ap = lhsp->lhsp()->unlinkFrBack();
AstNode* bp = lhsp->rhsp()->unlinkFrBack();
AstNodeBiop* shift1p = nodep;
AstNodeBiop* shift2p = nodep->cloneTree(true)->castNodeBiop();
AstNodeBiop* shift2p = nodep->cloneTree(true);
shift1p->lhsp(ap); shift1p->rhsp(shiftp->cloneTree(true));
shift2p->lhsp(bp); shift2p->rhsp(shiftp);
AstNodeBiop* newp = lhsp;
@@ -433,8 +588,8 @@ private:
nodep->accept(*this); // Further reduce, either node may have more reductions.
} else {
// We know shift amounts are constant, but might be a mixed left/right shift
int shift1 = shift1p->castConst()->asInt(); if (lhsp->castShiftR()) shift1=-shift1;
int shift2 = shift2p->castConst()->asInt(); if (nodep->castShiftR()) shift2=-shift2;
int shift1 = shift1p->castConst()->toUInt(); if (lhsp->castShiftR()) shift1=-shift1;
int shift2 = shift2p->castConst()->toUInt(); if (nodep->castShiftR()) shift2=-shift2;
int newshift = shift1+shift2;
shift1p->deleteTree(); shift1p=NULL;
shift2p->deleteTree(); shift1p=NULL;
@@ -491,11 +646,11 @@ private:
if (!varNotReferenced(nodep->rhsp(), varref1p->varp())) return false;
if (!varNotReferenced(nextp->rhsp(), varref2p->varp())) return false;
// Swap?
if (( con1p->asInt() != con2p->asInt() + sel2p->width())
&&(con2p->asInt() != con1p->asInt() + sel1p->width())) return false;
bool lsbFirstAssign = (con1p->asInt() < con2p->asInt());
if (( con1p->toSInt() != con2p->toSInt() + sel2p->width())
&&(con2p->toSInt() != con1p->toSInt() + sel1p->width())) return false;
bool lsbFirstAssign = (con1p->toUInt() < con2p->toUInt());
// If the user already has nice 32-bit divisions, keep them to aid later subdivision
//if (VL_BITBIT_I(con1p->asInt()) == 0) return false;
//if (VL_BITBIT_I(con1p->toUInt()) == 0) return false;
UINFO(4,"replaceAssignMultiSel "<<nodep<<endl);
UINFO(4," && "<<nextp<<endl);
//nodep->dumpTree(cout, "comb1: ");
@@ -518,7 +673,7 @@ private:
return true;
}
bool varNotReferenced(AstNode* nodep, AstVar* varp, bool level=0) {
bool varNotReferenced(AstNode* nodep, AstVar* varp, int level=0) {
// Return true if varp never referenced under node.
// Return false if referenced, or tree too deep to be worth it
if (!nodep) return true;
@@ -548,6 +703,9 @@ private:
else if (!m_cpp && nodep->lhsp()->castConcat()) {
bool need_temp = false;
if (m_warn && !nodep->castAssignDly()) { // Is same var on LHS and RHS?
// Note only do this (need user4) when m_warn, which is
// done as unique visitor
AstUser4InUse m_inuser4;
ConstVarMarkVisitor mark(nodep->lhsp());
ConstVarFindVisitor find(nodep->rhsp());
if (find.found()) need_temp = true;
@@ -597,8 +755,8 @@ private:
if (!m_modp) nodep->v3fatalSrc("Not under module");
// We could create just one temp variable, but we'll get better optimization
// if we make one per term.
string name1 = ((string)"__Vconcswap__"+cvtToStr(m_modp->varNumGetInc()));
string name2 = ((string)"__Vconcswap__"+cvtToStr(m_modp->varNumGetInc()));
string name1 = ((string)"__Vconcswap"+cvtToStr(m_modp->varNumGetInc()));
string name2 = ((string)"__Vconcswap"+cvtToStr(m_modp->varNumGetInc()));
AstVar* temp1p = new AstVar(sel1p->fileline(), AstVarType::BLOCKTEMP, name1,
new AstRange(sel1p->fileline(), msb1-lsb1, 0));
AstVar* temp2p = new AstVar(sel2p->fileline(), AstVarType::BLOCKTEMP, name2,
@@ -649,7 +807,7 @@ private:
if (!nodep->castAnd()->rhsp()->castShiftR()) return false;
AstShiftR* shiftp = nodep->castAnd()->rhsp()->castShiftR();
if (!shiftp->rhsp()->castConst()) return false;
if ((uint32_t)(nodep->width()) <= shiftp->rhsp()->castConst()->asInt()) return false;
if ((uint32_t)(nodep->width()) <= shiftp->rhsp()->castConst()->toUInt()) return false;
return true;
}
void replaceBoolShift(AstNode* nodep) {
@@ -745,7 +903,7 @@ private:
// Recurse rather then calling node->iterate to prevent 2^n recursion!
if (operandConcatMove(abConcp)) moveConcat(abConcp);
bcConcp->deleteTree(); bcConcp=NULL;
} else {
} else {
AstConcat* abConcp = nodep->lhsp()->castConcat(); abConcp->unlinkFrBack();
AstNode* ap = abConcp->lhsp()->unlinkFrBack();
AstNode* bp = abConcp->rhsp()->unlinkFrBack();
@@ -785,7 +943,7 @@ private:
AstNode* newlsbp;
if (lsb1p->castConst() && lsb2p->castConst()) {
newlsbp = new AstConst(lsb1p->fileline(),
lsb1p->castConst()->asInt() + lsb2p->castConst()->asInt());
lsb1p->castConst()->toUInt() + lsb2p->castConst()->toUInt());
lsb1p->deleteTree(); lsb1p=NULL;
lsb2p->deleteTree(); lsb2p=NULL;
} else {
@@ -852,7 +1010,7 @@ private:
AstNode* widthp = nodep->widthp()->unlinkFrBack();
AstSel* newp = new AstSel(nodep->fileline(),
fromp,
new AstConst(lsbp->fileline(), lsbp->asInt() % fromp->width()),
new AstConst(lsbp->fileline(), lsbp->toUInt() % fromp->width()),
widthp);
newp->widthSignedFrom(nodep);
nodep->replaceWith(newp); nodep->deleteTree(); nodep=NULL;
@@ -908,19 +1066,26 @@ private:
} else nodep->v3fatalSrc("Missing ATTR type case\n");
}
}
bool onlySenItemInSenTree(AstNodeSenItem* nodep) {
// Only one if it's not in a list
return (!nodep->nextp() && nodep->backp()->nextp() != nodep);
}
virtual void visit(AstSenItem* nodep, AstNUser*) {
nodep->iterateChildren(*this);
if (nodep->sensp()->castConst()
|| (nodep->varrefp() && nodep->varrefp()->varp()->isParam())) {
// Constants in sensitivity lists may be removed (we'll simplify later)
AstSenItem* newp;
if (nodep->isClocked()) { // A constant can never get a pos/negexge
newp = new AstSenItem(nodep->fileline(), AstSenItem::Never());
if (onlySenItemInSenTree(nodep)) {
nodep->replaceWith(new AstSenItem(nodep->fileline(), AstSenItem::Never()));
nodep->deleteTree(); nodep=NULL;
} else {
nodep->unlinkFrBack()->deleteTree(); nodep=NULL;
}
} else { // Otherwise it may compute a result that needs to settle out
newp = new AstSenItem(nodep->fileline(), AstSenItem::Combo());
nodep->replaceWith(new AstSenItem(nodep->fileline(), AstSenItem::Combo()));
nodep->deleteTree(); nodep=NULL;
}
nodep->replaceWith(newp);
nodep->deleteTree(); nodep=NULL;
} else if (nodep->sensp()->castNot()) {
// V3Gate may propagate NOTs into clocks... Just deal with it
AstNode* sensp = nodep->sensp();
@@ -940,6 +1105,150 @@ private:
if (nodep->hasVar() && !nodep->varrefp()) nodep->v3fatalSrc("Null sensitivity variable");
}
}
virtual void visit(AstSenGate* nodep, AstNUser*) {
nodep->iterateChildren(*this);
if (AstConst* constp = nodep->rhsp()->castConst()) {
if (constp->isZero()) {
UINFO(4,"SENGATE(...,0)->NEVER"<<endl);
if (onlySenItemInSenTree(nodep)) {
nodep->replaceWith(new AstSenItem(nodep->fileline(), AstSenItem::Never()));
nodep->deleteTree(); nodep=NULL;
} else {
nodep->unlinkFrBack()->deleteTree(); nodep=NULL;
}
} else {
UINFO(4,"SENGATE(SENITEM,0)->ALWAYS SENITEM"<<endl);
AstNode* senitemp = nodep->sensesp()->unlinkFrBack();
nodep->replaceWith(senitemp);
nodep->deleteTree(); nodep=NULL;
}
}
}
struct SenItemCmp {
inline bool operator () (AstNodeSenItem* lhsp, AstNodeSenItem* rhsp) const {
if (lhsp->type() < rhsp->type()) return true;
if (lhsp->type() > rhsp->type()) return false;
const AstSenItem* litemp = lhsp->castSenItem();
const AstSenItem* ritemp = rhsp->castSenItem();
if (litemp && ritemp) {
// Looks visually better if we keep sorted by name
if (litemp->edgeType() < ritemp->edgeType()) return true;
if (litemp->edgeType() > ritemp->edgeType()) return false;
if (!litemp->varrefp() && ritemp->varrefp()) return true;
if ( litemp->varrefp() && !ritemp->varrefp()) return false;
if (litemp->varrefp() && ritemp->varrefp()) {
if (litemp->varrefp()->name() < ritemp->varrefp()->name()) return true;
if (litemp->varrefp()->name() > ritemp->varrefp()->name()) return false;
// But might be same name with different scopes
if (litemp->varrefp()->varScopep() < ritemp->varrefp()->varScopep()) return true;
if (litemp->varrefp()->varScopep() > ritemp->varrefp()->varScopep()) return false;
}
}
return false;
}
};
virtual void visit(AstSenTree* nodep, AstNUser*) {
nodep->iterateChildren(*this);
if (m_expensive) {
//cout<<endl; nodep->dumpTree(cout,"ssin: ");
// Optimize ideas for the future:
// SENTREE(... SENGATE(x,a), SENGATE(SENITEM(x),b) ...) => SENGATE(x,OR(a,b))
// SENTREE(... SENITEM(x), SENGATE(SENITEM(x),*) ...) => SENITEM(x)
// Do we need the SENITEM's to be identical? No because we're
// ORing between them; we just need to insure that the result is at
// least as frequently activating. So we simply
// SENGATE(SENITEM(x)) -> SENITEM(x), then let it collapse with the
// other SENITEM(x).
{
AstUser4InUse m_inuse4;
// Mark x in SENITEM(x)
for (AstNodeSenItem* senp = nodep->sensesp()->castNodeSenItem();
senp; senp=senp->nextp()->castNodeSenItem()) {
if (AstSenItem* itemp = senp->castSenItem()) {
if (itemp->varrefp() && itemp->varrefp()->varScopep()) {
itemp->varrefp()->varScopep()->user4(1);
}
}
}
// Find x in SENTREE(SENITEM(x))
for (AstNodeSenItem* nextp, * senp = nodep->sensesp()->castNodeSenItem();
senp; senp=nextp) {
nextp=senp->nextp()->castNodeSenItem();
if (AstSenGate* gatep = senp->castSenGate()) {
if (AstSenItem* itemp = gatep->sensesp()->castSenItem()) {
if (itemp->varrefp() && itemp->varrefp()->varScopep()) {
if (itemp->varrefp()->varScopep()->user4()) {
// Found, push this item up to the top
itemp->unlinkFrBack();
nodep->addSensesp(itemp);
gatep->unlinkFrBack()->deleteTree(); gatep=NULL; senp=NULL;
}
}
}
}
}
}
// Sort the sensitivity names so "posedge a or b" and "posedge b or a" end up together.
// Also, remove duplicate assignments, and fold POS&NEGs into ANYEDGEs
// Make things a little faster; check first if we need a sort
for (AstNodeSenItem* nextp, * senp = nodep->sensesp()->castNodeSenItem();
senp; senp=nextp) {
nextp=senp->nextp()->castNodeSenItem();
SenItemCmp cmp;
if (nextp && !cmp(senp, nextp)) {
// Something's out of order, sort it
senp = NULL;
vector<AstNodeSenItem*> vec;
for (AstNodeSenItem* senp = nodep->sensesp()->castNodeSenItem(); senp; senp=senp->nextp()->castNodeSenItem()) {
vec.push_back(senp);
}
sort(vec.begin(), vec.end(), SenItemCmp());
for (vector<AstNodeSenItem*>::iterator it=vec.begin(); it!=vec.end(); ++it) {
(*it)->unlinkFrBack();
}
for (vector<AstNodeSenItem*>::iterator it=vec.begin(); it!=vec.end(); ++it) {
nodep->addSensesp(*it);
}
break;
}
}
// Pass2, remove dup edges
for (AstNodeSenItem* nextp, * senp = nodep->sensesp()->castNodeSenItem();
senp; senp=nextp) {
nextp=senp->nextp()->castNodeSenItem();
AstNodeSenItem* cmpp = nextp;
AstSenItem* litemp = senp->castSenItem();
AstSenItem* ritemp = cmpp->castSenItem();
if (litemp && ritemp) {
if (litemp->varrefp() && ritemp->varrefp() && litemp->varrefp()->sameTree(ritemp->varrefp())
|| (!litemp->varrefp() && !ritemp->varrefp())) {
// We've sorted in the order ANY, BOTH, POS, NEG, so we don't need to try opposite orders
if (( litemp->edgeType()==AstEdgeType::ANYEDGE) // ANY or {BOTH|POS|NEG} -> ANY
|| (litemp->edgeType()==AstEdgeType::BOTHEDGE) // BOTH or {POS|NEG} -> BOTH
|| (litemp->edgeType()==AstEdgeType::POSEDGE // POS or NEG -> BOTH
&& ritemp->edgeType()==AstEdgeType::NEGEDGE)
|| (litemp->edgeType()==ritemp->edgeType()) // Identical edges
) {
// Fix edge of old node
if (litemp->edgeType()==AstEdgeType::POSEDGE
&& ritemp->edgeType()==AstEdgeType::NEGEDGE)
litemp->edgeType(AstEdgeType::BOTHEDGE);
// Remove redundant node
ritemp->unlinkFrBack()->deleteTree(); ritemp=NULL; cmpp=NULL;
// Try to collapse again
nextp=litemp;
}
}
}
}
//nodep->dumpTree(cout,"ssou: ");
}
}
//-----
// Zero elimination
@@ -1017,7 +1326,7 @@ private:
&& nodep->ifsp() && nodep->elsesp()) {
UINFO(4,"IF(NOT {x}) => IF(x) swapped if/else"<<nodep<<endl);
AstNode* condp = nodep->condp()->castNot()->lhsp()->unlinkFrBackWithNext();
AstNode* ifsp = nodep->ifsp()->unlinkFrBackWithNext();
AstNode* ifsp = nodep->ifsp()->unlinkFrBackWithNext();
AstNode* elsesp = nodep->elsesp()->unlinkFrBackWithNext();
AstIf* ifp = new AstIf(nodep->fileline(), condp, elsesp, ifsp);
ifp->branchPred(nodep->branchPred().invert());
@@ -1038,7 +1347,7 @@ private:
nodep->deleteTree(); nodep=NULL;
}
else if (0 // Disabled, as vpm assertions are faster without due to short-circuiting
&& operandIfIf(nodep)) {
&& operandIfIf(nodep)) {
UINFO(0,"IF({a}) IF({b}) => IF({a} && {b})"<<endl);
AstNodeIf* lowerIfp = nodep->ifsp()->castNodeIf();
AstNode* condp = nodep->condp()->unlinkFrBack();
@@ -1129,9 +1438,18 @@ private:
// $accessor_name, ...
// # ,, gets replaced with a , rather than &&
// }" # bracket not paren
// ,"function to call"
// or ,"AstREPLACEMENT_TYPE{ $accessor }"
// or ,"! # Print line number when matches, so can see operations
// ,"what to call"
//
// Where "what_to_call" is:
// "function to call"
// "AstREPLACEMENT_TYPE{ $accessor }"
// "! # Print line number when matches, so can see operations
// "NEVER" # Print error message
// "DONE" # Process of matching did the transform already
// In the future maybe support more complicated match & replace:
// ("AstOr {%a, AstAnd{AstNot{%b}, %c}} if %a.width1 if %a==%b", "AstOr{%a,%c}; %b.delete");
// Lhs/rhs would be implied; for non math operations you'd need $lhsp etc.
// Lint Checks
// v--- *1* These ops are always first, as we warn before replacing
@@ -1205,6 +1523,8 @@ private:
TREEOP("AstNodeBiCom{!$lhsp.castConst, $rhsp.castConst}", "swapSides(nodep)");
TREEOP("AstNodeBiComAsv{operandAsvConst(nodep)}", "replaceAsv(nodep)");
TREEOP("AstNodeBiComAsv{operandAsvSame(nodep)}", "replaceAsv(nodep)");
TREEOP("AstNodeBiComAsv{operandAsvLUp(nodep)}", "replaceAsvLUp(nodep)");
TREEOP("AstNodeBiComAsv{operandAsvRUp(nodep)}", "replaceAsvRUp(nodep)");
// v--- *1* as These ops are always first, as we warn before replacing
TREEOP1("AstLt {$lhsp, $rhsp.isZero}", "replaceNumSigned(nodep,0)");
TREEOP1("AstGte {$lhsp, $rhsp.isZero}", "replaceNumSigned(nodep,1)");
@@ -1316,6 +1636,14 @@ private:
// CONCAT({const},CONCAT({const},{c})) -> CONCAT((constifiedCONC{const|const},{c}))
TREEOPV("AstConcat{operandConcatMove(nodep)}", "moveConcat(nodep)");
TREEOPV("AstConcat{$lhsp.isZero, $rhsp}", "replaceExtend(nodep, nodep->rhsp())");
// Common two-level operations that can be simplified
TREEOP ("AstAnd {$lhsp.castOr, $rhsp.castOr, operandAndOrSame(nodep)}", "replaceAndOr(nodep)");
TREEOP ("AstOr {$lhsp.castAnd,$rhsp.castAnd,operandAndOrSame(nodep)}", "replaceAndOr(nodep)");
TREEOP ("AstOr {matchOrAndNot(nodep)}", "DONE");
TREEOP ("AstAnd {operandShiftSame(nodep)}", "replaceShiftSame(nodep)");
TREEOP ("AstOr {operandShiftSame(nodep)}", "replaceShiftSame(nodep)");
TREEOP ("AstXor {operandShiftSame(nodep)}", "replaceShiftSame(nodep)");
TREEOP ("AstXnor{operandShiftSame(nodep)}", "replaceShiftSame(nodep)");
// Note can't simplify a extend{extends}, extends{extend}, as the sign bits end up in the wrong places
TREEOPV("AstExtend {$lhsp.castExtend}", "replaceExtend(nodep, nodep->lhsp()->castExtend()->lhsp())");
TREEOPV("AstExtendS{$lhsp.castExtendS}", "replaceExtend(nodep, nodep->lhsp()->castExtendS()->lhsp())");
@@ -1359,8 +1687,11 @@ private:
public:
// CONSTUCTORS
ConstVisitor(bool params, bool required, bool warn, bool cpp) {
m_params = params; m_required = required; m_warn=warn; m_cpp=cpp;
ConstVisitor(bool params, bool expensive, bool warn, bool cpp) {
m_params = params; m_required = params;
m_expensive = expensive;
m_warn = warn;
m_cpp = cpp;
m_wremove = true;
m_modp = NULL;
m_scopep = NULL;
@@ -1381,19 +1712,21 @@ void V3Const::constifyParam(AstNode* nodep) {
V3Width::widthParams(nodep);
V3Signed::signedParams(nodep);
}
ConstVisitor visitor (true,true,false,false);
ConstVisitor visitor (true,false,false,false);
visitor.main(nodep);
// Because we do edits, nodep links may get trashed and core dump this.
//if (debug()>0) nodep->dumpTree(cout," forceConDONE: ");
}
void V3Const::constifyAll(AstNetlist* nodep) {
// Only call from Verilator.cpp, as it uses user#'s
UINFO(2,__FUNCTION__<<": "<<endl);
ConstVisitor visitor (false,false,false,false);
ConstVisitor visitor (false,true,false,false);
visitor.main(nodep);
}
void V3Const::constifyAllLint(AstNetlist* nodep) {
// Only call from Verilator.cpp, as it uses user#'s
UINFO(2,__FUNCTION__<<": "<<endl);
ConstVisitor visitor (false,false,true,false);
visitor.main(nodep);
@@ -1410,3 +1743,7 @@ void V3Const::constifyTree(AstNode* nodep) {
visitor.main(nodep);
}
void V3Const::constifyTreeExpensive(AstNode* nodep) {
ConstVisitor visitor (false,true,false,false);
visitor.main(nodep);
}
+4 -2
View File
@@ -1,4 +1,4 @@
// $Id$ //-*- C++ -*-
// -*- C++ -*-
//*************************************************************************
// DESCRIPTION: Verilator: Propagate constants across AST
//
@@ -8,7 +8,7 @@
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
@@ -40,6 +40,8 @@ public:
static void constifyCpp(AstNetlist* nodep);
// Only the current node and lower
static void constifyTree(AstNode* nodep);
// Only the current node and lower, with special SenTree optimization
static void constifyTreeExpensive(AstNode* nodep);
};
#endif // Guard
+185 -22
View File
@@ -1,4 +1,3 @@
// $Id$
//*************************************************************************
// DESCRIPTION: Verilator: Netlist (top level) functions
//
@@ -8,7 +7,7 @@
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
@@ -31,15 +30,14 @@
#include "config_build.h"
#include "verilatedos.h"
#include <stdio.h>
#include <stdarg.h>
#include <cstdio>
#include <cstdarg>
#include <unistd.h>
#include <map>
#include "V3Global.h"
#include "V3Coverage.h"
#include "V3Ast.h"
#include "V3Const.h"
//######################################################################
// Coverage state, as a visitor of each AstNode
@@ -47,59 +45,198 @@
class CoverageVisitor : public AstNVisitor {
private:
// TYPES
typedef map<FileLine*,int> FileMap;
typedef map<string,int> FileMap;
// STATE
bool m_checkBlock; // Should this block get covered?
AstModule* m_modp; // Current module to add statement to
bool m_inToggleOff; // In function/task etc
FileMap m_fileps; // Column counts for each fileline
//int debug() { return 9; }
string m_beginHier; // AstBegin hier name for user coverage points
// METHODS
AstCoverInc* newCoverInc(FileLine* fl, const string& type, const string& comment) {
static int debug() {
static int level = -1;
if (VL_UNLIKELY(level < 0)) level = v3Global.opt.debugSrcLevel(__FILE__);
return level;
}
const char* varIgnoreToggle(AstVar* nodep) {
// Return true if this shouldn't be traced
// See also similar rule in V3TraceDecl::varIgnoreTrace
string prettyName = nodep->prettyName();
if (!nodep->isToggleCoverable())
return "Not relevant signal type";
if (prettyName.c_str()[0] == '_')
return "Leading underscore";
if (prettyName.find("._") != string::npos)
return "Inlined leading underscore";
if ((nodep->width()*nodep->arrayElements()) > 256) return "Wide bus/array > 256 bits";
// We allow this, though tracing doesn't
// if (nodep->arrayp(1)) return "Unsupported: Multi-dimensional array";
return NULL;
}
AstCoverInc* newCoverInc(FileLine* fl, const string& hier,
const string& page_prefix, const string& comment) {
// For line coverage, we may have multiple if's on one line, so disambiguate if
// everything is otherwise identical
// (Don't set column otherwise as it may result in making bins not match up with
// different types of coverage enabled.)
string key = fl->filename()+"\001"+cvtToStr(fl->lineno())+"\001"+hier+"\001"+page_prefix+"\001"+comment;
int column = 0;
FileMap::iterator it = m_fileps.find(fl);
FileMap::iterator it = m_fileps.find(key);
if (it == m_fileps.end()) {
m_fileps.insert(make_pair(fl,column+1));
m_fileps.insert(make_pair(key,column+1));
} else {
column = (it->second)++;
}
AstCoverDecl* declp = new AstCoverDecl(fl, column, type, comment);
// We could use the basename of the filename to the page, but seems better for code
// from an include file to be listed under the module using it rather than the include file.
// Note the module name could have parameters appended, we'll consider this
// a feature as it allows for each parameterized block to be counted separately.
// Someday the user might be allowed to specify a different page suffix
string page = page_prefix + "/" + m_modp->prettyName();
AstCoverDecl* declp = new AstCoverDecl(fl, column, page, comment);
declp->hier(hier);
m_modp->addStmtp(declp);
return new AstCoverInc(fl, declp);
}
// VISITORS
// VISITORS - BOTH
virtual void visit(AstModule* nodep, AstNUser*) {
m_modp = nodep;
m_fileps.clear();
nodep->iterateChildren(*this);
m_modp = NULL;
}
// VISITORS - TOGGLE COVERAGE
virtual void visit(AstNodeFTask* nodep, AstNUser*) {
bool oldtog = m_inToggleOff;
{
m_inToggleOff = true;
nodep->iterateChildren(*this);
}
m_inToggleOff = oldtog;
}
virtual void visit(AstVar* nodep, AstNUser*) {
nodep->iterateChildren(*this);
if (m_modp && !m_inToggleOff
&& nodep->fileline()->coverageOn() && v3Global.opt.coverageToggle()) {
const char* disablep = varIgnoreToggle(nodep);
if (disablep) {
UINFO(4, " Disable Toggle: "<<disablep<<" "<<nodep<<endl);
} else {
UINFO(4, " Toggle: "<<nodep<<endl);
// There's several overall ways to approach this
// Treat like tracing, where a end-of-timestamp action sees all changes
// Works ok, but would be quite slow as need to reform vectors before the calls
// Convert to "always @ (posedge signal[#]) coverinc"
// Would mark many signals as clocks, precluding many later optimizations
// Convert to "if (x & !lastx) CoverInc"
// OK, but we couldn't later detect them to schedule where the IFs get called
// Convert to "AstCoverInc(CoverInc...)"
// We'll do this, and make the if(...) coverinc later.
// Compute size of the problem
int dimensions = 0;
for (AstRange* arrayp=nodep->arraysp(); arrayp; arrayp = arrayp->nextp()->castRange()) {
dimensions++;
}
// Add signal to hold the old value
string newvarname = (string)"__Vtogcov__"+nodep->shortName();
AstVar* chgVarp = new AstVar (nodep->fileline(), AstVarType::MODULETEMP, newvarname, nodep);
m_modp->addStmtp(chgVarp);
// Create bucket for each dimension * bit.
// This is necessarily an O(n^2) expansion, which is why
// we limit coverage to signals with < 256 bits.
vector<int> selects_docs; selects_docs.resize(dimensions);
vector<int> selects_code; selects_code.resize(dimensions);
toggleVarRecurse(nodep, chgVarp, nodep->arraysp(),
0, selects_docs, selects_code );
}
}
}
void toggleVarRecurse(AstVar* nodep, AstVar* chgVarp, AstRange* arrayp,
int dimension, vector<int>& selects_docs, vector<int>& selects_code) {
if (arrayp) {
for (int index=arrayp->lsbConst(); index<=arrayp->msbConst()+1; index++) {
// Handle the next dimension, if any
selects_docs[dimension] = index;
selects_code[dimension] = index - arrayp->lsbConst();
toggleVarRecurse(nodep, chgVarp, arrayp->nextp()->castRange(),
dimension+1, selects_docs, selects_code);
}
} else { // No more arraying - just each bit in the width
if (nodep->rangep()) {
for (int bitindex_docs=nodep->lsb(); bitindex_docs<nodep->msb()+1; bitindex_docs++) {
toggleVarBottom(nodep, chgVarp,
dimension, selects_docs, selects_code,
true, bitindex_docs);
}
} else {
toggleVarBottom(nodep, chgVarp,
dimension, selects_docs, selects_code,
false, 0);
}
}
}
void toggleVarBottom(AstVar* nodep, AstVar* chgVarp,
int dimension, vector<int>& selects_docs, vector<int>& selects_code,
bool bitsel, int bitindex_docs) {
string comment = nodep->name();
AstNode* varRefp = new AstVarRef(nodep->fileline(), nodep, false);
AstNode* chgRefp = new AstVarRef(nodep->fileline(), chgVarp, true);
// Now determine the name of, and how to get to the bit of this slice
for (int dim=0; dim<dimension; dim++) {
// Comments are strings, not symbols, so we don't need __BRA__ __KET__
comment += "["+cvtToStr(selects_docs[dim])+"]";
varRefp = new AstArraySel(nodep->fileline(), varRefp, selects_code[dim]);
chgRefp = new AstArraySel(nodep->fileline(), chgRefp, selects_code[dim]);
}
if (bitsel) {
comment += "["+cvtToStr(bitindex_docs)+"]";
int bitindex_code = bitindex_docs - nodep->lsb();
varRefp = new AstSel(nodep->fileline(), varRefp, bitindex_code, 1);
chgRefp = new AstSel(nodep->fileline(), chgRefp, bitindex_code, 1);
}
AstCoverToggle* newp = new AstCoverToggle (nodep->fileline(),
newCoverInc(nodep->fileline(), "", "v_toggle", comment),
varRefp, chgRefp);
m_modp->addStmtp(newp);
}
// VISITORS - LINE COVERAGE
virtual void visit(AstIf* nodep, AstNUser*) {
UINFO(4," IF: "<<nodep<<endl);
if (m_checkBlock) {
nodep->ifsp()->iterateAndNext(*this);
if (m_checkBlock && v3Global.opt.coverageLine()) { // if a "if" branch didn't disable it
if (m_checkBlock
&& nodep->fileline()->coverageOn() && v3Global.opt.coverageLine()) { // if a "if" branch didn't disable it
if (!nodep->backp()->castIf()
|| nodep->backp()->castIf()->elsesp()!=nodep) { // Ignore if else; did earlier
UINFO(4," COVER: "<<nodep<<endl);
nodep->addIfsp(newCoverInc(nodep->fileline(), "block", "if"));
nodep->addIfsp(newCoverInc(nodep->fileline(), "", "v_line", "if"));
}
}
// Don't do empty else's, only empty if/case's
if (nodep->elsesp()) {
m_checkBlock = true;
nodep->elsesp()->iterateAndNext(*this);
if (m_checkBlock && v3Global.opt.coverageLine()) { // if a "else" branch didn't disable it
if (m_checkBlock
&& nodep->fileline()->coverageOn() && v3Global.opt.coverageLine()) { // if a "else" branch didn't disable it
UINFO(4," COVER: "<<nodep<<endl);
if (nodep->elsesp()->castIf()) {
nodep->addElsesp(newCoverInc(nodep->elsesp()->fileline(), "block", "elsif"));
nodep->addElsesp(newCoverInc(nodep->elsesp()->fileline(), "", "v_line", "elsif"));
} else {
nodep->addElsesp(newCoverInc(nodep->elsesp()->fileline(), "block", "else"));
nodep->addElsesp(newCoverInc(nodep->elsesp()->fileline(), "", "v_line", "else"));
}
}
}
@@ -108,22 +245,25 @@ private:
}
virtual void visit(AstCaseItem* nodep, AstNUser*) {
UINFO(4," CASEI: "<<nodep<<endl);
if (m_checkBlock && v3Global.opt.coverageLine()) {
if (m_checkBlock
&& nodep->fileline()->coverageOn() && v3Global.opt.coverageLine()) {
nodep->bodysp()->iterateAndNext(*this);
if (m_checkBlock) { // if the case body didn't disable it
UINFO(4," COVER: "<<nodep<<endl);
nodep->addBodysp(newCoverInc(nodep->fileline(), "block", "case"));
nodep->addBodysp(newCoverInc(nodep->fileline(), "", "v_line", "case"));
}
m_checkBlock = true; // Reset as a child may have cleared it
}
}
virtual void visit(AstPslCover* nodep, AstNUser*) {
UINFO(4," PSLCOVER: "<<nodep<<endl);
m_checkBlock = true; // Always do cover blocks, even if there's a $stop
nodep->iterateChildren(*this);
if (!nodep->coverincp()) {
// Note the name may be overridden by V3Assert processing
nodep->coverincp(newCoverInc(nodep->fileline(), "psl_cover", "cover"));
nodep->coverincp(newCoverInc(nodep->fileline(), m_beginHier, "v_user", "cover"));
}
m_checkBlock = true; // Reset as a child may have cleared it
}
virtual void visit(AstStop* nodep, AstNUser*) {
UINFO(4," STOP: "<<nodep<<endl);
@@ -135,9 +275,30 @@ private:
UINFO(4," OFF: "<<nodep<<endl);
m_checkBlock = false;
nodep->unlinkFrBack()->deleteTree(); nodep=NULL;
} else {
if (m_checkBlock) nodep->iterateChildren(*this);
}
if (m_checkBlock) nodep->iterateChildren(*this);
}
virtual void visit(AstBegin* nodep, AstNUser*) {
// Record the hiearchy of any named begins, so we can apply to user
// coverage points. This is because there may be cov points inside
// generate blocks; each point should get separate consideration.
// (Currently ignored for line coverage, since any generate iteration
// covers the code in that line.)
string oldHier = m_beginHier;
bool oldtog = m_inToggleOff;
{
m_inToggleOff = true;
if (nodep->name()!="") {
m_beginHier = m_beginHier + (m_beginHier!=""?".":"") + nodep->name();
}
nodep->iterateChildren(*this);
}
m_beginHier = oldHier;
m_inToggleOff = oldtog;
}
// VISITORS - BOTH
virtual void visit(AstNode* nodep, AstNUser*) {
// Default: Just iterate
if (m_checkBlock) {
@@ -151,6 +312,8 @@ public:
CoverageVisitor(AstNetlist* rootp) {
// Operate on all modules
m_checkBlock = true;
m_beginHier = "";
m_inToggleOff = false;
rootp->iterateChildren(*this);
}
virtual ~CoverageVisitor() {}
+2 -2
View File
@@ -1,4 +1,4 @@
// $Id$ //-*- C++ -*-
// -*- C++ -*-
//*************************************************************************
// DESCRIPTION: Verilator: Coverage modules/signals together
//
@@ -8,7 +8,7 @@
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
+138
View File
@@ -0,0 +1,138 @@
//*************************************************************************
// DESCRIPTION: Verilator: Netlist (top level) functions
//
// Code available from: http://www.veripool.org/verilator
//
// AUTHORS: Wilson Snyder with Paul Wasson, Duane Gabli
//
//*************************************************************************
//
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
// Verilator is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
// GNU General Public License for more details.
//
//*************************************************************************
// COVERAGEJOIN TRANSFORMATIONS:
// If two COVERTOGGLEs have same VARSCOPE, combine them
//*************************************************************************
#include "config_build.h"
#include "verilatedos.h"
#include <cstdio>
#include <cstdarg>
#include <unistd.h>
#include <vector>
#include "V3Global.h"
#include "V3CoverageJoin.h"
#include "V3Hashed.h"
#include "V3Stats.h"
//######################################################################
// CoverageJoin state, as a visitor of each AstNode
class CoverageJoinVisitor : public AstNVisitor {
private:
// NODE STATE
// V3Hashed
// AstCoverToggle->VarRef::user4() // V3Hashed calculation
//AstUser4InUse In V3Hashed
// TYPES
typedef vector<AstCoverToggle*> ToggleList;
// STATE
ToggleList m_toggleps; // List of of all AstCoverToggle's
V3Double0 m_statToggleJoins; // Statistic tracking
// METHODS
static int debug() {
static int level = -1;
if (VL_UNLIKELY(level < 0)) level = v3Global.opt.debugSrcLevel(__FILE__);
return level;
}
void detectDuplicates() {
UINFO(9,"Finding duplicates\n");
// Note uses user4
V3Hashed hashed; // Duplicate code detection
// Hash all of the original signals we toggle cover
for (ToggleList::iterator it = m_toggleps.begin(); it != m_toggleps.end(); ++it) {
AstCoverToggle* nodep = *it;
hashed.hashAndInsert(nodep->origp());
}
// Find if there are any duplicates
for (ToggleList::iterator it = m_toggleps.begin(); it != m_toggleps.end(); ++it) {
AstCoverToggle* nodep = *it;
if (nodep->backp()) { // nodep->backp() is null if we already detected it's a duplicate and unlinked it
// Want to choose a base node, and keep finding duplicates that are identical
// This prevents making chains where a->b, then c->d, then b->c, as we'll find a->b, a->c, a->d directly.
while (1) {
V3Hashed::iterator dupit = hashed.findDuplicate(nodep->origp());
if (dupit == hashed.end()) break;
//
AstNode* duporigp = hashed.iteratorNodep(dupit);
// Note hashed will point to the original variable (what's duplicated), not the covertoggle,
// but we need to get back to the covertoggle which is immediately above, so:
AstCoverToggle* removep = duporigp->backp()->castCoverToggle();
if (!removep) nodep->v3fatalSrc("CoverageJoin duplicate of wrong type");
UINFO(8," Orig "<<nodep<<" -->> "<<nodep->incp()->declp()<<endl);
UINFO(8," dup "<<removep<<" -->> "<<removep->incp()->declp()<<endl);
// The CoverDecl the duplicate pointed to now needs to point to the original's data
// IE the duplicate will get the coverage number from the non-duplicate
AstCoverDecl* datadeclp = nodep->incp()->declp()->dataDeclThisp();
removep->incp()->declp()->dataDeclp (datadeclp);
UINFO(8," new "<<removep->incp()->declp()<<endl);
// Mark the found node as a duplicate of the first node
// (Not vice-versa as we have the iterator for the found node)
removep->unlinkFrBack(); pushDeletep(removep); removep=NULL;
// Remove node from comparison so don't hit it again
hashed.erase(dupit);
m_statToggleJoins++;
}
}
}
}
// VISITORS
virtual void visit(AstNetlist* nodep, AstNUser*) {
// Find all Coverage's
nodep->iterateChildren(*this);
// Simplify
detectDuplicates();
}
virtual void visit(AstCoverToggle* nodep, AstNUser*) {
m_toggleps.push_back(nodep);
nodep->iterateChildren(*this);
}
//--------------------
virtual void visit(AstNodeMath* nodep, AstNUser*) {} // Accelerate
virtual void visit(AstNode* nodep, AstNUser*) {
nodep->iterateChildren(*this);
}
public:
// CONSTUCTORS
CoverageJoinVisitor(AstNetlist* nodep) {
nodep->accept(*this);
}
virtual ~CoverageJoinVisitor() {
V3Stats::addStat("Coverage, Toggle points joined", m_statToggleJoins);
}
};
//######################################################################
// Coverage class functions
void V3CoverageJoin::coverageJoin(AstNetlist* rootp) {
UINFO(2,__FUNCTION__<<": "<<endl);
CoverageJoinVisitor visitor (rootp);
}
+37
View File
@@ -0,0 +1,37 @@
// -*- C++ -*-
//*************************************************************************
// DESCRIPTION: Verilator: Coverage modules/signals together
//
// Code available from: http://www.veripool.org/verilator
//
// AUTHORS: Wilson Snyder with Paul Wasson, Duane Gabli
//
//*************************************************************************
//
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
// Verilator is distributed in the hope that it will be useful,
// but WITHOUT ANY WARRANTY; without even the implied warranty of
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
// GNU General Public License for more details.
//
//*************************************************************************
#ifndef _V3COVERAGEJOIN_H_
#define _V3COVERAGEJOIN_H_ 1
#include "config_build.h"
#include "verilatedos.h"
#include "V3Error.h"
#include "V3Ast.h"
//============================================================================
class V3CoverageJoin {
public:
// CREATORS
static void coverageJoin(AstNetlist* rootp);
};
#endif // Guard
+18 -15
View File
@@ -1,4 +1,3 @@
// $Id$
//*************************************************************************
// DESCRIPTION: Verilator: Dead code elimination
//
@@ -8,7 +7,7 @@
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
@@ -21,13 +20,13 @@
// DEAD TRANSFORMATIONS:
// Remove any unreferenced modules
// Remove any unreferenced variables
//
//
//*************************************************************************
#include "config_build.h"
#include "verilatedos.h"
#include <stdio.h>
#include <stdarg.h>
#include <cstdio>
#include <cstdarg>
#include <unistd.h>
#include <vector>
#include <map>
@@ -46,7 +45,7 @@ private:
// VISITORS
virtual void visit(AstCell* nodep, AstNUser*) {
nodep->iterateChildren(*this);
nodep->modp()->user(nodep->modp()->user() - 1);
nodep->modp()->user1(nodep->modp()->user1() - 1);
}
//-----
virtual void visit(AstNodeMath* nodep, AstNUser*) {} // Accelerate
@@ -71,6 +70,7 @@ private:
// AstModule::user() -> int. Count of number of cells referencing this module.
// AstVar::user() -> int. Count of number of references
// AstVarScope::user() -> int. Count of number of references
AstUser1InUse m_inuser1;
// TYPES
typedef multimap<AstVarScope*,AstNodeAssign*> AssignMap;
@@ -81,23 +81,27 @@ private:
AssignMap m_assignMap; // List of all simple assignments for each variable
bool m_elimUserVars; // Allow removal of user's vars
bool m_sideEffect; // Side effects discovered in assign RHS
//int debug() { return 9; }
// METHODS
static int debug() {
static int level = -1;
if (VL_UNLIKELY(level < 0)) level = v3Global.opt.debugSrcLevel(__FILE__);
return level;
}
// VISITORS
virtual void visit(AstCell* nodep, AstNUser*) {
nodep->iterateChildren(*this);
nodep->modp()->user(nodep->modp()->user() + 1);
nodep->modp()->user1(nodep->modp()->user1() + 1);
}
virtual void visit(AstNodeVarRef* nodep, AstNUser*) {
nodep->iterateChildren(*this);
if (nodep->varScopep()) {
nodep->varScopep()->user(nodep->varScopep()->user() + 1);
nodep->varScopep()->varp()->user(nodep->varScopep()->varp()->user() + 1);
nodep->varScopep()->user1(nodep->varScopep()->user1() + 1);
nodep->varScopep()->varp()->user1(nodep->varScopep()->varp()->user1() + 1);
}
if (nodep->varp()) {
nodep->varp()->user(nodep->varp()->user() + 1);
nodep->varp()->user1(nodep->varp()->user1() + 1);
}
}
virtual void visit(AstVarScope* nodep, AstNUser*) {
@@ -143,7 +147,7 @@ private:
AstModule* nextmodp;
for (AstModule* modp = v3Global.rootp()->modulesp(); modp; modp=nextmodp) {
nextmodp = modp->nextp()->castModule();
if (modp->level()>2 && modp->user()==0) {
if (modp->level()>2 && modp->user1()==0) {
// > 2 because L1 is the wrapper, L2 is the top user module
UINFO(4," Dead module "<<modp<<endl);
// And its children may now be killable too; correct counts
@@ -164,7 +168,7 @@ private:
// Delete any unused varscopes
for (vector<AstVarScope*>::iterator it = m_vscsp.begin(); it!=m_vscsp.end(); ++it) {
AstVarScope* vscp = *it;
if (vscp->user() == 0 && canElim(vscp->varp())) {
if (vscp->user1() == 0 && canElim(vscp->varp())) {
UINFO(4," Dead "<<vscp<<endl);
pair <AssignMap::iterator,AssignMap::iterator> eqrange = m_assignMap.equal_range(vscp);
for (AssignMap::iterator it = eqrange.first; it != eqrange.second; ++it) {
@@ -176,7 +180,7 @@ private:
}
}
for (vector<AstVar*>::iterator it = m_varsp.begin(); it!=m_varsp.end(); ++it) {
if ((*it)->user() == 0 && canElim((*it))) {
if ((*it)->user1() == 0 && canElim((*it))) {
UINFO(4," Dead "<<(*it)<<endl);
(*it)->unlinkFrBack()->deleteTree(); (*it)=NULL;
}
@@ -189,7 +193,6 @@ public:
m_elimUserVars = elimUserVars;
m_sideEffect = false;
// Operate on whole netlist
AstNode::userClearTree(); // userp() used on entire tree
nodep->accept(*this);
deadCheckVar();
// Modules after vars, because might be vars we delete inside a mod we delete
+2 -2
View File
@@ -1,4 +1,4 @@
// $Id$ //-*- C++ -*-
// -*- C++ -*-
//*************************************************************************
// DESCRIPTION: Verilator: Dead branch elimination
//
@@ -8,7 +8,7 @@
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
+41 -37
View File
@@ -1,4 +1,3 @@
// $Id$
//*************************************************************************
// DESCRIPTION: Verilator: Add temporaries, such as for delayed nodes
//
@@ -8,7 +7,7 @@
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
@@ -19,9 +18,9 @@
//
//*************************************************************************
// V3Delayed's Transformations:
//
//
// Each module:
// Replace ASSIGNDLY var, exp
// Replace ASSIGNDLY var, exp
// With ASSIGNDLY newvar, exp
// At top of block: VAR newvar
// At bottom of block: ASSIGNW var newvar
@@ -54,8 +53,8 @@
#include "config_build.h"
#include "verilatedos.h"
#include <stdio.h>
#include <stdarg.h>
#include <cstdio>
#include <cstdarg>
#include <unistd.h>
#include <algorithm>
#include <map>
@@ -73,17 +72,21 @@ class DelayedVisitor : public AstNVisitor {
private:
// NODE STATE
// Cleared each module:
// AstVarScope::userp() -> AstVarScope*. Points to temp var created.
// AstVarScope::user1p() -> AstVarScope*. Points to temp var created.
// AstVarScope::user2p() -> AstActive*. Points to activity block of signal
// AstVarScope::user4p() -> AstAlwaysPost*. Post block for this variable
// AstVar::user1() -> VarUsage. Tracks delayed vs non-delayed usage
// AstVar::user2() -> bool. Set true if already made warning
// AstVar::user3() -> VarUsage. Tracks delayed vs non-delayed usage
// AstVar::user4() -> int. Vector number, for assignment creation
// AstVarRef::user2() -> bool. Set true if already processed
// AstAlwaysPost::user4() -> AstIf*. Last IF (__Vdlyvset__) created under this AlwaysPost
// Cleared each scope:
// AstAssignDly::user5() -> AstVarScope*. __Vdlyvset__ created for this assign
// AstAlwaysPost::user5() -> AstVarScope*. __Vdlyvset__ last referenced in IF
// AstAssignDly::user3() -> AstVarScope*. __Vdlyvset__ created for this assign
// AstAlwaysPost::user3() -> AstVarScope*. __Vdlyvset__ last referenced in IF
AstUser1InUse m_inuser1;
AstUser2InUse m_inuser2;
AstUser3InUse m_inuser3;
AstUser4InUse m_inuser4;
enum VarUsage { VU_NONE=0, VU_DLY=1, VU_NONDLY=2 };
@@ -98,13 +101,18 @@ private:
VarMap m_modVarMap; // Table of new var names created under module
V3Double0 m_statSharedSet;// Statistic tracking
//static int debug() { return 9; }
// METHODS
static int debug() {
static int level = -1;
if (VL_UNLIKELY(level < 0)) level = v3Global.opt.debugSrcLevel(__FILE__);
return level;
}
void markVarUsage(AstVar* nodep, uint32_t flags) {
//UINFO(4," MVU "<<flags<<" "<<nodep<<endl);
nodep->user3( nodep->user3() | flags );
if ((nodep->user3() & VU_DLY) && (nodep->user3() & VU_NONDLY)) {
nodep->user1( nodep->user1() | flags );
if ((nodep->user1() & VU_DLY) && (nodep->user1() & VU_NONDLY)) {
nodep->v3warn(BLKANDNBLK,"Unsupported: Blocked and non-blocking assignments to same variable: "<<nodep->prettyName());
}
}
@@ -180,7 +188,7 @@ private:
dimreadps.push_front(dimp);
} else {
string bitvarname = (string("__Vdlyvdim")+cvtToStr(dimension)
+"__"+oldvarp->shortName()+"__"+cvtToStr(modVecNum));
+"__"+oldvarp->shortName()+"__v"+cvtToStr(modVecNum));
AstVarScope* bitvscp = createVarSc(varrefp->varScopep(), bitvarname, dimp->width());
AstAssign* bitassignp
= new AstAssign (nodep->fileline(),
@@ -198,7 +206,7 @@ private:
if (bitselp->fromp()->castConst()) {// vlsb = constant, can just push constant into where we use it
bitreadp = lsbvaluep;
} else {
string bitvarname = (string("__Vdlyvlsb__")+oldvarp->shortName()+"__"+cvtToStr(modVecNum));
string bitvarname = (string("__Vdlyvlsb__")+oldvarp->shortName()+"__v"+cvtToStr(modVecNum));
AstVarScope* bitvscp = createVarSc(varrefp->varScopep(), bitvarname, lsbvaluep->width());
AstAssign* bitassignp = new AstAssign (nodep->fileline(),
new AstVarRef(nodep->fileline(), bitvscp, true),
@@ -213,7 +221,7 @@ private:
if (nodep->rhsp()->castConst()) { // vval = constant, can just push constant into where we use it
valreadp = nodep->rhsp()->unlinkFrBack();
} else {
string valvarname = (string("__Vdlyvval__")+oldvarp->shortName()+"__"+cvtToStr(modVecNum));
string valvarname = (string("__Vdlyvval__")+oldvarp->shortName()+"__v"+cvtToStr(modVecNum));
AstVarScope* valvscp = createVarSc(varrefp->varScopep(), valvarname, nodep->rhsp()->width());
newlhsp = new AstVarRef(nodep->fileline(), valvscp, true);
valreadp = new AstVarRef(nodep->fileline(), valvscp, false);
@@ -223,16 +231,16 @@ private:
bool sharedVset = false;
AstVarScope* setvscp;
if (nodep->user5p()) {
if (nodep->user3p()) {
// Simplistic optimization. If the previous statement in same scope was also a =>,
// then we told this nodep->user5 we can use its Vdlyvset rather than making a new one.
// then we told this nodep->user3 we can use its Vdlyvset rather than making a new one.
// This is good for code like:
// for (i=0; i<5; i++) vector[i] <= something;
sharedVset = true;
setvscp = nodep->user5p()->castNode()->castVarScope();
setvscp = nodep->user3p()->castNode()->castVarScope();
m_statSharedSet++;
} else { // Create new one
string setvarname = (string("__Vdlyvset__")+oldvarp->shortName()+"__"+cvtToStr(modVecNum));
string setvarname = (string("__Vdlyvset__")+oldvarp->shortName()+"__v"+cvtToStr(modVecNum));
setvscp = createVarSc(varrefp->varScopep(), setvarname, 1);
AstAssignPre* setinitp
= new AstAssignPre (nodep->fileline(),
@@ -247,7 +255,7 @@ private:
nodep->addNextHere(setassignp);
}
if (m_nextDlyp) { // Tell next assigndly it can share the variable
m_nextDlyp->user5p(setvscp);
m_nextDlyp->user3p(setvscp);
}
//
// Create ALWAYSPOST for delayed variable
@@ -269,12 +277,12 @@ private:
AstAlwaysPost* finalp = varrefp->varScopep()->user4p()->castNode()->castAlwaysPost();
if (!finalp) {
finalp = new AstAlwaysPost(nodep->fileline(), NULL/*sens*/, NULL/*body*/);
UINFO(9," Created "<<finalp<<endl);
UINFO(9," Created "<<finalp<<endl);
m_activep->addStmtsp(finalp);
varrefp->varScopep()->user4p(finalp);
}
AstIf* postLogicp;
if (finalp->user5p()->castNode() == setvscp) {
if (finalp->user3p()->castNode() == setvscp) {
// Optimize as above; if sharing Vdlyvset *ON SAME VARIABLE*,
// we can share the IF statement too
postLogicp = finalp->user4p()->castNode()->castIf();
@@ -284,9 +292,9 @@ private:
new AstVarRef(nodep->fileline(), setvscp, false),
NULL,
NULL);
UINFO(9," Created "<<postLogicp<<endl);
UINFO(9," Created "<<postLogicp<<endl);
finalp->addBodysp(postLogicp);
finalp->user5p(setvscp); // Remember IF's vset variable
finalp->user3p(setvscp); // Remember IF's vset variable
finalp->user4p(postLogicp); // and the associated IF, as we may be able to reuse it
}
postLogicp->addIfsp(new AstAssign(nodep->fileline(), selectsp, valreadp));
@@ -298,15 +306,11 @@ private:
virtual void visit(AstNetlist* nodep, AstNUser*) {
//VV***** We reset all userp() on the netlist
m_modVarMap.clear();
AstNode::userClearTree();
AstNode::user2ClearTree();
AstNode::user3ClearTree();
AstNode::user4ClearTree();
nodep->iterateChildren(*this);
}
virtual void visit(AstScope* nodep, AstNUser*) {
UINFO(4," MOD "<<nodep<<endl);
AstNode::user5ClearTree();
AstNode::user3ClearTree();
nodep->iterateChildren(*this);
}
virtual void visit(AstCFunc* nodep, AstNUser*) {
@@ -347,7 +351,7 @@ private:
virtual void visit(AstVarRef* nodep, AstNUser*) {
if (!nodep->user2()) { // Not done yet
nodep->user2(true);
if (m_inDly && nodep->lvalue()) {
UINFO(4,"AssignDlyVar: "<<nodep<<endl);
markVarUsage(nodep->varp(), VU_DLY);
@@ -355,7 +359,7 @@ private:
if (!m_activep->hasClocked()) nodep->v3error("Internal: Blocking <= assignment in non-clocked block, should have converted in V3Active");
AstVarScope* oldvscp = nodep->varScopep();
if (!oldvscp) nodep->v3fatalSrc("Var didn't get varscoped in V3Scope.cpp\n");
AstVarScope* dlyvscp = oldvscp->userp()->castNode()->castVarScope();
AstVarScope* dlyvscp = oldvscp->user1p()->castNode()->castVarScope();
if (dlyvscp) { // Multiple use of delayed variable
AstActive* oldactivep = dlyvscp->user2p()->castNode()->castActive();
if (!oldactivep) nodep->v3fatalSrc("<= old dly assignment not put under sensitivity block");
@@ -371,8 +375,8 @@ private:
UINFO(4," Act: "<<m_activep<<endl);
UINFO(4," Act: "<<oldactivep<<endl);
// Make a new sensitivity list, which is the combination of both blocks
AstSenItem* sena = m_activep->sensesp()->sensesp()->cloneTree(true)->castSenItem();
AstSenItem* senb = oldactivep->sensesp()->sensesp()->cloneTree(true)->castSenItem();
AstNodeSenItem* sena = m_activep->sensesp()->sensesp()->cloneTree(true);
AstNodeSenItem* senb = oldactivep->sensesp()->sensesp()->cloneTree(true);
AstSenTree* treep = new AstSenTree(m_activep->fileline(), sena);
if (senb) treep->addSensesp(senb);
if (AstSenTree* storep = oldactivep->sensesStorep()) {
@@ -395,13 +399,13 @@ private:
new AstVarRef(nodep->fileline(), oldvscp, true),
new AstVarRef(nodep->fileline(), dlyvscp, false));
postp->lhsp()->user2(true); // Don't detect this assignment
oldvscp->userp(dlyvscp); // So we can find it later
oldvscp->user1p(dlyvscp); // So we can find it later
// Make new ACTIVE with identical sensitivity tree
AstActive* newactp = new AstActive (nodep->fileline(), "sequentdly",
m_activep->sensesp());
newactp->addStmtsp(prep); // Add to FRONT of statements
newactp->addStmtsp(postp);
m_activep->addNext(newactp);
m_activep->addNext(newactp);
dlyvscp->user2p(newactp);
}
AstVarRef* newrefp = new AstVarRef(nodep->fileline(), dlyvscp, true);
@@ -418,7 +422,7 @@ private:
}
virtual void visit(AstNodeFor* nodep, AstNUser*) {
nodep->v3fatalSrc("For statements should have been converted to while statements in V3Unroll\n");
nodep->v3fatalSrc("For statements should have been converted to while statements in V3Begin\n");
}
virtual void visit(AstWhile* nodep, AstNUser*) {
bool oldloop = m_inLoop;
+2 -2
View File
@@ -1,4 +1,4 @@
// $Id$ //-*- C++ -*-
// -*- C++ -*-
//*************************************************************************
// DESCRIPTION: Verilator: Pre C-Emit stage changes
//
@@ -8,7 +8,7 @@
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
+13 -15
View File
@@ -1,4 +1,3 @@
// $Id$
//*************************************************************************
// DESCRIPTION: Verilator: Prevent very deep expressions
//
@@ -8,7 +7,7 @@
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
@@ -19,7 +18,7 @@
//
//*************************************************************************
// V3Depth's Transformations:
//
//
// Each module:
// For each wide OP, assign a temporary variable.
// For each deep expression, assign expression to temporary.
@@ -30,8 +29,8 @@
#include "config_build.h"
#include "verilatedos.h"
#include <stdio.h>
#include <stdarg.h>
#include <cstdio>
#include <cstdarg>
#include <unistd.h>
#include <algorithm>
@@ -52,14 +51,18 @@ private:
int m_depth; // How deep in an expression
int m_maxdepth; // Maximum depth in an expression
//int debug() { return 9; }
// METHODS
static int debug() {
static int level = -1;
if (VL_UNLIKELY(level < 0)) level = v3Global.opt.debugSrcLevel(__FILE__);
return level;
}
void createDeepTemp(AstNode* nodep) {
UINFO(6," Deep "<<nodep<<endl);
//if (debug()>=9) nodep->dumpTree(cout,"deep:");
string newvarname = ((string)"__Vdeeptemp__"+cvtToStr(m_modp->varNumGetInc()));
string newvarname = ((string)"__Vdeeptemp"+cvtToStr(m_modp->varNumGetInc()));
AstVar* varp = new AstVar (nodep->fileline(), AstVarType::STMTTEMP, newvarname,
// Width, not widthMin, as we may be in middle of BITSEL expression which
// though it's one bit wide, needs the mask in the upper bits.
@@ -86,6 +89,7 @@ private:
m_modp = nodep;
m_funcp = NULL;
nodep->iterateChildren(*this);
m_modp = NULL;
}
virtual void visit(AstCFunc* nodep, AstNUser*) {
m_funcp = nodep;
@@ -111,7 +115,7 @@ private:
// We have some operator defines that use 2 parens, so += 2.
m_depth += 2;
if (m_depth>m_maxdepth) m_maxdepth=m_depth;
nodep->iterateChildren(*this);
nodep->iterateChildren(*this);
m_depth -= 2;
if (m_stmtp
@@ -133,11 +137,6 @@ private:
m_funcp->isStatic(false);
}
}
virtual void visit(AstCoverInc* nodep, AstNUser*) {
// OPTIMIZE: For now this needs this->__Vcoverage, but could be globalized
needNonStaticFunc(nodep);
visitStmt(nodep);
}
virtual void visit(AstUCFunc* nodep, AstNUser*) {
needNonStaticFunc(nodep);
nodep->iterateChildren(*this);
@@ -163,7 +162,6 @@ public:
m_depth=0;
m_maxdepth=0;
//
AstNode::userClearTree(); // userp() used on entire tree
nodep->accept(*this);
}
virtual ~DepthVisitor() {}
+2 -2
View File
@@ -1,4 +1,4 @@
// $Id$ //-*- C++ -*-
// -*- C++ -*-
//*************************************************************************
// DESCRIPTION: Verilator: Prevent very deep expressions
//
@@ -8,7 +8,7 @@
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
+11 -7
View File
@@ -1,4 +1,3 @@
// $Id$
//*************************************************************************
// DESCRIPTION: Verilator: Prevent very deep expressions
//
@@ -8,7 +7,7 @@
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
@@ -19,7 +18,7 @@
//
//*************************************************************************
// V3DepthBlock's Transformations:
//
//
// Each module:
// For each deep block, create cfunc including that block.
//
@@ -27,8 +26,8 @@
#include "config_build.h"
#include "verilatedos.h"
#include <stdio.h>
#include <stdarg.h>
#include <cstdio>
#include <cstdarg>
#include <unistd.h>
#include <algorithm>
@@ -49,9 +48,13 @@ private:
int m_depth; // How deep in an expression
int m_deepNum; // How many functions made
//int debug() { return 9; }
// METHODS
static int debug() {
static int level = -1;
if (VL_UNLIKELY(level < 0)) level = v3Global.opt.debugSrcLevel(__FILE__);
return level;
}
AstCFunc* createDeepFunc(AstNode* nodep) {
AstNRelinker relinkHandle;
nodep->unlinkFrBack(&relinkHandle);
@@ -78,6 +81,7 @@ private:
m_modp = nodep;
m_deepNum = 0;
nodep->iterateChildren(*this);
m_modp = NULL;
}
virtual void visit(AstCFunc* nodep, AstNUser*) {
// We recurse into this.
+2 -2
View File
@@ -1,4 +1,4 @@
// $Id$ //-*- C++ -*-
// -*- C++ -*-
//*************************************************************************
// DESCRIPTION: Verilator: Prevent very deep expressions
//
@@ -8,7 +8,7 @@
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
+15 -10
View File
@@ -1,4 +1,3 @@
// $Id$
//*************************************************************************
// DESCRIPTION: Verilator: Rename scope references to module-local references
//
@@ -8,7 +7,7 @@
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
@@ -24,13 +23,13 @@
// Change varref name() to be relative to current module
// Remove varScopep()
// This allows for better V3Combine'ing.
//
//
//*************************************************************************
#include "config_build.h"
#include "verilatedos.h"
#include <stdio.h>
#include <stdarg.h>
#include <cstdio>
#include <cstdarg>
#include <unistd.h>
#include <map>
@@ -46,6 +45,7 @@ private:
// NODE STATE
// Cleared entire netlist
// AstCFunc::user() // bool. Indicates processing completed
AstUser1InUse m_inuser1;
// TYPES
typedef multimap<string,AstCFunc*> FuncMmap;
@@ -55,9 +55,14 @@ private:
AstScope* m_scopep; // Current scope
bool m_needThis; // Add thisp to function
FuncMmap m_modFuncs; // Name of public functions added
//int debug() { return 9; }
// METHODS
static int debug() {
static int level = -1;
if (VL_UNLIKELY(level < 0)) level = v3Global.opt.debugSrcLevel(__FILE__);
return level;
}
string descopedName(AstScope* scopep, bool& hierThisr, AstVar* varp=NULL) {
UASSERT(scopep, "Var/Func not scoped\n");
hierThisr = true;
@@ -107,7 +112,7 @@ private:
if (moreOfSame1) {
// Multiple functions under this name, need a wrapper function
UINFO(6," Wrapping "<<name<<" multifuncs\n");
AstCFunc* newfuncp = topFuncp->cloneTree(false)->castCFunc();
AstCFunc* newfuncp = topFuncp->cloneTree(false);
if (newfuncp->initsp()) newfuncp->initsp()->unlinkFrBackWithNext()->deleteTree();
if (newfuncp->stmtsp()) newfuncp->stmtsp()->unlinkFrBackWithNext()->deleteTree();
if (newfuncp->finalsp()) newfuncp->finalsp()->unlinkFrBackWithNext()->deleteTree();
@@ -178,6 +183,7 @@ private:
m_modFuncs.clear();
nodep->iterateChildren(*this);
makePublicFuncWrappers();
m_modp = NULL;
}
virtual void visit(AstScope* nodep, AstNUser*) {
m_scopep = nodep;
@@ -210,10 +216,10 @@ private:
// nodep->funcp()->scopep(NULL);
}
virtual void visit(AstCFunc* nodep, AstNUser*) {
if (!nodep->user()) {
if (!nodep->user1()) {
m_needThis = false;
nodep->iterateChildren(*this);
nodep->user(true);
nodep->user1(true);
if (m_needThis) {
nodep->v3fatalSrc("old code");
// Really we should have more node types for backend optimization of this stuff
@@ -245,7 +251,6 @@ public:
m_modp = NULL;
m_scopep = NULL;
m_needThis = false;
AstNode::userClearTree();
nodep->accept(*this);
}
virtual ~DescopeVisitor() {}
+2 -2
View File
@@ -1,4 +1,4 @@
// $Id$ //-*- C++ -*-
// -*- C++ -*-
//*************************************************************************
// DESCRIPTION: Verilator: Rename scope references to module-local references
//
@@ -8,7 +8,7 @@
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
+388 -334
View File
File diff suppressed because it is too large Load Diff
+2 -2
View File
@@ -1,4 +1,4 @@
// $Id$ //-*- C++ -*-
// -*- C++ -*-
//*************************************************************************
// DESCRIPTION: Verilator: Emit C++ code for module tree
//
@@ -8,7 +8,7 @@
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
+8 -8
View File
@@ -1,4 +1,4 @@
// $Id$ -*- C++ -*-
// -*- C++ -*-
//*************************************************************************
// DESCRIPTION: Verilator: Emit C++ for tree
//
@@ -8,7 +8,7 @@
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
@@ -24,10 +24,10 @@
#include "config_build.h"
#include "verilatedos.h"
#include <stdio.h>
#include <stdarg.h>
#include <cstdio>
#include <cstdarg>
#include <unistd.h>
#include <math.h>
#include <cmath>
#include "V3Global.h"
#include "V3File.h"
@@ -78,9 +78,9 @@ public:
virtual void putsIntTopInclude() { puts("#include \"systemperl.h\"\n"); }
};
class V3OutVFile : public V3OutCFile {
class V3OutVFile : public V3OutFile {
public:
V3OutVFile(const string& filename) : V3OutCFile(filename) {}
V3OutVFile(const string& filename) : V3OutFile(filename) {}
virtual ~V3OutVFile() {};
virtual void putsHeader() { puts("// Verilated -*- Verilog -*-\n"); }
};
@@ -137,7 +137,7 @@ public:
};
//######################################################################
// Fileize state, as a visitor of each AstNode
// Count operations under the given node, as a visitor of each AstNode
class EmitCBaseCounterVisitor : public AstNVisitor {
private:
+4 -5
View File
@@ -1,4 +1,3 @@
// $Id$
//*************************************************************************
// DESCRIPTION: Verilator: Emit C++ for tree
//
@@ -8,7 +7,7 @@
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
@@ -21,10 +20,10 @@
#include "config_build.h"
#include "verilatedos.h"
#include <stdio.h>
#include <stdarg.h>
#include <cstdio>
#include <cstdarg>
#include <unistd.h>
#include <math.h>
#include <cmath>
#include <map>
#include <vector>
+34 -11
View File
@@ -1,4 +1,3 @@
// $Id$
//*************************************************************************
// DESCRIPTION: Verilator: Emit C++ for tree
//
@@ -8,7 +7,7 @@
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
@@ -21,10 +20,10 @@
#include "config_build.h"
#include "verilatedos.h"
#include <stdio.h>
#include <stdarg.h>
#include <cstdio>
#include <cstdarg>
#include <unistd.h>
#include <math.h>
#include <cmath>
#include <map>
#include <set>
#include <vector>
@@ -39,11 +38,17 @@
// Symbol table emitting
class EmitCSyms : EmitCBaseVisitor {
// NODE STATE
// Cleared on Netlist
// AstModule::user1() -> bool. Set true __Vconfigure called
AstUser1InUse m_inuser1;
// STATE
AstModule* m_modp; // Current module
typedef pair<AstScope*,AstModule*> ScopeModPair;
vector<ScopeModPair> m_scopes; // Every scope by module
V3LanguageWords m_words; // Reserved word detector
int m_coverBins; // Coverage bin number
// METHODS
void emitInt();
@@ -68,9 +73,10 @@ class EmitCSyms : EmitCBaseVisitor {
virtual void visit(AstNetlist* nodep, AstNUser*) {
// Collect list of scopes
nodep->iterateChildren(*this);
// Sort m_scopes by scope name
sort(m_scopes.begin(), m_scopes.end(), CmpName());
// Output
emitInt();
emitImp();
@@ -79,11 +85,18 @@ class EmitCSyms : EmitCBaseVisitor {
nameCheck(nodep);
m_modp = nodep;
nodep->iterateChildren(*this);
m_modp = NULL;
}
virtual void visit(AstScope* nodep, AstNUser*) {
nameCheck(nodep);
m_scopes.push_back(make_pair(nodep, m_modp));
}
virtual void visit(AstCoverDecl* nodep, AstNUser*) {
// Assign numbers to all bins, so we know how big of an array to use
if (!nodep->dataDeclNullp()) { // else duplicate we don't need code for
nodep->binNum(m_coverBins++);
}
}
// NOPs
virtual void visit(AstNodeStmt*, AstNUser*) {}
virtual void visit(AstConst*, AstNUser*) {}
@@ -97,6 +110,7 @@ class EmitCSyms : EmitCBaseVisitor {
public:
EmitCSyms(AstNetlist* nodep) {
m_modp = NULL;
m_coverBins = 0;
nodep->accept(*this);
}
};
@@ -146,6 +160,12 @@ void EmitCSyms::emitInt() {
}
}
puts("\n// COVERAGE\n");
if (m_coverBins) {
ofp()->putAlign(V3OutFile::AL_AUTO, sizeof(uint32_t));
puts("uint32_t\t__Vcoverage["); puts(cvtToStr(m_coverBins)); puts("];\n");
}
puts("\n// CREATORS\n");
puts(symClassName()+"("+topClassName()+"* topp, const char* namep);\n");
puts((string)"~"+symClassName()+"() {};\n");
@@ -187,11 +207,9 @@ void EmitCSyms::emitImp() {
AstScope* scopep = it->first; AstModule* modp = it->second;
if (modp->isTop()) {
} else {
string arrow = scopep->name();
if (arrow.substr(0,4) == "TOP.") arrow.replace(0,4,".");
ofp()->printf("\t%c %-30s ", comma, scopep->nameDotless().c_str());
puts("(Verilated::catName(topp->name(),\"");
puts(arrow);
puts("."+scopep->prettyName());
puts("\"))\n");
comma=',';
}
@@ -216,11 +234,16 @@ void EmitCSyms::emitImp() {
}
}
puts("// Setup each module's pointer back to symbol table (for public functions)\n");
puts("TOPp->__Vconfigure(this);\n");
puts("TOPp->__Vconfigure(this, true);\n");
for (vector<ScopeModPair>::iterator it = m_scopes.begin(); it != m_scopes.end(); ++it) {
AstScope* scopep = it->first; AstModule* modp = it->second;
if (!modp->isTop()) {
puts(scopep->nameDotless()+".__Vconfigure(this);\n");
// first is used by AstCoverDecl's call to __vlCoverInsert
bool first = !modp->user1();
modp->user1(true);
puts(scopep->nameDotless()+".__Vconfigure(this, "
+(first?"true":"false")
+");\n");
}
}
+12 -6
View File
@@ -1,4 +1,3 @@
// $Id$
//*************************************************************************
// DESCRIPTION: Verilator: Emit Makefile
//
@@ -8,7 +7,7 @@
//
//*************************************************************************
//
// Copyright 2004-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2004-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
@@ -21,10 +20,10 @@
#include "config_build.h"
#include "verilatedos.h"
#include <stdio.h>
#include <stdarg.h>
#include <cstdio>
#include <cstdarg>
#include <unistd.h>
#include <math.h>
#include <cmath>
#include <map>
#include <vector>
#include <algorithm>
@@ -38,15 +37,21 @@
class EmitMkVisitor : public EmitCBaseVisitor {
public:
//int debug() { return 9; }
// METHODS
static int debug() {
static int level = -1;
if (VL_UNLIKELY(level < 0)) level = v3Global.opt.debugSrcLevel(__FILE__);
return level;
}
void emitClassMake() {
// Generate the makefile
V3OutMkFile of (v3Global.opt.makeDir()+"/"+ v3Global.opt.prefix() + "_classes.mk");
of.putsHeader();
of.puts("\n");
of.puts("VM_COVERAGE = "); of.puts(v3Global.opt.coverage()?"1":"0"); of.puts("\n");
of.puts("VM_TRACE = "); of.puts(v3Global.opt.trace()?"1":"0"); of.puts("\n");
of.puts("\n");
@@ -82,6 +87,7 @@ public:
of.puts("PERL = "+V3Options::getenvPERL()+"\n");
of.puts("VERILATOR_ROOT = "+V3Options::getenvVERILATOR_ROOT()+"\n");
of.puts("SYSTEMPERL = "+V3Options::getenvSYSTEMPERL()+"\n");
of.puts("SYSTEMPERL_INCLUDE = "+V3Options::getenvSYSTEMPERL_INCLUDE()+"\n");
of.puts("\n# Switches...\n");
of.puts(string("VM_SP = ")+(v3Global.opt.systemPerl()?"1":"0")+"\n");
+2 -2
View File
@@ -1,4 +1,4 @@
// $Id$ //-*- C++ -*-
// -*- C++ -*-
//*************************************************************************
// DESCRIPTION: Verilator: Emit Makefile
//
@@ -8,7 +8,7 @@
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
+109 -47
View File
@@ -1,4 +1,3 @@
// $Id$
//*************************************************************************
// DESCRIPTION: Verilator: Emit Verilog from tree
//
@@ -8,7 +7,7 @@
//
//*************************************************************************
//
// Copyright 2004-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2004-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
@@ -21,10 +20,10 @@
#include "config_build.h"
#include "verilatedos.h"
#include <stdio.h>
#include <stdarg.h>
#include <cstdio>
#include <cstdarg>
#include <unistd.h>
#include <math.h>
#include <cmath>
#include <map>
#include <vector>
#include <algorithm>
@@ -36,21 +35,26 @@
//######################################################################
// Emit statements and math operators
class EmitVImp : public EmitCBaseVisitor {
private:
class EmitVBaseVisitor : public EmitCBaseVisitor {
// MEMBERS
bool m_suppressSemi;
AstModule* m_modp;
public:
//int debug() { return 9; }
// METHODS
static int debug() {
static int level = -1;
if (VL_UNLIKELY(level < 0)) level = v3Global.opt.debugSrcLevel(__FILE__);
return level;
}
virtual void puts(const string& str) = 0;
virtual void putbs(const string& str) = 0;
virtual void putsNoTracking(const string& str) = 0;
// VISITORS
virtual void visit(AstNetlist* nodep, AstNUser*) {
nodep->iterateChildren(*this);
}
virtual void visit(AstModule* nodep, AstNUser*) {
m_modp = nodep;
putbs("module "+modClassName(nodep)+";\n");
nodep->iterateChildren(*this);
puts("endmodule\n");
@@ -87,7 +91,7 @@ public:
virtual void visit(AstAlways* nodep, AstNUser*) {
putbs("always ");
nodep->sensesp()->iterateAndNext(*this);
putbs("begin\n");
putbs(" begin\n");
nodep->bodysp()->iterateAndNext(*this);
puts("end\n");
}
@@ -118,17 +122,22 @@ public:
if (!m_suppressSemi) puts(";\n");
}
virtual void visit(AstSenTree* nodep, AstNUser*) {
// AstSenItem is called for dumping in isolation by V3Order
putbs("@(");
nodep->iterateChildren(*this);
puts(") ");
for (AstNode* expp=nodep->sensesp(); expp; expp = expp->nextp()) {
nodep->iterateChildren(*this);
if (expp->nextp()) puts(" or ");
}
puts(")");
}
virtual void visit(AstSenGate* nodep, AstNUser*) {
emitVerilogFormat(nodep, nodep->emitVerilog(), nodep->sensesp(), nodep->rhsp());
}
virtual void visit(AstSenItem* nodep, AstNUser*) {
putbs("");
if (nodep->backp()->castSenItem()) puts(" or ");
puts(nodep->edgeType().verilogKwd());
puts(" ");
if (nodep->sensp()) puts(" ");
nodep->iterateChildren(*this);
puts(" ");
}
virtual void visit(AstNodeCase* nodep, AstNUser*) {
putbs(nodep->verilogKwd());
@@ -158,25 +167,33 @@ public:
puts((string)"// "+nodep->name()+"\n");
nodep->iterateChildren(*this);
}
virtual void visit(AstCoverDecl*, AstNUser*) {
// N/A
}
virtual void visit(AstCoverInc*, AstNUser*) {
// N/A
}
virtual void visit(AstDisplay* nodep, AstNUser*) {
virtual void visit(AstCoverDecl*, AstNUser*) {} // N/A
virtual void visit(AstCoverInc*, AstNUser*) {} // N/A
virtual void visit(AstCoverToggle*, AstNUser*) {} // N/A
void visitNodeDisplay(AstNode* nodep, AstNode* filep, const string& text, AstNode* exprsp) {
putbs(nodep->verilogKwd());
putbs(" (");
if (nodep->filep()) { nodep->filep()->iterateAndNext(*this); putbs(","); }
if (filep) { filep->iterateAndNext(*this); putbs(","); }
puts("\"");
ofp()->putsNoTracking(nodep->text());
putsNoTracking(text);
puts("\"");
for (AstNode* expp=nodep->exprsp(); expp; expp = expp->nextp()) {
for (AstNode* expp=exprsp; expp; expp = expp->nextp()) {
puts(",");
expp->iterateAndNext(*this);
}
puts(");\n");
}
virtual void visit(AstDisplay* nodep, AstNUser*) {
visitNodeDisplay(nodep, nodep->filep(), nodep->text(), nodep->exprsp());
}
virtual void visit(AstFScanF* nodep, AstNUser*) {
visitNodeDisplay(nodep, nodep->filep(), nodep->text(), nodep->exprsp());
}
virtual void visit(AstSScanF* nodep, AstNUser*) {
visitNodeDisplay(nodep, nodep->fromp(), nodep->text(), nodep->exprsp());
}
virtual void visit(AstFOpen* nodep, AstNUser*) {
putbs(nodep->verilogKwd());
putbs(" (");
@@ -193,6 +210,12 @@ public:
if (nodep->filep()) nodep->filep()->iterateChildren(*this);
puts(");\n");
}
virtual void visit(AstFFlush* nodep, AstNUser*) {
putbs(nodep->verilogKwd());
putbs(" (");
if (nodep->filep()) nodep->filep()->iterateChildren(*this);
puts(");\n");
}
virtual void visit(AstReadMem* nodep, AstNUser*) {
putbs(nodep->verilogKwd());
putbs(" (");
@@ -216,6 +239,13 @@ public:
nodep->bodysp()->iterateAndNext(*this);
puts("}\n");
}
virtual void visit(AstRepeat* nodep, AstNUser*) {
puts("repeat (");
nodep->countp()->iterateAndNext(*this);
puts(") {\n");
nodep->bodysp()->iterateAndNext(*this);
puts("}\n");
}
virtual void visit(AstWhile* nodep, AstNUser*) {
nodep->precondsp()->iterateAndNext(*this);
puts("while (");
@@ -244,7 +274,7 @@ public:
putbs("$finish;\n");
}
virtual void visit(AstText* nodep, AstNUser*) {
ofp()->putsNoTracking(nodep->text());
putsNoTracking(nodep->text());
}
virtual void visit(AstScopeName* nodep, AstNUser*) {
}
@@ -346,11 +376,11 @@ public:
if (nodep->widthp()->isOne()) {
nodep->lsbp()->iterateAndNext(*this);
} else {
puts(cvtToStr(nodep->lsbp()->castConst()->asInt()
+nodep->widthp()->castConst()->asInt()
puts(cvtToStr(nodep->lsbp()->castConst()->toSInt()
+nodep->widthp()->castConst()->toSInt()
-1));
puts(":");
nodep->lsbp()->iterateAndNext(*this);
puts(cvtToStr(nodep->lsbp()->castConst()->toSInt()));
}
} else {
nodep->lsbp()->iterateAndNext(*this); puts("+:");
@@ -368,12 +398,12 @@ public:
// Terminals
virtual void visit(AstVarRef* nodep, AstNUser*) {
puts(nodep->hiername());
puts(nodep->varp()->name());
puts(nodep->varp()->name());
}
virtual void visit(AstVarXRef* nodep, AstNUser*) {
puts(nodep->dotted());
puts(".");
puts(nodep->varp()->name());
puts(nodep->varp()->name());
}
virtual void visit(AstConst* nodep, AstNUser*) {
puts(nodep->num().ascii(true,true));
@@ -417,21 +447,50 @@ public:
}
public:
EmitVImp() {
EmitVBaseVisitor() {
m_suppressSemi = false;
m_modp = NULL;
}
void main(AstNode* nodep, V3OutCFile* ofp);
virtual ~EmitVImp() {}
virtual ~EmitVBaseVisitor() {}
};
//######################################################################
// Emit to an output file
void EmitVImp::main(AstNode* modp, V3OutCFile* ofp) {
// Output a module, or overall netlist
m_ofp = ofp;
modp->accept(*this);
}
class EmitVFileVisitor : public EmitVBaseVisitor {
// MEMBERS
V3OutFile* m_ofp;
// METHODS
V3OutFile* ofp() const { return m_ofp; };
void puts(const string& str) { ofp()->puts(str); }
void putbs(const string& str) { ofp()->putbs(str); }
void putsNoTracking(const string& str) { ofp()->putsNoTracking(str); }
public:
EmitVFileVisitor(AstNode* nodep, V3OutFile* ofp) {
m_ofp = ofp;
nodep->accept(*this);
}
virtual ~EmitVFileVisitor() {}
};
//######################################################################
// Emit to a stream (perhaps stringstream)
class EmitVStreamVisitor : public EmitVBaseVisitor {
// MEMBERS
ostream& m_os;
// METHODS
void puts(const string& str) { m_os<<str; }
void putbs(const string& str) { m_os<<str; }
void putsNoTracking(const string& str) { m_os<<str; }
public:
EmitVStreamVisitor(AstNode* nodep, ostream& os)
: m_os(os) {
nodep->accept(*this);
}
virtual ~EmitVStreamVisitor() {}
};
//######################################################################
// EmitV class functions
@@ -442,15 +501,18 @@ void V3EmitV::emitv() {
// All-in-one file
V3OutVFile of (v3Global.opt.makeDir()+"/"+v3Global.opt.prefix()+"__Vout.v");
of.putsHeader();
EmitVImp imp;
imp.main(v3Global.rootp(), &of);
EmitVFileVisitor visitor (v3Global.rootp(), &of);
} else {
// Process each module in turn
for (AstModule* modp = v3Global.rootp()->modulesp(); modp; modp=modp->nextp()->castModule()) {
EmitVImp imp;
V3OutVFile of (v3Global.opt.makeDir()+"/"+imp.modClassName(modp)+"__Vout.v");
V3OutVFile of (v3Global.opt.makeDir()
+"/"+EmitCBaseVisitor::modClassName(modp)+"__Vout.v");
of.putsHeader();
imp.main(modp, &of);
EmitVFileVisitor visitor (modp, &of);
}
}
}
void V3EmitV::verilogForTree(AstNode* nodep, ostream& os) {
EmitVStreamVisitor(nodep, os);
}
+3 -2
View File
@@ -1,4 +1,4 @@
// $Id$ //-*- C++ -*-
//-*- C++ -*-
//*************************************************************************
// DESCRIPTION: Verilator: Emit Verilog code for module tree
//
@@ -8,7 +8,7 @@
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
@@ -31,6 +31,7 @@
class V3EmitV {
public:
static void emitv();
static void verilogForTree(AstNode* nodep, ostream& os=cout);
};
#endif // Guard
+38 -13
View File
@@ -1,4 +1,3 @@
// $Id$
//*************************************************************************
// DESCRIPTION: Verilator: Error handling
//
@@ -8,7 +7,7 @@
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
@@ -19,9 +18,9 @@
//
//*************************************************************************
#include <stdio.h>
#include <stdarg.h>
#include <string.h>
#include <cstdio>
#include <cstdarg>
#include <cstring>
#include <set>
#include "V3Error.h"
#ifndef _V3ERROR_NO_GLOBAL_
@@ -47,7 +46,7 @@ bool V3Error::s_pretendError[V3ErrorCode::MAX];
struct v3errorIniter {
v3errorIniter() { V3Error::init(); };
};
v3errorIniter v3errorInit;
v3errorIniter v3errorInit;
//######################################################################
// ErrorCode class functions
@@ -66,6 +65,17 @@ V3ErrorCode::V3ErrorCode(const char* msgp) {
//######################################################################
// FileLine class functions
FileLine::FileLine(FileLine::EmptySecret) {
m_lineno=0;
m_filename="COMMAND_LINE";
m_warnOn=0;
for (int codei=V3ErrorCode::MIN; codei<V3ErrorCode::MAX; codei++) {
V3ErrorCode code = (V3ErrorCode)codei;
warnOff(code, code.defaultsOff());
}
}
void FileLine::lineDirective(const char* textp) {
// Handle `line directive
// Skip `line
@@ -142,7 +152,7 @@ const string FileLine::profileFuncname() const {
!= string::npos) {
name.replace(pos, 1, "_");
}
name += "__"+cvtToStr(lineno());
name += "__l"+cvtToStr(lineno());
return name;
}
@@ -154,13 +164,23 @@ ostream& operator<<(ostream& os, FileLine* fileline) {
return(os);
}
bool FileLine::warnIsOff(V3ErrorCode code) {
if (m_warnOff.test(code)) return true;
bool FileLine::warnIsOff(V3ErrorCode code) const {
if (!m_warnOn.test(code)) return true;
// UNOPTFLAT implies UNOPT
if (code==V3ErrorCode::UNOPT && m_warnOff.test(V3ErrorCode::UNOPTFLAT)) return true;
if (code==V3ErrorCode::UNOPT && !m_warnOn.test(V3ErrorCode::UNOPTFLAT)) return true;
return false;
}
void FileLine::warnStateInherit(const FileLine& from) {
// Any warnings that are off in "from", become off in "this".
for (int codei=V3ErrorCode::FIRST_WARN; codei<V3ErrorCode::MAX; codei++) {
V3ErrorCode code = (V3ErrorCode)codei;
if (from.warnIsOff(code)) {
this->warnOff(code, true);
}
}
}
void FileLine::v3errorEnd(ostringstream& str) {
if (this && m_lineno) {
ostringstream nsstr;
@@ -203,7 +223,7 @@ void FileLine::deleteAllRemaining() {
while (1) {
FileLineCheckSet::iterator it=fileLineLeakChecks.begin();
if (it==fileLineLeakChecks.end()) break;
delete *it;
delete *it;
// Operator delete will remove the iterated object from the list.
// Eventually the list will be empty and terminate the loop.
}
@@ -262,6 +282,7 @@ void V3Error::abortIfWarnings() {
bool V3Error::isError(V3ErrorCode code) {
if (code==V3ErrorCode::SUPPRESS) return false;
else if (code==V3ErrorCode::INFO) return false;
else if (code==V3ErrorCode::FATAL) return true;
else if (code==V3ErrorCode::ERROR) return true;
else if (code<V3ErrorCode::FIRST_WARN
@@ -271,6 +292,7 @@ bool V3Error::isError(V3ErrorCode code) {
string V3Error::msgPrefix(V3ErrorCode code) {
if (code==V3ErrorCode::SUPPRESS) return "-arning-suppressed: ";
else if (code==V3ErrorCode::INFO) return "-Info: ";
else if (code==V3ErrorCode::FATAL) return "%Error: ";
else if (code==V3ErrorCode::ERROR) return "%Error: ";
else if (isError(code)) return "%Error-"+(string)code.ascii()+": ";
@@ -307,12 +329,15 @@ void V3Error::v3errorEnd (ostringstream& sstr) {
#ifdef __COVERITY__
if (s_errorCode==V3ErrorCode::FATAL) __coverity_panic__(x);
#endif
if (s_errorCode!=V3ErrorCode::SUPPRESS || debug()) {
if (s_errorCode!=V3ErrorCode::SUPPRESS
// On debug, show only non default-off warning to prevent pages of warnings
|| (debug() && !s_errorCode.defaultsOff())) {
cerr<<msgPrefix()<<sstr.str();
if (sstr.str()[sstr.str().length()-1] != '\n') {
cerr<<endl;
}
if (s_errorCode!=V3ErrorCode::SUPPRESS) {
if (s_errorCode!=V3ErrorCode::SUPPRESS
&& s_errorCode!=V3ErrorCode::INFO) {
if (!s_describedEachWarn[s_errorCode]
&& !s_pretendError[s_errorCode]) {
s_describedEachWarn[s_errorCode] = true;
+47 -15
View File
@@ -1,4 +1,4 @@
// $Id$ //-*- C++ -*-
// -*- C++ -*-
//*************************************************************************
// DESCRIPTION: Verilator: Error handling
//
@@ -8,7 +8,7 @@
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
@@ -33,9 +33,15 @@
class V3ErrorCode {
public:
enum en {
MIN=0, // Keep first
//
SUPPRESS, // Warning suppressed by user
INFO, // General information out
FATAL, // Kill the program
ERROR, // General error out, can't suppress
// Boolean information we track per-line, but aren't errors
I_COVERAGE, // Coverage is on/off from /*verilator coverage_on/off*/
I_TRACING, // Tracing is on/off from /*verilator tracing_on/off*/
// Error codes:
MULTITOP, // Error: Multiple top level modules
TASKNSVAR, // Error: Task I/O not simple
@@ -45,11 +51,13 @@ public:
BLKANDNBLK, // Blocked and non-blocking assignments to same variable
CASEINCOMPLETE, // Case statement has missing values
CASEOVERLAP, // Case statements overlap
CASEWITHX, // Case with X values
CASEX, // Casex
CMPCONST, // Comparison is constant due to limited range
COMBDLY, // Combinatorial delayed assignment
STMTDLY, // Delayed statement
GENCLK, // Generated Clock
IMPERFECTSCH, // Imperfect schedule (disabled by default)
IMPLICIT, // Implicit wire
IMPURE, // Impure function not being inlined
MULTIDRIVEN, // Driven from multiple blocks
@@ -74,12 +82,16 @@ public:
const char* ascii() const {
const char* names[] = {
// Leading spaces indicate it can't be disabled.
" SUPPRESS", " FATAL", " ERROR",
"MULTITOP", "TASKNSVAR",
" MIN", " SUPPRESS", " INFO", " FATAL", " ERROR",
// Boolean
" I_COVERAGE", " I_TRACING",
// Errors
"MULTITOP", "TASKNSVAR",
// Warnings
" FIRST_WARN",
"BLKANDNBLK",
"CASEINCOMPLETE", "CASEOVERLAP", "CASEX", "CMPCONST",
"COMBDLY", "STMTDLY", "GENCLK", "IMPLICIT", "IMPURE",
"CASEINCOMPLETE", "CASEOVERLAP", "CASEWITHX", "CASEX", "CMPCONST",
"COMBDLY", "STMTDLY", "GENCLK", "IMPERFECTSCH", "IMPLICIT", "IMPURE",
"MULTIDRIVEN", "REDEFMACRO",
"UNDRIVEN", "UNOPT", "UNOPTFLAT", "UNSIGNED", "UNUSED",
"VARHIDDEN", "WIDTH", "WIDTHCONCAT",
@@ -87,6 +99,8 @@ public:
};
return names[m_e];
};
// Warnings that default to off
bool defaultsOff() const { return ( m_e==IMPERFECTSCH );};
// Warnings that warn about nasty side effects
bool dangerous() const { return ( m_e==COMBDLY );};
// Warnings we'll present to the user as errors
@@ -94,7 +108,8 @@ public:
bool pretendError() const { return ( m_e==BLKANDNBLK || m_e==IMPURE); };
// Warnings that are lint only
bool lintError() const { return ( m_e==CASEINCOMPLETE || m_e==CASEOVERLAP
|| m_e==CASEX || m_e==CMPCONST
|| m_e==CASEWITHX || m_e==CASEX
|| m_e==CMPCONST
|| m_e==IMPLICIT
|| m_e==UNDRIVEN || m_e==UNSIGNED
|| m_e==UNUSED || m_e==VARHIDDEN
@@ -159,6 +174,7 @@ inline void v3errorEnd(ostringstream& sstr) { V3Error::v3errorEnd(sstr); }
// These allow errors using << operators: v3error("foo"<<"bar");
// Careful, you can't put () around msg, as you would in most macro definitions
#define v3info(msg) v3errorEnd(((V3Error::v3errorPrep(V3ErrorCode::INFO)<<msg),V3Error::v3errorStr()));
#define v3fatal(msg) v3errorEnd(((V3Error::v3errorPrep(V3ErrorCode::FATAL)<<msg),V3Error::v3errorStr()));
#define v3error(msg) v3errorEnd(((V3Error::v3errorPrep(V3ErrorCode::ERROR)<<msg),V3Error::v3errorStr()));
#define v3warn(code,msg) v3errorEnd(((V3Error::v3errorPrep(V3ErrorCode::code)<<msg),V3Error::v3errorStr()));
@@ -171,7 +187,7 @@ inline void v3errorEnd(ostringstream& sstr) { V3Error::v3errorEnd(sstr); }
#define UDEBUGONLY(stmts) {stmts}
#define UASSERT(condition,stmsg) { if (!(condition)) { v3fatalSrc(stmsg); }}
// For use in V3Ast static functions only
#define UASSERT_STATIC(condition,stmsg) { if (!(condition)) { cerr<<"Internal Error: "<<__FILE__<<":"<<dec<<__LINE__<<(stmsg)<<endl; abort(); } }
#define UASSERT_STATIC(condition,stmsg) { if (!(condition)) { cerr<<"Internal Error: "<<__FILE__<<":"<<dec<<__LINE__<<":"<<(stmsg)<<endl; abort(); } }
#define V3ERROR_NA v3error("Internal: Unexpected Call")
@@ -181,13 +197,21 @@ template< class T> std::string cvtToStr (const T& t) {
ostringstream os; os<<t; return os.str();
}
inline uint32_t cvtToHash(void* vp) {
// We can shove a 64 bit pointer into a 32 bit bucket
// On 32 bit systems, lower is always 0, but who cares?
union { void* up; struct {uint32_t upper; uint32_t lower;} l;} u;
u.l.upper=0; u.l.lower=0; u.up=vp;
return u.l.upper^u.l.lower;
}
//######################################################################
class FileLine {
// File and line number of an object, mostly for error reporting
int m_lineno;
string m_filename;
bitset<V3ErrorCode::MAX> m_warnOff;
bitset<V3ErrorCode::MAX> m_warnOn;
static FileLine s_defaultFileLine;
struct EmptySecret {};
protected:
@@ -201,9 +225,9 @@ protected:
void incLineno() { m_lineno++; }
FileLine* copyOrSameFileLine();
public:
FileLine (const string& filename, int lineno) { m_lineno=lineno; m_filename = filename; m_warnOff=s_defaultFileLine.m_warnOff; }
FileLine (FileLine* fromp) { m_lineno=fromp->lineno(); m_filename = fromp->filename(); m_warnOff=fromp->m_warnOff; }
FileLine (EmptySecret) { m_lineno=0; m_filename="COMMAND_LINE"; m_warnOff=0; }
FileLine (const string& filename, int lineno) { m_lineno=lineno; m_filename = filename; m_warnOn=s_defaultFileLine.m_warnOn; }
FileLine (FileLine* fromp) { m_lineno=fromp->lineno(); m_filename = fromp->filename(); m_warnOn=fromp->m_warnOn; }
FileLine (EmptySecret);
~FileLine() { }
#ifdef VL_LEAK_CHECKS
static void* operator new(size_t size);
@@ -216,13 +240,21 @@ public:
const string filebasename () const;
const char* cfilename () const { return m_filename.c_str(); }
const string profileFuncname() const;
void warnOff(V3ErrorCode code, bool flag) { m_warnOff.set(code,flag); } // Turn on/off warning messages on this line.
void warnOff(V3ErrorCode code, bool flag) { m_warnOn.set(code,!flag); } // Turn on/off warning messages on this line.
bool warnOff(const string& code, bool flag); // Returns 1 if ok
bool warnIsOff(V3ErrorCode code);
bool warnIsOff(V3ErrorCode code) const;
void warnLintOff(bool flag);
void warnStateFrom(const FileLine& from) { m_warnOff=from.m_warnOff; }
void warnStateFrom(const FileLine& from) { m_warnOn=from.m_warnOn; }
void warnStateInherit(const FileLine& from);
void warnResetDefault() { warnStateFrom(s_defaultFileLine); }
// Boolean ACCESSORS/METHODS
bool coverageOn() const { return m_warnOn.test(V3ErrorCode::I_COVERAGE); }
void coverageOn(bool flag) { m_warnOn.set(V3ErrorCode::I_COVERAGE,flag); }
bool tracingOn() const { return m_warnOn.test(V3ErrorCode::I_TRACING); }
void tracingOn(bool flag) { m_warnOn.set(V3ErrorCode::I_TRACING,flag); }
// METHODS
void v3errorEnd(ostringstream& str);
inline bool operator==(FileLine rhs) { return (m_lineno==rhs.m_lineno && m_filename==rhs.m_filename); }
+29 -27
View File
@@ -1,4 +1,3 @@
// $Id$
//*************************************************************************
// DESCRIPTION: Verilator: Add temporaries, such as for expand nodes
//
@@ -8,7 +7,7 @@
//
//*************************************************************************
//
// Copyright 2004-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2004-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
@@ -19,7 +18,7 @@
//
//*************************************************************************
// V3Expand's Transformations:
//
//
// Each module:
// Expand verilated.h macros into internal micro optimizations (RTL)
// this will enable later optimizations.
@@ -32,8 +31,8 @@
#include "config_build.h"
#include "verilatedos.h"
#include <stdio.h>
#include <stdarg.h>
#include <cstdio>
#include <cstdarg>
#include <unistd.h>
#include <algorithm>
@@ -51,9 +50,13 @@ private:
// STATE
AstNode* m_stmtp; // Current statement
//int debug() { return 9; }
// METHODS
static int debug() {
static int level = -1;
if (VL_UNLIKELY(level < 0)) level = v3Global.opt.debugSrcLevel(__FILE__);
return level;
}
int longOrQuadWidth (AstNode* nodep) {
// Return 32 or 64...
return (nodep->width()+(VL_WORDSIZE-1)) & ~(VL_WORDSIZE-1);
@@ -168,12 +171,12 @@ private:
}
return newp;
}
AstNode* newSelBitWord(AstNode* lsbp, int wordAdder) {
// Return equation to get the VL_BITWORD of a constant or non-constant
if (lsbp->castConst()) {
return new AstConst (lsbp->fileline(),
wordAdder + VL_BITWORD_I(lsbp->castConst()->asInt()));
wordAdder + VL_BITWORD_I(lsbp->castConst()->toUInt()));
} else {
AstNode* shiftp = new AstShiftR (lsbp->fileline(),
lsbp->cloneTree(true),
@@ -204,7 +207,7 @@ private:
// Return equation to get the VL_BITBIT of a constant or non-constant
if (lsbp->castConst()) {
return new AstConst (lsbp->fileline(),
VL_BITBIT_I(lsbp->castConst()->asInt()));
VL_BITBIT_I(lsbp->castConst()->toUInt()));
} else {
return new AstAnd (lsbp->fileline(),
new AstConst(lsbp->fileline(), VL_WORDSIZE-1),
@@ -355,7 +358,7 @@ private:
AstNode* lowwordp = new AstWordSel (nodep->fromp()->fileline(),
nodep->fromp()->cloneTree(true),
newSelBitWord(nodep->lsbp(), 0));
if (nodep->isQuad() && !lowwordp->isQuad()) lowwordp = new AstCast(nodep->fileline(), lowwordp, nodep);
if (nodep->isQuad() && !lowwordp->isQuad()) lowwordp = new AstCast(nodep->fileline(), lowwordp, nodep);
AstNode* lowp = new AstShiftR (nodep->fileline(),
lowwordp,
newSelBitBit(nodep->lsbp()),
@@ -368,7 +371,7 @@ private:
new AstWordSel (nodep->fromp()->fileline(),
nodep->fromp()->cloneTree(true),
newSelBitWord(nodep->lsbp(), 1));
if (nodep->isQuad() && !midwordp->isQuad()) midwordp = new AstCast(nodep->fileline(), midwordp, nodep);
if (nodep->isQuad() && !midwordp->isQuad()) midwordp = new AstCast(nodep->fileline(), midwordp, nodep);
// If we're selecting bit zero, then all 32 bits in word 1 get shifted << by 32 bits
// else we need to form the lower word, so we << by 31 or less
// nbitsfromlow <= (lsb==0) ? 64-bitbit(lsb) : 32-bitbit(lsb)
@@ -406,7 +409,7 @@ private:
new AstWordSel (nodep->fromp()->fileline(),
nodep->fromp()->cloneTree(true),
newSelBitWord(nodep->lsbp(), 2));
if (nodep->isQuad() && !hiwordp->isQuad()) hiwordp = new AstCast(nodep->fileline(), hiwordp, nodep);
if (nodep->isQuad() && !hiwordp->isQuad()) hiwordp = new AstCast(nodep->fileline(), hiwordp, nodep);
AstNode* himayp =
new AstShiftL (nodep->fileline(),
hiwordp,
@@ -434,7 +437,7 @@ private:
UINFO(8," SEL->SHIFT "<<nodep<<endl);
AstNode* fromp = nodep->fromp()->unlinkFrBack();
AstNode* lsbp = nodep->lsbp()->unlinkFrBack();
if (nodep->isQuad() && !fromp->isQuad()) fromp = new AstCast(nodep->fileline(), fromp, nodep);
if (nodep->isQuad() && !fromp->isQuad()) fromp = new AstCast(nodep->fileline(), fromp, nodep);
AstNode* newp = new AstShiftR (nodep->fileline(),
fromp,
dropCondBound(lsbp),
@@ -504,7 +507,7 @@ private:
bool destwide = lhsp->fromp()->isWide();
bool ones = nodep->rhsp()->isAllOnesV();
if (lhsp->lsbp()->castConst()) {
// The code should work without this constant test, but it won't
// The code should work without this constant test, but it won't
// constify as nicely as we'd like.
AstNode* rhsp = nodep->rhsp()->unlinkFrBack();
AstNode* destp = lhsp->fromp()->unlinkFrBack();
@@ -592,7 +595,7 @@ private:
// For wide destp, we can either form a equation for every destination word,
// with the appropriate long equation of if it's being written or not.
// Or, we can use a LHS variable arraysel with non-constant index to set the vector.
// Doing the variable arraysel is better for globals and large arrays,
// Doing the variable arraysel is better for globals and large arrays,
// doing every word is better for temporaries and if we're setting most words
// since it may result in better substitution optimizations later.
// This results in so much code, we're better off leaving a function call.
@@ -630,7 +633,7 @@ private:
//newp->dumpTree(cout,"- new: ");
insertBefore(nodep,newp);
return true;
}
}
}
}
@@ -641,10 +644,10 @@ private:
} else {
UINFO(8," CONCAT "<<nodep<<endl);
AstNode* lhsp = nodep->lhsp()->unlinkFrBack();
AstNode* rhsp = nodep->rhsp()->unlinkFrBack();
AstNode* rhsp = nodep->rhsp()->unlinkFrBack();
int rhsshift = rhsp->widthMin();
if (nodep->isQuad() && !lhsp->isQuad()) lhsp = new AstCast(nodep->fileline(), lhsp, nodep);
if (nodep->isQuad() && !rhsp->isQuad()) rhsp = new AstCast(nodep->fileline(), rhsp, nodep);
if (nodep->isQuad() && !lhsp->isQuad()) lhsp = new AstCast(nodep->fileline(), lhsp, nodep);
if (nodep->isQuad() && !rhsp->isQuad()) rhsp = new AstCast(nodep->fileline(), rhsp, nodep);
AstNode* newp = new AstOr (nodep->fileline(),
new AstShiftL (nodep->fileline(),
lhsp,
@@ -657,7 +660,7 @@ private:
}
bool expandWide (AstNodeAssign* nodep, AstConcat* rhsp) {
UINFO(8," Wordize ASSIGN(CONCAT) "<<nodep<<endl);
// Lhs or Rhs may be word, long, or quad.
// Lhs or Rhs may be word, long, or quad.
// newAstWordSelClone nicely abstracts the difference.
int rhsshift = rhsp->rhsp()->widthMin();
// Sometimes doing the words backwards is preferrable.
@@ -670,7 +673,7 @@ private:
rhsp->lhsp(), rhsshift),
newAstWordSelClone (rhsp->rhsp(), w)));
}
return true;
return true;
}
virtual void visit(AstReplicate* nodep, AstNUser*) {
@@ -689,8 +692,8 @@ private:
UINFO(8," REPLICATE "<<nodep<<endl);
AstConst* constp = nodep->rhsp()->castConst();
if (!constp) nodep->v3fatalSrc("Replication value isn't a constant. Checked earlier!");
uint32_t times = constp->asInt();
if (nodep->isQuad() && !lhsp->isQuad()) lhsp = new AstCast(nodep->fileline(), lhsp, nodep);
uint32_t times = constp->toUInt();
if (nodep->isQuad() && !lhsp->isQuad()) lhsp = new AstCast(nodep->fileline(), lhsp, nodep);
newp = lhsp->cloneTree(true);
for (unsigned repnum=1; repnum<times; repnum++) {
int rhsshift = repnum*lhswidth;
@@ -714,7 +717,7 @@ private:
int lhswidth = lhsp->widthMin();
AstConst* constp = rhsp->rhsp()->castConst();
if (!constp) rhsp->v3fatalSrc("Replication value isn't a constant. Checked earlier!");
uint32_t times = constp->asInt();
uint32_t times = constp->toUInt();
for (int w=0; w<rhsp->widthWords(); w++) {
AstNode* newp;
if (lhswidth==1) {
@@ -731,7 +734,7 @@ private:
}
addWordAssign(nodep, w, newp);
}
return true;
return true;
}
virtual void visit(AstChangeXor* nodep, AstNUser*) {
@@ -906,7 +909,6 @@ public:
}
virtual ~ExpandVisitor() {}
void main(AstNode* nodep) {
AstNode::userClearTree(); // userp() used on entire tree
nodep->accept(*this);
}
};
+2 -2
View File
@@ -1,4 +1,4 @@
// $Id$ //-*- C++ -*-
// -*- C++ -*-
//*************************************************************************
// DESCRIPTION: Verilator: Expansion of wide operator macros to C operators
//
@@ -8,7 +8,7 @@
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
+5 -5
View File
@@ -1,4 +1,3 @@
// $Id$
//*************************************************************************
// DESCRIPTION: Verilator: File stream wrapper that understands indentation
//
@@ -8,7 +7,7 @@
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
@@ -21,7 +20,7 @@
#include "config_build.h"
#include "verilatedos.h"
#include <stdarg.h>
#include <cstdarg>
#include <sys/stat.h>
#include <sys/types.h>
#include <unistd.h>
@@ -245,8 +244,9 @@ void V3File::createMakeDir() {
// V3OutFile: A class for printing to a file, with automatic indentation of C++ code.
V3OutFile::V3OutFile(const string& filename)
: m_lineno(1), m_column(0), m_nobreak(false), m_prependIndent(true), m_indentLevel(0)
, m_declSAlign(0), m_declNSAlign(0), m_declPadNum(0) {
: m_filename(filename), m_lineno(1), m_column(0)
, m_nobreak(false), m_prependIndent(true), m_indentLevel(0)
, m_declSAlign(0), m_declNSAlign(0), m_declPadNum(0) {
if ((m_fp = V3File::new_fopen_w(filename.c_str())) == NULL) {
v3fatal("Cannot write "<<filename);
}
+7 -5
View File
@@ -1,4 +1,4 @@
// $Id$ //-*- C++ -*-
// -*- C++ -*-
//*************************************************************************
// DESCRIPTION: Verilator: File stream wrapper that understands indentation
//
@@ -8,7 +8,7 @@
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
@@ -24,7 +24,7 @@
#include "config_build.h"
#include "verilatedos.h"
#include "V3Error.h"
#include <stdio.h>
#include <cstdio>
#include <stack>
#include <set>
#include <fstream>
@@ -87,6 +87,7 @@ public:
private:
// MEMBERS
FILE* m_fp;
string m_filename;
int m_lineno;
int m_column;
int m_nobreak; // Basic operator or begin paren, don't break next
@@ -120,8 +121,9 @@ public:
bool tokenStart(const char* cp, const char* cmp);
bool tokenEnd(const char* cp);
void indentInc() { m_indentLevel += INDBLK; };
void indentDec() { m_indentLevel -= INDBLK;
UASSERT(m_indentLevel>=0,"Underflow of indentation\n");
void indentDec() {
m_indentLevel -= INDBLK;
UASSERT(m_indentLevel>=0, ": "<<m_filename<<": Underflow of indentation\n");
}
void blockInc() { m_parenVec.push(m_indentLevel + INDBLK); }
void blockDec() { if (!m_parenVec.empty()) m_parenVec.pop(); }
+35 -18
View File
@@ -1,4 +1,3 @@
// $Id$
//*************************************************************************
// DESCRIPTION: Verilator: Gate optimizations, such as wire elimination
//
@@ -8,7 +7,7 @@
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
@@ -19,7 +18,7 @@
//
//*************************************************************************
// V3Gate's Transformations:
//
//
// Extract a graph of the *entire* netlist with cells expanded
// Perform constant optimization across the graph
// Create VARSCOPEs for any variables we can rip out
@@ -28,8 +27,8 @@
#include "config_build.h"
#include "verilatedos.h"
#include <stdio.h>
#include <stdarg.h>
#include <cstdio>
#include <cstdarg>
#include <unistd.h>
#include <algorithm>
#include <iomanip>
@@ -49,7 +48,11 @@ typedef list<AstNodeVarRef*> GateVarRefList;
class GateBaseVisitor : public AstNVisitor {
public:
//int debug() { return 9; }
static int debug() {
static int level = -1;
if (VL_UNLIKELY(level < 0)) level = v3Global.opt.debugSrcLevel(__FILE__);
return level;
}
};
//######################################################################
@@ -170,7 +173,7 @@ private:
// V3Const cleans up any NOTs by flipping the edges for us
if (m_buffersOnly
&& !(nodep->rhsp()->castVarRef()
// Until NEW_ORDERING, avoid making non-clocked logic into clocked,
// Until NEW_ORDERING, avoid making non-clocked logic into clocked,
// as it slows down the verilator_sim_benchmark
|| (nodep->rhsp()->castNot()
&& nodep->rhsp()->castNot()->lhsp()->castVarRef()
@@ -230,8 +233,9 @@ class GateVisitor : public GateBaseVisitor {
private:
// NODE STATE
//Entire netlist:
// AstVarScope::userp -> GateVarVertex* for usage var, 0=not set yet
// {statement}Node::userp -> GateLogicVertex* for this statement
// AstVarScope::user1p -> GateVarVertex* for usage var, 0=not set yet
// {statement}Node::user1p -> GateLogicVertex* for this statement
AstUser1InUse m_inuser1;
// STATE
V3Graph m_graph; // Scoreboard of var usages/dependencies
@@ -263,11 +267,11 @@ private:
}
GateVarVertex* makeVarVertex(AstVarScope* varscp) {
GateVarVertex* vertexp = (GateVarVertex*)(varscp->userp());
GateVarVertex* vertexp = (GateVarVertex*)(varscp->user1p());
if (!vertexp) {
UINFO(6,"New vertex "<<varscp<<endl);
vertexp = new GateVarVertex(&m_graph, m_scopep, varscp);
varscp->userp(vertexp);
varscp->user1p(vertexp);
if (varscp->varp()->isSigPublic()) {
// Public signals shouldn't be changed, pli code might be messing with them
vertexp->clearReducible("SigPublic");
@@ -294,8 +298,6 @@ private:
// VISITORS
virtual void visit(AstNetlist* nodep, AstNUser*) {
//VV***** We reset userp() and user2p
AstNode::userClearTree();
nodep->iterateChildren(*this);
//if (debug()>6) m_graph.dump();
if (debug()>6) m_graph.dumpDotFilePrefixed("gate_pre");
@@ -317,6 +319,7 @@ private:
m_modp = nodep;
m_activeReducible = true;
nodep->iterateChildren(*this);
m_modp = NULL;
}
virtual void visit(AstScope* nodep, AstNUser*) {
UINFO(4," SCOPE "<<nodep<<endl);
@@ -343,7 +346,7 @@ private:
UINFO(5," VARREF to "<<varscp<<endl);
// We use weight of one; if we ref the var more than once, when we simplify,
// the weight will increase
if (nodep->lvalue()) {
if (nodep->lvalue()) {
new V3GraphEdge(&m_graph, m_logicVertexp, varvertexp, 1);
} else {
new V3GraphEdge(&m_graph, varvertexp, m_logicVertexp, 1);
@@ -357,10 +360,21 @@ private:
iterateNewStmt(nodep, "User C Function", "User C Function");
}
virtual void visit(AstSenItem* nodep, AstNUser*) {
// Note we look at only AstSenItems, not AstSenGate's
// The gating term of a AstSenGate is normal logic
m_inSenItem = true;
iterateNewStmt(nodep, NULL, NULL);
if (m_logicVertexp) { // Already under logic; presumably a SenGate
nodep->iterateChildren(*this);
} else { // Standalone item, probably right under a SenTree
iterateNewStmt(nodep, NULL, NULL);
}
m_inSenItem = false;
}
virtual void visit(AstSenGate* nodep, AstNUser*) {
// First handle the clock part will be handled in a minute by visit AstSenItem
// The logic gating term is delt with as logic
iterateNewStmt(nodep, "Clock gater", "Clock gater");
}
virtual void visit(AstInitial* nodep, AstNUser*) {
bool lastslow = m_inSlow;
m_inSlow = true;
@@ -373,6 +387,9 @@ private:
virtual void visit(AstAssignW* nodep, AstNUser*) {
iterateNewStmt(nodep, NULL, NULL);
}
virtual void visit(AstCoverToggle* nodep, AstNUser*) {
iterateNewStmt(nodep, "CoverToggle", "CoverToggle");
}
virtual void visit(AstTraceInc* nodep, AstNUser*) {
bool lastslow = m_inSlow;
m_inSlow = true;
@@ -421,7 +438,7 @@ void GateVisitor::optimizeSignals(bool allowMultiIn) {
if (!vvertexp->isTop() // Ok if top inputs are driverless
&& !vvertexp->varScp()->varp()->initp()
&& !vvertexp->varScp()->varp()->isSigPublic()) {
UINFO(1, "No drivers "<<vvertexp->varScp()<<endl);
UINFO(4, "No drivers "<<vvertexp->varScp()<<endl);
if (0) {
// If we warned here after constant propagation, what the user considered
// reasonable logic may have disappeared. Issuing a warning would
@@ -490,7 +507,7 @@ void GateVisitor::optimizeSignals(bool allowMultiIn) {
if (debug()>=5) substp->dumpTree(cout,"\t subst: ");
m_statSigs++;
while (V3GraphEdge* edgep = vvertexp->outBeginp()) {
GateLogicVertex* consumeVertexp = dynamic_cast<GateLogicVertex*>(edgep->top());
GateLogicVertex* consumeVertexp = dynamic_cast<GateLogicVertex*>(edgep->top());
AstNode* consumerp = consumeVertexp->nodep();
optimizeElimVar(vvertexp->varScp(), substp, consumerp);
// If the new replacement referred to a signal,
@@ -565,7 +582,7 @@ void GateVisitor::replaceAssigns() {
//if (debug()>9) {vscp->dumpTree(cout, "-vscDone: "); cout<<endl;}
if (!vscp->valuep()->castNodeMath()
|| vscp->valuep()->nextp()) {
vscp->dumpTree(cout, "vscStrange: ");
vscp->dumpTree(cerr, "vscStrange: ");
vscp->v3fatalSrc("Value of varscope not mathematical\n");
}
}
+2 -2
View File
@@ -1,4 +1,4 @@
// $Id$ //-*- C++ -*-
// -*- C++ -*-
//*************************************************************************
// DESCRIPTION: Verilator: Break always into sensitivity block domains
//
@@ -8,7 +8,7 @@
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
+18 -12
View File
@@ -1,4 +1,3 @@
// $Id$
//*************************************************************************
// DESCRIPTION: Verilator: Generated Clock repairs
//
@@ -8,7 +7,7 @@
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
@@ -21,13 +20,13 @@
// GENCLK TRANSFORMATIONS:
// Follow control-flow graph with assignments and var usages
// ASSIGNDLY to variable later used as clock requires change detect
//
//
//*************************************************************************
#include "config_build.h"
#include "verilatedos.h"
#include <stdio.h>
#include <stdarg.h>
#include <cstdio>
#include <cstdarg>
#include <unistd.h>
#include "V3Global.h"
@@ -39,7 +38,11 @@
class GenClkBaseVisitor : public AstNVisitor {
protected:
//static int debug() { return 9; }
static int debug() {
static int level = -1;
if (VL_UNLIKELY(level < 0)) level = v3Global.opt.debugSrcLevel(__FILE__);
return level;
}
};
//######################################################################
@@ -51,6 +54,8 @@ private:
// Cleared on top scope
// AstVarScope::user2() -> AstVarScope*. Signal replacing activation with
// AstVarRef::user3() -> bool. Signal is replaced activation (already done)
AstUser2InUse m_inuser2;
AstUser3InUse m_inuser3;
// STATE
AstActive* m_activep; // Inside activate statement
@@ -83,7 +88,7 @@ private:
// VISITORS
virtual void visit(AstTopScope* nodep, AstNUser*) {
AstNode::user2ClearTree(); // userp() used on entire tree
AstNode::user2ClearTree(); // user2p() used on entire tree
AstScope* scopep = nodep->scopep();
if (!scopep) nodep->v3fatalSrc("No scope found on top level");
@@ -93,7 +98,7 @@ private:
}
//----
virtual void visit(AstVarRef* nodep, AstNUser*) {
// Consumption/generation of a variable,
// Consumption/generation of a variable,
AstVarScope* vscp = nodep->varScopep();
if (!vscp) nodep->v3fatalSrc("Scope not assigned");
if (m_activep && !nodep->user3()) {
@@ -141,6 +146,7 @@ private:
// NODE STATE
// Cleared on top scope
// AstVarScope::user() -> bool. Set when the var has been used as clock
AstUser1InUse m_inuser1;
// STATE
AstActive* m_activep; // Inside activate statement
@@ -149,7 +155,7 @@ private:
// VISITORS
virtual void visit(AstTopScope* nodep, AstNUser*) {
AstNode::userClearTree(); // userp() used on entire tree
AstNode::user1ClearTree(); // user1p() used on entire tree
nodep->iterateChildren(*this);
{
// Make the new clock signals and replace any activate references
@@ -172,14 +178,14 @@ private:
//----
virtual void visit(AstVarRef* nodep, AstNUser*) {
// Consumption/generation of a variable,
// Consumption/generation of a variable,
AstVarScope* vscp = nodep->varScopep();
if (!vscp) nodep->v3fatalSrc("Scope not assigned");
if (m_activep) {
UINFO(8," VarAct "<<nodep<<endl);
vscp->user(true);
vscp->user1(true);
}
if (m_assignp && nodep->lvalue() && vscp->user()) {
if (m_assignp && nodep->lvalue() && vscp->user1()) {
// Variable was previously used as a clock, and is now being set
// Thus a unordered generated clock...
UINFO(8," VarSetAct "<<nodep<<endl);
+2 -2
View File
@@ -1,4 +1,4 @@
// $Id$ //-*- C++ -*-
//-*- C++ -*-
//*************************************************************************
// DESCRIPTION: Verilator: Generated Clock Repairs
//
@@ -8,7 +8,7 @@
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
+2 -2
View File
@@ -1,4 +1,4 @@
// $Id$ //-*- C++ -*-
// -*- C++ -*-
//*************************************************************************
// DESCRIPTION: Verilator: Common headers
//
@@ -8,7 +8,7 @@
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
+31 -9
View File
@@ -1,4 +1,4 @@
// $Id$
// -*- C++ -*-
//*************************************************************************
// DESCRIPTION: Verilator: Graph optimizations
//
@@ -8,7 +8,7 @@
//
//*************************************************************************
//
// Copyright 2003-2008 by Wilson Snyder. This program is free software; you can
// Copyright 2003-2009 by Wilson Snyder. This program is free software; you can
// redistribute it and/or modify it under the terms of either the GNU
// General Public License or the Perl Artistic License.
//
@@ -21,8 +21,8 @@
#include "config_build.h"
#include "verilatedos.h"
#include <stdio.h>
#include <stdarg.h>
#include <cstdio>
#include <cstdarg>
#include <unistd.h>
#include <algorithm>
#include <vector>
@@ -94,6 +94,26 @@ bool V3GraphVertex::outSize1() const {
return !outEmpty() && outBeginp()->outNextp()==NULL;
}
uint32_t V3GraphVertex::inHash() const {
// We want the same hash ignoring the order of edges.
// So we need an associative operator, like XOR.
// However with XOR multiple edges to the same source will cancel out,
// so we use ADD. (Generally call this only after removing duplicates though)
uint32_t hash=0;
for (V3GraphEdge* edgep = this->inBeginp(); edgep; edgep=edgep->inNextp()) {
hash += cvtToHash(edgep->fromp());
}
return hash;
}
uint32_t V3GraphVertex::outHash() const {
uint32_t hash=0;
for (V3GraphEdge* edgep = this->outBeginp(); edgep; edgep=edgep->outNextp()) {
hash += cvtToHash(edgep->top());
}
return hash;
}
ostream& operator<<(ostream& os, V3GraphVertex* vertexp) {
os<<" VERTEX="<<vertexp->name();
if (vertexp->rank()) os<<" r"<<vertexp->rank();
@@ -106,7 +126,7 @@ ostream& operator<<(ostream& os, V3GraphVertex* vertexp) {
//######################################################################
// Edges
V3GraphEdge::V3GraphEdge(V3Graph* graphp,
V3GraphEdge::V3GraphEdge(V3Graph* graphp,
V3GraphVertex* fromp, V3GraphVertex* top, int weight,
bool cutable) {
UASSERT(fromp, "Null from pointer\n");
@@ -176,8 +196,10 @@ void V3Graph::clear() {
void V3Graph::userClearVertices() {
// Clear user() in all of tree
// We may use the userCnt trick in V3Ast later... For now we don't call this often, and
// the extra code on each read of user() would probably slow things down more than help.
// We may use the userCnt trick in V3Ast later... (but gblCnt would be
// in V3Graph instead of static) For now we don't call this often, and
// the extra code on each read of user() would probably slow things
// down more than help.
for (V3GraphVertex* vertexp = verticesBeginp(); vertexp; vertexp=vertexp->verticesNextp()) {
vertexp->user(0);
vertexp->userp(NULL); // Its a union, but might be different size than user()
@@ -206,7 +228,7 @@ void V3Graph::clearColors() {
void V3Graph::loopsVertexCb(V3GraphVertex* vertexp) {
// Needed here as V3GraphVertex<< isn't defined until later in header
cout<<"-Info-Loop: "<<(void*)(vertexp)<<" "<<vertexp<<endl;
cerr<<"-Info-Loop: "<<(void*)(vertexp)<<" "<<vertexp<<endl;
}
void V3Graph::dump(ostream& os) {
@@ -254,7 +276,7 @@ void V3Graph::dumpDotFile(const string& filename, bool colorAsSubgraph) {
// Header
*logp<<"digraph v3graph {\n";
*logp<<"\trankdir="<<dotRankDir()<<"\n";
*logp<<"\tsize="<<"\"7.5,10\""<<"\n";
*logp<<"\t//size="<<"\"7.5,10\""<<"\n";
*logp<<"\tnTITLE\t[fontsize=20 label=\""<<filename<<"\", shape=box, style=bold, color=black];\n";
*logp<<"\n";

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