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prjxray
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286 Commits

Author SHA1 Message Date
Robert Winkler 2b44720b6f Adjust harness settings to new A100T database 
Signed-off-by: Robert Winkler <rwinkler@antmicro.com>
 2020-07-16 00:04:50 +02:00
Andrew Butt 30f35f97bd Add dedicated port type to harness design.json 
Signed-off-by: Andrew Butt <butta@seas.upenn.edu>
 2020-07-01 10:24:51 -04:00
litghost 764ec71eb2 Revert "Move fasm2frames to prjxray" 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2020-06-15 17:32:11 -07:00
litghost aff6885332
Merge pull request #1345 from antmicro/idelay_minitest 
A minitest for IDELAY
 2020-06-15 09:12:45 -07:00
Alessandro Comodi 8e4e400b17 move fasm2frames to prjxray to avoid including utils in python package 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2020-06-09 13:47:58 +02:00
Maciej Kurc 96c9f03e40 Added licensing information 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2020-05-27 15:38:32 +02:00
Maciej Kurc 0e4c5be5d5 Added a test for IDELAY with single bit data transmission and error counting. 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2020-05-27 15:17:04 +02:00
Maciej Kurc ce926fc359 Added minitest which generates 32 differently delayed signals. 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2020-05-27 15:17:04 +02:00
Maciej Kurc d3891f41d3 IDELAY minitest with variable (preloaded) delay value. 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2020-05-27 15:17:04 +02:00
Tomasz Michalak c66f4f4aa1 Add license headers to tcl files 
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
Signed-off-by: Tim 'mithro' Ansell <tansell@google.com>
 2020-05-26 07:33:12 -07:00
Tomasz Michalak fbf4dd897d Add or fix license header 
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
Signed-off-by: Tim 'mithro' Ansell <tansell@google.com>
 2020-05-26 07:33:12 -07:00
Tomasz Michalak 300bc62227 Add licensing header to bash scripts 
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
Signed-off-by: Tim 'mithro' Ansell <tansell@google.com>
 2020-05-26 07:33:12 -07:00
Tomasz Michalak 159d6a8e88 Add licensing header to Makefiles 
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
Signed-off-by: Tim 'mithro' Ansell <tansell@google.com>
 2020-05-26 07:33:12 -07:00
Maciej Kurc 1d394949e4 Added setting INTERNAL_VREF in IOSTANDARD minitest. 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2020-05-07 13:57:10 +02:00
Maciej Kurc e2e1d9fc8e Added SSTL15 to the minitest. 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2020-05-07 12:34:34 +02:00
Alessandro Comodi ea24401d92 bram-sdp minitest: add --verbose to bit2fasm 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2020-03-05 11:08:02 +01:00
Alessandro Comodi d7e2fff2a6 bram-sdp minitest: added minitest to check features of SDP brams 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2020-03-04 16:46:58 +01:00
litghost f02800daf5
Merge pull request #1218 from antmicro/ddr-uart-bridge 
Added UART DDR minitest
 2020-02-26 17:13:38 -08:00
Tim 'mithro' Ansell 4fbcbb5c87 minitests/litex*: Fix location of clean_json5.py tool. 
Fixes #1255.

Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
 2020-02-24 23:07:48 -08:00
Keith Rothman 1f22d60160 Fix up Makefile dependences. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2020-02-19 16:34:12 -08:00
Keith Rothman 907a9ee72e Pass MAKEFLAGS to children. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2020-02-19 16:34:11 -08:00
Keith Rothman 9f839a7a08 Attempt to parallelize 074 for additional parts. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2020-02-19 16:34:11 -08:00
Keith Rothman 222eefcece Use extract_numbers for sort keys to preserve previous DB output. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2020-02-18 10:45:22 -08:00
Keith Rothman 89761c1102 Add some sorting to JSON outputs. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2020-02-18 06:39:20 -08:00
Keith Rothman d95eefc8de Fix some bugs present timing analysis script. 
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
 2020-02-13 13:19:46 -08:00
Alessandro Comodi 2f25a2682c ddr-uart: using same design needed in arch-defs for the ddr test 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2020-02-12 10:57:34 +01:00
Alessandro Comodi fb5a88a6b8 uart_ddr: improve sdram test script 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2020-02-10 15:00:30 +01:00
Alessandro Comodi 51158fd0b8 uart-ddr: addressed review comments and fixed file locations 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2020-02-04 11:10:40 +01:00
Alessandro Comodi 8a7e7664f8 uart_ddr: checking out litex at specific commits 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2020-02-03 17:17:35 +01:00
Alessandro Comodi 8736d80af3 run make format 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2020-02-03 13:08:15 +01:00
Alessandro Comodi f85e244ac6 Added UART DDR minitest 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2020-02-03 12:41:40 +01:00
Alessandro Comodi 4a0ca41077 roi_only: copy tilegrid and tileconn from equivalent part 
005-tilegrid fuzzer cannot run for some parts as some of the IOBs are
not available, therefore the fuzzer exits with errors.

Instead, the tilegrid is copied from the specified equivalent part.

Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2020-01-24 10:13:33 +01:00
Alessandro Comodi 88f7830456 addressed review comments 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2020-01-24 10:13:33 +01:00
Alessandro Comodi 7226354bdf fix env variable usage in roi_harness minitest 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2020-01-24 10:13:33 +01:00
Alessandro Comodi e44027bcaf Move all part-specific files to dedicated directory 
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
 2020-01-24 10:13:33 +01:00
Tomasz Michalak 18acada713 minitests: Add min litex with DDR test 
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
 2019-12-11 11:49:25 +01:00
Tomasz Michalak fb96f3fe86 minitests: Add minimal Litex configuration for Arty 
Signed-off-by: Tomasz Michalak <tmichalak@antmicro.com>
 2019-12-10 10:02:36 +01:00
litghost 0e8ff9b64e
Merge pull request #1157 from antmicro/iostandard_minitest 
Minitest for different IOSTANDARDs
 2019-12-09 11:09:33 -08:00
Maciej Kurc eef8ec93cb Added ignoring of PUDC_B pin. 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2019-12-09 14:40:35 +01:00
Maciej Kurc 75c6ff27de A minitest for Zynq7 EMIO PS->PL interface. 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2019-12-03 15:39:13 +01:00
Maciej Kurc 20475bfd6a Review comments. 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2019-12-03 12:07:04 +01:00
Maciej Kurc d9fc7b3f7e Fixed semicolon 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2019-12-02 10:34:37 +01:00
Maciej Kurc 0fb79b8753 Fixed bug with diff pair loc-ing. 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2019-12-02 10:16:21 +01:00
Maciej Kurc c396b0f9cc Added support for differential standards. 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2019-11-29 16:29:41 +01:00
Maciej Kurc e8b05c6b27 Minitest for different IOSTANDARDs 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2019-11-29 13:55:14 +01:00
Tim 'mithro' Ansell 7386641d9b Fix trailing white space. 
Signed-off-by: Tim 'mithro' Ansell <me@mith.ro>
 2019-11-03 15:07:24 -08:00
litghost daf284151c
Merge pull request #1119 from antmicro/litex_litedram 
minitests: Add test for Litex DRAM memory interface
 2019-10-30 10:40:01 -07:00
litghost 78cf96be0f
Merge pull request #1122 from JakeMercer/whitespace 
Whitespace
 2019-10-29 15:04:39 -07:00
Maciej Kurc 4a6930694f Reworked fuzzer, added README.md 
Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
 2019-10-28 15:59:38 +01:00
Jake Mercer c05b4b0406 MAKE - Format Trailing Whitespace 
Add `make format-trailing-ws`.  This recipe finds all _files_ (not
links) known to Git and uses `sed` to remove trailing whitespace.

Signed-off-by: Jake Mercer <jake.mercer@civica.co.uk>
 2019-10-26 10:04:52 +01:00