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Mono Color

• a87d689d83 ALINX AX7102 board. Haakan T Johansson 2023-10-24 14:03:18 +0200
• fd8497026a ftdiJtagMPSSE,jtag,jtagInterface: allows to force read/write edge configuration (useful to mimic SPI through JTAG) Gwenhael Goavec-Merou 2023-10-24 07:26:19 +0200
• b76a67963e board: SiPEED tang Mega 138K Gwenhael Goavec-Merou 2023-10-24 06:11:53 +0200
• 9a2fe6e157 board: SiPEED tang Primer 25K Gwenhael Goavec-Merou 2023-10-24 06:07:42 +0200
• 4a3db2b519 doc: adding FT4232HP cable/interface. Gwenhael Goavec-Merou 2023-10-23 07:16:19 +0200
• 988bedefb6 lattice: fix typo / warning Gwenhael Goavec-Merou 2023-10-23 07:12:45 +0200
• fc35045c95
  Merge pull request #395 from bg-gsl/add_ft4232hp Gwenhael Goavec-Merou 2023-10-23 07:08:09 +0200
• cceac16fc5 precompute TMS sequencies Alexey Starikovskiy 2023-09-07 15:20:08 +0300
• 590611a8d5 lattice: fix the warning "left shift count >= width of type" shown in win32/64 builds Giovanni Bruni 2023-10-20 08:44:20 +0200
• bab386911a spi flash: add mapping for Micron MT25/N25Q128_1_8V (Lattice Certus Versa and CertusPro eval boards) and distinguish between N25Q128 1.8V and 3V memories Giovanni Bruni 2023-10-20 07:52:49 +0200
• 940da5fb2b spi flash: add mapping for Macronix MX25L51245G (CertusPro Versa board and gr740-mini) Giovanni Bruni 2023-10-18 16:02:45 +0200
• 5f6074a7fc lattice: fix bscan width and other minor things for NEXUS family Giovanni Bruni 2023-10-18 16:01:23 +0200
• dce0c050a7 board: add gr740-mini Giovanni Bruni 2023-10-16 08:01:03 +0200
• 2754e99215 cable: add FTDI FT4232HP mapping Giovanni Bruni 2023-10-11 10:04:29 +0200
• 0bbf817c92 part: fix typo Gwenhael Goavec-Merou 2023-10-19 17:46:50 +0200
• 32ef0bd29c
  Adding xcku115 to parts list (#394) sgoadhouse 2023-10-19 11:45:42 -0400
• c934bae3d2 Adding xcku115 to list of supported FPGAs Stephen Goadhouse 2023-10-19 17:23:52 +0200
• d86c98df4b Adding xcku115 to parts list Stephen Goadhouse 2023-10-19 16:39:31 +0200
• f964c3364f doc/FPGAs,boards: adding certus boards/parts entries Gwenhael Goavec-Merou 2023-10-13 17:12:13 +0200
• 5a3ab610a5
  Merge pull request #390 from bg-gsl/lattice_fix_program Gwenhael Goavec-Merou 2023-10-13 16:57:59 +0200
• cde4a2daf1
  Merge pull request #392 from enjoy-digital/xc7a35tfgg484 Gwenhael Goavec-Merou 2023-10-13 11:19:45 +0200
• ba0a2f3e26 spiOverJtag: Add xc7a35tfgg484 bitstream. Florent Kermarrec 2023-10-13 11:13:47 +0200
• 9de0f30137 spiOverJtag: Add xc7a35tfgg484 support. Florent Kermarrec 2023-10-13 11:13:29 +0200
• ce3935a72b
  Merge pull request #391 from enjoy-digital/xcku3p-ffva676-spiOverJtag Gwenhael Goavec-Merou 2023-10-12 18:14:04 +0200
• ddac3df394 spiOverJtag: Add xcku3p-ffva676 bitstream. Florent Kermarrec 2023-10-12 18:09:41 +0200
• 87a21fe74e spiOverJtag: Add xcku3p_ffva676 support. Florent Kermarrec 2023-10-12 18:02:23 +0200
• 7a637a1085 spiOverJtag/xilinx_spiOverJtag: Update code since Virtex Ultrascale has apparently been replaced with Xilinx Ultrascale. Florent Kermarrec 2023-10-12 17:59:57 +0200
• dafe350fbe lattice nexus family: REFRESH (plus config logic reset) in case of fpga in error state and add capabilities to handle the whole 64-bits status register Giovanni Bruni 2023-10-11 16:49:55 +0200
• 5733ca29c3 fix lattice programming and add nexus boards Giovanni Bruni 2023-10-11 09:52:45 +0200
• ec35f15a51 altera,efinix,gowin,xilinx: Fix 'Flash SRAM' -> 'Load SRAM' Gwenhael Goavec-Merou 2023-10-09 14:53:57 +0200
• 3e37a915bc
  Merge pull request #388 from pu-cc/gatemate-dirtyjtag Gwenhael Goavec-Merou 2023-10-04 17:56:20 +0200
• 18056180a8 gatemate: do not call ftdi-related routines when using alternative cables Patrick Urban 2023-10-04 15:41:10 +0200
• 3ed1d0d61d doc/board: fix efinix naming / mode Gwenhael Goavec-Merou 2023-10-03 06:54:22 +0200
• ad5ada90db board: trion_t20_bga256_jtag support Gwenhael Goavec-Merou 2023-10-03 06:51:38 +0200
• e9b31425d6 cable: efinix jtag ft2232 variant Gwenhael Goavec-Merou 2023-10-03 06:48:47 +0200
• 48caa612a3
  Merge pull request #381 from openhardwarefan/xczu17eg_support Gwenhael Goavec-Merou 2023-09-23 06:42:00 +0200
• c0ad3225cc Add support for Xilinx xczu17eg. It's tested on xczu17eg board with Digilent HS3 at 30Mbps. Zhongyi Chen 2023-09-22 19:33:01 -0700
• c82a8e6207 Make CH347 driver faster Speed up toggleClk Alexey Starikovskiy 2023-09-01 20:24:10 +0300
• 67159e8297 Move JTAG chain bit init to device_select() Alexey Starikovskiy 2023-09-04 15:40:51 +0300
• 4c39abf51c Add missing pieces to JTAG Alexey Starikovskiy 2023-09-22 00:28:30 +0300
• 85f9791600 drop div_by_5 to allow 2.5MHz clock Alexey Starikovskiy 2023-09-14 12:54:33 +0300
• 01ac90a172 [xilinx] add jtag->flush before sleep Alexey Starikovskiy 2023-09-19 17:56:50 +0300
• b10be9ae8a properly fill dummy arrays Alexey Starikovskiy 2023-09-20 15:01:07 +0300
• d3410e0e30 Update JTAG chain detect Alexey Starikovskiy 2023-09-18 14:31:42 +0300
• fc6f3fb8e1 doc/data: adding an (unused for now) SPIFlash entry Gwenhael Goavec-Merou 2023-09-21 07:03:41 +0200
• 5bbc02f56b doc/boards: fix wrong constraints link Gwenhael Goavec-Merou 2023-09-21 07:03:07 +0200
• afbf0c4ff8 board: adding @lambdaconcept ecpix5_r03 (ft4232) Gwenhael Goavec-Merou 2023-09-21 06:24:30 +0200
• 6c16417ee9 Merge UPDATE_DR and UPDATE_IR handling in JTAG state machines Alexey Starikovskiy 2023-09-07 11:29:46 +0300
• 6a0de15bff Parse LoadingRate field Alexey Starikovskiy 2023-09-15 13:03:06 +0300
• 0c89ac9a44 Add GD32VF103 to misc devices Alexey Starikovskiy 2023-09-06 13:23:08 +0300
• 94b62460c5 jtag: shiftDR: (fix daisy chain) when more than one FPGA, a sequence of '0' before and/or after must be sent instead of '1' (fix #189 and #133 Gwenhael Goavec-Merou 2023-09-17 08:59:26 +0200
• 9810735e32 jtag: rework detectChain: try unmasked idcode first Gwenhael Goavec-Merou 2023-09-14 21:53:27 +0200
• 57fc9bcb6f part: machXO3: re-add partially revision Gwenhael Goavec-Merou 2023-09-14 21:52:53 +0200
• df2fb3a5aa wip Alexey Starikovskiy 2023-09-12 19:38:05 +0300
• f9789ab765
  Merge a5f49fa373 into 2c23e8a3b6 UweBonnes 2023-09-12 04:32:30 -0600
• 2c23e8a3b6
  Merge pull request #376 from rarengifoArthrex/master Gwenhael Goavec-Merou 2023-09-11 06:14:08 +0200
• 5e9cc7c440 pass along reset paramaters to provide control to the caller Rodrigo Rengifo 2023-09-10 20:46:08 -0700
• 3e3aea8357 Add print info Alexey Starikovskiy 2023-09-06 14:41:07 +0300
• 13246b666d Add GD32VF103 to misc devices Alexey Starikovskiy 2023-09-06 13:23:08 +0300
• 69c54f7420 Rewrite GOWIN algorithms Alexey Starikovskiy 2023-09-01 20:24:33 +0300
• 90ba2203d2 Make CH347 driver faster Speed up toggleClk Alexey Starikovskiy 2023-09-01 20:24:10 +0300
• 64afae9d05 Move JTAG chain bit init to device_select() Alexey Starikovskiy 2023-09-04 15:40:51 +0300
• 18a1a995b2 precompute TMS sequencies Alexey Starikovskiy 2023-09-07 15:20:08 +0300
• 99b169c5e4 Merge UPDATE_DR and UPDATE_IR handling in JTAG state machines Alexey Starikovskiy 2023-09-07 11:29:46 +0300
• c417ce6746 lattice: spi_put: avoid loop when tx == NULL Gwenhael Goavec-Merou 2023-09-06 15:50:28 +0200
• 61b59ce827 jtag: fix state machine (issue introduce by commit 9e91c3) Gwenhael Goavec-Merou 2023-09-06 15:47:32 +0200
• 8989ac9768
  Merge pull request #372 from aystarik/fixes Gwenhael Goavec-Merou 2023-09-02 07:18:44 +0200
• 9e91c31e31 Fixes for PVS errors Alexey Starikovskiy 2023-09-01 16:35:44 +0300
• fbb8341323
  Merge pull request #370 from aystarik/master Gwenhael Goavec-Merou 2023-08-31 09:46:44 +0200
• 659a310bcc fix windows build Alexey Starikovskiy 2023-08-30 17:47:18 +0300
• a82cbe36a2 Fix MacOS build Alexey Starikovskiy 2023-08-30 17:37:01 +0300
• c32e4f094e Defer write-only USB transactions to better utilize bus Alexey Starikovskiy 2023-08-16 18:03:04 +0300
• 077d730c63 speed up toggleClk Alexey Starikovskiy 2023-08-29 20:22:56 +0300
• ff755f9811 Rewrite GOWIN algorithms Alexey Starikovskiy 2023-08-30 17:16:13 +0300
• 0f3afbcaea Make IDCODE unsigned Alexey Starikovskiy 2023-08-10 13:50:26 +0300
• 8976404b78 Use JTAG state Alexey Starikovskiy 2023-08-10 17:36:18 +0300
• 1908ccd83b make output buffer const Alexey Starikovskiy 2023-08-08 16:54:27 +0300
• d5c72dcc58 doc/FPGAs: adding Gowin GW5A serie Gwenhael Goavec-Merou 2023-08-12 07:41:18 +0200
• e634b479b0
  Merge pull request #364 from Icenowy/gw5ast-138k Gwenhael Goavec-Merou 2023-08-12 07:33:53 +0200
• 0de2ea6b39 gowin: add preliminary support for GW5AST-138 Icenowy Zheng 2023-08-09 22:12:46 +0800
• 6a4e107e42 part: add known ID codes for GW5 series Icenowy Zheng 2023-08-09 22:11:41 +0800
• 11141d7876 doc/boards: adding Avnet Mini-ITX Base Kit Gwenhael Goavec-Merou 2023-08-08 06:52:59 +0200
• 666d9bb456
  Merge pull request #362 from shareefj/feature/avnet_mini_itx Gwenhael Goavec-Merou 2023-08-08 06:48:41 +0200
• 9d22d62a54 part/board: adding Avnet Mini-ITX Shareef Jalloq 2023-08-07 17:06:02 +0100
• e3c8d6be1d board: added QMTECH cyclone10 LP starter kit (10CL016YU484C8G) Gwenhael Goavec-Merou 2023-08-05 11:49:53 +0200
• 5ac611c124 spiOverJtag: intel/altera cyclone10 LP 10CL016YU484C8G Gwenhael Goavec-Merou 2023-08-05 11:48:06 +0200
• 7424ea2af9 part: update altera/intel idcode (same idcode for III/IV/10 LP) Gwenhael Goavec-Merou 2023-08-05 06:47:51 +0200
• fab58d7357
  Merge pull request #360 from enjoy-digital/id_codes_cleanup_and_xcku3p_addition Gwenhael Goavec-Merou 2023-08-04 05:01:31 +0200
• baff0cad1e src/part: Fix Xilinx XC2 ident. Florent Kermarrec 2023-08-03 16:12:51 +0200
• 502f38fb00 src/part.hpp: Add Kintex Ultrascale+ KU3P ID-Code. Florent Kermarrec 2023-08-03 15:59:53 +0200
• 4042646434 src/part.hpp: Add separator for each vendor. Florent Kermarrec 2023-08-03 15:57:51 +0200
• c3e0707f6b src/part.hpp: Reorder families (older first, smaller first) and minor alignment cleanups. Florent Kermarrec 2023-08-03 15:53:59 +0200
• a1dea79230 src/part.hpp: Add separator for each chip family. Florent Kermarrec 2023-08-03 15:44:23 +0200
• 4c5f6f361b svf_jtag: fix -Wmismatched-new-delete delete -> delete[] Gwenhael Goavec-Merou 2023-08-03 07:53:59 +0200
• 6ef87c5466 ftdipp_mpsse: fix format-zero-length snprintf -> memset Gwenhael Goavec-Merou 2023-08-03 07:43:56 +0200
• 0e1e07262c ftdispi: add missing status_pin Gwenhael Goavec-Merou 2023-08-03 07:42:06 +0200
• baa9ab86a5 prepare release v0.11.0 v0.11.0 Gwenhael Goavec-Merou 2023-08-02 11:21:35 +0200
• 28dbf42d5b doc/vendors/xilinx: adding a note for Zynq devices Gwenhael Goavec-Merou 2023-07-31 16:48:20 +0200
• 2f8056cba5 usbBlaster: cleanup Gwenhael Goavec-Merou 2023-07-30 08:51:30 +0200
• 75d98d12e9 jtag: merge init_internal to CTOR, pass verbose to jtag drivers Gwenhael Goavec-Merou 2023-07-30 08:45:57 +0200