gowin: add preliminary support for GW5AST-138

Arora V series is a new series of Gowin FPGA, in which the flashing
process has changed.

Add preliminary support by adding FS file line count and deal with the
SRAM writing process. Flash writing is not yet done.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
This commit is contained in:
Icenowy Zheng 2023-08-09 22:12:46 +08:00
parent 6a4e107e42
commit 0de2ea6b39
3 changed files with 32 additions and 0 deletions

View File

@ -180,6 +180,13 @@ int FsParser::parse()
case 0x0000281b: /* GW2A-55 */
nb_line = 2038;
break;
case 0x0001081b: /* GW5AST-138 */
/*
* FIXME: Lack of information,
* so just accept everything.
*/
nb_line = 65535;
break;
default:
printWarn("Warning: Unknown IDCODE");
nb_line = 0;

View File

@ -78,6 +78,7 @@ Gowin::Gowin(Jtag *jtag, const string filename, const string &file_type, std::st
Device::prog_type_t prg_type, bool external_flash,
bool verify, int8_t verbose): Device(jtag, filename, file_type,
verify, verbose), is_gw1n1(false), is_gw2a(false),
is_gw5a(false),
_external_flash(external_flash),
_spi_sck(BSCAN_SPI_SCK), _spi_cs(BSCAN_SPI_CS),
_spi_di(BSCAN_SPI_DI), _spi_do(BSCAN_SPI_DO),
@ -160,6 +161,15 @@ Gowin::Gowin(Jtag *jtag, const string filename, const string &file_type, std::st
/* FIXME: implement GW2 checksum calculation */
skip_checksum = true;
is_gw2a = true;
break;
case 0x0001081b: /* GW5AST-138 */
case 0x0001181b: /* GW5AT-138 */
case 0x0001281b: /* GW5A-25 */
_external_flash = true;
/* FIXME: implement GW5 checksum calculation */
skip_checksum = true;
is_gw5a = true;
break;
};
if (mcufw.size() > 0) {
@ -256,6 +266,8 @@ void Gowin::program(unsigned int offset, bool unprotect_flash)
length = _fs->getLength();
if (_mode == FLASH_MODE) {
if (is_gw5a)
throw std::runtime_error("Error: write to flash on GW5A is not yet supported");
if (!_external_flash) { /* write into internal flash */
programFlash();
} else { /* write bitstream into external flash */
@ -302,6 +314,13 @@ void Gowin::program(unsigned int offset, bool unprotect_flash)
wr_rd(READ_IDCODE, NULL, 0, NULL, 0);
/* Work around FPGA stuck in Bad Command status */
if (is_gw5a) {
reset();
_jtag->set_state(Jtag::RUN_TEST_IDLE);
_jtag->toggleClk(1000000);
}
/* erase SRAM */
if (!EnableCfg())
return;
@ -618,6 +637,11 @@ bool Gowin::flashSRAM(uint8_t *data, int length)
ProgressBar progress("Flash SRAM", byte_length, 50, _quiet);
/* UG704 3.4.3 */
if (is_gw5a) {
wr_rd(INIT_ADDR, NULL, 0, NULL, 0);
}
/* 2.2.6.4 */
wr_rd(XFER_WRITE, NULL, 0, NULL, 0);

View File

@ -63,6 +63,7 @@ class Gowin: public Device, SPIInterface {
ConfigBitstreamParser *_fs;
bool is_gw1n1;
bool is_gw2a;
bool is_gw5a;
bool skip_checksum; /**< bypass checksum verification (GW2A) */
bool _external_flash; /**< select between int or ext flash */
uint8_t _spi_sck; /**< clk signal offset in bscan SPI */