spiOverJtag: Add xcku3p_ffva676 support.

spiOverJtag/Makefile

@@ -11,6 +11,7 @@ XILINX_PARTS := xc3s500evq100 \
 	xc7k160tffg676 \
 	xc7k325tffg676 xc7k325tffg900 \
 	xc7k420tffg901 \
+	xcku3p-ffva676 \
 	xcku5p-ffvb676 \
 	xcvu9p-flga2104 xcvu37p-fsvh2892
 XILINX_BIT_FILES := $(addsuffix .bit.gz,$(addprefix spiOverJtag_, $(XILINX_PARTS)))

spiOverJtag/build.py

@@ -96,6 +96,7 @@ if tool in ["ise", "vivado"]:
         "xc7s50csga324"    : "xc7s_csga324",
         "xcvu9p-flga2104" : "xcvu9p_flga2104",
         "xcvu37p-fsvh2892" : "xcvu37p_fsvh2892",
+        "xcku3p-ffva676" : "xcku3p_ffva676",
         "xcku5p-ffvb676" : "xcku5p_ffvb676",
         }[part]
     if tool == "ise":
@@ -141,6 +142,8 @@ if tool in ["ise", "vivado"]:
                     'paramtype': 'vlogdefine',
                     'description': 'secondary flash',
                     'default': 1}
+            elif part == "xcku3p-ffva676":
+                tool_options = {'part': part + '-2-e'}
             elif part == "xcvu37p-fsvh2892":
                 tool_options = {'part': part + '-2L-e'}
         else:

spiOverJtag/constr_xcku3p_ffva676.xdc

@@ -0,0 +1,7 @@
+set_property BITSTREAM.GENERAL.COMPRESS TRUE [current_design]
+set_property CONFIG_VOLTAGE 1.8 [current_design]
+# Table 1-2 from UG570
+set_property CFGBVS GND [current_design]
+
+# Primary QSPI flash
+# Connection done through the STARTUPE3 block