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156 Commits

Author SHA1 Message Date
Matthias Koefferlein 90df9451b6 WIP: reworked log enabling in LVS, added 'no_lvs_hints' feature, updated tests 2022-08-13 18:30:02 +02:00
Matthias Köfferlein 7ffdc211e5
Fixed issue-1135 (LVS mismatch on parallel devices) (#1136) 
* Fixed issue-1135 (LVS mismatch on parallel devices)

The fix consists of a more elaborate device identity analysis
following the topological matching. In this step, the devices
are identified according to their connections and parameters.
It is important to properly identify devices taking their
parameters into account as well as their connections.

* Second part of issue fixed (inverter chain ambiguity)

* Added test

* Updated tests

* Updated golden test results

* Updated golden test data for Windows

Co-authored-by: klayoutmatthias <matthias@klayout.org>
 2022-08-10 20:27:11 +02:00
Matthias Köfferlein 2f8a7149d3
Fixed issue-1111 (#1112) 2022-07-03 09:35:40 +02:00
Matthias Koefferlein 4d55ba2dc5 New testdata variants for MSVC2017 2022-03-18 23:13:21 +01:00
Matthias Koefferlein 5b9f194ecc Forget last commit - problem was that golden netlists should not be compared with net names as those are node numbers and they might change with C++ STL implementation 2022-03-18 00:10:00 +01:00
Matthias Koefferlein d3093f83c3 Updated test data for MSVC2017 2022-03-17 18:00:00 +01:00
Matthias Köfferlein 4a06bc1bb5
Another change related to issue-1011 (aligning flat and deep mode text representation for LVS) (#1037) 2022-03-16 23:33:08 +01:00
Matthias Koefferlein 9f0052e55b Fixed LVS testdata (merge issue) 2022-03-15 23:41:19 +01:00
Matthias Köfferlein 7d78194cf0
Issue 1021 (#1026) - LVS match issue on SRAM sample 
* First step for solution:

Problem was: the ambiguity resolver was making decisions which later resulted in
a name conflict. Later on, another branch of the backtracking algorithm came
across the same situation but decided based on names, creating an conflict.

First part of the solution is to establish the backtracking information
during ambiguity resolution and using that rather than an alternative branch
later on. This avoids this conflict, but does not favor names as mandated
by the "use_names" flag. This will be the second step of the solution.

* Bugfixed solution (partially)

* Introducing third pass in netlist compare

The second pass is "ambiguity resolution by name" and
is skipped if "consider_net_names" is false. The third
pass then is ignoring the names.

* Bugfix

* Comment fixed, test updates

* Added tests

* Added test data variant for CentOS 8
 2022-03-15 21:14:32 +01:00
Matthias Köfferlein e9c5782c51
Issue 1011 (#1027) - DRC violation on texts in deep mode 
* Fixed issue-1011 by using single-point polygons for texts in deep mode. Tests need fixing.

* Updated tests (text become a single point)

* Added test for issue-1011
 2022-03-15 21:13:57 +01:00
Matthias Köfferlein 0005c5d742
Fixed #971 (double compare fails in LVS) (#1001) 2022-02-12 17:04:47 +01:00
Matthias Koefferlein a22ee41414 Updated test data 2021-08-01 00:32:51 +02:00
Matthias Koefferlein 218e22dfa9 Updated test data 2021-07-31 23:12:12 +02:00
Matthias Koefferlein 23dc0e0f5a testdata update 2021-07-31 22:18:42 +02:00
Matthias Koefferlein 58650a57dd testdata update 2021-07-31 22:11:35 +02:00
Matthias Koefferlein 05050e6091 Added missing file 2021-07-31 08:44:21 +02:00
Matthias Koefferlein 48b5193414 Updated test data. 2021-07-31 00:53:18 +02:00
Matthias Koefferlein b744f89dda Updated test data. 2021-07-31 00:03:05 +02:00
Matthias Koefferlein f7ebe9a950 Added test data for CentOS-7 2021-07-30 22:56:35 +02:00
Matthias Koefferlein 0f09dfe8eb Added LVS tests, updated doc. 2021-07-29 22:56:11 +02:00
Matthias Koefferlein 23d0fcae8d Added new tests 2021-07-19 08:32:55 +02:00
Matthias Koefferlein 4e54715d64 Merge branch 'wip-lvs' 2021-07-06 23:40:44 +02:00
Matthias Koefferlein 4e0d8d92ef Updated doc, reverted netlist writer to write all parameters - it will only write primary parameters for R, L and C 2021-07-05 22:45:40 +02:00
Matthias Koefferlein 24c34f1d60 Updated test data 2021-07-05 22:29:33 +02:00
Matthias Koefferlein e34fc8967a Some enhancements 
* Device#net_for_terminal with terminal name
* Spice writer now dumps all parameters for resistors and caps (also secondary)
* Enabled Spice writer delegate in LVS (spice_format(...))
* Device class factories for built-in device extractors
 2021-07-05 22:22:13 +02:00
Matthias Koefferlein 1a0b05e663 Updated test data 2021-07-02 23:38:38 +02:00
Matthias Koefferlein 2d2cf11308 Added tests for new features. 2021-06-28 23:08:02 +02:00
Matthias Koefferlein ab70c42c68 Some enhancements for strong matching of nets 
* same_nets! method for strong matching
* same_nets and same_nets! except glob pattern to circuits and nets
* both observe case sensitivity
* helper functions for case sensitivity Netlist#is_case_sensitive?, Netlist#case_sensitive=
* Netlist#nets_by_name to get nets from pattern
 2021-06-28 22:33:46 +02:00
Matthias Koefferlein dae5d3227a Enhanced documentation for blank_circuit, consilidated 'blank_circuit' method provided which can be used anywhere 2021-06-28 19:51:57 +02:00
Matthias Koefferlein 24afd571f0 LVS: can be used anywhere now: tolerance and join_symmetric_nets 2021-06-28 18:56:07 +02:00
Matthias Koefferlein c24c0933bf Bugfix: blackbox mode/abstract pins 
Abstract pins are created when pins are not attached to any or only to passive nets
(passive nets are those without device terminals or subcircuit pins).

1. Such pins were treated swappable. Now named pins will not be treated
   swappable but are mapped by name. This enables blackbox models where
   the pins are labelled and must correspond to schematic pins.
2. A bug was present which lead to incorrect handling of abstract
   nets in net compare.
 2021-06-27 22:56:28 +02:00
Matthias Koefferlein fcb966393a Fixed #806: first, the internal error gone. Second, the implementation of custom comparers is simplified as the 'equals' method does not need to be implemented. 2021-05-26 22:39:28 +02:00
Matthias Koefferlein 94e7f0dbd3 Updated test data, fixed DRC/LVS doc. 2021-05-25 23:30:43 +02:00
Matthias Koefferlein c48be51cb6 Made SPICE netlist elements case insensitive in LVS scripts 2021-03-24 22:11:15 +01:00
Matthias Koefferlein 1495d9521c Tests updated. 2021-03-15 16:51:56 +01:00
Matthias Köfferlein 10eee4d895
Fixed #709. (#714) 2021-01-31 19:21:00 +01:00
Matthias Köfferlein b413cb9d74
Netlist compare: Ambiguity resolution through name matching now default (can be turned off) (#594) 
* WIP: some refactoring

* WIP: some refactoring

* Netlist compare: introducing ambiguity resolution by net names

By default now net names are used for resolving ambiguities.
If net names match, they will be used to associate nets if the
choice is ambiguous. This is usually much faster and more reliable
than trying to resolve ambiguities through topology analysis.

This feature can be disabled using "consider_net_names(false)" in
the LVS script.

* Some refactoring, Jenkinsfile modified for better test coverage
 2020-06-29 20:47:57 +02:00
Matthias Koefferlein 43ceeecf6e Golden test data for Ubuntu 20 and Windows, pipe output stream for Windows. 2020-06-27 09:50:55 +02:00
Matthias Koefferlein 868adbceab Updated golden test data 2020-06-26 23:52:18 +02:00
Matthias Koefferlein b91e2324d0 Netlist compare enhancement 
This enhancement targets towards a better resolution
of ambiguities. The enhancement is to utilize knowledge
about device and subcircuit equivalences to avoid stale
branches of the ambiguity resolution tree.

So far following these branches could lead to a
contradictions which render an ambiguitiy resolution
choice useless.

One effect of this change is enhanced reproducibility
of the matching log because some pointers are not
involved anymore.
 2020-06-26 17:01:03 +02:00
Matthias Köfferlein 3246e0d36f
Fixed #565 (SPICE global nets must not produce pins if not present) (#567) 
* Fixed #565 (SPICE global nets must not produce pins if not present)

* Fixed unit tests.
 2020-05-26 23:47:59 +02:00
Matthias Koefferlein ee53869cbd Connect_implicit test with labels. 2020-05-23 21:21:30 +02:00
Matthias Koefferlein 6f7cca81fb Updated test data 2020-05-23 13:19:52 +02:00
Matthias Koefferlein c682cc85d0 Generalized concept of region, texts etc. into 'shape collections'. Fixed LVS and DRC tests. 2020-05-21 23:59:30 +02:00
Matthias Koefferlein c6b48acc76 Some small enhancements 
LVS: max_branch_complexity was wrong and missing from doc.

Updated test cases so MSVC 2017 builds should pass.

Windows build.bat updated so debug builds can be made.
 2020-03-04 21:48:00 +01:00
Matthias Koefferlein 621cb9edcd Another testdata fix for CentOS 6 2020-02-28 07:12:24 +01:00
Matthias Koefferlein 076206074f Updated tests for CentOS 6 2020-02-27 23:46:02 +01:00
Matthias Koefferlein 02e38a2cd1 Merge branch 'issue-482' into issue-471 2020-02-27 15:49:35 +01:00
Matthias Koefferlein 8b73dffcfe Implementation done. Added tests. 2020-02-27 15:40:06 +01:00
Matthias Koefferlein 76f5e19ed8 Enhanced LVS with 'join_symmetric_nets'. Updated doc. Added test. 2020-02-27 13:35:36 +01:00
Matthias Koefferlein d0e6efa484 Implemented #444 (double-height standard-cell support). 2019-12-17 00:12:36 +01:00
Matthias Koefferlein 3441070908 Merge branch 'issue-448' into dvb 2019-12-15 23:57:42 +01:00
Matthias Koefferlein 3e32ca1ada Updated test data for Windows. 2019-12-15 23:54:17 +01:00
Matthias Koefferlein 12c040aa6c Merge branch 'issue-448' into dvb 2019-12-15 20:51:35 +01:00
Matthias Koefferlein e0be042e67 Test data update for CentOS 6 2019-12-15 20:48:56 +01:00
Matthias Koefferlein b802220ae9 Updated test data 2019-12-15 10:48:11 +01:00
Matthias Koefferlein fccd78a222 Fixed #448 and updated test data 2019-12-15 10:37:51 +01:00
Matthias Koefferlein 06a68b77d2 Updated test data for windows. 2019-12-15 10:17:10 +01:00
Matthias Koefferlein d0fc1edf35 Further updates of test data. 2019-12-15 01:45:15 +01:00
Matthias Koefferlein 782f6fe601 BUGFIX: the L2N and LVSDB writer was writing too much 
Sometimes, shapes from child cells were propagated into
parent cells in the L2N and LVSDB output.

Because of this fix, many testdata files have to be updated.
 2019-12-15 01:29:56 +01:00
Matthias Koefferlein ccb1871fb3 Updates for 'cheats' testcase which was entirely broken. 2019-11-23 19:24:59 +01:00
Matthias Koefferlein d5506a176a WIP: first implementation - needs testing. 2019-11-23 01:20:22 +01:00
Matthias Koefferlein ab4f632527 Another unit test golden data set for MinGW32 2019-11-12 20:17:27 +01:00
Matthias Koefferlein 3dffe91f88 Attempt to fix testdata for MSVC 2019-11-03 02:30:52 +01:00
Matthias Koefferlein 7910ddc6a3 Fixed a compiler warning, testcase update (part 1) 2019-11-02 20:39:59 +01:00
Matthias Koefferlein e25d4784ea Updated tests. 2019-10-26 01:48:50 +02:00
Matthias Koefferlein bf18000877 Added tests (breakout cells, LVS cheats) 2019-10-18 00:25:51 +02:00
Matthias Koefferlein ca747771ac Allow preempt LVS configuration 
same_nets, equivalent_pins, same_circuits and same_device_classes
can now be given at the beginning of the LVS script. This will
simplify building universal scripts with the run specific part at
the beginning (one "load" section).

The price are somewhat less specific error messages when something
fails in these methods.
 2019-10-01 00:21:27 +02:00
Matthias Koefferlein a3cecb2ebe WIP: enable multiple layout versions of one schematic circuit using 'same_circuit' 2019-09-30 23:08:15 +02:00
Matthias Koefferlein 55475e905f Fixed #352 (LVS should ignore equivalent_pins line for non-existing circuits) 
Same is true now for same_nets and same_circuits.
 2019-09-15 00:18:29 +02:00
Matthias Koefferlein ab66186db4 Updated MSVC test golden data 2019-08-30 13:03:37 +02:00
Matthias Koefferlein 550e2622bf Put more amphasis on net names to resolve ambiguities 
The problem was that with the floating test case, the
ambiguity resolution sometimes assigned the wrong pins
and floating pins/connected pins were swapped.

One option is to make the ambiguity resolver consider
the pin connection state when tenatively evaluating
nodes.

Another option is to put more emphasis on net names
and use them for ambiguity resolution. This has helped
here.
 2019-08-30 10:24:55 +02:00
Matthias Koefferlein 60ed0cdc89 Updated test golden data (mainly: nets are not purged when there is a subcircuit pin on it) 2019-08-29 23:26:03 +02:00
Matthias Koefferlein ef66becfdb Fixed LVS test golden data for MSVC 2019-08-26 19:02:38 +02:00
Matthias Koefferlein c543fe7a44 Added test for floating device terminals. 2019-08-24 19:42:00 +02:00
Matthias Koefferlein 3a93bc2162 Added test for mixed-hierarchy LVS case. 2019-08-24 00:13:38 +02:00
Matthias Koefferlein 3ae848bff4 Provide test case for spice reader with delegate for devices as subcircuits. Small bugfix in spice reader: wrong line number in warning. 2019-08-23 23:13:04 +02:00
Matthias Koefferlein 45cdefcf9a Provide strict mode for device classes, dmos3/dmos4 for LVS 2019-08-20 23:12:17 +02:00
Matthias Koefferlein 207e44837c LVS: allow missing device classes in reference schematic 
Reasoning: some devices may simply not be used in the
reference schematic.
 2019-08-19 22:26:50 +02:00
Matthias Koefferlein 71f646c24f WIP: updated test data for latest updates, don't sort LVSDB on reading for consistency 2019-07-27 21:42:51 +02:00
Matthias Koefferlein 169cc5246d WIP: updated golden data for new device sorting in cross reference. 2019-07-27 20:37:41 +02:00
Matthias Koefferlein b4fa4b1bae Flattening of layout with circuit flattening. 
Technically, the layout isn't flattened, but connections are made
which allow regenerating the layout even after the circuit
has been flattened.
 2019-07-27 00:37:22 +02:00
Matthias Koefferlein 198b5bb5e4 Updated another golden testdata variant for MSVC 2019-07-24 23:29:13 +02:00
Matthias Koefferlein 45d9261ba9 Updated test golden data variants for MSVC builds 2019-07-24 22:15:15 +02:00
Matthias Koefferlein 64d32c1ae9 LVS tests are more stable because of sorting of terminal names before assigning them (no hash order) 2019-07-24 21:23:19 +02:00
Matthias Koefferlein afb5cea576 Added "device_scaling" to LVS 
Plus: added some missing files

Implementation details:
* scaling factor was introduced in DeviceExtractor::extract
* for easy implementation this is available in "sdbu"
* "sdbu" is made available in GSI
* to test this, the db::compare_netlist had to be enhanced to
  exactly check device parameters
* enhancement of LVS script framework and doc updates
 2019-07-24 00:16:47 +02:00
Matthias Koefferlein 6e6e449eef Consolidated test data for lvs:full - there are too many variants to support pure text compare. We use the netlist comparer now. 2019-07-21 09:20:44 +02:00
Matthias Koefferlein c268b7b7c3 Provide golden netlist testdata for LVS test - variant 3 2019-07-19 16:47:57 +02:00
Matthias Köfferlein b3e9915259 Provide special LVS test golden data for Windows (slight differences in shape order etc.) 2019-07-16 00:40:43 +02:00
Matthias Koefferlein c7e883cdb2 SPICE reader now assigned net names as pin names. 2019-07-12 19:00:27 +02:00
Matthias Koefferlein a47190f3ab Write short versions of LVS and L2N DB by default. 2019-07-12 17:43:43 +02:00
Matthias Koefferlein e32ee570c7 Alternative algorithm for subcircuit matching - tests updated, refactoring 2019-07-11 23:19:02 +02:00
Matthias Koefferlein 0d9273aaf6 WIP: new subcircuit match algorithm 2019-07-11 00:16:36 +02:00
Matthias Koefferlein 1e3d62ca3a Provide bulk label for blackboxed cells 2019-07-09 20:23:47 +02:00
Matthias Koefferlein cef96902ad Boundary for circuits, reverted automatic generation of global pins 
- global pins have been generated for device cells too and lead
  to implicit pins which may not be desired. The original problem
  was how to make abstract circuits comparable. This has to be
  solved differently.
- Circuit boundaries are good for displaying the boxes for
  abstract circuits
 2019-07-09 19:55:48 +02:00
Matthias Koefferlein bdb8a7bcc2 WIP: reverted modifications on SPICE reader. 2019-07-08 21:51:59 +02:00
Matthias Koefferlein 9625caea65 WIP: added full LVS test. 2019-07-08 21:43:06 +02:00
Matthias Koefferlein b48453633f WIP: some fixes and small enhancements. New tests. 2019-07-08 00:09:10 +02:00
Matthias Koefferlein bc2d9448d6 Providing LVS tests. 2019-07-07 21:33:28 +02:00
Matthias Koefferlein 95a1e38fe3 WIP: better reproducablility for .lvsdb layer names, updated tests. 2019-07-07 19:39:00 +02:00