Commit Graph

156 Commits

Author SHA1 Message Date
Matthias Koefferlein d0e6efa484 Implemented #444 (double-height standard-cell support). 2019-12-17 00:12:36 +01:00
Matthias Koefferlein 3441070908 Merge branch 'issue-448' into dvb 2019-12-15 23:57:42 +01:00
Matthias Koefferlein 3e32ca1ada Updated test data for Windows. 2019-12-15 23:54:17 +01:00
Matthias Koefferlein 12c040aa6c Merge branch 'issue-448' into dvb 2019-12-15 20:51:35 +01:00
Matthias Koefferlein e0be042e67 Test data update for CentOS 6 2019-12-15 20:48:56 +01:00
Matthias Koefferlein b802220ae9 Updated test data 2019-12-15 10:48:11 +01:00
Matthias Koefferlein fccd78a222 Fixed #448 and updated test data 2019-12-15 10:37:51 +01:00
Matthias Koefferlein 06a68b77d2 Updated test data for windows. 2019-12-15 10:17:10 +01:00
Matthias Koefferlein d0fc1edf35 Further updates of test data. 2019-12-15 01:45:15 +01:00
Matthias Koefferlein 782f6fe601 BUGFIX: the L2N and LVSDB writer was writing too much
Sometimes, shapes from child cells were propagated into
parent cells in the L2N and LVSDB output.

Because of this fix, many testdata files have to be updated.
2019-12-15 01:29:56 +01:00
Matthias Koefferlein ccb1871fb3 Updates for 'cheats' testcase which was entirely broken. 2019-11-23 19:24:59 +01:00
Matthias Koefferlein d5506a176a WIP: first implementation - needs testing. 2019-11-23 01:20:22 +01:00
Matthias Koefferlein ab4f632527 Another unit test golden data set for MinGW32 2019-11-12 20:17:27 +01:00
Matthias Koefferlein 3dffe91f88 Attempt to fix testdata for MSVC 2019-11-03 02:30:52 +01:00
Matthias Koefferlein 7910ddc6a3 Fixed a compiler warning, testcase update (part 1) 2019-11-02 20:39:59 +01:00
Matthias Koefferlein e25d4784ea Updated tests. 2019-10-26 01:48:50 +02:00
Matthias Koefferlein bf18000877 Added tests (breakout cells, LVS cheats) 2019-10-18 00:25:51 +02:00
Matthias Koefferlein ca747771ac Allow preempt LVS configuration
same_nets, equivalent_pins, same_circuits and same_device_classes
can now be given at the beginning of the LVS script. This will
simplify building universal scripts with the run specific part at
the beginning (one "load" section).

The price are somewhat less specific error messages when something
fails in these methods.
2019-10-01 00:21:27 +02:00
Matthias Koefferlein a3cecb2ebe WIP: enable multiple layout versions of one schematic circuit using 'same_circuit' 2019-09-30 23:08:15 +02:00
Matthias Koefferlein 55475e905f Fixed #352 (LVS should ignore equivalent_pins line for non-existing circuits)
Same is true now for same_nets and same_circuits.
2019-09-15 00:18:29 +02:00
Matthias Koefferlein ab66186db4 Updated MSVC test golden data 2019-08-30 13:03:37 +02:00
Matthias Koefferlein 550e2622bf Put more amphasis on net names to resolve ambiguities
The problem was that with the floating test case, the
ambiguity resolution sometimes assigned the wrong pins
and floating pins/connected pins were swapped.

One option is to make the ambiguity resolver consider
the pin connection state when tenatively evaluating
nodes.

Another option is to put more emphasis on net names
and use them for ambiguity resolution. This has helped
here.
2019-08-30 10:24:55 +02:00
Matthias Koefferlein 60ed0cdc89 Updated test golden data (mainly: nets are not purged when there is a subcircuit pin on it) 2019-08-29 23:26:03 +02:00
Matthias Koefferlein ef66becfdb Fixed LVS test golden data for MSVC 2019-08-26 19:02:38 +02:00
Matthias Koefferlein c543fe7a44 Added test for floating device terminals. 2019-08-24 19:42:00 +02:00
Matthias Koefferlein 3a93bc2162 Added test for mixed-hierarchy LVS case. 2019-08-24 00:13:38 +02:00
Matthias Koefferlein 3ae848bff4 Provide test case for spice reader with delegate for devices as subcircuits. Small bugfix in spice reader: wrong line number in warning. 2019-08-23 23:13:04 +02:00
Matthias Koefferlein 45cdefcf9a Provide strict mode for device classes, dmos3/dmos4 for LVS 2019-08-20 23:12:17 +02:00
Matthias Koefferlein 207e44837c LVS: allow missing device classes in reference schematic
Reasoning: some devices may simply not be used in the
reference schematic.
2019-08-19 22:26:50 +02:00
Matthias Koefferlein 71f646c24f WIP: updated test data for latest updates, don't sort LVSDB on reading for consistency 2019-07-27 21:42:51 +02:00
Matthias Koefferlein 169cc5246d WIP: updated golden data for new device sorting in cross reference. 2019-07-27 20:37:41 +02:00
Matthias Koefferlein b4fa4b1bae Flattening of layout with circuit flattening.
Technically, the layout isn't flattened, but connections are made
which allow regenerating the layout even after the circuit
has been flattened.
2019-07-27 00:37:22 +02:00
Matthias Koefferlein 198b5bb5e4 Updated another golden testdata variant for MSVC 2019-07-24 23:29:13 +02:00
Matthias Koefferlein 45d9261ba9 Updated test golden data variants for MSVC builds 2019-07-24 22:15:15 +02:00
Matthias Koefferlein 64d32c1ae9 LVS tests are more stable because of sorting of terminal names before assigning them (no hash order) 2019-07-24 21:23:19 +02:00
Matthias Koefferlein afb5cea576 Added "device_scaling" to LVS
Plus: added some missing files

Implementation details:
* scaling factor was introduced in DeviceExtractor::extract
* for easy implementation this is available in "sdbu"
* "sdbu" is made available in GSI
* to test this, the db::compare_netlist had to be enhanced to
  exactly check device parameters
* enhancement of LVS script framework and doc updates
2019-07-24 00:16:47 +02:00
Matthias Koefferlein 6e6e449eef Consolidated test data for lvs:full - there are too many variants to support pure text compare. We use the netlist comparer now. 2019-07-21 09:20:44 +02:00
Matthias Koefferlein c268b7b7c3 Provide golden netlist testdata for LVS test - variant 3 2019-07-19 16:47:57 +02:00
Matthias Köfferlein b3e9915259 Provide special LVS test golden data for Windows (slight differences in shape order etc.) 2019-07-16 00:40:43 +02:00
Matthias Koefferlein c7e883cdb2 SPICE reader now assigned net names as pin names. 2019-07-12 19:00:27 +02:00
Matthias Koefferlein a47190f3ab Write short versions of LVS and L2N DB by default. 2019-07-12 17:43:43 +02:00
Matthias Koefferlein e32ee570c7 Alternative algorithm for subcircuit matching - tests updated, refactoring 2019-07-11 23:19:02 +02:00
Matthias Koefferlein 0d9273aaf6 WIP: new subcircuit match algorithm 2019-07-11 00:16:36 +02:00
Matthias Koefferlein 1e3d62ca3a Provide bulk label for blackboxed cells 2019-07-09 20:23:47 +02:00
Matthias Koefferlein cef96902ad Boundary for circuits, reverted automatic generation of global pins
- global pins have been generated for device cells too and lead
  to implicit pins which may not be desired. The original problem
  was how to make abstract circuits comparable. This has to be
  solved differently.
- Circuit boundaries are good for displaying the boxes for
  abstract circuits
2019-07-09 19:55:48 +02:00
Matthias Koefferlein bdb8a7bcc2 WIP: reverted modifications on SPICE reader. 2019-07-08 21:51:59 +02:00
Matthias Koefferlein 9625caea65 WIP: added full LVS test. 2019-07-08 21:43:06 +02:00
Matthias Koefferlein b48453633f WIP: some fixes and small enhancements. New tests. 2019-07-08 00:09:10 +02:00
Matthias Koefferlein bc2d9448d6 Providing LVS tests. 2019-07-07 21:33:28 +02:00
Matthias Koefferlein 95a1e38fe3 WIP: better reproducablility for .lvsdb layer names, updated tests. 2019-07-07 19:39:00 +02:00
Matthias Koefferlein 0595ec2e0f WIP: one more test for LVS 2019-07-06 09:08:32 +02:00
Matthias Koefferlein 2f6aae7204 WIP: refactoring, added first tests for LVS 2019-07-06 08:52:40 +02:00
Matthias Koefferlein 8aa6f4edcf WIP: added more test data, doc links 2019-07-02 02:03:58 +02:00
Matthias Koefferlein ae71356052 Added reference circuit 2019-07-02 00:30:50 +02:00
Matthias Koefferlein 5bfed544b7 Added inverter test layout 2019-07-02 00:27:05 +02:00
Matthias Koefferlein 9f26553d4b Added inverter test layout 2019-07-02 00:25:31 +02:00